decoder.isa revision 12104
12686Sksewell@umich.edu// -*- mode:c++ -*- 22100SN/A 35254Sksewell@umich.edu// Copyright (c) 2007 MIPS Technologies, Inc. 45254Sksewell@umich.edu// All rights reserved. 55254Sksewell@umich.edu// 65254Sksewell@umich.edu// Redistribution and use in source and binary forms, with or without 75254Sksewell@umich.edu// modification, are permitted provided that the following conditions are 85254Sksewell@umich.edu// met: redistributions of source code must retain the above copyright 95254Sksewell@umich.edu// notice, this list of conditions and the following disclaimer; 105254Sksewell@umich.edu// redistributions in binary form must reproduce the above copyright 115254Sksewell@umich.edu// notice, this list of conditions and the following disclaimer in the 125254Sksewell@umich.edu// documentation and/or other materials provided with the distribution; 135254Sksewell@umich.edu// neither the name of the copyright holders nor the names of its 145254Sksewell@umich.edu// contributors may be used to endorse or promote products derived from 155254Sksewell@umich.edu// this software without specific prior written permission. 165254Sksewell@umich.edu// 175254Sksewell@umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 185254Sksewell@umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 195254Sksewell@umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 205254Sksewell@umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 215254Sksewell@umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 225254Sksewell@umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 235254Sksewell@umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 245254Sksewell@umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 255254Sksewell@umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 265254Sksewell@umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 275254Sksewell@umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 285254Sksewell@umich.edu// 295254Sksewell@umich.edu// Authors: Korey Sewell 305254Sksewell@umich.edu// Brett Miller 315254Sksewell@umich.edu// Jaidev Patwardhan 322706Sksewell@umich.edu 332022SN/A//////////////////////////////////////////////////////////////////// 342022SN/A// 352043SN/A// The actual MIPS32 ISA decoder 362024SN/A// ----------------------------- 372024SN/A// The following instructions are specified in the MIPS32 ISA 382043SN/A// Specification. Decoding closely follows the style specified 392686Sksewell@umich.edu// in the MIPS32 ISA specification document starting with Table 404661Sksewell@umich.edu// A-2 (document available @ http://www.mips.com) 412022SN/A// 422083SN/Adecode OPCODE_HI default Unknown::unknown() { 432686Sksewell@umich.edu //Table A-2 442101SN/A 0x0: decode OPCODE_LO { 452043SN/A 0x0: decode FUNCTION_HI { 462043SN/A 0x0: decode FUNCTION_LO { 472101SN/A 0x1: decode MOVCI { 482101SN/A format BasicOp { 496384Sgblack@eecs.umich.edu 0: movf({{ 506384Sgblack@eecs.umich.edu Rd = (getCondCode(FCSR, CC) == 0) ? Rd : Rs; 516384Sgblack@eecs.umich.edu }}); 526384Sgblack@eecs.umich.edu 1: movt({{ 536384Sgblack@eecs.umich.edu Rd = (getCondCode(FCSR, CC) == 1) ? Rd : Rs; 546384Sgblack@eecs.umich.edu }}); 552101SN/A } 562101SN/A } 572101SN/A 582046SN/A format BasicOp { 592686Sksewell@umich.edu //Table A-3 Note: "Specific encodings of the rd, rs, and 602686Sksewell@umich.edu //rt fields are used to distinguish SLL, SSNOP, and EHB 612686Sksewell@umich.edu //functions 622470SN/A 0x0: decode RS { 632686Sksewell@umich.edu 0x0: decode RT_RD { 644661Sksewell@umich.edu 0x0: decode SA default Nop::nop() { 655222Sksewell@umich.edu 0x1: ssnop({{;}}); 665222Sksewell@umich.edu 0x3: ehb({{;}}); 672686Sksewell@umich.edu } 688588Sgblack@eecs.umich.edu default: sll({{ Rd = Rt_uw << SA; }}); 692470SN/A } 702241SN/A } 712101SN/A 722495SN/A 0x2: decode RS_SRL { 732495SN/A 0x0:decode SRL { 748588Sgblack@eecs.umich.edu 0: srl({{ Rd = Rt_uw >> SA; }}); 752101SN/A 766384Sgblack@eecs.umich.edu //Hardcoded assuming 32-bit ISA, 776384Sgblack@eecs.umich.edu //probably need parameter here 786384Sgblack@eecs.umich.edu 1: rotr({{ 798588Sgblack@eecs.umich.edu Rd = (Rt_uw << (32 - SA)) | (Rt_uw >> SA); 806384Sgblack@eecs.umich.edu }}); 812495SN/A } 822101SN/A } 832101SN/A 842495SN/A 0x3: decode RS { 852495SN/A 0x0: sra({{ 862495SN/A uint32_t temp = Rt >> SA; 872495SN/A if ( (Rt & 0x80000000) > 0 ) { 882495SN/A uint32_t mask = 0x80000000; 892495SN/A for(int i=0; i < SA; i++) { 902495SN/A temp |= mask; 912495SN/A mask = mask >> 1; 922495SN/A } 932495SN/A } 942495SN/A Rd = temp; 952495SN/A }}); 962495SN/A } 972101SN/A 988588Sgblack@eecs.umich.edu 0x4: sllv({{ Rd = Rt_uw << Rs<4:0>; }}); 992101SN/A 1002101SN/A 0x6: decode SRLV { 1018588Sgblack@eecs.umich.edu 0: srlv({{ Rd = Rt_uw >> Rs<4:0>; }}); 1022101SN/A 1036384Sgblack@eecs.umich.edu //Hardcoded assuming 32-bit ISA, 1046384Sgblack@eecs.umich.edu //probably need parameter here 1056384Sgblack@eecs.umich.edu 1: rotrv({{ 1068588Sgblack@eecs.umich.edu Rd = (Rt_uw << (32 - Rs<4:0>)) | 1078588Sgblack@eecs.umich.edu (Rt_uw >> Rs<4:0>); 1086384Sgblack@eecs.umich.edu }}); 1092101SN/A } 1102101SN/A 1112495SN/A 0x7: srav({{ 1122495SN/A int shift_amt = Rs<4:0>; 1132495SN/A 1142495SN/A uint32_t temp = Rt >> shift_amt; 1152495SN/A 1166384Sgblack@eecs.umich.edu if ((Rt & 0x80000000) > 0) { 1176384Sgblack@eecs.umich.edu uint32_t mask = 0x80000000; 1186384Sgblack@eecs.umich.edu for (int i = 0; i < shift_amt; i++) { 1196384Sgblack@eecs.umich.edu temp |= mask; 1206384Sgblack@eecs.umich.edu mask = mask >> 1; 1212495SN/A } 1226384Sgblack@eecs.umich.edu } 1232495SN/A Rd = temp; 1242495SN/A }}); 1252043SN/A } 1262043SN/A } 1272025SN/A 1282043SN/A 0x1: decode FUNCTION_LO { 1292686Sksewell@umich.edu //Table A-3 Note: "Specific encodings of the hint field are 1302686Sksewell@umich.edu //used to distinguish JR from JR.HB and JALR from JALR.HB" 1312123SN/A format Jump { 1322101SN/A 0x0: decode HINT { 1336376Sgblack@eecs.umich.edu 0x1: jr_hb({{ 1346376Sgblack@eecs.umich.edu Config1Reg config1 = Config1; 1356376Sgblack@eecs.umich.edu if (config1.ca == 0) { 1367792Sgblack@eecs.umich.edu NNPC = Rs; 1376376Sgblack@eecs.umich.edu } else { 1386376Sgblack@eecs.umich.edu panic("MIPS16e not supported\n"); 1396376Sgblack@eecs.umich.edu } 1406376Sgblack@eecs.umich.edu }}, IsReturn, ClearHazards); 1416376Sgblack@eecs.umich.edu default: jr({{ 1426376Sgblack@eecs.umich.edu Config1Reg config1 = Config1; 1436376Sgblack@eecs.umich.edu if (config1.ca == 0) { 1447792Sgblack@eecs.umich.edu NNPC = Rs; 1456376Sgblack@eecs.umich.edu } else { 1466376Sgblack@eecs.umich.edu panic("MIPS16e not supported\n"); 1476376Sgblack@eecs.umich.edu } 1486376Sgblack@eecs.umich.edu }}, IsReturn); 1492101SN/A } 1502042SN/A 1512101SN/A 0x1: decode HINT { 1527720Sgblack@eecs.umich.edu 0x1: jalr_hb({{ 1537792Sgblack@eecs.umich.edu Rd = NNPC; 1547792Sgblack@eecs.umich.edu NNPC = Rs; 1557720Sgblack@eecs.umich.edu }}, IsCall, ClearHazards); 1567720Sgblack@eecs.umich.edu default: jalr({{ 1577792Sgblack@eecs.umich.edu Rd = NNPC; 1587792Sgblack@eecs.umich.edu NNPC = Rs; 1597720Sgblack@eecs.umich.edu }}, IsCall); 1602101SN/A } 1612101SN/A } 1622042SN/A 1632101SN/A format BasicOp { 1642686Sksewell@umich.edu 0x2: movz({{ Rd = (Rt == 0) ? Rs : Rd; }}); 1652686Sksewell@umich.edu 0x3: movn({{ Rd = (Rt != 0) ? Rs : Rd; }}); 1668901Sandreas.hansson@arm.com 0x4: decode FullSystemInt { 16711877Sbrandon.potter@amd.com 0: syscall_se({{ xc->syscall(R2, &fault); }}, 1688564Sgblack@eecs.umich.edu IsSerializeAfter, IsNonSpeculative); 16910474Sandreas.hansson@arm.com default: syscall({{ fault = std::make_shared<SystemCallFault>(); }}); 1708564Sgblack@eecs.umich.edu } 1712686Sksewell@umich.edu 0x7: sync({{ ; }}, IsMemBarrier); 17210474Sandreas.hansson@arm.com 0x5: break({{fault = std::make_shared<BreakpointFault>();}}); 1732101SN/A } 1742083SN/A 1752043SN/A } 1762025SN/A 1772043SN/A 0x2: decode FUNCTION_LO { 1786384Sgblack@eecs.umich.edu 0x0: HiLoRsSelOp::mfhi({{ Rd = HI_RS_SEL; }}, 1796384Sgblack@eecs.umich.edu IntMultOp, IsIprAccess); 1804661Sksewell@umich.edu 0x1: HiLoRdSelOp::mthi({{ HI_RD_SEL = Rs; }}); 1816384Sgblack@eecs.umich.edu 0x2: HiLoRsSelOp::mflo({{ Rd = LO_RS_SEL; }}, 1826384Sgblack@eecs.umich.edu IntMultOp, IsIprAccess); 1834661Sksewell@umich.edu 0x3: HiLoRdSelOp::mtlo({{ LO_RD_SEL = Rs; }}); 1842083SN/A } 1852025SN/A 1862043SN/A 0x3: decode FUNCTION_LO { 1874661Sksewell@umich.edu format HiLoRdSelValOp { 1888588Sgblack@eecs.umich.edu 0x0: mult({{ val = Rs_sd * Rt_sd; }}, IntMultOp); 1898588Sgblack@eecs.umich.edu 0x1: multu({{ val = Rs_ud * Rt_ud; }}, IntMultOp); 1904661Sksewell@umich.edu } 1914661Sksewell@umich.edu 1922686Sksewell@umich.edu format HiLoOp { 1936384Sgblack@eecs.umich.edu 0x2: div({{ 1948588Sgblack@eecs.umich.edu if (Rt_sd != 0) { 1958588Sgblack@eecs.umich.edu HI0 = Rs_sd % Rt_sd; 1968588Sgblack@eecs.umich.edu LO0 = Rs_sd / Rt_sd; 1976384Sgblack@eecs.umich.edu } 1985222Sksewell@umich.edu }}, IntDivOp); 1995222Sksewell@umich.edu 2006384Sgblack@eecs.umich.edu 0x3: divu({{ 2018588Sgblack@eecs.umich.edu if (Rt_ud != 0) { 2028588Sgblack@eecs.umich.edu HI0 = Rs_ud % Rt_ud; 2038588Sgblack@eecs.umich.edu LO0 = Rs_ud / Rt_ud; 2046384Sgblack@eecs.umich.edu } 2055222Sksewell@umich.edu }}, IntDivOp); 2062101SN/A } 2072084SN/A } 2082025SN/A 2092495SN/A 0x4: decode HINT { 2102495SN/A 0x0: decode FUNCTION_LO { 2112495SN/A format IntOp { 2126384Sgblack@eecs.umich.edu 0x0: add({{ 2138564Sgblack@eecs.umich.edu IntReg result; 2148564Sgblack@eecs.umich.edu Rd = result = Rs + Rt; 2158738Sgblack@eecs.umich.edu if (FullSystem && 2168564Sgblack@eecs.umich.edu findOverflow(32, result, Rs, Rt)) { 21710474Sandreas.hansson@arm.com fault = std::make_shared<IntegerOverflowFault>(); 2186384Sgblack@eecs.umich.edu } 2196384Sgblack@eecs.umich.edu }}); 2208588Sgblack@eecs.umich.edu 0x1: addu({{ Rd_sw = Rs_sw + Rt_sw;}}); 2215222Sksewell@umich.edu 0x2: sub({{ 2228564Sgblack@eecs.umich.edu IntReg result; 2238564Sgblack@eecs.umich.edu Rd = result = Rs - Rt; 2248738Sgblack@eecs.umich.edu if (FullSystem && 2258564Sgblack@eecs.umich.edu findOverflow(32, result, Rs, ~Rt)) { 22610474Sandreas.hansson@arm.com fault = std::make_shared<IntegerOverflowFault>(); 2276384Sgblack@eecs.umich.edu } 2286384Sgblack@eecs.umich.edu }}); 2298588Sgblack@eecs.umich.edu 0x3: subu({{ Rd_sw = Rs_sw - Rt_sw; }}); 2306384Sgblack@eecs.umich.edu 0x4: and({{ Rd = Rs & Rt; }}); 2316384Sgblack@eecs.umich.edu 0x5: or({{ Rd = Rs | Rt; }}); 2326384Sgblack@eecs.umich.edu 0x6: xor({{ Rd = Rs ^ Rt; }}); 2336384Sgblack@eecs.umich.edu 0x7: nor({{ Rd = ~(Rs | Rt); }}); 2342495SN/A } 2352101SN/A } 2362043SN/A } 2372025SN/A 2382495SN/A 0x5: decode HINT { 2392495SN/A 0x0: decode FUNCTION_LO { 2402495SN/A format IntOp{ 2418588Sgblack@eecs.umich.edu 0x2: slt({{ Rd_sw = (Rs_sw < Rt_sw) ? 1 : 0 }}); 2428588Sgblack@eecs.umich.edu 0x3: sltu({{ Rd_uw = (Rs_uw < Rt_uw) ? 1 : 0 }}); 2432495SN/A } 2442101SN/A } 2452084SN/A } 2462024SN/A 2472043SN/A 0x6: decode FUNCTION_LO { 2482239SN/A format Trap { 2498588Sgblack@eecs.umich.edu 0x0: tge({{ cond = (Rs_sw >= Rt_sw); }}); 2508588Sgblack@eecs.umich.edu 0x1: tgeu({{ cond = (Rs_uw >= Rt_uw); }}); 2518588Sgblack@eecs.umich.edu 0x2: tlt({{ cond = (Rs_sw < Rt_sw); }}); 2528588Sgblack@eecs.umich.edu 0x3: tltu({{ cond = (Rs_uw < Rt_uw); }}); 2538588Sgblack@eecs.umich.edu 0x4: teq({{ cond = (Rs_sw == Rt_sw); }}); 2548588Sgblack@eecs.umich.edu 0x6: tne({{ cond = (Rs_sw != Rt_sw); }}); 2552101SN/A } 2562043SN/A } 2572043SN/A } 2582025SN/A 2592043SN/A 0x1: decode REGIMM_HI { 2602043SN/A 0x0: decode REGIMM_LO { 2612101SN/A format Branch { 2628588Sgblack@eecs.umich.edu 0x0: bltz({{ cond = (Rs_sw < 0); }}); 2638588Sgblack@eecs.umich.edu 0x1: bgez({{ cond = (Rs_sw >= 0); }}); 2648588Sgblack@eecs.umich.edu 0x2: bltzl({{ cond = (Rs_sw < 0); }}, Likely); 2658588Sgblack@eecs.umich.edu 0x3: bgezl({{ cond = (Rs_sw >= 0); }}, Likely); 2662101SN/A } 2672043SN/A } 2682025SN/A 2692043SN/A 0x1: decode REGIMM_LO { 2705222Sksewell@umich.edu format TrapImm { 2718588Sgblack@eecs.umich.edu 0x0: tgei( {{ cond = (Rs_sw >= (int16_t)INTIMM); }}); 2726384Sgblack@eecs.umich.edu 0x1: tgeiu({{ 2738588Sgblack@eecs.umich.edu cond = (Rs_uw >= (uint32_t)(int32_t)(int16_t)INTIMM); 2746384Sgblack@eecs.umich.edu }}); 2758588Sgblack@eecs.umich.edu 0x2: tlti( {{ cond = (Rs_sw < (int16_t)INTIMM); }}); 2766384Sgblack@eecs.umich.edu 0x3: tltiu({{ 2778588Sgblack@eecs.umich.edu cond = (Rs_uw < (uint32_t)(int32_t)(int16_t)INTIMM); 2786384Sgblack@eecs.umich.edu }}); 2798588Sgblack@eecs.umich.edu 0x4: teqi( {{ cond = (Rs_sw == (int16_t)INTIMM); }}); 2808588Sgblack@eecs.umich.edu 0x6: tnei( {{ cond = (Rs_sw != (int16_t)INTIMM); }}); 2812101SN/A } 2822043SN/A } 2832043SN/A 2842043SN/A 0x2: decode REGIMM_LO { 2852101SN/A format Branch { 2868588Sgblack@eecs.umich.edu 0x0: bltzal({{ cond = (Rs_sw < 0); }}, Link); 2872686Sksewell@umich.edu 0x1: decode RS { 2882686Sksewell@umich.edu 0x0: bal ({{ cond = 1; }}, IsCall, Link); 2898588Sgblack@eecs.umich.edu default: bgezal({{ cond = (Rs_sw >= 0); }}, Link); 2902686Sksewell@umich.edu } 2918588Sgblack@eecs.umich.edu 0x2: bltzall({{ cond = (Rs_sw < 0); }}, Link, Likely); 2928588Sgblack@eecs.umich.edu 0x3: bgezall({{ cond = (Rs_sw >= 0); }}, Link, Likely); 2932101SN/A } 2942043SN/A } 2952043SN/A 2962043SN/A 0x3: decode REGIMM_LO { 2976384Sgblack@eecs.umich.edu // from Table 5-4 MIPS32 REGIMM Encoding of rt Field 2986384Sgblack@eecs.umich.edu // (DSP ASE MANUAL) 2994661Sksewell@umich.edu 0x4: DspBranch::bposge32({{ cond = (dspctl<5:0> >= 32); }}); 3002101SN/A format WarnUnimpl { 3012101SN/A 0x7: synci(); 3022101SN/A } 3032043SN/A } 3042043SN/A } 3052043SN/A 3062123SN/A format Jump { 3077792Sgblack@eecs.umich.edu 0x2: j({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2); }}); 3087792Sgblack@eecs.umich.edu 0x3: jal({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2); }}, 3097792Sgblack@eecs.umich.edu IsCall, Link); 3102043SN/A } 3112043SN/A 3122100SN/A format Branch { 3132686Sksewell@umich.edu 0x4: decode RS_RT { 3142686Sksewell@umich.edu 0x0: b({{ cond = 1; }}); 3158588Sgblack@eecs.umich.edu default: beq({{ cond = (Rs_sw == Rt_sw); }}); 3162686Sksewell@umich.edu } 3178588Sgblack@eecs.umich.edu 0x5: bne({{ cond = (Rs_sw != Rt_sw); }}); 3188588Sgblack@eecs.umich.edu 0x6: blez({{ cond = (Rs_sw <= 0); }}); 3198588Sgblack@eecs.umich.edu 0x7: bgtz({{ cond = (Rs_sw > 0); }}); 3202043SN/A } 3212084SN/A } 3222024SN/A 3232101SN/A 0x1: decode OPCODE_LO { 3242686Sksewell@umich.edu format IntImmOp { 3255222Sksewell@umich.edu 0x0: addi({{ 3268564Sgblack@eecs.umich.edu IntReg result; 3278564Sgblack@eecs.umich.edu Rt = result = Rs + imm; 3288738Sgblack@eecs.umich.edu if (FullSystem && 3298564Sgblack@eecs.umich.edu findOverflow(32, result, Rs, imm)) { 33010474Sandreas.hansson@arm.com fault = std::make_shared<IntegerOverflowFault>(); 3316384Sgblack@eecs.umich.edu } 3326384Sgblack@eecs.umich.edu }}); 3338588Sgblack@eecs.umich.edu 0x1: addiu({{ Rt_sw = Rs_sw + imm; }}); 3348588Sgblack@eecs.umich.edu 0x2: slti({{ Rt_sw = (Rs_sw < imm) ? 1 : 0 }}); 3358588Sgblack@eecs.umich.edu 0x3: sltiu({{ Rt_uw = (Rs_uw < (uint32_t)sextImm) ? 1 : 0;}}); 3368588Sgblack@eecs.umich.edu 0x4: andi({{ Rt_sw = Rs_sw & zextImm; }}); 3378588Sgblack@eecs.umich.edu 0x5: ori({{ Rt_sw = Rs_sw | zextImm; }}); 3388588Sgblack@eecs.umich.edu 0x6: xori({{ Rt_sw = Rs_sw ^ zextImm; }}); 3392495SN/A 3402495SN/A 0x7: decode RS { 3416384Sgblack@eecs.umich.edu 0x0: lui({{ Rt = imm << 16; }}); 3422495SN/A } 3432084SN/A } 3442084SN/A } 3452024SN/A 3462101SN/A 0x2: decode OPCODE_LO { 3472101SN/A //Table A-11 MIPS32 COP0 Encoding of rs Field 3482101SN/A 0x0: decode RS_MSB { 3492101SN/A 0x0: decode RS { 3506384Sgblack@eecs.umich.edu format CP0Control { 3516384Sgblack@eecs.umich.edu 0x0: mfc0({{ 3526384Sgblack@eecs.umich.edu Config3Reg config3 = Config3; 3536384Sgblack@eecs.umich.edu PageGrainReg pageGrain = PageGrain; 3546384Sgblack@eecs.umich.edu Rt = CP0_RD_SEL; 3556384Sgblack@eecs.umich.edu /* Hack for PageMask */ 3566384Sgblack@eecs.umich.edu if (RD == 5) { 3576384Sgblack@eecs.umich.edu // PageMask 3586384Sgblack@eecs.umich.edu if (config3.sp == 0 || pageGrain.esp == 0) 3596384Sgblack@eecs.umich.edu Rt &= 0xFFFFE7FF; 3606384Sgblack@eecs.umich.edu } 3616384Sgblack@eecs.umich.edu }}); 36211320Ssteve.reinhardt@amd.com 0x4: mtc0({{ 3636384Sgblack@eecs.umich.edu CP0_RD_SEL = Rt; 3646384Sgblack@eecs.umich.edu CauseReg cause = Cause; 3656384Sgblack@eecs.umich.edu IntCtlReg intCtl = IntCtl; 3666384Sgblack@eecs.umich.edu if (RD == 11) { 3676384Sgblack@eecs.umich.edu // Compare 3686384Sgblack@eecs.umich.edu if (cause.ti == 1) { 3696384Sgblack@eecs.umich.edu cause.ti = 0; 3706384Sgblack@eecs.umich.edu int offset = 10; // corresponding to cause.ip0 3716384Sgblack@eecs.umich.edu offset += intCtl.ipti - 2; 3726384Sgblack@eecs.umich.edu replaceBits(cause, offset, offset, 0); 3736384Sgblack@eecs.umich.edu } 3746384Sgblack@eecs.umich.edu } 3756384Sgblack@eecs.umich.edu Cause = cause; 3766384Sgblack@eecs.umich.edu }}); 3776384Sgblack@eecs.umich.edu } 3786384Sgblack@eecs.umich.edu format CP0Unimpl { 3796384Sgblack@eecs.umich.edu 0x1: dmfc0(); 3806384Sgblack@eecs.umich.edu 0x5: dmtc0(); 3816384Sgblack@eecs.umich.edu default: unknown(); 3826384Sgblack@eecs.umich.edu } 3836384Sgblack@eecs.umich.edu format MT_MFTR { 3846384Sgblack@eecs.umich.edu // Decode MIPS MT MFTR instruction into sub-instructions 3854661Sksewell@umich.edu 0x8: decode MT_U { 3866376Sgblack@eecs.umich.edu 0x0: mftc0({{ 38712104Snathanael.premillieu@arm.com data = xc->readRegOtherThread(RegId(MiscRegClass, 38812104Snathanael.premillieu@arm.com (RT << 3 | SEL))); 3896376Sgblack@eecs.umich.edu }}); 3904661Sksewell@umich.edu 0x1: decode SEL { 3916384Sgblack@eecs.umich.edu 0x0: mftgpr({{ 39212104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 39312104Snathanael.premillieu@arm.com RegId(IntRegClass, RT)); 3946384Sgblack@eecs.umich.edu }}); 3954661Sksewell@umich.edu 0x1: decode RT { 39612104Snathanael.premillieu@arm.com 0x0: mftlo_dsp0({{ 39712104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 39812104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_LO0)); 39912104Snathanael.premillieu@arm.com }}); 40012104Snathanael.premillieu@arm.com 0x1: mfthi_dsp0({{ 40112104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 40212104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_HI0)); 40312104Snathanael.premillieu@arm.com }}); 40412104Snathanael.premillieu@arm.com 0x2: mftacx_dsp0({{ 40512104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 40612104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_ACX0)); 40712104Snathanael.premillieu@arm.com }}); 40812104Snathanael.premillieu@arm.com 0x4: mftlo_dsp1({{ 40912104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 41012104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_LO1)); 41112104Snathanael.premillieu@arm.com }}); 41212104Snathanael.premillieu@arm.com 0x5: mfthi_dsp1({{ 41312104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 41412104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_HI1)); 41512104Snathanael.premillieu@arm.com }}); 41612104Snathanael.premillieu@arm.com 0x6: mftacx_dsp1({{ 41712104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 41812104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_ACX1)); 41912104Snathanael.premillieu@arm.com }}); 42012104Snathanael.premillieu@arm.com 0x8: mftlo_dsp2({{ 42112104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 42212104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_LO2)); 42312104Snathanael.premillieu@arm.com }}); 42412104Snathanael.premillieu@arm.com 0x9: mfthi_dsp2({{ 42512104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 42612104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_HI2)); 42712104Snathanael.premillieu@arm.com }}); 42812104Snathanael.premillieu@arm.com 0x10: mftacx_dsp2({{ 42912104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 43012104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_ACX2)); 43112104Snathanael.premillieu@arm.com }}); 43212104Snathanael.premillieu@arm.com 0x12: mftlo_dsp3({{ 43312104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 43412104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_LO3)); 43512104Snathanael.premillieu@arm.com }}); 43612104Snathanael.premillieu@arm.com 0x13: mfthi_dsp3({{ 43712104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 43812104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_HI3)); 43912104Snathanael.premillieu@arm.com }}); 44012104Snathanael.premillieu@arm.com 0x14: mftacx_dsp3({{ 44112104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 44212104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_ACX3)); 44312104Snathanael.premillieu@arm.com }}); 44412104Snathanael.premillieu@arm.com 0x16: mftdsp({{ 44512104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 44612104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_CONTROL)); 44712104Snathanael.premillieu@arm.com }}); 4486384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 4492686Sksewell@umich.edu } 4504661Sksewell@umich.edu 0x2: decode MT_H { 45112104Snathanael.premillieu@arm.com 0x0: mftc1({{ 45212104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 45312104Snathanael.premillieu@arm.com RegId(FloatRegClass, RT)); 4546384Sgblack@eecs.umich.edu }}); 45512104Snathanael.premillieu@arm.com 0x1: mfthc1({{ 45612104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 45712104Snathanael.premillieu@arm.com RegId(FloatRegClass, RT)); 4586384Sgblack@eecs.umich.edu }}); 4596384Sgblack@eecs.umich.edu } 4606384Sgblack@eecs.umich.edu 0x3: cftc1({{ 46112104Snathanael.premillieu@arm.com uint32_t fcsr_val = xc->readRegOtherThread( 46212104Snathanael.premillieu@arm.com RegId(FloatRegClass, FLOATREG_FCSR)); 4636384Sgblack@eecs.umich.edu switch (RT) { 4646384Sgblack@eecs.umich.edu case 0: 46512104Snathanael.premillieu@arm.com data = xc->readRegOtherThread( 46612104Snathanael.premillieu@arm.com RegId(MiscRegClass, FLOATREG_FIR)); 4676384Sgblack@eecs.umich.edu break; 4686384Sgblack@eecs.umich.edu case 25: 4696384Sgblack@eecs.umich.edu data = (fcsr_val & 0xFE000000 >> 24) | 4706384Sgblack@eecs.umich.edu (fcsr_val & 0x00800000 >> 23); 4716384Sgblack@eecs.umich.edu break; 4726384Sgblack@eecs.umich.edu case 26: 4736384Sgblack@eecs.umich.edu data = fcsr_val & 0x0003F07C; 4746384Sgblack@eecs.umich.edu break; 4756384Sgblack@eecs.umich.edu case 28: 4766384Sgblack@eecs.umich.edu data = (fcsr_val & 0x00000F80) | 4776384Sgblack@eecs.umich.edu (fcsr_val & 0x01000000 >> 21) | 4786384Sgblack@eecs.umich.edu (fcsr_val & 0x00000003); 4796384Sgblack@eecs.umich.edu break; 4806384Sgblack@eecs.umich.edu case 31: 4816384Sgblack@eecs.umich.edu data = fcsr_val; 4826384Sgblack@eecs.umich.edu break; 4836384Sgblack@eecs.umich.edu default: 4846384Sgblack@eecs.umich.edu fatal("FP Control Value (%d) Not Valid"); 4856384Sgblack@eecs.umich.edu } 4866384Sgblack@eecs.umich.edu }}); 4876384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 4882101SN/A } 4896384Sgblack@eecs.umich.edu } 4902686Sksewell@umich.edu } 4912027SN/A 4926384Sgblack@eecs.umich.edu format MT_MTTR { 4936384Sgblack@eecs.umich.edu // Decode MIPS MT MTTR instruction into sub-instructions 4944661Sksewell@umich.edu 0xC: decode MT_U { 49512104Snathanael.premillieu@arm.com 0x0: mttc0({{ xc->setRegOtherThread( 49612104Snathanael.premillieu@arm.com RegId(MiscRegClass, (RD << 3 | SEL)), Rt); 4974661Sksewell@umich.edu }}); 4984661Sksewell@umich.edu 0x1: decode SEL { 49912104Snathanael.premillieu@arm.com 0x0: mttgpr({{ xc->setRegOtherThread( 50012104Snathanael.premillieu@arm.com RegId(IntRegClass, RD), Rt); 50112104Snathanael.premillieu@arm.com }}); 5024661Sksewell@umich.edu 0x1: decode RT { 50312104Snathanael.premillieu@arm.com 0x0: mttlo_dsp0({{ xc->setRegOtherThread( 50412104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_LO0), Rt); 50512104Snathanael.premillieu@arm.com }}); 50612104Snathanael.premillieu@arm.com 0x1: mtthi_dsp0({{ xc->setRegOtherThread( 50712104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_HI0), Rt); 50812104Snathanael.premillieu@arm.com }}); 50912104Snathanael.premillieu@arm.com 0x2: mttacx_dsp0({{ xc->setRegOtherThread( 51012104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_ACX0), Rt); 51112104Snathanael.premillieu@arm.com }}); 51212104Snathanael.premillieu@arm.com 0x4: mttlo_dsp1({{ xc->setRegOtherThread( 51312104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_LO1), Rt); 51412104Snathanael.premillieu@arm.com }}); 51512104Snathanael.premillieu@arm.com 0x5: mtthi_dsp1({{ xc->setRegOtherThread( 51612104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_HI1), Rt); 51712104Snathanael.premillieu@arm.com }}); 51812104Snathanael.premillieu@arm.com 0x6: mttacx_dsp1({{ xc->setRegOtherThread( 51912104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_ACX1), Rt); 52012104Snathanael.premillieu@arm.com }}); 52112104Snathanael.premillieu@arm.com 0x8: mttlo_dsp2({{ xc->setRegOtherThread( 52212104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_LO2), Rt); 52312104Snathanael.premillieu@arm.com }}); 52412104Snathanael.premillieu@arm.com 0x9: mtthi_dsp2({{ xc->setRegOtherThread( 52512104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_HI2), Rt); 52612104Snathanael.premillieu@arm.com }}); 52712104Snathanael.premillieu@arm.com 0x10: mttacx_dsp2({{ xc->setRegOtherThread( 52812104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_ACX2), Rt); 52912104Snathanael.premillieu@arm.com }}); 53012104Snathanael.premillieu@arm.com 0x12: mttlo_dsp3({{ xc->setRegOtherThread( 53112104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_LO3), Rt); 53212104Snathanael.premillieu@arm.com }}); 53312104Snathanael.premillieu@arm.com 0x13: mtthi_dsp3({{ xc->setRegOtherThread( 53412104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_HI3), Rt); 53512104Snathanael.premillieu@arm.com }}); 53612104Snathanael.premillieu@arm.com 0x14: mttacx_dsp3({{ xc->setRegOtherThread( 53712104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_ACX3), Rt); 53812104Snathanael.premillieu@arm.com }}); 53912104Snathanael.premillieu@arm.com 0x16: mttdsp({{ xc->setRegOtherThread( 54012104Snathanael.premillieu@arm.com RegId(IntRegClass, INTREG_DSP_CONTROL), Rt); 54112104Snathanael.premillieu@arm.com }}); 5426384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 5435222Sksewell@umich.edu 5444661Sksewell@umich.edu } 5456384Sgblack@eecs.umich.edu 0x2: mttc1({{ 54612104Snathanael.premillieu@arm.com uint64_t data = xc->readRegOtherThread( 54712104Snathanael.premillieu@arm.com RegId(FloatRegClass, RD)); 5488607Sgblack@eecs.umich.edu data = insertBits(data, MT_H ? 63 : 31, 5498607Sgblack@eecs.umich.edu MT_H ? 32 : 0, Rt); 55012104Snathanael.premillieu@arm.com xc->setRegOtherThread(RegId(FloatRegClass, RD), 5516384Sgblack@eecs.umich.edu data); 5526384Sgblack@eecs.umich.edu }}); 5536384Sgblack@eecs.umich.edu 0x3: cttc1({{ 5546384Sgblack@eecs.umich.edu uint32_t data; 5556384Sgblack@eecs.umich.edu switch (RD) { 5566384Sgblack@eecs.umich.edu case 25: 5578588Sgblack@eecs.umich.edu data = (Rt_uw<7:1> << 25) | // move 31-25 5586384Sgblack@eecs.umich.edu (FCSR & 0x01000000) | // bit 24 5596384Sgblack@eecs.umich.edu (FCSR & 0x004FFFFF); // bit 22-0 5606384Sgblack@eecs.umich.edu break; 5616384Sgblack@eecs.umich.edu case 26: 5626384Sgblack@eecs.umich.edu data = (FCSR & 0xFFFC0000) | // move 31-18 5638588Sgblack@eecs.umich.edu Rt_uw<17:12> << 12 | // bit 17-12 5646384Sgblack@eecs.umich.edu (FCSR & 0x00000F80) << 7 | // bit 11-7 5658588Sgblack@eecs.umich.edu Rt_uw<6:2> << 2 | // bit 6-2 5666384Sgblack@eecs.umich.edu (FCSR & 0x00000002); // bit 1...0 5676384Sgblack@eecs.umich.edu break; 5686384Sgblack@eecs.umich.edu case 28: 5696384Sgblack@eecs.umich.edu data = (FCSR & 0xFE000000) | // move 31-25 5708588Sgblack@eecs.umich.edu Rt_uw<2:2> << 24 | // bit 24 5716384Sgblack@eecs.umich.edu (FCSR & 0x00FFF000) << 23 | // bit 23-12 5728588Sgblack@eecs.umich.edu Rt_uw<11:7> << 7 | // bit 24 5736384Sgblack@eecs.umich.edu (FCSR & 0x000007E) | 5748588Sgblack@eecs.umich.edu Rt_uw<1:0>; // bit 22-0 5756384Sgblack@eecs.umich.edu break; 5766384Sgblack@eecs.umich.edu case 31: 5778588Sgblack@eecs.umich.edu data = Rt_uw; 5786384Sgblack@eecs.umich.edu break; 5796384Sgblack@eecs.umich.edu default: 5806384Sgblack@eecs.umich.edu panic("FP Control Value (%d) " 5816384Sgblack@eecs.umich.edu "Not Available. Ignoring " 5826384Sgblack@eecs.umich.edu "Access to Floating Control " 5838607Sgblack@eecs.umich.edu "S""tatus Register", FS); 5846384Sgblack@eecs.umich.edu } 58512104Snathanael.premillieu@arm.com xc->setRegOtherThread( 58612104Snathanael.premillieu@arm.com RegId(FloatRegClass, FLOATREG_FCSR), data); 5876384Sgblack@eecs.umich.edu }}); 5886384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 5894661Sksewell@umich.edu } 5904661Sksewell@umich.edu } 5912101SN/A } 5924661Sksewell@umich.edu 0xB: decode RD { 5934661Sksewell@umich.edu format MT_Control { 5944661Sksewell@umich.edu 0x0: decode POS { 5954661Sksewell@umich.edu 0x0: decode SEL { 5964661Sksewell@umich.edu 0x1: decode SC { 5976376Sgblack@eecs.umich.edu 0x0: dvpe({{ 5986376Sgblack@eecs.umich.edu MVPControlReg mvpControl = MVPControl; 5996376Sgblack@eecs.umich.edu VPEConf0Reg vpeConf0 = VPEConf0; 6006376Sgblack@eecs.umich.edu Rt = MVPControl; 6016376Sgblack@eecs.umich.edu if (vpeConf0.mvp == 1) 6026376Sgblack@eecs.umich.edu mvpControl.evp = 0; 6036376Sgblack@eecs.umich.edu MVPControl = mvpControl; 6046376Sgblack@eecs.umich.edu }}); 6056376Sgblack@eecs.umich.edu 0x1: evpe({{ 6066376Sgblack@eecs.umich.edu MVPControlReg mvpControl = MVPControl; 6076376Sgblack@eecs.umich.edu VPEConf0Reg vpeConf0 = VPEConf0; 6086376Sgblack@eecs.umich.edu Rt = MVPControl; 6096376Sgblack@eecs.umich.edu if (vpeConf0.mvp == 1) 6106376Sgblack@eecs.umich.edu mvpControl.evp = 1; 6116376Sgblack@eecs.umich.edu MVPControl = mvpControl; 6126376Sgblack@eecs.umich.edu }}); 6135222Sksewell@umich.edu default:CP0Unimpl::unknown(); 6144661Sksewell@umich.edu } 6156384Sgblack@eecs.umich.edu default:CP0Unimpl::unknown(); 6164661Sksewell@umich.edu } 6176384Sgblack@eecs.umich.edu default:CP0Unimpl::unknown(); 6186384Sgblack@eecs.umich.edu } 6194661Sksewell@umich.edu 0x1: decode POS { 6204661Sksewell@umich.edu 0xF: decode SEL { 6214661Sksewell@umich.edu 0x1: decode SC { 6226376Sgblack@eecs.umich.edu 0x0: dmt({{ 6236376Sgblack@eecs.umich.edu VPEControlReg vpeControl = VPEControl; 6246376Sgblack@eecs.umich.edu Rt = vpeControl; 6256376Sgblack@eecs.umich.edu vpeControl.te = 0; 6266376Sgblack@eecs.umich.edu VPEControl = vpeControl; 6276376Sgblack@eecs.umich.edu }}); 6286376Sgblack@eecs.umich.edu 0x1: emt({{ 6296376Sgblack@eecs.umich.edu VPEControlReg vpeControl = VPEControl; 6306376Sgblack@eecs.umich.edu Rt = vpeControl; 6316376Sgblack@eecs.umich.edu vpeControl.te = 1; 6326376Sgblack@eecs.umich.edu VPEControl = vpeControl; 6336376Sgblack@eecs.umich.edu }}); 6345222Sksewell@umich.edu default:CP0Unimpl::unknown(); 6354661Sksewell@umich.edu } 6366384Sgblack@eecs.umich.edu default:CP0Unimpl::unknown(); 6374661Sksewell@umich.edu } 6385222Sksewell@umich.edu default:CP0Unimpl::unknown(); 6394661Sksewell@umich.edu } 6404661Sksewell@umich.edu } 6414661Sksewell@umich.edu 0xC: decode POS { 6426384Sgblack@eecs.umich.edu 0x0: decode SC { 6436384Sgblack@eecs.umich.edu 0x0: CP0Control::di({{ 6446384Sgblack@eecs.umich.edu StatusReg status = Status; 6456384Sgblack@eecs.umich.edu ConfigReg config = Config; 6466384Sgblack@eecs.umich.edu // Rev 2.0 or beyond? 6476384Sgblack@eecs.umich.edu if (config.ar >= 1) { 6486384Sgblack@eecs.umich.edu Rt = status; 6496384Sgblack@eecs.umich.edu status.ie = 0; 6506384Sgblack@eecs.umich.edu } else { 6516384Sgblack@eecs.umich.edu // Enable this else branch once we 6526384Sgblack@eecs.umich.edu // actually set values for Config on init 65310474Sandreas.hansson@arm.com fault = std::make_shared<ReservedInstructionFault>(); 6546384Sgblack@eecs.umich.edu } 6556384Sgblack@eecs.umich.edu Status = status; 6566384Sgblack@eecs.umich.edu }}); 6576384Sgblack@eecs.umich.edu 0x1: CP0Control::ei({{ 6586384Sgblack@eecs.umich.edu StatusReg status = Status; 6596384Sgblack@eecs.umich.edu ConfigReg config = Config; 6606384Sgblack@eecs.umich.edu if (config.ar >= 1) { 6616384Sgblack@eecs.umich.edu Rt = status; 6626384Sgblack@eecs.umich.edu status.ie = 1; 6636384Sgblack@eecs.umich.edu } else { 66410474Sandreas.hansson@arm.com fault = std::make_shared<ReservedInstructionFault>(); 6656384Sgblack@eecs.umich.edu } 6666384Sgblack@eecs.umich.edu }}); 6676384Sgblack@eecs.umich.edu default:CP0Unimpl::unknown(); 6686384Sgblack@eecs.umich.edu } 6694661Sksewell@umich.edu } 6706384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 6714661Sksewell@umich.edu } 6724661Sksewell@umich.edu format CP0Control { 6734661Sksewell@umich.edu 0xA: rdpgpr({{ 6746376Sgblack@eecs.umich.edu ConfigReg config = Config; 6756376Sgblack@eecs.umich.edu if (config.ar >= 1) { 6766376Sgblack@eecs.umich.edu // Rev 2 of the architecture 6776376Sgblack@eecs.umich.edu panic("Shadow Sets Not Fully Implemented.\n"); 6786376Sgblack@eecs.umich.edu } else { 67910474Sandreas.hansson@arm.com fault = std::make_shared<ReservedInstructionFault>(); 6804661Sksewell@umich.edu } 6816376Sgblack@eecs.umich.edu }}); 6824661Sksewell@umich.edu 0xE: wrpgpr({{ 6836376Sgblack@eecs.umich.edu ConfigReg config = Config; 6846376Sgblack@eecs.umich.edu if (config.ar >= 1) { 6856376Sgblack@eecs.umich.edu // Rev 2 of the architecture 6866376Sgblack@eecs.umich.edu panic("Shadow Sets Not Fully Implemented.\n"); 6876376Sgblack@eecs.umich.edu } else { 68810474Sandreas.hansson@arm.com fault = std::make_shared<ReservedInstructionFault>(); 6894661Sksewell@umich.edu } 6906376Sgblack@eecs.umich.edu }}); 6914661Sksewell@umich.edu } 6926384Sgblack@eecs.umich.edu } 6932101SN/A 6942101SN/A //Table A-12 MIPS32 COP0 Encoding of Function Field When rs=CO 6952101SN/A 0x1: decode FUNCTION { 6966384Sgblack@eecs.umich.edu format CP0Control { 6976384Sgblack@eecs.umich.edu 0x18: eret({{ 6986384Sgblack@eecs.umich.edu StatusReg status = Status; 6996384Sgblack@eecs.umich.edu ConfigReg config = Config; 7006384Sgblack@eecs.umich.edu SRSCtlReg srsCtl = SRSCtl; 7016384Sgblack@eecs.umich.edu DPRINTF(MipsPRA,"Restoring PC - %x\n",EPC); 7026384Sgblack@eecs.umich.edu if (status.erl == 1) { 7036384Sgblack@eecs.umich.edu status.erl = 0; 7047792Sgblack@eecs.umich.edu NPC = ErrorEPC; 7056384Sgblack@eecs.umich.edu // Need to adjust NNPC, otherwise things break 7067792Sgblack@eecs.umich.edu NNPC = ErrorEPC + sizeof(MachInst); 7076384Sgblack@eecs.umich.edu } else { 7087792Sgblack@eecs.umich.edu NPC = EPC; 7096384Sgblack@eecs.umich.edu // Need to adjust NNPC, otherwise things break 7107792Sgblack@eecs.umich.edu NNPC = EPC + sizeof(MachInst); 7116384Sgblack@eecs.umich.edu status.exl = 0; 7126384Sgblack@eecs.umich.edu if (config.ar >=1 && 7136384Sgblack@eecs.umich.edu srsCtl.hss > 0 && 7146384Sgblack@eecs.umich.edu status.bev == 0) { 7156384Sgblack@eecs.umich.edu srsCtl.css = srsCtl.pss; 7166384Sgblack@eecs.umich.edu //xc->setShadowSet(srsCtl.pss); 7176384Sgblack@eecs.umich.edu } 7186376Sgblack@eecs.umich.edu } 7196384Sgblack@eecs.umich.edu LLFlag = 0; 7206384Sgblack@eecs.umich.edu Status = status; 7216384Sgblack@eecs.umich.edu SRSCtl = srsCtl; 7226384Sgblack@eecs.umich.edu }}, IsReturn, IsSerializing, IsERET); 7235222Sksewell@umich.edu 7246384Sgblack@eecs.umich.edu 0x1F: deret({{ 7256384Sgblack@eecs.umich.edu DebugReg debug = Debug; 7266384Sgblack@eecs.umich.edu if (debug.dm == 1) { 7276384Sgblack@eecs.umich.edu debug.dm = 1; 7286384Sgblack@eecs.umich.edu debug.iexi = 0; 7297792Sgblack@eecs.umich.edu NPC = DEPC; 7306384Sgblack@eecs.umich.edu } else { 7317792Sgblack@eecs.umich.edu NPC = NPC; 7326384Sgblack@eecs.umich.edu // Undefined; 7336384Sgblack@eecs.umich.edu } 7346384Sgblack@eecs.umich.edu Debug = debug; 7356384Sgblack@eecs.umich.edu }}, IsReturn, IsSerializing, IsERET); 7366384Sgblack@eecs.umich.edu } 7376384Sgblack@eecs.umich.edu format CP0TLB { 7386384Sgblack@eecs.umich.edu 0x01: tlbr({{ 7396384Sgblack@eecs.umich.edu MipsISA::PTE *PTEntry = 7406384Sgblack@eecs.umich.edu xc->tcBase()->getITBPtr()-> 7416384Sgblack@eecs.umich.edu getEntry(Index & 0x7FFFFFFF); 7426384Sgblack@eecs.umich.edu if (PTEntry == NULL) { 7436384Sgblack@eecs.umich.edu fatal("Invalid PTE Entry received on " 7446384Sgblack@eecs.umich.edu "a TLBR instruction\n"); 7456384Sgblack@eecs.umich.edu } 7466384Sgblack@eecs.umich.edu /* Setup PageMask */ 7476384Sgblack@eecs.umich.edu // If 1KB pages are not enabled, a read of PageMask 7486384Sgblack@eecs.umich.edu // must return 0b00 in bits 12, 11 7496384Sgblack@eecs.umich.edu PageMask = (PTEntry->Mask << 11); 7506384Sgblack@eecs.umich.edu /* Setup EntryHi */ 7516384Sgblack@eecs.umich.edu EntryHi = ((PTEntry->VPN << 11) | (PTEntry->asid)); 7526384Sgblack@eecs.umich.edu /* Setup Entry Lo0 */ 7536384Sgblack@eecs.umich.edu EntryLo0 = ((PTEntry->PFN0 << 6) | 7546384Sgblack@eecs.umich.edu (PTEntry->C0 << 3) | 7556384Sgblack@eecs.umich.edu (PTEntry->D0 << 2) | 7566384Sgblack@eecs.umich.edu (PTEntry->V0 << 1) | 7576384Sgblack@eecs.umich.edu PTEntry->G); 7586384Sgblack@eecs.umich.edu /* Setup Entry Lo1 */ 7596384Sgblack@eecs.umich.edu EntryLo1 = ((PTEntry->PFN1 << 6) | 7606384Sgblack@eecs.umich.edu (PTEntry->C1 << 3) | 7616384Sgblack@eecs.umich.edu (PTEntry->D1 << 2) | 7626384Sgblack@eecs.umich.edu (PTEntry->V1 << 1) | 7636384Sgblack@eecs.umich.edu PTEntry->G); 7646384Sgblack@eecs.umich.edu }}); // Need to hook up to TLB 7655222Sksewell@umich.edu 7666384Sgblack@eecs.umich.edu 0x02: tlbwi({{ 7676384Sgblack@eecs.umich.edu //Create PTE 7686384Sgblack@eecs.umich.edu MipsISA::PTE newEntry; 7696384Sgblack@eecs.umich.edu //Write PTE 7706384Sgblack@eecs.umich.edu newEntry.Mask = (Addr)(PageMask >> 11); 7716384Sgblack@eecs.umich.edu newEntry.VPN = (Addr)(EntryHi >> 11); 7726384Sgblack@eecs.umich.edu /* PageGrain _ ESP Config3 _ SP */ 7736384Sgblack@eecs.umich.edu if (bits(PageGrain, 28) == 0 || bits(Config3, 4) ==0) { 7746384Sgblack@eecs.umich.edu // If 1KB pages are *NOT* enabled, lowest bits of 7756384Sgblack@eecs.umich.edu // the mask are 0b11 for TLB writes 7766384Sgblack@eecs.umich.edu newEntry.Mask |= 0x3; 7776384Sgblack@eecs.umich.edu // Reset bits 0 and 1 if 1KB pages are not enabled 7786384Sgblack@eecs.umich.edu newEntry.VPN &= 0xFFFFFFFC; 7796384Sgblack@eecs.umich.edu } 7806384Sgblack@eecs.umich.edu newEntry.asid = (uint8_t)(EntryHi & 0xFF); 7815222Sksewell@umich.edu 7826384Sgblack@eecs.umich.edu newEntry.PFN0 = (Addr)(EntryLo0 >> 6); 7836384Sgblack@eecs.umich.edu newEntry.PFN1 = (Addr)(EntryLo1 >> 6); 7846384Sgblack@eecs.umich.edu newEntry.D0 = (bool)((EntryLo0 >> 2) & 1); 7856384Sgblack@eecs.umich.edu newEntry.D1 = (bool)((EntryLo1 >> 2) & 1); 7866384Sgblack@eecs.umich.edu newEntry.V1 = (bool)((EntryLo1 >> 1) & 1); 7876384Sgblack@eecs.umich.edu newEntry.V0 = (bool)((EntryLo0 >> 1) & 1); 7886384Sgblack@eecs.umich.edu newEntry.G = (bool)((EntryLo0 & EntryLo1) & 1); 7896384Sgblack@eecs.umich.edu newEntry.C0 = (uint8_t)((EntryLo0 >> 3) & 0x7); 7906384Sgblack@eecs.umich.edu newEntry.C1 = (uint8_t)((EntryLo1 >> 3) & 0x7); 7916384Sgblack@eecs.umich.edu /* Now, compute the AddrShiftAmount and OffsetMask - 7926384Sgblack@eecs.umich.edu TLB optimizations */ 7936384Sgblack@eecs.umich.edu /* Addr Shift Amount for 1KB or larger pages */ 7946384Sgblack@eecs.umich.edu if ((newEntry.Mask & 0xFFFF) == 3) { 7956384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 12; 7966384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFFF) == 0x0000) { 7976384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 10; 7986384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFFC) == 0x000C) { 7996384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 14; 8006384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFF0) == 0x0030) { 8016384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 16; 8026384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFC0) == 0x00C0) { 8036384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 18; 8046384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFF00) == 0x0300) { 8056384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 20; 8066384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFC00) == 0x0C00) { 8076384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 22; 8086384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xF000) == 0x3000) { 8096384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 24; 8106384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xC000) == 0xC000) { 8116384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 26; 8126384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0x30000) == 0x30000) { 8136384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 28; 8146384Sgblack@eecs.umich.edu } else { 8156384Sgblack@eecs.umich.edu fatal("Invalid Mask Pattern Detected!\n"); 8166384Sgblack@eecs.umich.edu } 8176384Sgblack@eecs.umich.edu newEntry.OffsetMask = 8186384Sgblack@eecs.umich.edu (1 << newEntry.AddrShiftAmount) - 1; 8195222Sksewell@umich.edu 8206384Sgblack@eecs.umich.edu MipsISA::TLB *Ptr = xc->tcBase()->getITBPtr(); 8216384Sgblack@eecs.umich.edu Config3Reg config3 = Config3; 8226384Sgblack@eecs.umich.edu PageGrainReg pageGrain = PageGrain; 8236384Sgblack@eecs.umich.edu int SP = 0; 8246384Sgblack@eecs.umich.edu if (bits(config3, config3.sp) == 1 && 8256384Sgblack@eecs.umich.edu bits(pageGrain, pageGrain.esp) == 1) { 8266384Sgblack@eecs.umich.edu SP = 1; 8276384Sgblack@eecs.umich.edu } 8286384Sgblack@eecs.umich.edu Ptr->insertAt(newEntry, Index & 0x7FFFFFFF, SP); 8296384Sgblack@eecs.umich.edu }}); 8306384Sgblack@eecs.umich.edu 0x06: tlbwr({{ 8316384Sgblack@eecs.umich.edu //Create PTE 8326384Sgblack@eecs.umich.edu MipsISA::PTE newEntry; 8336384Sgblack@eecs.umich.edu //Write PTE 8346384Sgblack@eecs.umich.edu newEntry.Mask = (Addr)(PageMask >> 11); 8356384Sgblack@eecs.umich.edu newEntry.VPN = (Addr)(EntryHi >> 11); 8366384Sgblack@eecs.umich.edu /* PageGrain _ ESP Config3 _ SP */ 8376384Sgblack@eecs.umich.edu if (bits(PageGrain, 28) == 0 || 8386384Sgblack@eecs.umich.edu bits(Config3, 4) == 0) { 8396384Sgblack@eecs.umich.edu // If 1KB pages are *NOT* enabled, lowest bits of 8406384Sgblack@eecs.umich.edu // the mask are 0b11 for TLB writes 8416384Sgblack@eecs.umich.edu newEntry.Mask |= 0x3; 8426384Sgblack@eecs.umich.edu // Reset bits 0 and 1 if 1KB pages are not enabled 8436384Sgblack@eecs.umich.edu newEntry.VPN &= 0xFFFFFFFC; 8446384Sgblack@eecs.umich.edu } 8456384Sgblack@eecs.umich.edu newEntry.asid = (uint8_t)(EntryHi & 0xFF); 8465222Sksewell@umich.edu 8476384Sgblack@eecs.umich.edu newEntry.PFN0 = (Addr)(EntryLo0 >> 6); 8486384Sgblack@eecs.umich.edu newEntry.PFN1 = (Addr)(EntryLo1 >> 6); 8496384Sgblack@eecs.umich.edu newEntry.D0 = (bool)((EntryLo0 >> 2) & 1); 8506384Sgblack@eecs.umich.edu newEntry.D1 = (bool)((EntryLo1 >> 2) & 1); 8516384Sgblack@eecs.umich.edu newEntry.V1 = (bool)((EntryLo1 >> 1) & 1); 8526384Sgblack@eecs.umich.edu newEntry.V0 = (bool)((EntryLo0 >> 1) & 1); 8536384Sgblack@eecs.umich.edu newEntry.G = (bool)((EntryLo0 & EntryLo1) & 1); 8546384Sgblack@eecs.umich.edu newEntry.C0 = (uint8_t)((EntryLo0 >> 3) & 0x7); 8556384Sgblack@eecs.umich.edu newEntry.C1 = (uint8_t)((EntryLo1 >> 3) & 0x7); 8566384Sgblack@eecs.umich.edu /* Now, compute the AddrShiftAmount and OffsetMask - 8576384Sgblack@eecs.umich.edu TLB optimizations */ 8586384Sgblack@eecs.umich.edu /* Addr Shift Amount for 1KB or larger pages */ 8596384Sgblack@eecs.umich.edu if ((newEntry.Mask & 0xFFFF) == 3){ 8606384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 12; 8616384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFFF) == 0x0000) { 8626384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 10; 8636384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFFC) == 0x000C) { 8646384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 14; 8656384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFF0) == 0x0030) { 8666384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 16; 8676384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFC0) == 0x00C0) { 8686384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 18; 8696384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFF00) == 0x0300) { 8706384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 20; 8716384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFC00) == 0x0C00) { 8726384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 22; 8736384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xF000) == 0x3000) { 8746384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 24; 8756384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xC000) == 0xC000) { 8766384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 26; 8776384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0x30000) == 0x30000) { 8786384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 28; 8796384Sgblack@eecs.umich.edu } else { 8806384Sgblack@eecs.umich.edu fatal("Invalid Mask Pattern Detected!\n"); 8816384Sgblack@eecs.umich.edu } 8826384Sgblack@eecs.umich.edu newEntry.OffsetMask = 8836384Sgblack@eecs.umich.edu (1 << newEntry.AddrShiftAmount) - 1; 8845222Sksewell@umich.edu 8856384Sgblack@eecs.umich.edu MipsISA::TLB *Ptr = xc->tcBase()->getITBPtr(); 8866384Sgblack@eecs.umich.edu Config3Reg config3 = Config3; 8876384Sgblack@eecs.umich.edu PageGrainReg pageGrain = PageGrain; 8886384Sgblack@eecs.umich.edu int SP = 0; 8896384Sgblack@eecs.umich.edu if (bits(config3, config3.sp) == 1 && 8906384Sgblack@eecs.umich.edu bits(pageGrain, pageGrain.esp) == 1) { 8916384Sgblack@eecs.umich.edu SP = 1; 8926384Sgblack@eecs.umich.edu } 8936384Sgblack@eecs.umich.edu Ptr->insertAt(newEntry, Random, SP); 8946384Sgblack@eecs.umich.edu }}); 8952101SN/A 8966384Sgblack@eecs.umich.edu 0x08: tlbp({{ 8976384Sgblack@eecs.umich.edu Config3Reg config3 = Config3; 8986384Sgblack@eecs.umich.edu PageGrainReg pageGrain = PageGrain; 8996384Sgblack@eecs.umich.edu EntryHiReg entryHi = EntryHi; 9006384Sgblack@eecs.umich.edu int tlbIndex; 9016384Sgblack@eecs.umich.edu Addr vpn; 9026384Sgblack@eecs.umich.edu if (pageGrain.esp == 1 && config3.sp ==1) { 9036384Sgblack@eecs.umich.edu vpn = EntryHi >> 11; 9046384Sgblack@eecs.umich.edu } else { 9056384Sgblack@eecs.umich.edu // Mask off lower 2 bits 9066384Sgblack@eecs.umich.edu vpn = ((EntryHi >> 11) & 0xFFFFFFFC); 9076384Sgblack@eecs.umich.edu } 9086384Sgblack@eecs.umich.edu tlbIndex = xc->tcBase()->getITBPtr()-> 9096385Sgblack@eecs.umich.edu probeEntry(vpn, entryHi.asid); 9106384Sgblack@eecs.umich.edu // Check TLB for entry matching EntryHi 9116384Sgblack@eecs.umich.edu if (tlbIndex != -1) { 9126384Sgblack@eecs.umich.edu Index = tlbIndex; 9136384Sgblack@eecs.umich.edu } else { 9146384Sgblack@eecs.umich.edu // else, set Index = 1 << 31 9156384Sgblack@eecs.umich.edu Index = (1 << 31); 9166384Sgblack@eecs.umich.edu } 9176384Sgblack@eecs.umich.edu }}); 9186384Sgblack@eecs.umich.edu } 9196384Sgblack@eecs.umich.edu format CP0Unimpl { 9206384Sgblack@eecs.umich.edu 0x20: wait(); 9216384Sgblack@eecs.umich.edu } 9226384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 9232101SN/A } 9242043SN/A } 9252027SN/A 9262101SN/A //Table A-13 MIPS32 COP1 Encoding of rs Field 9272101SN/A 0x1: decode RS_MSB { 9282101SN/A 0x0: decode RS_HI { 9292101SN/A 0x0: decode RS_LO { 9302686Sksewell@umich.edu format CP1Control { 9318588Sgblack@eecs.umich.edu 0x0: mfc1 ({{ Rt_uw = Fs_uw; }}); 9322495SN/A 9332495SN/A 0x2: cfc1({{ 9346384Sgblack@eecs.umich.edu switch (FS) { 9352573SN/A case 0: 9362616SN/A Rt = FIR; 9372573SN/A break; 9382573SN/A case 25: 9396384Sgblack@eecs.umich.edu Rt = (FCSR & 0xFE000000) >> 24 | 9406384Sgblack@eecs.umich.edu (FCSR & 0x00800000) >> 23; 9412573SN/A break; 9422573SN/A case 26: 9436384Sgblack@eecs.umich.edu Rt = (FCSR & 0x0003F07C); 9442573SN/A break; 9452573SN/A case 28: 9466384Sgblack@eecs.umich.edu Rt = (FCSR & 0x00000F80) | 9476384Sgblack@eecs.umich.edu (FCSR & 0x01000000) >> 21 | 9486384Sgblack@eecs.umich.edu (FCSR & 0x00000003); 9492573SN/A break; 9502573SN/A case 31: 9512616SN/A Rt = FCSR; 9522573SN/A break; 9532573SN/A default: 9545222Sksewell@umich.edu warn("FP Control Value (%d) Not Valid"); 9552573SN/A } 9562573SN/A }}); 9572573SN/A 9588588Sgblack@eecs.umich.edu 0x3: mfhc1({{ Rt_uw = Fs_ud<63:32>; }}); 9592686Sksewell@umich.edu 9608588Sgblack@eecs.umich.edu 0x4: mtc1({{ Fs_uw = Rt_uw; }}); 9612686Sksewell@umich.edu 9622573SN/A 0x6: ctc1({{ 9636384Sgblack@eecs.umich.edu switch (FS) { 9642573SN/A case 25: 9658588Sgblack@eecs.umich.edu FCSR = (Rt_uw<7:1> << 25) | // move 31-25 9666384Sgblack@eecs.umich.edu (FCSR & 0x01000000) | // bit 24 9676384Sgblack@eecs.umich.edu (FCSR & 0x004FFFFF); // bit 22-0 9682573SN/A break; 9692573SN/A case 26: 9706384Sgblack@eecs.umich.edu FCSR = (FCSR & 0xFFFC0000) | // move 31-18 9718588Sgblack@eecs.umich.edu Rt_uw<17:12> << 12 | // bit 17-12 9726384Sgblack@eecs.umich.edu (FCSR & 0x00000F80) << 7 | // bit 11-7 9738588Sgblack@eecs.umich.edu Rt_uw<6:2> << 2 | // bit 6-2 9746384Sgblack@eecs.umich.edu (FCSR & 0x00000002); // bit 1-0 9752573SN/A break; 9762573SN/A case 28: 9776384Sgblack@eecs.umich.edu FCSR = (FCSR & 0xFE000000) | // move 31-25 9788588Sgblack@eecs.umich.edu Rt_uw<2:2> << 24 | // bit 24 9796384Sgblack@eecs.umich.edu (FCSR & 0x00FFF000) << 23 | // bit 23-12 9808588Sgblack@eecs.umich.edu Rt_uw<11:7> << 7 | // bit 24 9816384Sgblack@eecs.umich.edu (FCSR & 0x000007E) | 9828588Sgblack@eecs.umich.edu Rt_uw<1:0>; // bit 22-0 9832573SN/A break; 9842573SN/A case 31: 9858588Sgblack@eecs.umich.edu FCSR = Rt_uw; 9862573SN/A break; 9872573SN/A 9882573SN/A default: 9896384Sgblack@eecs.umich.edu panic("FP Control Value (%d) " 9906384Sgblack@eecs.umich.edu "Not Available. Ignoring Access " 9916384Sgblack@eecs.umich.edu "to Floating Control Status " 9926384Sgblack@eecs.umich.edu "Register", FS); 9932495SN/A } 9942495SN/A }}); 9952686Sksewell@umich.edu 9962686Sksewell@umich.edu 0x7: mthc1({{ 9978588Sgblack@eecs.umich.edu uint64_t fs_hi = Rt_uw; 9988588Sgblack@eecs.umich.edu uint64_t fs_lo = Fs_ud & 0x0FFFFFFFF; 9998588Sgblack@eecs.umich.edu Fs_ud = (fs_hi << 32) | fs_lo; 10002686Sksewell@umich.edu }}); 10012686Sksewell@umich.edu 10022101SN/A } 10035222Sksewell@umich.edu format CP1Unimpl { 10045222Sksewell@umich.edu 0x1: dmfc1(); 10055222Sksewell@umich.edu 0x5: dmtc1(); 10065222Sksewell@umich.edu } 10076384Sgblack@eecs.umich.edu } 10082025SN/A 10096384Sgblack@eecs.umich.edu 0x1: decode RS_LO { 10106384Sgblack@eecs.umich.edu 0x0: decode ND { 10116384Sgblack@eecs.umich.edu format Branch { 10126384Sgblack@eecs.umich.edu 0x0: decode TF { 10136384Sgblack@eecs.umich.edu 0x0: bc1f({{ 10146384Sgblack@eecs.umich.edu cond = getCondCode(FCSR, BRANCH_CC) == 0; 10156384Sgblack@eecs.umich.edu }}); 10166384Sgblack@eecs.umich.edu 0x1: bc1t({{ 10176384Sgblack@eecs.umich.edu cond = getCondCode(FCSR, BRANCH_CC) == 1; 10186384Sgblack@eecs.umich.edu }}); 10196384Sgblack@eecs.umich.edu } 10206384Sgblack@eecs.umich.edu 0x1: decode TF { 10216384Sgblack@eecs.umich.edu 0x0: bc1fl({{ 10226384Sgblack@eecs.umich.edu cond = getCondCode(FCSR, BRANCH_CC) == 0; 10236384Sgblack@eecs.umich.edu }}, Likely); 10246384Sgblack@eecs.umich.edu 0x1: bc1tl({{ 10256384Sgblack@eecs.umich.edu cond = getCondCode(FCSR, BRANCH_CC) == 1; 10266384Sgblack@eecs.umich.edu }}, Likely); 10276384Sgblack@eecs.umich.edu } 10286384Sgblack@eecs.umich.edu } 10296384Sgblack@eecs.umich.edu } 10306384Sgblack@eecs.umich.edu format CP1Unimpl { 10316384Sgblack@eecs.umich.edu 0x1: bc1any2(); 10326384Sgblack@eecs.umich.edu 0x2: bc1any4(); 10336384Sgblack@eecs.umich.edu default: unknown(); 10346384Sgblack@eecs.umich.edu } 10356384Sgblack@eecs.umich.edu } 10362043SN/A } 10372027SN/A 10382101SN/A 0x1: decode RS_HI { 10392101SN/A 0x2: decode RS_LO { 10406384Sgblack@eecs.umich.edu //Table A-14 MIPS32 COP1 Encoding of Function Field When 10416384Sgblack@eecs.umich.edu //rs=S (( single-precision floating point)) 10422572SN/A 0x0: decode FUNCTION_HI { 10432572SN/A 0x0: decode FUNCTION_LO { 10442101SN/A format FloatOp { 10458588Sgblack@eecs.umich.edu 0x0: add_s({{ Fd_sf = Fs_sf + Ft_sf; }}); 10468588Sgblack@eecs.umich.edu 0x1: sub_s({{ Fd_sf = Fs_sf - Ft_sf; }}); 10478588Sgblack@eecs.umich.edu 0x2: mul_s({{ Fd_sf = Fs_sf * Ft_sf; }}); 10488588Sgblack@eecs.umich.edu 0x3: div_s({{ Fd_sf = Fs_sf / Ft_sf; }}); 10498588Sgblack@eecs.umich.edu 0x4: sqrt_s({{ Fd_sf = sqrt(Fs_sf); }}); 10508588Sgblack@eecs.umich.edu 0x5: abs_s({{ Fd_sf = fabs(Fs_sf); }}); 10518588Sgblack@eecs.umich.edu 0x7: neg_s({{ Fd_sf = -Fs_sf; }}); 10522101SN/A } 10538588Sgblack@eecs.umich.edu 0x6: BasicOp::mov_s({{ Fd_sf = Fs_sf; }}); 10542101SN/A } 10552572SN/A 0x1: decode FUNCTION_LO { 10562686Sksewell@umich.edu format FloatConvertOp { 10578588Sgblack@eecs.umich.edu 0x0: round_l_s({{ val = Fs_sf; }}, 10586384Sgblack@eecs.umich.edu ToLong, Round); 10598588Sgblack@eecs.umich.edu 0x1: trunc_l_s({{ val = Fs_sf; }}, 10606384Sgblack@eecs.umich.edu ToLong, Trunc); 10618588Sgblack@eecs.umich.edu 0x2: ceil_l_s({{ val = Fs_sf;}}, 10626384Sgblack@eecs.umich.edu ToLong, Ceil); 10638588Sgblack@eecs.umich.edu 0x3: floor_l_s({{ val = Fs_sf; }}, 10646384Sgblack@eecs.umich.edu ToLong, Floor); 10658588Sgblack@eecs.umich.edu 0x4: round_w_s({{ val = Fs_sf; }}, 10666384Sgblack@eecs.umich.edu ToWord, Round); 10678588Sgblack@eecs.umich.edu 0x5: trunc_w_s({{ val = Fs_sf; }}, 10686384Sgblack@eecs.umich.edu ToWord, Trunc); 10698588Sgblack@eecs.umich.edu 0x6: ceil_w_s({{ val = Fs_sf; }}, 10706384Sgblack@eecs.umich.edu ToWord, Ceil); 10718588Sgblack@eecs.umich.edu 0x7: floor_w_s({{ val = Fs_sf; }}, 10726384Sgblack@eecs.umich.edu ToWord, Floor); 10732101SN/A } 10742101SN/A } 10752027SN/A 10762572SN/A 0x2: decode FUNCTION_LO { 10772101SN/A 0x1: decode MOVCF { 10782686Sksewell@umich.edu format BasicOp { 10796384Sgblack@eecs.umich.edu 0x0: movf_s({{ 10806384Sgblack@eecs.umich.edu Fd = (getCondCode(FCSR,CC) == 0) ? 10816384Sgblack@eecs.umich.edu Fs : Fd; 10826384Sgblack@eecs.umich.edu }}); 10836384Sgblack@eecs.umich.edu 0x1: movt_s({{ 10846384Sgblack@eecs.umich.edu Fd = (getCondCode(FCSR,CC) == 1) ? 10856384Sgblack@eecs.umich.edu Fs : Fd; 10866384Sgblack@eecs.umich.edu }}); 10872101SN/A } 10882101SN/A } 10892027SN/A 10902686Sksewell@umich.edu format BasicOp { 10912686Sksewell@umich.edu 0x2: movz_s({{ Fd = (Rt == 0) ? Fs : Fd; }}); 10922686Sksewell@umich.edu 0x3: movn_s({{ Fd = (Rt != 0) ? Fs : Fd; }}); 10932686Sksewell@umich.edu } 10942686Sksewell@umich.edu 10952602SN/A format FloatOp { 10962602SN/A 0x5: recip_s({{ Fd = 1 / Fs; }}); 10976384Sgblack@eecs.umich.edu 0x6: rsqrt_s({{ Fd = 1 / sqrt(Fs); }}); 10982101SN/A } 10995222Sksewell@umich.edu format CP1Unimpl { 11006384Sgblack@eecs.umich.edu default: unknown(); 11015222Sksewell@umich.edu } 11022101SN/A } 11035222Sksewell@umich.edu 0x3: CP1Unimpl::unknown(); 11042027SN/A 11052572SN/A 0x4: decode FUNCTION_LO { 11062603SN/A format FloatConvertOp { 11078588Sgblack@eecs.umich.edu 0x1: cvt_d_s({{ val = Fs_sf; }}, ToDouble); 11088588Sgblack@eecs.umich.edu 0x4: cvt_w_s({{ val = Fs_sf; }}, ToWord); 11098588Sgblack@eecs.umich.edu 0x5: cvt_l_s({{ val = Fs_sf; }}, ToLong); 11102101SN/A } 11112055SN/A 11122686Sksewell@umich.edu 0x6: FloatOp::cvt_ps_s({{ 11138588Sgblack@eecs.umich.edu Fd_ud = (uint64_t) Fs_uw << 32 | 11148588Sgblack@eecs.umich.edu (uint64_t) Ft_uw; 11156384Sgblack@eecs.umich.edu }}); 11165222Sksewell@umich.edu format CP1Unimpl { 11176384Sgblack@eecs.umich.edu default: unknown(); 11185222Sksewell@umich.edu } 11192101SN/A } 11205222Sksewell@umich.edu 0x5: CP1Unimpl::unknown(); 11212602SN/A 11222602SN/A 0x6: decode FUNCTION_LO { 11232603SN/A format FloatCompareOp { 11246384Sgblack@eecs.umich.edu 0x0: c_f_s({{ cond = 0; }}, 11256384Sgblack@eecs.umich.edu SinglePrecision, UnorderedFalse); 11266384Sgblack@eecs.umich.edu 0x1: c_un_s({{ cond = 0; }}, 11276384Sgblack@eecs.umich.edu SinglePrecision, UnorderedTrue); 11288588Sgblack@eecs.umich.edu 0x2: c_eq_s({{ cond = (Fs_sf == Ft_sf); }}, 11292686Sksewell@umich.edu UnorderedFalse); 11308588Sgblack@eecs.umich.edu 0x3: c_ueq_s({{ cond = (Fs_sf == Ft_sf); }}, 11312686Sksewell@umich.edu UnorderedTrue); 11328588Sgblack@eecs.umich.edu 0x4: c_olt_s({{ cond = (Fs_sf < Ft_sf); }}, 11332686Sksewell@umich.edu UnorderedFalse); 11348588Sgblack@eecs.umich.edu 0x5: c_ult_s({{ cond = (Fs_sf < Ft_sf); }}, 11352686Sksewell@umich.edu UnorderedTrue); 11368588Sgblack@eecs.umich.edu 0x6: c_ole_s({{ cond = (Fs_sf <= Ft_sf); }}, 11372686Sksewell@umich.edu UnorderedFalse); 11388588Sgblack@eecs.umich.edu 0x7: c_ule_s({{ cond = (Fs_sf <= Ft_sf); }}, 11392686Sksewell@umich.edu UnorderedTrue); 11402602SN/A } 11412602SN/A } 11422602SN/A 11432602SN/A 0x7: decode FUNCTION_LO { 11442686Sksewell@umich.edu format FloatCompareOp { 11452686Sksewell@umich.edu 0x0: c_sf_s({{ cond = 0; }}, SinglePrecision, 11462686Sksewell@umich.edu UnorderedFalse, QnanException); 11472686Sksewell@umich.edu 0x1: c_ngle_s({{ cond = 0; }}, SinglePrecision, 11482686Sksewell@umich.edu UnorderedTrue, QnanException); 11498588Sgblack@eecs.umich.edu 0x2: c_seq_s({{ cond = (Fs_sf == Ft_sf); }}, 11502686Sksewell@umich.edu UnorderedFalse, QnanException); 11518588Sgblack@eecs.umich.edu 0x3: c_ngl_s({{ cond = (Fs_sf == Ft_sf); }}, 11522686Sksewell@umich.edu UnorderedTrue, QnanException); 11538588Sgblack@eecs.umich.edu 0x4: c_lt_s({{ cond = (Fs_sf < Ft_sf); }}, 11542686Sksewell@umich.edu UnorderedFalse, QnanException); 11558588Sgblack@eecs.umich.edu 0x5: c_nge_s({{ cond = (Fs_sf < Ft_sf); }}, 11562686Sksewell@umich.edu UnorderedTrue, QnanException); 11578588Sgblack@eecs.umich.edu 0x6: c_le_s({{ cond = (Fs_sf <= Ft_sf); }}, 11582686Sksewell@umich.edu UnorderedFalse, QnanException); 11598588Sgblack@eecs.umich.edu 0x7: c_ngt_s({{ cond = (Fs_sf <= Ft_sf); }}, 11602686Sksewell@umich.edu UnorderedTrue, QnanException); 11612602SN/A } 11622602SN/A } 11632101SN/A } 11642055SN/A 11656384Sgblack@eecs.umich.edu //Table A-15 MIPS32 COP1 Encoding of Function Field When 11666384Sgblack@eecs.umich.edu //rs=D 11672572SN/A 0x1: decode FUNCTION_HI { 11682572SN/A 0x0: decode FUNCTION_LO { 11692101SN/A format FloatOp { 11708588Sgblack@eecs.umich.edu 0x0: add_d({{ Fd_df = Fs_df + Ft_df; }}); 11718588Sgblack@eecs.umich.edu 0x1: sub_d({{ Fd_df = Fs_df - Ft_df; }}); 11728588Sgblack@eecs.umich.edu 0x2: mul_d({{ Fd_df = Fs_df * Ft_df; }}); 11738588Sgblack@eecs.umich.edu 0x3: div_d({{ Fd_df = Fs_df / Ft_df; }}); 11748588Sgblack@eecs.umich.edu 0x4: sqrt_d({{ Fd_df = sqrt(Fs_df); }}); 11758588Sgblack@eecs.umich.edu 0x5: abs_d({{ Fd_df = fabs(Fs_df); }}); 11768588Sgblack@eecs.umich.edu 0x7: neg_d({{ Fd_df = -1 * Fs_df; }}); 11772101SN/A } 11788588Sgblack@eecs.umich.edu 0x6: BasicOp::mov_d({{ Fd_df = Fs_df; }}); 11792101SN/A } 11802027SN/A 11812572SN/A 0x1: decode FUNCTION_LO { 11822686Sksewell@umich.edu format FloatConvertOp { 11838588Sgblack@eecs.umich.edu 0x0: round_l_d({{ val = Fs_df; }}, 11846384Sgblack@eecs.umich.edu ToLong, Round); 11858588Sgblack@eecs.umich.edu 0x1: trunc_l_d({{ val = Fs_df; }}, 11866384Sgblack@eecs.umich.edu ToLong, Trunc); 11878588Sgblack@eecs.umich.edu 0x2: ceil_l_d({{ val = Fs_df; }}, 11886384Sgblack@eecs.umich.edu ToLong, Ceil); 11898588Sgblack@eecs.umich.edu 0x3: floor_l_d({{ val = Fs_df; }}, 11906384Sgblack@eecs.umich.edu ToLong, Floor); 11918588Sgblack@eecs.umich.edu 0x4: round_w_d({{ val = Fs_df; }}, 11926384Sgblack@eecs.umich.edu ToWord, Round); 11938588Sgblack@eecs.umich.edu 0x5: trunc_w_d({{ val = Fs_df; }}, 11946384Sgblack@eecs.umich.edu ToWord, Trunc); 11958588Sgblack@eecs.umich.edu 0x6: ceil_w_d({{ val = Fs_df; }}, 11966384Sgblack@eecs.umich.edu ToWord, Ceil); 11978588Sgblack@eecs.umich.edu 0x7: floor_w_d({{ val = Fs_df; }}, 11986384Sgblack@eecs.umich.edu ToWord, Floor); 11992101SN/A } 12002101SN/A } 12012027SN/A 12022572SN/A 0x2: decode FUNCTION_LO { 12032101SN/A 0x1: decode MOVCF { 12042686Sksewell@umich.edu format BasicOp { 12056384Sgblack@eecs.umich.edu 0x0: movf_d({{ 12068588Sgblack@eecs.umich.edu Fd_df = (getCondCode(FCSR,CC) == 0) ? 12078588Sgblack@eecs.umich.edu Fs_df : Fd_df; 12086384Sgblack@eecs.umich.edu }}); 12096384Sgblack@eecs.umich.edu 0x1: movt_d({{ 12108588Sgblack@eecs.umich.edu Fd_df = (getCondCode(FCSR,CC) == 1) ? 12118588Sgblack@eecs.umich.edu Fs_df : Fd_df; 12126384Sgblack@eecs.umich.edu }}); 12132101SN/A } 12142101SN/A } 12152027SN/A 12162101SN/A format BasicOp { 12176384Sgblack@eecs.umich.edu 0x2: movz_d({{ 12188588Sgblack@eecs.umich.edu Fd_df = (Rt == 0) ? Fs_df : Fd_df; 12196384Sgblack@eecs.umich.edu }}); 12206384Sgblack@eecs.umich.edu 0x3: movn_d({{ 12218588Sgblack@eecs.umich.edu Fd_df = (Rt != 0) ? Fs_df : Fd_df; 12226384Sgblack@eecs.umich.edu }}); 12232101SN/A } 12242027SN/A 12252605SN/A format FloatOp { 12268588Sgblack@eecs.umich.edu 0x5: recip_d({{ Fd_df = 1 / Fs_df; }}); 12278588Sgblack@eecs.umich.edu 0x6: rsqrt_d({{ Fd_df = 1 / sqrt(Fs_df); }}); 12282101SN/A } 12295222Sksewell@umich.edu format CP1Unimpl { 12306384Sgblack@eecs.umich.edu default: unknown(); 12315222Sksewell@umich.edu } 12325222Sksewell@umich.edu 12332101SN/A } 12342572SN/A 0x4: decode FUNCTION_LO { 12352686Sksewell@umich.edu format FloatConvertOp { 12368588Sgblack@eecs.umich.edu 0x0: cvt_s_d({{ val = Fs_df; }}, ToSingle); 12378588Sgblack@eecs.umich.edu 0x4: cvt_w_d({{ val = Fs_df; }}, ToWord); 12388588Sgblack@eecs.umich.edu 0x5: cvt_l_d({{ val = Fs_df; }}, ToLong); 12392101SN/A } 12406384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 12412101SN/A } 12422602SN/A 12432602SN/A 0x6: decode FUNCTION_LO { 12442604SN/A format FloatCompareOp { 12456384Sgblack@eecs.umich.edu 0x0: c_f_d({{ cond = 0; }}, 12466384Sgblack@eecs.umich.edu DoublePrecision, UnorderedFalse); 12476384Sgblack@eecs.umich.edu 0x1: c_un_d({{ cond = 0; }}, 12486384Sgblack@eecs.umich.edu DoublePrecision, UnorderedTrue); 12498588Sgblack@eecs.umich.edu 0x2: c_eq_d({{ cond = (Fs_df == Ft_df); }}, 12502686Sksewell@umich.edu UnorderedFalse); 12518588Sgblack@eecs.umich.edu 0x3: c_ueq_d({{ cond = (Fs_df == Ft_df); }}, 12522686Sksewell@umich.edu UnorderedTrue); 12538588Sgblack@eecs.umich.edu 0x4: c_olt_d({{ cond = (Fs_df < Ft_df); }}, 12542686Sksewell@umich.edu UnorderedFalse); 12558588Sgblack@eecs.umich.edu 0x5: c_ult_d({{ cond = (Fs_df < Ft_df); }}, 12562686Sksewell@umich.edu UnorderedTrue); 12578588Sgblack@eecs.umich.edu 0x6: c_ole_d({{ cond = (Fs_df <= Ft_df); }}, 12582686Sksewell@umich.edu UnorderedFalse); 12598588Sgblack@eecs.umich.edu 0x7: c_ule_d({{ cond = (Fs_df <= Ft_df); }}, 12602686Sksewell@umich.edu UnorderedTrue); 12612602SN/A } 12622602SN/A } 12632602SN/A 12642602SN/A 0x7: decode FUNCTION_LO { 12652686Sksewell@umich.edu format FloatCompareOp { 12662686Sksewell@umich.edu 0x0: c_sf_d({{ cond = 0; }}, DoublePrecision, 12672686Sksewell@umich.edu UnorderedFalse, QnanException); 12682686Sksewell@umich.edu 0x1: c_ngle_d({{ cond = 0; }}, DoublePrecision, 12692686Sksewell@umich.edu UnorderedTrue, QnanException); 12708588Sgblack@eecs.umich.edu 0x2: c_seq_d({{ cond = (Fs_df == Ft_df); }}, 12712686Sksewell@umich.edu UnorderedFalse, QnanException); 12728588Sgblack@eecs.umich.edu 0x3: c_ngl_d({{ cond = (Fs_df == Ft_df); }}, 12732686Sksewell@umich.edu UnorderedTrue, QnanException); 12748588Sgblack@eecs.umich.edu 0x4: c_lt_d({{ cond = (Fs_df < Ft_df); }}, 12752686Sksewell@umich.edu UnorderedFalse, QnanException); 12768588Sgblack@eecs.umich.edu 0x5: c_nge_d({{ cond = (Fs_df < Ft_df); }}, 12772686Sksewell@umich.edu UnorderedTrue, QnanException); 12788588Sgblack@eecs.umich.edu 0x6: c_le_d({{ cond = (Fs_df <= Ft_df); }}, 12792686Sksewell@umich.edu UnorderedFalse, QnanException); 12808588Sgblack@eecs.umich.edu 0x7: c_ngt_d({{ cond = (Fs_df <= Ft_df); }}, 12812686Sksewell@umich.edu UnorderedTrue, QnanException); 12822602SN/A } 12832602SN/A } 12846384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 12852101SN/A } 12865222Sksewell@umich.edu 0x2: CP1Unimpl::unknown(); 12875222Sksewell@umich.edu 0x3: CP1Unimpl::unknown(); 12885222Sksewell@umich.edu 0x7: CP1Unimpl::unknown(); 12892027SN/A 129011320Ssteve.reinhardt@amd.com //Table A-16 MIPS32 COP1 Encoding of Function 12916384Sgblack@eecs.umich.edu //Field When rs=W 12922101SN/A 0x4: decode FUNCTION { 12932605SN/A format FloatConvertOp { 12949999Sclt67@cornell.edu 0x20: cvt_s_w({{ val = Fs_sw; }}, ToSingle); 12959999Sclt67@cornell.edu 0x21: cvt_d_w({{ val = Fs_sw; }}, ToDouble); 12965222Sksewell@umich.edu 0x26: CP1Unimpl::cvt_ps_w(); 12972101SN/A } 12986384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 12992101SN/A } 13002027SN/A 13016384Sgblack@eecs.umich.edu //Table A-16 MIPS32 COP1 Encoding of Function Field 13026384Sgblack@eecs.umich.edu //When rs=L1 13036384Sgblack@eecs.umich.edu //Note: "1. Format type L is legal only if 64-bit 13046384Sgblack@eecs.umich.edu //floating point operations are enabled." 13058695Sguodeyuan@tsinghua.org.cn 0x5: decode FUNCTION { 13062686Sksewell@umich.edu format FloatConvertOp { 13079999Sclt67@cornell.edu 0x20: cvt_s_l({{ val = Fs_sd; }}, ToSingle); 13089999Sclt67@cornell.edu 0x21: cvt_d_l({{ val = Fs_sd; }}, ToDouble); 13095222Sksewell@umich.edu 0x26: CP1Unimpl::cvt_ps_l(); 13102101SN/A } 13116384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 13122101SN/A } 13132101SN/A 13146384Sgblack@eecs.umich.edu //Table A-17 MIPS64 COP1 Encoding of Function Field 13156384Sgblack@eecs.umich.edu //When rs=PS1 13166384Sgblack@eecs.umich.edu //Note: "1. Format type PS is legal only if 64-bit 13176384Sgblack@eecs.umich.edu //floating point operations are enabled. " 13182572SN/A 0x6: decode FUNCTION_HI { 13192572SN/A 0x0: decode FUNCTION_LO { 13202101SN/A format Float64Op { 13212605SN/A 0x0: add_ps({{ 13228588Sgblack@eecs.umich.edu Fd1_sf = Fs1_sf + Ft2_sf; 13238588Sgblack@eecs.umich.edu Fd2_sf = Fs2_sf + Ft2_sf; 13242101SN/A }}); 13252605SN/A 0x1: sub_ps({{ 13268588Sgblack@eecs.umich.edu Fd1_sf = Fs1_sf - Ft2_sf; 13278588Sgblack@eecs.umich.edu Fd2_sf = Fs2_sf - Ft2_sf; 13282101SN/A }}); 13292605SN/A 0x2: mul_ps({{ 13308588Sgblack@eecs.umich.edu Fd1_sf = Fs1_sf * Ft2_sf; 13318588Sgblack@eecs.umich.edu Fd2_sf = Fs2_sf * Ft2_sf; 13322101SN/A }}); 13332605SN/A 0x5: abs_ps({{ 13348588Sgblack@eecs.umich.edu Fd1_sf = fabs(Fs1_sf); 13358588Sgblack@eecs.umich.edu Fd2_sf = fabs(Fs2_sf); 13362101SN/A }}); 13372605SN/A 0x6: mov_ps({{ 13388588Sgblack@eecs.umich.edu Fd1_sf = Fs1_sf; 13398588Sgblack@eecs.umich.edu Fd2_sf = Fs2_sf; 13402101SN/A }}); 13412605SN/A 0x7: neg_ps({{ 13428588Sgblack@eecs.umich.edu Fd1_sf = -(Fs1_sf); 13438588Sgblack@eecs.umich.edu Fd2_sf = -(Fs2_sf); 13442101SN/A }}); 13456384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 13462101SN/A } 13472101SN/A } 13485222Sksewell@umich.edu 0x1: CP1Unimpl::unknown(); 13492572SN/A 0x2: decode FUNCTION_LO { 13502101SN/A 0x1: decode MOVCF { 13512101SN/A format Float64Op { 13522607SN/A 0x0: movf_ps({{ 13532686Sksewell@umich.edu Fd1 = (getCondCode(FCSR, CC) == 0) ? 13542686Sksewell@umich.edu Fs1 : Fd1; 13552686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC+1) == 0) ? 13562686Sksewell@umich.edu Fs2 : Fd2; 13572607SN/A }}); 13582607SN/A 0x1: movt_ps({{ 13592686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC) == 1) ? 13602686Sksewell@umich.edu Fs1 : Fd1; 13612686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC+1) == 1) ? 13622686Sksewell@umich.edu Fs2 : Fd2; 13632607SN/A }}); 13642101SN/A } 13652101SN/A } 13662101SN/A 13672605SN/A format Float64Op { 13682607SN/A 0x2: movz_ps({{ 13692686Sksewell@umich.edu Fd1 = (getCondCode(FCSR, CC) == 0) ? 13702686Sksewell@umich.edu Fs1 : Fd1; 13712686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC) == 0) ? 13722686Sksewell@umich.edu Fs2 : Fd2; 13732607SN/A }}); 13742607SN/A 0x3: movn_ps({{ 13752686Sksewell@umich.edu Fd1 = (getCondCode(FCSR, CC) == 1) ? 13762686Sksewell@umich.edu Fs1 : Fd1; 13772686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC) == 1) ? 13782686Sksewell@umich.edu Fs2 : Fd2; 13792607SN/A }}); 13802135SN/A } 13816384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 13822101SN/A } 13835222Sksewell@umich.edu 0x3: CP1Unimpl::unknown(); 13842572SN/A 0x4: decode FUNCTION_LO { 13858588Sgblack@eecs.umich.edu 0x0: FloatOp::cvt_s_pu({{ Fd_sf = Fs2_sf; }}); 13865222Sksewell@umich.edu default: CP1Unimpl::unknown(); 13872101SN/A } 13882101SN/A 13892572SN/A 0x5: decode FUNCTION_LO { 13908588Sgblack@eecs.umich.edu 0x0: FloatOp::cvt_s_pl({{ Fd_sf = Fs1_sf; }}); 13912101SN/A format Float64Op { 13926384Sgblack@eecs.umich.edu 0x4: pll({{ 13938588Sgblack@eecs.umich.edu Fd_ud = (uint64_t)Fs1_uw << 32 | Ft1_uw; 13946384Sgblack@eecs.umich.edu }}); 13956384Sgblack@eecs.umich.edu 0x5: plu({{ 13968588Sgblack@eecs.umich.edu Fd_ud = (uint64_t)Fs1_uw << 32 | Ft2_uw; 13976384Sgblack@eecs.umich.edu }}); 13986384Sgblack@eecs.umich.edu 0x6: pul({{ 13998588Sgblack@eecs.umich.edu Fd_ud = (uint64_t)Fs2_uw << 32 | Ft1_uw; 14006384Sgblack@eecs.umich.edu }}); 14016384Sgblack@eecs.umich.edu 0x7: puu({{ 14028588Sgblack@eecs.umich.edu Fd_ud = (uint64_t)Fs2_uw << 32 | Ft2_uw; 14036384Sgblack@eecs.umich.edu }}); 14042101SN/A } 14055222Sksewell@umich.edu default: CP1Unimpl::unknown(); 14062101SN/A } 14072602SN/A 14082602SN/A 0x6: decode FUNCTION_LO { 14092608SN/A format FloatPSCompareOp { 14102686Sksewell@umich.edu 0x0: c_f_ps({{ cond1 = 0; }}, {{ cond2 = 0; }}, 14112686Sksewell@umich.edu UnorderedFalse); 14122686Sksewell@umich.edu 0x1: c_un_ps({{ cond1 = 0; }}, {{ cond2 = 0; }}, 14132686Sksewell@umich.edu UnorderedTrue); 14148588Sgblack@eecs.umich.edu 0x2: c_eq_ps({{ cond1 = (Fs1_sf == Ft1_sf); }}, 14158588Sgblack@eecs.umich.edu {{ cond2 = (Fs2_sf == Ft2_sf); }}, 14162686Sksewell@umich.edu UnorderedFalse); 14178588Sgblack@eecs.umich.edu 0x3: c_ueq_ps({{ cond1 = (Fs1_sf == Ft1_sf); }}, 14188588Sgblack@eecs.umich.edu {{ cond2 = (Fs2_sf == Ft2_sf); }}, 14192686Sksewell@umich.edu UnorderedTrue); 14208588Sgblack@eecs.umich.edu 0x4: c_olt_ps({{ cond1 = (Fs1_sf < Ft1_sf); }}, 14218588Sgblack@eecs.umich.edu {{ cond2 = (Fs2_sf < Ft2_sf); }}, 14222686Sksewell@umich.edu UnorderedFalse); 14238588Sgblack@eecs.umich.edu 0x5: c_ult_ps({{ cond1 = (Fs_sf < Ft_sf); }}, 14248588Sgblack@eecs.umich.edu {{ cond2 = (Fs2_sf < Ft2_sf); }}, 14252686Sksewell@umich.edu UnorderedTrue); 14268588Sgblack@eecs.umich.edu 0x6: c_ole_ps({{ cond1 = (Fs_sf <= Ft_sf); }}, 14278588Sgblack@eecs.umich.edu {{ cond2 = (Fs2_sf <= Ft2_sf); }}, 14282686Sksewell@umich.edu UnorderedFalse); 14298588Sgblack@eecs.umich.edu 0x7: c_ule_ps({{ cond1 = (Fs1_sf <= Ft1_sf); }}, 14308588Sgblack@eecs.umich.edu {{ cond2 = (Fs2_sf <= Ft2_sf); }}, 14312686Sksewell@umich.edu UnorderedTrue); 14322602SN/A } 14332602SN/A } 14342602SN/A 14352602SN/A 0x7: decode FUNCTION_LO { 14362686Sksewell@umich.edu format FloatPSCompareOp { 14372686Sksewell@umich.edu 0x0: c_sf_ps({{ cond1 = 0; }}, {{ cond2 = 0; }}, 14382686Sksewell@umich.edu UnorderedFalse, QnanException); 14392686Sksewell@umich.edu 0x1: c_ngle_ps({{ cond1 = 0; }}, 14402686Sksewell@umich.edu {{ cond2 = 0; }}, 14412686Sksewell@umich.edu UnorderedTrue, QnanException); 14428588Sgblack@eecs.umich.edu 0x2: c_seq_ps({{ cond1 = (Fs1_sf == Ft1_sf); }}, 14438588Sgblack@eecs.umich.edu {{ cond2 = (Fs2_sf == Ft2_sf); }}, 14442686Sksewell@umich.edu UnorderedFalse, QnanException); 14458588Sgblack@eecs.umich.edu 0x3: c_ngl_ps({{ cond1 = (Fs1_sf == Ft1_sf); }}, 14468588Sgblack@eecs.umich.edu {{ cond2 = (Fs2_sf == Ft2_sf); }}, 14472686Sksewell@umich.edu UnorderedTrue, QnanException); 14488588Sgblack@eecs.umich.edu 0x4: c_lt_ps({{ cond1 = (Fs1_sf < Ft1_sf); }}, 14498588Sgblack@eecs.umich.edu {{ cond2 = (Fs2_sf < Ft2_sf); }}, 14502686Sksewell@umich.edu UnorderedFalse, QnanException); 14518588Sgblack@eecs.umich.edu 0x5: c_nge_ps({{ cond1 = (Fs1_sf < Ft1_sf); }}, 14528588Sgblack@eecs.umich.edu {{ cond2 = (Fs2_sf < Ft2_sf); }}, 14532686Sksewell@umich.edu UnorderedTrue, QnanException); 14548588Sgblack@eecs.umich.edu 0x6: c_le_ps({{ cond1 = (Fs1_sf <= Ft1_sf); }}, 14558588Sgblack@eecs.umich.edu {{ cond2 = (Fs2_sf <= Ft2_sf); }}, 14562686Sksewell@umich.edu UnorderedFalse, QnanException); 14578588Sgblack@eecs.umich.edu 0x7: c_ngt_ps({{ cond1 = (Fs1_sf <= Ft1_sf); }}, 14588588Sgblack@eecs.umich.edu {{ cond2 = (Fs2_sf <= Ft2_sf); }}, 14592686Sksewell@umich.edu UnorderedTrue, QnanException); 14602602SN/A } 14612602SN/A } 14622101SN/A } 14632101SN/A } 14646384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 14652101SN/A } 14662101SN/A } 14672101SN/A 14682101SN/A //Table A-19 MIPS32 COP2 Encoding of rs Field 14692101SN/A 0x2: decode RS_MSB { 14705222Sksewell@umich.edu format CP2Unimpl { 14712686Sksewell@umich.edu 0x0: decode RS_HI { 14722686Sksewell@umich.edu 0x0: decode RS_LO { 14732101SN/A 0x0: mfc2(); 14742101SN/A 0x2: cfc2(); 14752101SN/A 0x3: mfhc2(); 14762101SN/A 0x4: mtc2(); 14772101SN/A 0x6: ctc2(); 14782101SN/A 0x7: mftc2(); 14796384Sgblack@eecs.umich.edu default: unknown(); 14802101SN/A } 14812101SN/A 14822686Sksewell@umich.edu 0x1: decode ND { 14832686Sksewell@umich.edu 0x0: decode TF { 14842101SN/A 0x0: bc2f(); 14852101SN/A 0x1: bc2t(); 14866384Sgblack@eecs.umich.edu default: unknown(); 14872101SN/A } 14882101SN/A 14892686Sksewell@umich.edu 0x1: decode TF { 14902101SN/A 0x0: bc2fl(); 14912101SN/A 0x1: bc2tl(); 14926384Sgblack@eecs.umich.edu default: unknown(); 14932101SN/A } 14946384Sgblack@eecs.umich.edu default: unknown(); 14955222Sksewell@umich.edu 14966384Sgblack@eecs.umich.edu } 14976384Sgblack@eecs.umich.edu default: unknown(); 14986384Sgblack@eecs.umich.edu } 14996384Sgblack@eecs.umich.edu default: unknown(); 15002101SN/A } 15012101SN/A } 15022101SN/A 15032101SN/A //Table A-20 MIPS64 COP1X Encoding of Function Field 1 15042101SN/A //Note: "COP1X instructions are legal only if 64-bit floating point 15052101SN/A //operations are enabled." 15062101SN/A 0x3: decode FUNCTION_HI { 15072101SN/A 0x0: decode FUNCTION_LO { 15082686Sksewell@umich.edu format LoadIndexedMemory { 15098588Sgblack@eecs.umich.edu 0x0: lwxc1({{ Fd_uw = Mem_uw; }}); 15108588Sgblack@eecs.umich.edu 0x1: ldxc1({{ Fd_ud = Mem_ud; }}); 15118588Sgblack@eecs.umich.edu 0x5: luxc1({{ Fd_ud = Mem_ud; }}, 15122742Sksewell@umich.edu {{ EA = (Rs + Rt) & ~7; }}); 15132101SN/A } 15142043SN/A } 15152027SN/A 15162101SN/A 0x1: decode FUNCTION_LO { 15172686Sksewell@umich.edu format StoreIndexedMemory { 15188588Sgblack@eecs.umich.edu 0x0: swxc1({{ Mem_uw = Fs_uw; }}); 15198588Sgblack@eecs.umich.edu 0x1: sdxc1({{ Mem_ud = Fs_ud; }}); 15208588Sgblack@eecs.umich.edu 0x5: suxc1({{ Mem_ud = Fs_ud; }}, 15212742Sksewell@umich.edu {{ EA = (Rs + Rt) & ~7; }}); 15222046SN/A } 15232686Sksewell@umich.edu 0x7: Prefetch::prefx({{ EA = Rs + Rt; }}); 15242101SN/A } 15252027SN/A 15262686Sksewell@umich.edu 0x3: decode FUNCTION_LO { 15276384Sgblack@eecs.umich.edu 0x6: Float64Op::alnv_ps({{ 15286384Sgblack@eecs.umich.edu if (Rs<2:0> == 0) { 15298588Sgblack@eecs.umich.edu Fd_ud = Fs_ud; 15306384Sgblack@eecs.umich.edu } else if (Rs<2:0> == 4) { 15318564Sgblack@eecs.umich.edu if (GuestByteOrder == BigEndianByteOrder) 15328588Sgblack@eecs.umich.edu Fd_ud = Fs_ud<31:0> << 32 | Ft_ud<63:32>; 15338564Sgblack@eecs.umich.edu else 15348588Sgblack@eecs.umich.edu Fd_ud = Ft_ud<31:0> << 32 | Fs_ud<63:32>; 15356384Sgblack@eecs.umich.edu } else { 15368588Sgblack@eecs.umich.edu Fd_ud = Fd_ud; 15376384Sgblack@eecs.umich.edu } 15386384Sgblack@eecs.umich.edu }}); 15392686Sksewell@umich.edu } 15402027SN/A 15412686Sksewell@umich.edu format FloatAccOp { 15422686Sksewell@umich.edu 0x4: decode FUNCTION_LO { 15438588Sgblack@eecs.umich.edu 0x0: madd_s({{ Fd_sf = (Fs_sf * Ft_sf) + Fr_sf; }}); 15448588Sgblack@eecs.umich.edu 0x1: madd_d({{ Fd_df = (Fs_df * Ft_df) + Fr_df; }}); 15452686Sksewell@umich.edu 0x6: madd_ps({{ 15468588Sgblack@eecs.umich.edu Fd1_sf = (Fs1_df * Ft1_df) + Fr1_df; 15478588Sgblack@eecs.umich.edu Fd2_sf = (Fs2_df * Ft2_df) + Fr2_df; 15482686Sksewell@umich.edu }}); 15492686Sksewell@umich.edu } 15502027SN/A 15512686Sksewell@umich.edu 0x5: decode FUNCTION_LO { 15528588Sgblack@eecs.umich.edu 0x0: msub_s({{ Fd_sf = (Fs_sf * Ft_sf) - Fr_sf; }}); 15538588Sgblack@eecs.umich.edu 0x1: msub_d({{ Fd_df = (Fs_df * Ft_df) - Fr_df; }}); 15542686Sksewell@umich.edu 0x6: msub_ps({{ 15558588Sgblack@eecs.umich.edu Fd1_sf = (Fs1_df * Ft1_df) - Fr1_df; 15568588Sgblack@eecs.umich.edu Fd2_sf = (Fs2_df * Ft2_df) - Fr2_df; 15572686Sksewell@umich.edu }}); 15582686Sksewell@umich.edu } 15592027SN/A 15602686Sksewell@umich.edu 0x6: decode FUNCTION_LO { 15618588Sgblack@eecs.umich.edu 0x0: nmadd_s({{ Fd_sf = (-1 * Fs_sf * Ft_sf) - Fr_sf; }}); 15628588Sgblack@eecs.umich.edu 0x1: nmadd_d({{ Fd_df = (-1 * Fs_df * Ft_df) - Fr_df; }}); 15632686Sksewell@umich.edu 0x6: nmadd_ps({{ 15648588Sgblack@eecs.umich.edu Fd1_sf = -((Fs1_df * Ft1_df) + Fr1_df); 15658588Sgblack@eecs.umich.edu Fd2_sf = -((Fs2_df * Ft2_df) + Fr2_df); 15662686Sksewell@umich.edu }}); 15672686Sksewell@umich.edu } 15682027SN/A 15692686Sksewell@umich.edu 0x7: decode FUNCTION_LO { 15708588Sgblack@eecs.umich.edu 0x0: nmsub_s({{ Fd_sf = (-1 * Fs_sf * Ft_sf) + Fr_sf; }}); 15718588Sgblack@eecs.umich.edu 0x1: nmsub_d({{ Fd_df = (-1 * Fs_df * Ft_df) + Fr_df; }}); 15722686Sksewell@umich.edu 0x6: nmsub_ps({{ 15738588Sgblack@eecs.umich.edu Fd1_sf = -((Fs1_df * Ft1_df) - Fr1_df); 15748588Sgblack@eecs.umich.edu Fd2_sf = -((Fs2_df * Ft2_df) - Fr2_df); 15752686Sksewell@umich.edu }}); 15762046SN/A } 15772101SN/A } 15782043SN/A } 15792025SN/A 15802686Sksewell@umich.edu format Branch { 15818588Sgblack@eecs.umich.edu 0x4: beql({{ cond = (Rs_sw == Rt_sw); }}, Likely); 15828588Sgblack@eecs.umich.edu 0x5: bnel({{ cond = (Rs_sw != Rt_sw); }}, Likely); 15838588Sgblack@eecs.umich.edu 0x6: blezl({{ cond = (Rs_sw <= 0); }}, Likely); 15848588Sgblack@eecs.umich.edu 0x7: bgtzl({{ cond = (Rs_sw > 0); }}, Likely); 15852046SN/A } 15862084SN/A } 15872024SN/A 15882686Sksewell@umich.edu 0x3: decode OPCODE_LO { 15892043SN/A //Table A-5 MIPS32 SPECIAL2 Encoding of Function Field 15902043SN/A 0x4: decode FUNCTION_HI { 15912686Sksewell@umich.edu 0x0: decode FUNCTION_LO { 15926384Sgblack@eecs.umich.edu 0x2: IntOp::mul({{ 15938588Sgblack@eecs.umich.edu int64_t temp1 = Rs_sd * Rt_sd; 15948588Sgblack@eecs.umich.edu Rd_sw = temp1<31:0>; 15956384Sgblack@eecs.umich.edu }}, IntMultOp); 15962027SN/A 15974661Sksewell@umich.edu format HiLoRdSelValOp { 15986384Sgblack@eecs.umich.edu 0x0: madd({{ 15996384Sgblack@eecs.umich.edu val = ((int64_t)HI_RD_SEL << 32 | LO_RD_SEL) + 16008588Sgblack@eecs.umich.edu (Rs_sd * Rt_sd); 16016384Sgblack@eecs.umich.edu }}, IntMultOp); 16026384Sgblack@eecs.umich.edu 0x1: maddu({{ 16036384Sgblack@eecs.umich.edu val = ((uint64_t)HI_RD_SEL << 32 | LO_RD_SEL) + 16048588Sgblack@eecs.umich.edu (Rs_ud * Rt_ud); 16056384Sgblack@eecs.umich.edu }}, IntMultOp); 16066384Sgblack@eecs.umich.edu 0x4: msub({{ 16076384Sgblack@eecs.umich.edu val = ((int64_t)HI_RD_SEL << 32 | LO_RD_SEL) - 16088588Sgblack@eecs.umich.edu (Rs_sd * Rt_sd); 16096384Sgblack@eecs.umich.edu }}, IntMultOp); 16106384Sgblack@eecs.umich.edu 0x5: msubu({{ 16116384Sgblack@eecs.umich.edu val = ((uint64_t)HI_RD_SEL << 32 | LO_RD_SEL) - 16128588Sgblack@eecs.umich.edu (Rs_ud * Rt_ud); 16136384Sgblack@eecs.umich.edu }}, IntMultOp); 16142043SN/A } 16152043SN/A } 16162027SN/A 16172043SN/A 0x4: decode FUNCTION_LO { 16182101SN/A format BasicOp { 16196384Sgblack@eecs.umich.edu 0x0: clz({{ 16206384Sgblack@eecs.umich.edu int cnt = 32; 16216384Sgblack@eecs.umich.edu for (int idx = 31; idx >= 0; idx--) { 16226384Sgblack@eecs.umich.edu if (Rs<idx:idx> == 1) { 16236384Sgblack@eecs.umich.edu cnt = 31 - idx; 16246384Sgblack@eecs.umich.edu break; 16256384Sgblack@eecs.umich.edu } 16266384Sgblack@eecs.umich.edu } 16278588Sgblack@eecs.umich.edu Rd_uw = cnt; 16286384Sgblack@eecs.umich.edu }}); 16296384Sgblack@eecs.umich.edu 0x1: clo({{ 16306384Sgblack@eecs.umich.edu int cnt = 32; 16316384Sgblack@eecs.umich.edu for (int idx = 31; idx >= 0; idx--) { 16326384Sgblack@eecs.umich.edu if (Rs<idx:idx> == 0) { 16336384Sgblack@eecs.umich.edu cnt = 31 - idx; 16346384Sgblack@eecs.umich.edu break; 16356384Sgblack@eecs.umich.edu } 16366384Sgblack@eecs.umich.edu } 16378588Sgblack@eecs.umich.edu Rd_uw = cnt; 16386384Sgblack@eecs.umich.edu }}); 16392101SN/A } 16402043SN/A } 16412027SN/A 16422043SN/A 0x7: decode FUNCTION_LO { 16432686Sksewell@umich.edu 0x7: FailUnimpl::sdbbp(); 16442043SN/A } 16452043SN/A } 16462024SN/A 16472686Sksewell@umich.edu //Table A-6 MIPS32 SPECIAL3 Encoding of Function Field for Release 2 16482686Sksewell@umich.edu //of the Architecture 16492043SN/A 0x7: decode FUNCTION_HI { 16502101SN/A 0x0: decode FUNCTION_LO { 16512686Sksewell@umich.edu format BasicOp { 16528588Sgblack@eecs.umich.edu 0x0: ext({{ Rt_uw = bits(Rs_uw, MSB+LSB, LSB); }}); 16536384Sgblack@eecs.umich.edu 0x4: ins({{ 16548588Sgblack@eecs.umich.edu Rt_uw = bits(Rt_uw, 31, MSB+1) << (MSB+1) | 16558588Sgblack@eecs.umich.edu bits(Rs_uw, MSB-LSB, 0) << LSB | 16568588Sgblack@eecs.umich.edu bits(Rt_uw, LSB-1, 0); 16576384Sgblack@eecs.umich.edu }}); 16582046SN/A } 16592101SN/A } 16602026SN/A 16612101SN/A 0x1: decode FUNCTION_LO { 16624661Sksewell@umich.edu format MT_Control { 16636384Sgblack@eecs.umich.edu 0x0: fork({{ 16646384Sgblack@eecs.umich.edu forkThread(xc->tcBase(), fault, RD, Rs, Rt); 16656384Sgblack@eecs.umich.edu }}, UserMode); 16666384Sgblack@eecs.umich.edu 0x1: yield({{ 16678588Sgblack@eecs.umich.edu Rd_sw = yieldThread(xc->tcBase(), fault, Rs_sw, 16686384Sgblack@eecs.umich.edu YQMask); 16696384Sgblack@eecs.umich.edu }}, UserMode); 16704661Sksewell@umich.edu } 16714661Sksewell@umich.edu 16724661Sksewell@umich.edu //Table 5-9 MIPS32 LX Encoding of the op Field (DSP ASE MANUAL) 16734661Sksewell@umich.edu 0x2: decode OP_HI { 16744661Sksewell@umich.edu 0x0: decode OP_LO { 16754661Sksewell@umich.edu format LoadIndexedMemory { 16768588Sgblack@eecs.umich.edu 0x0: lwx({{ Rd_sw = Mem_sw; }}); 16778588Sgblack@eecs.umich.edu 0x4: lhx({{ Rd_sw = Mem_sh; }}); 16788588Sgblack@eecs.umich.edu 0x6: lbux({{ Rd_uw = Mem_ub; }}); 16794661Sksewell@umich.edu } 16804661Sksewell@umich.edu } 16814661Sksewell@umich.edu } 16826384Sgblack@eecs.umich.edu 0x4: DspIntOp::insv({{ 16836384Sgblack@eecs.umich.edu int pos = dspctl<5:0>; 16846384Sgblack@eecs.umich.edu int size = dspctl<12:7> - 1; 16858588Sgblack@eecs.umich.edu Rt_uw = insertBits(Rt_uw, pos+size, 16868588Sgblack@eecs.umich.edu pos, Rs_uw<size:0>); 16876384Sgblack@eecs.umich.edu }}); 16884661Sksewell@umich.edu } 16894661Sksewell@umich.edu 16904661Sksewell@umich.edu 0x2: decode FUNCTION_LO { 16914661Sksewell@umich.edu 16926384Sgblack@eecs.umich.edu //Table 5-5 MIPS32 ADDU.QB Encoding of the op Field 16936384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 16944661Sksewell@umich.edu 0x0: decode OP_HI { 16954661Sksewell@umich.edu 0x0: decode OP_LO { 16964661Sksewell@umich.edu format DspIntOp { 16976384Sgblack@eecs.umich.edu 0x0: addu_qb({{ 16988588Sgblack@eecs.umich.edu Rd_uw = dspAdd(Rs_uw, Rt_uw, SIMD_FMT_QB, 16996384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 17006384Sgblack@eecs.umich.edu }}); 17016384Sgblack@eecs.umich.edu 0x1: subu_qb({{ 17028588Sgblack@eecs.umich.edu Rd_uw = dspSub(Rs_uw, Rt_uw, SIMD_FMT_QB, 17036384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 17046384Sgblack@eecs.umich.edu }}); 17056384Sgblack@eecs.umich.edu 0x4: addu_s_qb({{ 17068588Sgblack@eecs.umich.edu Rd_uw = dspAdd(Rs_uw, Rt_uw, SIMD_FMT_QB, 17076384Sgblack@eecs.umich.edu SATURATE, UNSIGNED, &dspctl); 17086384Sgblack@eecs.umich.edu }}); 17096384Sgblack@eecs.umich.edu 0x5: subu_s_qb({{ 17108588Sgblack@eecs.umich.edu Rd_uw = dspSub(Rs_uw, Rt_uw, SIMD_FMT_QB, 17116384Sgblack@eecs.umich.edu SATURATE, UNSIGNED, &dspctl); 17126384Sgblack@eecs.umich.edu }}); 17136384Sgblack@eecs.umich.edu 0x6: muleu_s_ph_qbl({{ 17148588Sgblack@eecs.umich.edu Rd_uw = dspMuleu(Rs_uw, Rt_uw, 17156384Sgblack@eecs.umich.edu MODE_L, &dspctl); 17166384Sgblack@eecs.umich.edu }}, IntMultOp); 17176384Sgblack@eecs.umich.edu 0x7: muleu_s_ph_qbr({{ 17188588Sgblack@eecs.umich.edu Rd_uw = dspMuleu(Rs_uw, Rt_uw, 17196384Sgblack@eecs.umich.edu MODE_R, &dspctl); 17206384Sgblack@eecs.umich.edu }}, IntMultOp); 17214661Sksewell@umich.edu } 17224661Sksewell@umich.edu } 17234661Sksewell@umich.edu 0x1: decode OP_LO { 17244661Sksewell@umich.edu format DspIntOp { 17256384Sgblack@eecs.umich.edu 0x0: addu_ph({{ 17268588Sgblack@eecs.umich.edu Rd_uw = dspAdd(Rs_uw, Rt_uw, SIMD_FMT_PH, 17276384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 17286384Sgblack@eecs.umich.edu }}); 17296384Sgblack@eecs.umich.edu 0x1: subu_ph({{ 17308588Sgblack@eecs.umich.edu Rd_uw = dspSub(Rs_uw, Rt_uw, SIMD_FMT_PH, 17316384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 17326384Sgblack@eecs.umich.edu }}); 17336384Sgblack@eecs.umich.edu 0x2: addq_ph({{ 17348588Sgblack@eecs.umich.edu Rd_uw = dspAdd(Rs_uw, Rt_uw, SIMD_FMT_PH, 17356384Sgblack@eecs.umich.edu NOSATURATE, SIGNED, &dspctl); 17366384Sgblack@eecs.umich.edu }}); 17376384Sgblack@eecs.umich.edu 0x3: subq_ph({{ 17388588Sgblack@eecs.umich.edu Rd_uw = dspSub(Rs_uw, Rt_uw, SIMD_FMT_PH, 17396384Sgblack@eecs.umich.edu NOSATURATE, SIGNED, &dspctl); 17406384Sgblack@eecs.umich.edu }}); 17416384Sgblack@eecs.umich.edu 0x4: addu_s_ph({{ 17428588Sgblack@eecs.umich.edu Rd_uw = dspAdd(Rs_uw, Rt_uw, SIMD_FMT_PH, 17436384Sgblack@eecs.umich.edu SATURATE, UNSIGNED, &dspctl); 17446384Sgblack@eecs.umich.edu }}); 17456384Sgblack@eecs.umich.edu 0x5: subu_s_ph({{ 17468588Sgblack@eecs.umich.edu Rd_uw = dspSub(Rs_uw, Rt_uw, SIMD_FMT_PH, 17476384Sgblack@eecs.umich.edu SATURATE, UNSIGNED, &dspctl); 17486384Sgblack@eecs.umich.edu }}); 17496384Sgblack@eecs.umich.edu 0x6: addq_s_ph({{ 17508588Sgblack@eecs.umich.edu Rd_uw = dspAdd(Rs_uw, Rt_uw, SIMD_FMT_PH, 17516384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 17526384Sgblack@eecs.umich.edu }}); 17536384Sgblack@eecs.umich.edu 0x7: subq_s_ph({{ 17548588Sgblack@eecs.umich.edu Rd_uw = dspSub(Rs_uw, Rt_uw, SIMD_FMT_PH, 17556384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 17566384Sgblack@eecs.umich.edu }}); 17574661Sksewell@umich.edu } 17584661Sksewell@umich.edu } 17594661Sksewell@umich.edu 0x2: decode OP_LO { 17604661Sksewell@umich.edu format DspIntOp { 17616384Sgblack@eecs.umich.edu 0x0: addsc({{ 17626384Sgblack@eecs.umich.edu int64_t dresult; 17638588Sgblack@eecs.umich.edu dresult = Rs_ud + Rt_ud; 17648588Sgblack@eecs.umich.edu Rd_sw = dresult<31:0>; 17656384Sgblack@eecs.umich.edu dspctl = insertBits(dspctl, 13, 13, 17666384Sgblack@eecs.umich.edu dresult<32:32>); 17676384Sgblack@eecs.umich.edu }}); 17686384Sgblack@eecs.umich.edu 0x1: addwc({{ 17696384Sgblack@eecs.umich.edu int64_t dresult; 17708588Sgblack@eecs.umich.edu dresult = Rs_sd + Rt_sd + dspctl<13:13>; 17718588Sgblack@eecs.umich.edu Rd_sw = dresult<31:0>; 17726384Sgblack@eecs.umich.edu if (dresult<32:32> != dresult<31:31>) 17736384Sgblack@eecs.umich.edu dspctl = insertBits(dspctl, 20, 20, 1); 17746384Sgblack@eecs.umich.edu }}); 17756384Sgblack@eecs.umich.edu 0x2: modsub({{ 17768588Sgblack@eecs.umich.edu Rd_sw = (Rs_sw == 0) ? Rt_sw<23:8> : 17778588Sgblack@eecs.umich.edu Rs_sw - Rt_sw<7:0>; 17786384Sgblack@eecs.umich.edu }}); 17796384Sgblack@eecs.umich.edu 0x4: raddu_w_qb({{ 17808588Sgblack@eecs.umich.edu Rd_uw = Rs_uw<31:24> + Rs_uw<23:16> + 17818588Sgblack@eecs.umich.edu Rs_uw<15:8> + Rs_uw<7:0>; 17826384Sgblack@eecs.umich.edu }}); 17836384Sgblack@eecs.umich.edu 0x6: addq_s_w({{ 17848588Sgblack@eecs.umich.edu Rd_sw = dspAdd(Rs_sw, Rt_sw, SIMD_FMT_W, 17856384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 17866384Sgblack@eecs.umich.edu }}); 17876384Sgblack@eecs.umich.edu 0x7: subq_s_w({{ 17888588Sgblack@eecs.umich.edu Rd_sw = dspSub(Rs_sw, Rt_sw, SIMD_FMT_W, 17896384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 17906384Sgblack@eecs.umich.edu }}); 17914661Sksewell@umich.edu } 17924661Sksewell@umich.edu } 17934661Sksewell@umich.edu 0x3: decode OP_LO { 17944661Sksewell@umich.edu format DspIntOp { 17956384Sgblack@eecs.umich.edu 0x4: muleq_s_w_phl({{ 17968588Sgblack@eecs.umich.edu Rd_sw = dspMuleq(Rs_sw, Rt_sw, 17976384Sgblack@eecs.umich.edu MODE_L, &dspctl); 17986384Sgblack@eecs.umich.edu }}, IntMultOp); 17996384Sgblack@eecs.umich.edu 0x5: muleq_s_w_phr({{ 18008588Sgblack@eecs.umich.edu Rd_sw = dspMuleq(Rs_sw, Rt_sw, 18016384Sgblack@eecs.umich.edu MODE_R, &dspctl); 18026384Sgblack@eecs.umich.edu }}, IntMultOp); 18036384Sgblack@eecs.umich.edu 0x6: mulq_s_ph({{ 18048588Sgblack@eecs.umich.edu Rd_sw = dspMulq(Rs_sw, Rt_sw, SIMD_FMT_PH, 18056384Sgblack@eecs.umich.edu SATURATE, NOROUND, &dspctl); 18066384Sgblack@eecs.umich.edu }}, IntMultOp); 18076384Sgblack@eecs.umich.edu 0x7: mulq_rs_ph({{ 18088588Sgblack@eecs.umich.edu Rd_sw = dspMulq(Rs_sw, Rt_sw, SIMD_FMT_PH, 18096384Sgblack@eecs.umich.edu SATURATE, ROUND, &dspctl); 18106384Sgblack@eecs.umich.edu }}, IntMultOp); 18114661Sksewell@umich.edu } 18124661Sksewell@umich.edu } 18134661Sksewell@umich.edu } 18144661Sksewell@umich.edu 18156384Sgblack@eecs.umich.edu //Table 5-6 MIPS32 CMPU_EQ_QB Encoding of the op Field 18166384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 18174661Sksewell@umich.edu 0x1: decode OP_HI { 18184661Sksewell@umich.edu 0x0: decode OP_LO { 18194661Sksewell@umich.edu format DspIntOp { 18206384Sgblack@eecs.umich.edu 0x0: cmpu_eq_qb({{ 18218588Sgblack@eecs.umich.edu dspCmp(Rs_uw, Rt_uw, SIMD_FMT_QB, 18226384Sgblack@eecs.umich.edu UNSIGNED, CMP_EQ, &dspctl); 18236384Sgblack@eecs.umich.edu }}); 18246384Sgblack@eecs.umich.edu 0x1: cmpu_lt_qb({{ 18258588Sgblack@eecs.umich.edu dspCmp(Rs_uw, Rt_uw, SIMD_FMT_QB, 18266384Sgblack@eecs.umich.edu UNSIGNED, CMP_LT, &dspctl); 18276384Sgblack@eecs.umich.edu }}); 18286384Sgblack@eecs.umich.edu 0x2: cmpu_le_qb({{ 18298588Sgblack@eecs.umich.edu dspCmp(Rs_uw, Rt_uw, SIMD_FMT_QB, 18306384Sgblack@eecs.umich.edu UNSIGNED, CMP_LE, &dspctl); 18316384Sgblack@eecs.umich.edu }}); 18326384Sgblack@eecs.umich.edu 0x3: pick_qb({{ 18338588Sgblack@eecs.umich.edu Rd_uw = dspPick(Rs_uw, Rt_uw, 18346384Sgblack@eecs.umich.edu SIMD_FMT_QB, &dspctl); 18356384Sgblack@eecs.umich.edu }}); 18366384Sgblack@eecs.umich.edu 0x4: cmpgu_eq_qb({{ 18378588Sgblack@eecs.umich.edu Rd_uw = dspCmpg(Rs_uw, Rt_uw, SIMD_FMT_QB, 18386384Sgblack@eecs.umich.edu UNSIGNED, CMP_EQ ); 18396384Sgblack@eecs.umich.edu }}); 18406384Sgblack@eecs.umich.edu 0x5: cmpgu_lt_qb({{ 18418588Sgblack@eecs.umich.edu Rd_uw = dspCmpg(Rs_uw, Rt_uw, SIMD_FMT_QB, 18426384Sgblack@eecs.umich.edu UNSIGNED, CMP_LT); 18436384Sgblack@eecs.umich.edu }}); 18446384Sgblack@eecs.umich.edu 0x6: cmpgu_le_qb({{ 18458588Sgblack@eecs.umich.edu Rd_uw = dspCmpg(Rs_uw, Rt_uw, SIMD_FMT_QB, 18466384Sgblack@eecs.umich.edu UNSIGNED, CMP_LE); 18476384Sgblack@eecs.umich.edu }}); 18484661Sksewell@umich.edu } 18494661Sksewell@umich.edu } 18504661Sksewell@umich.edu 0x1: decode OP_LO { 18514661Sksewell@umich.edu format DspIntOp { 18526384Sgblack@eecs.umich.edu 0x0: cmp_eq_ph({{ 18538588Sgblack@eecs.umich.edu dspCmp(Rs_uw, Rt_uw, SIMD_FMT_PH, 18546384Sgblack@eecs.umich.edu SIGNED, CMP_EQ, &dspctl); 18556384Sgblack@eecs.umich.edu }}); 18566384Sgblack@eecs.umich.edu 0x1: cmp_lt_ph({{ 18578588Sgblack@eecs.umich.edu dspCmp(Rs_uw, Rt_uw, SIMD_FMT_PH, 18586384Sgblack@eecs.umich.edu SIGNED, CMP_LT, &dspctl); 18596384Sgblack@eecs.umich.edu }}); 18606384Sgblack@eecs.umich.edu 0x2: cmp_le_ph({{ 18618588Sgblack@eecs.umich.edu dspCmp(Rs_uw, Rt_uw, SIMD_FMT_PH, 18626384Sgblack@eecs.umich.edu SIGNED, CMP_LE, &dspctl); 18636384Sgblack@eecs.umich.edu }}); 18646384Sgblack@eecs.umich.edu 0x3: pick_ph({{ 18658588Sgblack@eecs.umich.edu Rd_uw = dspPick(Rs_uw, Rt_uw, 18666384Sgblack@eecs.umich.edu SIMD_FMT_PH, &dspctl); 18676384Sgblack@eecs.umich.edu }}); 18686384Sgblack@eecs.umich.edu 0x4: precrq_qb_ph({{ 18698588Sgblack@eecs.umich.edu Rd_uw = Rs_uw<31:24> << 24 | 18708588Sgblack@eecs.umich.edu Rs_uw<15:8> << 16 | 18718588Sgblack@eecs.umich.edu Rt_uw<31:24> << 8 | 18728588Sgblack@eecs.umich.edu Rt_uw<15:8>; 18736384Sgblack@eecs.umich.edu }}); 18746384Sgblack@eecs.umich.edu 0x5: precr_qb_ph({{ 18758588Sgblack@eecs.umich.edu Rd_uw = Rs_uw<23:16> << 24 | 18768588Sgblack@eecs.umich.edu Rs_uw<7:0> << 16 | 18778588Sgblack@eecs.umich.edu Rt_uw<23:16> << 8 | 18788588Sgblack@eecs.umich.edu Rt_uw<7:0>; 18796384Sgblack@eecs.umich.edu }}); 18806384Sgblack@eecs.umich.edu 0x6: packrl_ph({{ 18818588Sgblack@eecs.umich.edu Rd_uw = dspPack(Rs_uw, Rt_uw, SIMD_FMT_PH); 18826384Sgblack@eecs.umich.edu }}); 18836384Sgblack@eecs.umich.edu 0x7: precrqu_s_qb_ph({{ 18848588Sgblack@eecs.umich.edu Rd_uw = dspPrecrqu(Rs_uw, Rt_uw, &dspctl); 18856384Sgblack@eecs.umich.edu }}); 18864661Sksewell@umich.edu } 18874661Sksewell@umich.edu } 18884661Sksewell@umich.edu 0x2: decode OP_LO { 18894661Sksewell@umich.edu format DspIntOp { 18906384Sgblack@eecs.umich.edu 0x4: precrq_ph_w({{ 18918588Sgblack@eecs.umich.edu Rd_uw = Rs_uw<31:16> << 16 | Rt_uw<31:16>; 18926384Sgblack@eecs.umich.edu }}); 18936384Sgblack@eecs.umich.edu 0x5: precrq_rs_ph_w({{ 18948588Sgblack@eecs.umich.edu Rd_uw = dspPrecrq(Rs_uw, Rt_uw, 18956384Sgblack@eecs.umich.edu SIMD_FMT_W, &dspctl); 18966384Sgblack@eecs.umich.edu }}); 18974661Sksewell@umich.edu } 18984661Sksewell@umich.edu } 18994661Sksewell@umich.edu 0x3: decode OP_LO { 19004661Sksewell@umich.edu format DspIntOp { 19016384Sgblack@eecs.umich.edu 0x0: cmpgdu_eq_qb({{ 19028588Sgblack@eecs.umich.edu Rd_uw = dspCmpgd(Rs_uw, Rt_uw, SIMD_FMT_QB, 19036384Sgblack@eecs.umich.edu UNSIGNED, CMP_EQ, &dspctl); 19046384Sgblack@eecs.umich.edu }}); 19056384Sgblack@eecs.umich.edu 0x1: cmpgdu_lt_qb({{ 19068588Sgblack@eecs.umich.edu Rd_uw = dspCmpgd(Rs_uw, Rt_uw, SIMD_FMT_QB, 19076384Sgblack@eecs.umich.edu UNSIGNED, CMP_LT, &dspctl); 19086384Sgblack@eecs.umich.edu }}); 19096384Sgblack@eecs.umich.edu 0x2: cmpgdu_le_qb({{ 19108588Sgblack@eecs.umich.edu Rd_uw = dspCmpgd(Rs_uw, Rt_uw, SIMD_FMT_QB, 19116384Sgblack@eecs.umich.edu UNSIGNED, CMP_LE, &dspctl); 19126384Sgblack@eecs.umich.edu }}); 19136384Sgblack@eecs.umich.edu 0x6: precr_sra_ph_w({{ 19148588Sgblack@eecs.umich.edu Rt_uw = dspPrecrSra(Rt_uw, Rs_uw, RD, 19156384Sgblack@eecs.umich.edu SIMD_FMT_W, NOROUND); 19166384Sgblack@eecs.umich.edu }}); 19176384Sgblack@eecs.umich.edu 0x7: precr_sra_r_ph_w({{ 19188588Sgblack@eecs.umich.edu Rt_uw = dspPrecrSra(Rt_uw, Rs_uw, RD, 191911320Ssteve.reinhardt@amd.com SIMD_FMT_W, ROUND); 19206384Sgblack@eecs.umich.edu }}); 19214661Sksewell@umich.edu } 19224661Sksewell@umich.edu } 19234661Sksewell@umich.edu } 19244661Sksewell@umich.edu 19256384Sgblack@eecs.umich.edu //Table 5-7 MIPS32 ABSQ_S.PH Encoding of the op Field 19266384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 19274661Sksewell@umich.edu 0x2: decode OP_HI { 19284661Sksewell@umich.edu 0x0: decode OP_LO { 19294661Sksewell@umich.edu format DspIntOp { 19306384Sgblack@eecs.umich.edu 0x1: absq_s_qb({{ 19318588Sgblack@eecs.umich.edu Rd_sw = dspAbs(Rt_sw, SIMD_FMT_QB, &dspctl); 19326384Sgblack@eecs.umich.edu }}); 19336384Sgblack@eecs.umich.edu 0x2: repl_qb({{ 19348588Sgblack@eecs.umich.edu Rd_uw = RS_RT<7:0> << 24 | 19356384Sgblack@eecs.umich.edu RS_RT<7:0> << 16 | 19366384Sgblack@eecs.umich.edu RS_RT<7:0> << 8 | 19376384Sgblack@eecs.umich.edu RS_RT<7:0>; 19386384Sgblack@eecs.umich.edu }}); 19396384Sgblack@eecs.umich.edu 0x3: replv_qb({{ 19408588Sgblack@eecs.umich.edu Rd_sw = Rt_uw<7:0> << 24 | 19418588Sgblack@eecs.umich.edu Rt_uw<7:0> << 16 | 19428588Sgblack@eecs.umich.edu Rt_uw<7:0> << 8 | 19438588Sgblack@eecs.umich.edu Rt_uw<7:0>; 19446384Sgblack@eecs.umich.edu }}); 19456384Sgblack@eecs.umich.edu 0x4: precequ_ph_qbl({{ 19468588Sgblack@eecs.umich.edu Rd_uw = dspPrece(Rt_uw, SIMD_FMT_QB, UNSIGNED, 19476384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_L); 19486384Sgblack@eecs.umich.edu }}); 19496384Sgblack@eecs.umich.edu 0x5: precequ_ph_qbr({{ 19508588Sgblack@eecs.umich.edu Rd_uw = dspPrece(Rt_uw, SIMD_FMT_QB, UNSIGNED, 19516384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_R); 19526384Sgblack@eecs.umich.edu }}); 19536384Sgblack@eecs.umich.edu 0x6: precequ_ph_qbla({{ 19548588Sgblack@eecs.umich.edu Rd_uw = dspPrece(Rt_uw, SIMD_FMT_QB, UNSIGNED, 19556384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_LA); 19566384Sgblack@eecs.umich.edu }}); 19576384Sgblack@eecs.umich.edu 0x7: precequ_ph_qbra({{ 19588588Sgblack@eecs.umich.edu Rd_uw = dspPrece(Rt_uw, SIMD_FMT_QB, UNSIGNED, 19596384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_RA); 19606384Sgblack@eecs.umich.edu }}); 19614661Sksewell@umich.edu } 19624661Sksewell@umich.edu } 19634661Sksewell@umich.edu 0x1: decode OP_LO { 19644661Sksewell@umich.edu format DspIntOp { 19656384Sgblack@eecs.umich.edu 0x1: absq_s_ph({{ 19668588Sgblack@eecs.umich.edu Rd_sw = dspAbs(Rt_sw, SIMD_FMT_PH, &dspctl); 19676384Sgblack@eecs.umich.edu }}); 19686384Sgblack@eecs.umich.edu 0x2: repl_ph({{ 19698588Sgblack@eecs.umich.edu Rd_uw = (sext<10>(RS_RT))<15:0> << 16 | 19706384Sgblack@eecs.umich.edu (sext<10>(RS_RT))<15:0>; 19716384Sgblack@eecs.umich.edu }}); 19726384Sgblack@eecs.umich.edu 0x3: replv_ph({{ 19738588Sgblack@eecs.umich.edu Rd_uw = Rt_uw<15:0> << 16 | 19748588Sgblack@eecs.umich.edu Rt_uw<15:0>; 19756384Sgblack@eecs.umich.edu }}); 19766384Sgblack@eecs.umich.edu 0x4: preceq_w_phl({{ 19778588Sgblack@eecs.umich.edu Rd_uw = dspPrece(Rt_uw, SIMD_FMT_PH, SIGNED, 19786384Sgblack@eecs.umich.edu SIMD_FMT_W, SIGNED, MODE_L); 19796384Sgblack@eecs.umich.edu }}); 19806384Sgblack@eecs.umich.edu 0x5: preceq_w_phr({{ 19818588Sgblack@eecs.umich.edu Rd_uw = dspPrece(Rt_uw, SIMD_FMT_PH, SIGNED, 19826384Sgblack@eecs.umich.edu SIMD_FMT_W, SIGNED, MODE_R); 19836384Sgblack@eecs.umich.edu }}); 19844661Sksewell@umich.edu } 19854661Sksewell@umich.edu } 19864661Sksewell@umich.edu 0x2: decode OP_LO { 19874661Sksewell@umich.edu format DspIntOp { 19886384Sgblack@eecs.umich.edu 0x1: absq_s_w({{ 19898588Sgblack@eecs.umich.edu Rd_sw = dspAbs(Rt_sw, SIMD_FMT_W, &dspctl); 19906384Sgblack@eecs.umich.edu }}); 19914661Sksewell@umich.edu } 19924661Sksewell@umich.edu } 19934661Sksewell@umich.edu 0x3: decode OP_LO { 19946384Sgblack@eecs.umich.edu 0x3: IntOp::bitrev({{ 19958588Sgblack@eecs.umich.edu Rd_uw = bitrev( Rt_uw<15:0> ); 19966384Sgblack@eecs.umich.edu }}); 19974661Sksewell@umich.edu format DspIntOp { 19986384Sgblack@eecs.umich.edu 0x4: preceu_ph_qbl({{ 19998588Sgblack@eecs.umich.edu Rd_uw = dspPrece(Rt_uw, SIMD_FMT_QB, 20006384Sgblack@eecs.umich.edu UNSIGNED, SIMD_FMT_PH, 20016384Sgblack@eecs.umich.edu UNSIGNED, MODE_L); 20026384Sgblack@eecs.umich.edu }}); 20036384Sgblack@eecs.umich.edu 0x5: preceu_ph_qbr({{ 20048588Sgblack@eecs.umich.edu Rd_uw = dspPrece(Rt_uw, SIMD_FMT_QB, 20056384Sgblack@eecs.umich.edu UNSIGNED, SIMD_FMT_PH, 20066384Sgblack@eecs.umich.edu UNSIGNED, MODE_R ); 20076384Sgblack@eecs.umich.edu }}); 20086384Sgblack@eecs.umich.edu 0x6: preceu_ph_qbla({{ 20098588Sgblack@eecs.umich.edu Rd_uw = dspPrece(Rt_uw, SIMD_FMT_QB, 20106384Sgblack@eecs.umich.edu UNSIGNED, SIMD_FMT_PH, 20116384Sgblack@eecs.umich.edu UNSIGNED, MODE_LA ); 20126384Sgblack@eecs.umich.edu }}); 20136384Sgblack@eecs.umich.edu 0x7: preceu_ph_qbra({{ 20148588Sgblack@eecs.umich.edu Rd_uw = dspPrece(Rt_uw, SIMD_FMT_QB, 20156384Sgblack@eecs.umich.edu UNSIGNED, SIMD_FMT_PH, 20166384Sgblack@eecs.umich.edu UNSIGNED, MODE_RA); 20176384Sgblack@eecs.umich.edu }}); 20184661Sksewell@umich.edu } 20194661Sksewell@umich.edu } 20204661Sksewell@umich.edu } 20214661Sksewell@umich.edu 20226384Sgblack@eecs.umich.edu //Table 5-8 MIPS32 SHLL.QB Encoding of the op Field 20236384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 20244661Sksewell@umich.edu 0x3: decode OP_HI { 20254661Sksewell@umich.edu 0x0: decode OP_LO { 20264661Sksewell@umich.edu format DspIntOp { 20276384Sgblack@eecs.umich.edu 0x0: shll_qb({{ 20288588Sgblack@eecs.umich.edu Rd_sw = dspShll(Rt_sw, RS, SIMD_FMT_QB, 20296384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 20306384Sgblack@eecs.umich.edu }}); 20316384Sgblack@eecs.umich.edu 0x1: shrl_qb({{ 20328588Sgblack@eecs.umich.edu Rd_sw = dspShrl(Rt_sw, RS, SIMD_FMT_QB, 20336384Sgblack@eecs.umich.edu UNSIGNED); 20346384Sgblack@eecs.umich.edu }}); 20356384Sgblack@eecs.umich.edu 0x2: shllv_qb({{ 20368588Sgblack@eecs.umich.edu Rd_sw = dspShll(Rt_sw, Rs_sw, SIMD_FMT_QB, 20376384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 20386384Sgblack@eecs.umich.edu }}); 20396384Sgblack@eecs.umich.edu 0x3: shrlv_qb({{ 20408588Sgblack@eecs.umich.edu Rd_sw = dspShrl(Rt_sw, Rs_sw, SIMD_FMT_QB, 20416384Sgblack@eecs.umich.edu UNSIGNED); 20426384Sgblack@eecs.umich.edu }}); 20436384Sgblack@eecs.umich.edu 0x4: shra_qb({{ 20448588Sgblack@eecs.umich.edu Rd_sw = dspShra(Rt_sw, RS, SIMD_FMT_QB, 20456384Sgblack@eecs.umich.edu NOROUND, SIGNED, &dspctl); 20466384Sgblack@eecs.umich.edu }}); 20476384Sgblack@eecs.umich.edu 0x5: shra_r_qb({{ 20488588Sgblack@eecs.umich.edu Rd_sw = dspShra(Rt_sw, RS, SIMD_FMT_QB, 20496384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 20506384Sgblack@eecs.umich.edu }}); 20516384Sgblack@eecs.umich.edu 0x6: shrav_qb({{ 20528588Sgblack@eecs.umich.edu Rd_sw = dspShra(Rt_sw, Rs_sw, SIMD_FMT_QB, 20536384Sgblack@eecs.umich.edu NOROUND, SIGNED, &dspctl); 20546384Sgblack@eecs.umich.edu }}); 20556384Sgblack@eecs.umich.edu 0x7: shrav_r_qb({{ 20568588Sgblack@eecs.umich.edu Rd_sw = dspShra(Rt_sw, Rs_sw, SIMD_FMT_QB, 20576384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 20586384Sgblack@eecs.umich.edu }}); 20594661Sksewell@umich.edu } 20604661Sksewell@umich.edu } 20614661Sksewell@umich.edu 0x1: decode OP_LO { 20624661Sksewell@umich.edu format DspIntOp { 20636384Sgblack@eecs.umich.edu 0x0: shll_ph({{ 20648588Sgblack@eecs.umich.edu Rd_uw = dspShll(Rt_uw, RS, SIMD_FMT_PH, 20656384Sgblack@eecs.umich.edu NOSATURATE, SIGNED, &dspctl); 20666384Sgblack@eecs.umich.edu }}); 20676384Sgblack@eecs.umich.edu 0x1: shra_ph({{ 20688588Sgblack@eecs.umich.edu Rd_sw = dspShra(Rt_sw, RS, SIMD_FMT_PH, 20696384Sgblack@eecs.umich.edu NOROUND, SIGNED, &dspctl); 20706384Sgblack@eecs.umich.edu }}); 20716384Sgblack@eecs.umich.edu 0x2: shllv_ph({{ 20728588Sgblack@eecs.umich.edu Rd_sw = dspShll(Rt_sw, Rs_sw, SIMD_FMT_PH, 20736384Sgblack@eecs.umich.edu NOSATURATE, SIGNED, &dspctl); 20746384Sgblack@eecs.umich.edu }}); 20756384Sgblack@eecs.umich.edu 0x3: shrav_ph({{ 20768588Sgblack@eecs.umich.edu Rd_sw = dspShra(Rt_sw, Rs_sw, SIMD_FMT_PH, 20776384Sgblack@eecs.umich.edu NOROUND, SIGNED, &dspctl); 20786384Sgblack@eecs.umich.edu }}); 20796384Sgblack@eecs.umich.edu 0x4: shll_s_ph({{ 20808588Sgblack@eecs.umich.edu Rd_sw = dspShll(Rt_sw, RS, SIMD_FMT_PH, 20816384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 20826384Sgblack@eecs.umich.edu }}); 20836384Sgblack@eecs.umich.edu 0x5: shra_r_ph({{ 20848588Sgblack@eecs.umich.edu Rd_sw = dspShra(Rt_sw, RS, SIMD_FMT_PH, 20856384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 20866384Sgblack@eecs.umich.edu }}); 20876384Sgblack@eecs.umich.edu 0x6: shllv_s_ph({{ 20888588Sgblack@eecs.umich.edu Rd_sw = dspShll(Rt_sw, Rs_sw, SIMD_FMT_PH, 20896384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 20906384Sgblack@eecs.umich.edu }}); 20916384Sgblack@eecs.umich.edu 0x7: shrav_r_ph({{ 20928588Sgblack@eecs.umich.edu Rd_sw = dspShra(Rt_sw, Rs_sw, SIMD_FMT_PH, 20936384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 20946384Sgblack@eecs.umich.edu }}); 20954661Sksewell@umich.edu } 20964661Sksewell@umich.edu } 20974661Sksewell@umich.edu 0x2: decode OP_LO { 20984661Sksewell@umich.edu format DspIntOp { 20996384Sgblack@eecs.umich.edu 0x4: shll_s_w({{ 21008588Sgblack@eecs.umich.edu Rd_sw = dspShll(Rt_sw, RS, SIMD_FMT_W, 21016384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 21026384Sgblack@eecs.umich.edu }}); 21036384Sgblack@eecs.umich.edu 0x5: shra_r_w({{ 21048588Sgblack@eecs.umich.edu Rd_sw = dspShra(Rt_sw, RS, SIMD_FMT_W, 21056384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 21066384Sgblack@eecs.umich.edu }}); 21076384Sgblack@eecs.umich.edu 0x6: shllv_s_w({{ 21088588Sgblack@eecs.umich.edu Rd_sw = dspShll(Rt_sw, Rs_sw, SIMD_FMT_W, 21096384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 21106384Sgblack@eecs.umich.edu }}); 21116384Sgblack@eecs.umich.edu 0x7: shrav_r_w({{ 21128588Sgblack@eecs.umich.edu Rd_sw = dspShra(Rt_sw, Rs_sw, SIMD_FMT_W, 21136384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 21146384Sgblack@eecs.umich.edu }}); 21154661Sksewell@umich.edu } 21164661Sksewell@umich.edu } 21174661Sksewell@umich.edu 0x3: decode OP_LO { 21184661Sksewell@umich.edu format DspIntOp { 21196384Sgblack@eecs.umich.edu 0x1: shrl_ph({{ 21208588Sgblack@eecs.umich.edu Rd_sw = dspShrl(Rt_sw, RS, SIMD_FMT_PH, 21216384Sgblack@eecs.umich.edu UNSIGNED); 21226384Sgblack@eecs.umich.edu }}); 21236384Sgblack@eecs.umich.edu 0x3: shrlv_ph({{ 21248588Sgblack@eecs.umich.edu Rd_sw = dspShrl(Rt_sw, Rs_sw, SIMD_FMT_PH, 21256384Sgblack@eecs.umich.edu UNSIGNED); 21266384Sgblack@eecs.umich.edu }}); 21274661Sksewell@umich.edu } 21284661Sksewell@umich.edu } 21294661Sksewell@umich.edu } 21304661Sksewell@umich.edu } 21314661Sksewell@umich.edu 21324661Sksewell@umich.edu 0x3: decode FUNCTION_LO { 21334661Sksewell@umich.edu 21346384Sgblack@eecs.umich.edu //Table 3.12 MIPS32 ADDUH.QB Encoding of the op Field 21356384Sgblack@eecs.umich.edu //(DSP ASE Rev2 Manual) 21364661Sksewell@umich.edu 0x0: decode OP_HI { 21374661Sksewell@umich.edu 0x0: decode OP_LO { 21384661Sksewell@umich.edu format DspIntOp { 21396384Sgblack@eecs.umich.edu 0x0: adduh_qb({{ 21408588Sgblack@eecs.umich.edu Rd_uw = dspAddh(Rs_sw, Rt_sw, SIMD_FMT_QB, 21416384Sgblack@eecs.umich.edu NOROUND, UNSIGNED); 21426384Sgblack@eecs.umich.edu }}); 21436384Sgblack@eecs.umich.edu 0x1: subuh_qb({{ 21448588Sgblack@eecs.umich.edu Rd_uw = dspSubh(Rs_sw, Rt_sw, SIMD_FMT_QB, 21456384Sgblack@eecs.umich.edu NOROUND, UNSIGNED); 21466384Sgblack@eecs.umich.edu }}); 21476384Sgblack@eecs.umich.edu 0x2: adduh_r_qb({{ 21488588Sgblack@eecs.umich.edu Rd_uw = dspAddh(Rs_sw, Rt_sw, SIMD_FMT_QB, 21496384Sgblack@eecs.umich.edu ROUND, UNSIGNED); 21506384Sgblack@eecs.umich.edu }}); 21516384Sgblack@eecs.umich.edu 0x3: subuh_r_qb({{ 21528588Sgblack@eecs.umich.edu Rd_uw = dspSubh(Rs_sw, Rt_sw, SIMD_FMT_QB, 21536384Sgblack@eecs.umich.edu ROUND, UNSIGNED); 21546384Sgblack@eecs.umich.edu }}); 21554661Sksewell@umich.edu } 21564661Sksewell@umich.edu } 21574661Sksewell@umich.edu 0x1: decode OP_LO { 21584661Sksewell@umich.edu format DspIntOp { 21596384Sgblack@eecs.umich.edu 0x0: addqh_ph({{ 21608588Sgblack@eecs.umich.edu Rd_uw = dspAddh(Rs_sw, Rt_sw, SIMD_FMT_PH, 21616384Sgblack@eecs.umich.edu NOROUND, SIGNED); 21626384Sgblack@eecs.umich.edu }}); 21636384Sgblack@eecs.umich.edu 0x1: subqh_ph({{ 21648588Sgblack@eecs.umich.edu Rd_uw = dspSubh(Rs_sw, Rt_sw, SIMD_FMT_PH, 21656384Sgblack@eecs.umich.edu NOROUND, SIGNED); 21666384Sgblack@eecs.umich.edu }}); 21676384Sgblack@eecs.umich.edu 0x2: addqh_r_ph({{ 21688588Sgblack@eecs.umich.edu Rd_uw = dspAddh(Rs_sw, Rt_sw, SIMD_FMT_PH, 21696384Sgblack@eecs.umich.edu ROUND, SIGNED); 21706384Sgblack@eecs.umich.edu }}); 21716384Sgblack@eecs.umich.edu 0x3: subqh_r_ph({{ 21728588Sgblack@eecs.umich.edu Rd_uw = dspSubh(Rs_sw, Rt_sw, SIMD_FMT_PH, 21736384Sgblack@eecs.umich.edu ROUND, SIGNED); 21746384Sgblack@eecs.umich.edu }}); 21756384Sgblack@eecs.umich.edu 0x4: mul_ph({{ 21768588Sgblack@eecs.umich.edu Rd_sw = dspMul(Rs_sw, Rt_sw, SIMD_FMT_PH, 21776384Sgblack@eecs.umich.edu NOSATURATE, &dspctl); 21786384Sgblack@eecs.umich.edu }}, IntMultOp); 21796384Sgblack@eecs.umich.edu 0x6: mul_s_ph({{ 21808588Sgblack@eecs.umich.edu Rd_sw = dspMul(Rs_sw, Rt_sw, SIMD_FMT_PH, 21816384Sgblack@eecs.umich.edu SATURATE, &dspctl); 21826384Sgblack@eecs.umich.edu }}, IntMultOp); 21834661Sksewell@umich.edu } 21844661Sksewell@umich.edu } 21854661Sksewell@umich.edu 0x2: decode OP_LO { 21864661Sksewell@umich.edu format DspIntOp { 21876384Sgblack@eecs.umich.edu 0x0: addqh_w({{ 21888588Sgblack@eecs.umich.edu Rd_uw = dspAddh(Rs_sw, Rt_sw, SIMD_FMT_W, 21896384Sgblack@eecs.umich.edu NOROUND, SIGNED); 21906384Sgblack@eecs.umich.edu }}); 21916384Sgblack@eecs.umich.edu 0x1: subqh_w({{ 21928588Sgblack@eecs.umich.edu Rd_uw = dspSubh(Rs_sw, Rt_sw, SIMD_FMT_W, 21936384Sgblack@eecs.umich.edu NOROUND, SIGNED); 21946384Sgblack@eecs.umich.edu }}); 21956384Sgblack@eecs.umich.edu 0x2: addqh_r_w({{ 21968588Sgblack@eecs.umich.edu Rd_uw = dspAddh(Rs_sw, Rt_sw, SIMD_FMT_W, 21976384Sgblack@eecs.umich.edu ROUND, SIGNED); 21986384Sgblack@eecs.umich.edu }}); 21996384Sgblack@eecs.umich.edu 0x3: subqh_r_w({{ 22008588Sgblack@eecs.umich.edu Rd_uw = dspSubh(Rs_sw, Rt_sw, SIMD_FMT_W, 22016384Sgblack@eecs.umich.edu ROUND, SIGNED); 22026384Sgblack@eecs.umich.edu }}); 22036384Sgblack@eecs.umich.edu 0x6: mulq_s_w({{ 22048588Sgblack@eecs.umich.edu Rd_sw = dspMulq(Rs_sw, Rt_sw, SIMD_FMT_W, 22056384Sgblack@eecs.umich.edu SATURATE, NOROUND, &dspctl); 22066384Sgblack@eecs.umich.edu }}, IntMultOp); 22076384Sgblack@eecs.umich.edu 0x7: mulq_rs_w({{ 22088588Sgblack@eecs.umich.edu Rd_sw = dspMulq(Rs_sw, Rt_sw, SIMD_FMT_W, 22096384Sgblack@eecs.umich.edu SATURATE, ROUND, &dspctl); 22106384Sgblack@eecs.umich.edu }}, IntMultOp); 22114661Sksewell@umich.edu } 22124661Sksewell@umich.edu } 22132061SN/A } 22142101SN/A } 22152061SN/A 22162101SN/A //Table A-10 MIPS32 BSHFL Encoding of sa Field 22172101SN/A 0x4: decode SA { 22182046SN/A format BasicOp { 22196384Sgblack@eecs.umich.edu 0x02: wsbh({{ 22208588Sgblack@eecs.umich.edu Rd_uw = Rt_uw<23:16> << 24 | 22218588Sgblack@eecs.umich.edu Rt_uw<31:24> << 16 | 22228588Sgblack@eecs.umich.edu Rt_uw<7:0> << 8 | 22238588Sgblack@eecs.umich.edu Rt_uw<15:8>; 22242686Sksewell@umich.edu }}); 22258588Sgblack@eecs.umich.edu 0x10: seb({{ Rd_sw = Rt_sb; }}); 22268588Sgblack@eecs.umich.edu 0x18: seh({{ Rd_sw = Rt_sh; }}); 22272046SN/A } 22282101SN/A } 22292043SN/A 22302101SN/A 0x6: decode FUNCTION_LO { 22314661Sksewell@umich.edu 22326384Sgblack@eecs.umich.edu //Table 5-10 MIPS32 DPAQ.W.PH Encoding of the op Field 22336384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 22344661Sksewell@umich.edu 0x0: decode OP_HI { 22354661Sksewell@umich.edu 0x0: decode OP_LO { 22364661Sksewell@umich.edu format DspHiLoOp { 22376384Sgblack@eecs.umich.edu 0x0: dpa_w_ph({{ 22388588Sgblack@eecs.umich.edu dspac = dspDpa(dspac, Rs_sw, Rt_sw, ACDST, 22396384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_L); 22406384Sgblack@eecs.umich.edu }}, IntMultOp); 22416384Sgblack@eecs.umich.edu 0x1: dps_w_ph({{ 22428588Sgblack@eecs.umich.edu dspac = dspDps(dspac, Rs_sw, Rt_sw, ACDST, 22436384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_L); 22446384Sgblack@eecs.umich.edu }}, IntMultOp); 22456384Sgblack@eecs.umich.edu 0x2: mulsa_w_ph({{ 22468588Sgblack@eecs.umich.edu dspac = dspMulsa(dspac, Rs_sw, Rt_sw, 22476384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH ); 22486384Sgblack@eecs.umich.edu }}, IntMultOp); 22496384Sgblack@eecs.umich.edu 0x3: dpau_h_qbl({{ 22508588Sgblack@eecs.umich.edu dspac = dspDpa(dspac, Rs_sw, Rt_sw, ACDST, 22516384Sgblack@eecs.umich.edu SIMD_FMT_QB, UNSIGNED, MODE_L); 22526384Sgblack@eecs.umich.edu }}, IntMultOp); 22536384Sgblack@eecs.umich.edu 0x4: dpaq_s_w_ph({{ 22548588Sgblack@eecs.umich.edu dspac = dspDpaq(dspac, Rs_sw, Rt_sw, 22556384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 22566384Sgblack@eecs.umich.edu SIMD_FMT_W, NOSATURATE, 22576384Sgblack@eecs.umich.edu MODE_L, &dspctl); 22586384Sgblack@eecs.umich.edu }}, IntMultOp); 22596384Sgblack@eecs.umich.edu 0x5: dpsq_s_w_ph({{ 22608588Sgblack@eecs.umich.edu dspac = dspDpsq(dspac, Rs_sw, Rt_sw, 22616384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 22626384Sgblack@eecs.umich.edu SIMD_FMT_W, NOSATURATE, 22636384Sgblack@eecs.umich.edu MODE_L, &dspctl); 22646384Sgblack@eecs.umich.edu }}, IntMultOp); 22656384Sgblack@eecs.umich.edu 0x6: mulsaq_s_w_ph({{ 22668588Sgblack@eecs.umich.edu dspac = dspMulsaq(dspac, Rs_sw, Rt_sw, 22676384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 22686384Sgblack@eecs.umich.edu &dspctl); 22696384Sgblack@eecs.umich.edu }}, IntMultOp); 22706384Sgblack@eecs.umich.edu 0x7: dpau_h_qbr({{ 22718588Sgblack@eecs.umich.edu dspac = dspDpa(dspac, Rs_sw, Rt_sw, ACDST, 22726384Sgblack@eecs.umich.edu SIMD_FMT_QB, UNSIGNED, MODE_R); 22736384Sgblack@eecs.umich.edu }}, IntMultOp); 22744661Sksewell@umich.edu } 22754661Sksewell@umich.edu } 22764661Sksewell@umich.edu 0x1: decode OP_LO { 22774661Sksewell@umich.edu format DspHiLoOp { 22786384Sgblack@eecs.umich.edu 0x0: dpax_w_ph({{ 22798588Sgblack@eecs.umich.edu dspac = dspDpa(dspac, Rs_sw, Rt_sw, ACDST, 22806384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_X); 22816384Sgblack@eecs.umich.edu }}, IntMultOp); 22826384Sgblack@eecs.umich.edu 0x1: dpsx_w_ph({{ 22838588Sgblack@eecs.umich.edu dspac = dspDps(dspac, Rs_sw, Rt_sw, ACDST, 22846384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_X); 22856384Sgblack@eecs.umich.edu }}, IntMultOp); 22866384Sgblack@eecs.umich.edu 0x3: dpsu_h_qbl({{ 22878588Sgblack@eecs.umich.edu dspac = dspDps(dspac, Rs_sw, Rt_sw, ACDST, 22886384Sgblack@eecs.umich.edu SIMD_FMT_QB, UNSIGNED, MODE_L); 22896384Sgblack@eecs.umich.edu }}, IntMultOp); 22906384Sgblack@eecs.umich.edu 0x4: dpaq_sa_l_w({{ 22918588Sgblack@eecs.umich.edu dspac = dspDpaq(dspac, Rs_sw, Rt_sw, 22926384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_W, 22936384Sgblack@eecs.umich.edu SIMD_FMT_L, SATURATE, 22946384Sgblack@eecs.umich.edu MODE_L, &dspctl); 22956384Sgblack@eecs.umich.edu }}, IntMultOp); 22966384Sgblack@eecs.umich.edu 0x5: dpsq_sa_l_w({{ 22978588Sgblack@eecs.umich.edu dspac = dspDpsq(dspac, Rs_sw, Rt_sw, 22986384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_W, 22996384Sgblack@eecs.umich.edu SIMD_FMT_L, SATURATE, 23006384Sgblack@eecs.umich.edu MODE_L, &dspctl); 23016384Sgblack@eecs.umich.edu }}, IntMultOp); 23026384Sgblack@eecs.umich.edu 0x7: dpsu_h_qbr({{ 23038588Sgblack@eecs.umich.edu dspac = dspDps(dspac, Rs_sw, Rt_sw, ACDST, 23046384Sgblack@eecs.umich.edu SIMD_FMT_QB, UNSIGNED, MODE_R); 23056384Sgblack@eecs.umich.edu }}, IntMultOp); 23064661Sksewell@umich.edu } 23074661Sksewell@umich.edu } 23084661Sksewell@umich.edu 0x2: decode OP_LO { 23094661Sksewell@umich.edu format DspHiLoOp { 23106384Sgblack@eecs.umich.edu 0x0: maq_sa_w_phl({{ 23118588Sgblack@eecs.umich.edu dspac = dspMaq(dspac, Rs_uw, Rt_uw, 23126384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23136384Sgblack@eecs.umich.edu MODE_L, SATURATE, &dspctl); 23146384Sgblack@eecs.umich.edu }}, IntMultOp); 23156384Sgblack@eecs.umich.edu 0x2: maq_sa_w_phr({{ 23168588Sgblack@eecs.umich.edu dspac = dspMaq(dspac, Rs_uw, Rt_uw, 23176384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23186384Sgblack@eecs.umich.edu MODE_R, SATURATE, &dspctl); 23196384Sgblack@eecs.umich.edu }}, IntMultOp); 23206384Sgblack@eecs.umich.edu 0x4: maq_s_w_phl({{ 23218588Sgblack@eecs.umich.edu dspac = dspMaq(dspac, Rs_uw, Rt_uw, 23226384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23236384Sgblack@eecs.umich.edu MODE_L, NOSATURATE, &dspctl); 23246384Sgblack@eecs.umich.edu }}, IntMultOp); 23256384Sgblack@eecs.umich.edu 0x6: maq_s_w_phr({{ 23268588Sgblack@eecs.umich.edu dspac = dspMaq(dspac, Rs_uw, Rt_uw, 23276384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23286384Sgblack@eecs.umich.edu MODE_R, NOSATURATE, &dspctl); 23296384Sgblack@eecs.umich.edu }}, IntMultOp); 23304661Sksewell@umich.edu } 23314661Sksewell@umich.edu } 23324661Sksewell@umich.edu 0x3: decode OP_LO { 23334661Sksewell@umich.edu format DspHiLoOp { 23346384Sgblack@eecs.umich.edu 0x0: dpaqx_s_w_ph({{ 23358588Sgblack@eecs.umich.edu dspac = dspDpaq(dspac, Rs_sw, Rt_sw, 23366384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23376384Sgblack@eecs.umich.edu SIMD_FMT_W, NOSATURATE, 23386384Sgblack@eecs.umich.edu MODE_X, &dspctl); 23396384Sgblack@eecs.umich.edu }}, IntMultOp); 23406384Sgblack@eecs.umich.edu 0x1: dpsqx_s_w_ph({{ 23418588Sgblack@eecs.umich.edu dspac = dspDpsq(dspac, Rs_sw, Rt_sw, 23426384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23436384Sgblack@eecs.umich.edu SIMD_FMT_W, NOSATURATE, 23446384Sgblack@eecs.umich.edu MODE_X, &dspctl); 23456384Sgblack@eecs.umich.edu }}, IntMultOp); 23466384Sgblack@eecs.umich.edu 0x2: dpaqx_sa_w_ph({{ 23478588Sgblack@eecs.umich.edu dspac = dspDpaq(dspac, Rs_sw, Rt_sw, 23486384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23496384Sgblack@eecs.umich.edu SIMD_FMT_W, SATURATE, 23506384Sgblack@eecs.umich.edu MODE_X, &dspctl); 23516384Sgblack@eecs.umich.edu }}, IntMultOp); 23526384Sgblack@eecs.umich.edu 0x3: dpsqx_sa_w_ph({{ 23538588Sgblack@eecs.umich.edu dspac = dspDpsq(dspac, Rs_sw, Rt_sw, 23546384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23556384Sgblack@eecs.umich.edu SIMD_FMT_W, SATURATE, 23566384Sgblack@eecs.umich.edu MODE_X, &dspctl); 23576384Sgblack@eecs.umich.edu }}, IntMultOp); 23584661Sksewell@umich.edu } 23594661Sksewell@umich.edu } 23604661Sksewell@umich.edu } 23614661Sksewell@umich.edu 23624661Sksewell@umich.edu //Table 3.3 MIPS32 APPEND Encoding of the op Field 23634661Sksewell@umich.edu 0x1: decode OP_HI { 23644661Sksewell@umich.edu 0x0: decode OP_LO { 23654661Sksewell@umich.edu format IntOp { 23666384Sgblack@eecs.umich.edu 0x0: append({{ 23678588Sgblack@eecs.umich.edu Rt_uw = (Rt_uw << RD) | bits(Rs_uw, RD - 1, 0); 23686384Sgblack@eecs.umich.edu }}); 23696384Sgblack@eecs.umich.edu 0x1: prepend({{ 23708588Sgblack@eecs.umich.edu Rt_uw = (Rt_uw >> RD) | 23718588Sgblack@eecs.umich.edu (bits(Rs_uw, RD - 1, 0) << (32 - RD)); 23726384Sgblack@eecs.umich.edu }}); 23734661Sksewell@umich.edu } 23744661Sksewell@umich.edu } 23754661Sksewell@umich.edu 0x2: decode OP_LO { 23764661Sksewell@umich.edu format IntOp { 23776384Sgblack@eecs.umich.edu 0x0: balign({{ 23788588Sgblack@eecs.umich.edu Rt_uw = (Rt_uw << (8 * BP)) | 23798588Sgblack@eecs.umich.edu (Rs_uw >> (8 * (4 - BP))); 23806384Sgblack@eecs.umich.edu }}); 23814661Sksewell@umich.edu } 23824661Sksewell@umich.edu } 23834661Sksewell@umich.edu } 23844661Sksewell@umich.edu 23852101SN/A } 23864661Sksewell@umich.edu 0x7: decode FUNCTION_LO { 23874661Sksewell@umich.edu 23886384Sgblack@eecs.umich.edu //Table 5-11 MIPS32 EXTR.W Encoding of the op Field 23896384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 23904661Sksewell@umich.edu 0x0: decode OP_HI { 23914661Sksewell@umich.edu 0x0: decode OP_LO { 23924661Sksewell@umich.edu format DspHiLoOp { 23936384Sgblack@eecs.umich.edu 0x0: extr_w({{ 23948588Sgblack@eecs.umich.edu Rt_uw = dspExtr(dspac, SIMD_FMT_W, RS, 23956384Sgblack@eecs.umich.edu NOROUND, NOSATURATE, &dspctl); 23966384Sgblack@eecs.umich.edu }}); 23976384Sgblack@eecs.umich.edu 0x1: extrv_w({{ 23988588Sgblack@eecs.umich.edu Rt_uw = dspExtr(dspac, SIMD_FMT_W, Rs_uw, 23996384Sgblack@eecs.umich.edu NOROUND, NOSATURATE, &dspctl); 24006384Sgblack@eecs.umich.edu }}); 24016384Sgblack@eecs.umich.edu 0x2: extp({{ 24028588Sgblack@eecs.umich.edu Rt_uw = dspExtp(dspac, RS, &dspctl); 24036384Sgblack@eecs.umich.edu }}); 24046384Sgblack@eecs.umich.edu 0x3: extpv({{ 24058588Sgblack@eecs.umich.edu Rt_uw = dspExtp(dspac, Rs_uw, &dspctl); 24066384Sgblack@eecs.umich.edu }}); 24076384Sgblack@eecs.umich.edu 0x4: extr_r_w({{ 24088588Sgblack@eecs.umich.edu Rt_uw = dspExtr(dspac, SIMD_FMT_W, RS, 24096384Sgblack@eecs.umich.edu ROUND, NOSATURATE, &dspctl); 24106384Sgblack@eecs.umich.edu }}); 24116384Sgblack@eecs.umich.edu 0x5: extrv_r_w({{ 24128588Sgblack@eecs.umich.edu Rt_uw = dspExtr(dspac, SIMD_FMT_W, Rs_uw, 24136384Sgblack@eecs.umich.edu ROUND, NOSATURATE, &dspctl); 24146384Sgblack@eecs.umich.edu }}); 24156384Sgblack@eecs.umich.edu 0x6: extr_rs_w({{ 24168588Sgblack@eecs.umich.edu Rt_uw = dspExtr(dspac, SIMD_FMT_W, RS, 24176384Sgblack@eecs.umich.edu ROUND, SATURATE, &dspctl); 24186384Sgblack@eecs.umich.edu }}); 24196384Sgblack@eecs.umich.edu 0x7: extrv_rs_w({{ 24208588Sgblack@eecs.umich.edu Rt_uw = dspExtr(dspac, SIMD_FMT_W, Rs_uw, 24216384Sgblack@eecs.umich.edu ROUND, SATURATE, &dspctl); 24226384Sgblack@eecs.umich.edu }}); 24234661Sksewell@umich.edu } 24244661Sksewell@umich.edu } 24254661Sksewell@umich.edu 0x1: decode OP_LO { 24264661Sksewell@umich.edu format DspHiLoOp { 24276384Sgblack@eecs.umich.edu 0x2: extpdp({{ 24288588Sgblack@eecs.umich.edu Rt_uw = dspExtpd(dspac, RS, &dspctl); 24296384Sgblack@eecs.umich.edu }}); 24306384Sgblack@eecs.umich.edu 0x3: extpdpv({{ 24318588Sgblack@eecs.umich.edu Rt_uw = dspExtpd(dspac, Rs_uw, &dspctl); 24326384Sgblack@eecs.umich.edu }}); 24336384Sgblack@eecs.umich.edu 0x6: extr_s_h({{ 24348588Sgblack@eecs.umich.edu Rt_uw = dspExtr(dspac, SIMD_FMT_PH, RS, 24356384Sgblack@eecs.umich.edu NOROUND, SATURATE, &dspctl); 24366384Sgblack@eecs.umich.edu }}); 24376384Sgblack@eecs.umich.edu 0x7: extrv_s_h({{ 24388588Sgblack@eecs.umich.edu Rt_uw = dspExtr(dspac, SIMD_FMT_PH, Rs_uw, 24396384Sgblack@eecs.umich.edu NOROUND, SATURATE, &dspctl); 24406384Sgblack@eecs.umich.edu }}); 24414661Sksewell@umich.edu } 24424661Sksewell@umich.edu } 24434661Sksewell@umich.edu 0x2: decode OP_LO { 24444661Sksewell@umich.edu format DspIntOp { 24456384Sgblack@eecs.umich.edu 0x2: rddsp({{ 24468588Sgblack@eecs.umich.edu Rd_uw = readDSPControl(&dspctl, RDDSPMASK); 24476384Sgblack@eecs.umich.edu }}); 24486384Sgblack@eecs.umich.edu 0x3: wrdsp({{ 24498588Sgblack@eecs.umich.edu writeDSPControl(&dspctl, Rs_uw, WRDSPMASK); 24506384Sgblack@eecs.umich.edu }}); 24514661Sksewell@umich.edu } 24524661Sksewell@umich.edu } 24534661Sksewell@umich.edu 0x3: decode OP_LO { 24544661Sksewell@umich.edu format DspHiLoOp { 24556384Sgblack@eecs.umich.edu 0x2: shilo({{ 245611294Sandreas.hansson@arm.com if ((int64_t)sext<6>(HILOSA) < 0) { 24576384Sgblack@eecs.umich.edu dspac = (uint64_t)dspac << 24586384Sgblack@eecs.umich.edu -sext<6>(HILOSA); 24596384Sgblack@eecs.umich.edu } else { 24606384Sgblack@eecs.umich.edu dspac = (uint64_t)dspac >> 24616384Sgblack@eecs.umich.edu sext<6>(HILOSA); 24626384Sgblack@eecs.umich.edu } 24636384Sgblack@eecs.umich.edu }}); 24646384Sgblack@eecs.umich.edu 0x3: shilov({{ 246511294Sandreas.hansson@arm.com if ((int64_t)sext<6>(Rs_sw<5:0>) < 0) { 24666384Sgblack@eecs.umich.edu dspac = (uint64_t)dspac << 24678588Sgblack@eecs.umich.edu -sext<6>(Rs_sw<5:0>); 24686384Sgblack@eecs.umich.edu } else { 24696384Sgblack@eecs.umich.edu dspac = (uint64_t)dspac >> 24708588Sgblack@eecs.umich.edu sext<6>(Rs_sw<5:0>); 24716384Sgblack@eecs.umich.edu } 24726384Sgblack@eecs.umich.edu }}); 24736384Sgblack@eecs.umich.edu 0x7: mthlip({{ 24746384Sgblack@eecs.umich.edu dspac = dspac << 32; 24758588Sgblack@eecs.umich.edu dspac |= Rs_uw; 24766384Sgblack@eecs.umich.edu dspctl = insertBits(dspctl, 5, 0, 24776384Sgblack@eecs.umich.edu dspctl<5:0> + 32); 24786384Sgblack@eecs.umich.edu }}); 24794661Sksewell@umich.edu } 24804661Sksewell@umich.edu } 24814661Sksewell@umich.edu } 24828564Sgblack@eecs.umich.edu 0x3: decode OP default FailUnimpl::rdhwr() { 24838901Sandreas.hansson@arm.com 0x0: decode FullSystemInt { 24848564Sgblack@eecs.umich.edu 0: decode RD { 24858564Sgblack@eecs.umich.edu 29: BasicOp::rdhwr_se({{ Rt = TpValue; }}); 24868564Sgblack@eecs.umich.edu } 24876810Sgblack@eecs.umich.edu } 24885222Sksewell@umich.edu } 24894661Sksewell@umich.edu } 24902043SN/A } 24912084SN/A } 24922024SN/A 24932686Sksewell@umich.edu 0x4: decode OPCODE_LO { 24942124SN/A format LoadMemory { 24958588Sgblack@eecs.umich.edu 0x0: lb({{ Rt_sw = Mem_sb; }}); 24968588Sgblack@eecs.umich.edu 0x1: lh({{ Rt_sw = Mem_sh; }}); 24978588Sgblack@eecs.umich.edu 0x3: lw({{ Rt_sw = Mem_sw; }}); 24988588Sgblack@eecs.umich.edu 0x4: lbu({{ Rt_uw = Mem_ub;}}); 24998588Sgblack@eecs.umich.edu 0x5: lhu({{ Rt_uw = Mem_uh; }}); 25002686Sksewell@umich.edu } 25012495SN/A 25022686Sksewell@umich.edu format LoadUnalignedMemory { 25036384Sgblack@eecs.umich.edu 0x2: lwl({{ 25046384Sgblack@eecs.umich.edu uint32_t mem_shift = 24 - (8 * byte_offset); 25058588Sgblack@eecs.umich.edu Rt_uw = mem_word << mem_shift | (Rt_uw & mask(mem_shift)); 25066384Sgblack@eecs.umich.edu }}); 25076384Sgblack@eecs.umich.edu 0x6: lwr({{ 25086384Sgblack@eecs.umich.edu uint32_t mem_shift = 8 * byte_offset; 25098588Sgblack@eecs.umich.edu Rt_uw = (Rt_uw & (mask(mem_shift) << (32 - mem_shift))) | 25106384Sgblack@eecs.umich.edu (mem_word >> mem_shift); 25116384Sgblack@eecs.umich.edu }}); 25126384Sgblack@eecs.umich.edu } 25132084SN/A } 25142024SN/A 25152686Sksewell@umich.edu 0x5: decode OPCODE_LO { 25162124SN/A format StoreMemory { 25178588Sgblack@eecs.umich.edu 0x0: sb({{ Mem_ub = Rt<7:0>; }}); 25188588Sgblack@eecs.umich.edu 0x1: sh({{ Mem_uh = Rt<15:0>; }}); 25198588Sgblack@eecs.umich.edu 0x3: sw({{ Mem_uw = Rt<31:0>; }}); 25202084SN/A } 25212024SN/A 25222686Sksewell@umich.edu format StoreUnalignedMemory { 25236384Sgblack@eecs.umich.edu 0x2: swl({{ 25246384Sgblack@eecs.umich.edu uint32_t reg_shift = 24 - (8 * byte_offset); 25256384Sgblack@eecs.umich.edu uint32_t mem_shift = 32 - reg_shift; 25266384Sgblack@eecs.umich.edu mem_word = (mem_word & (mask(reg_shift) << mem_shift)) | 25278588Sgblack@eecs.umich.edu (Rt_uw >> reg_shift); 25286384Sgblack@eecs.umich.edu }}); 25296384Sgblack@eecs.umich.edu 0x6: swr({{ 25306384Sgblack@eecs.umich.edu uint32_t reg_shift = 8 * byte_offset; 25318588Sgblack@eecs.umich.edu mem_word = Rt_uw << reg_shift | 25326384Sgblack@eecs.umich.edu (mem_word & (mask(reg_shift))); 25336384Sgblack@eecs.umich.edu }}); 25342084SN/A } 25355222Sksewell@umich.edu format CP0Control { 25365222Sksewell@umich.edu 0x7: cache({{ 25378588Sgblack@eecs.umich.edu //Addr CacheEA = Rs_uw + OFFSET; 25386384Sgblack@eecs.umich.edu //fault = xc->CacheOp((uint8_t)CACHE_OP,(Addr) CacheEA); 25396384Sgblack@eecs.umich.edu }}); 25405222Sksewell@umich.edu } 25412084SN/A } 25422024SN/A 25432686Sksewell@umich.edu 0x6: decode OPCODE_LO { 25442686Sksewell@umich.edu format LoadMemory { 25458588Sgblack@eecs.umich.edu 0x0: ll({{ Rt_uw = Mem_uw; }}, mem_flags=LLSC); 25468588Sgblack@eecs.umich.edu 0x1: lwc1({{ Ft_uw = Mem_uw; }}); 25478588Sgblack@eecs.umich.edu 0x5: ldc1({{ Ft_ud = Mem_ud; }}); 25482084SN/A } 25495222Sksewell@umich.edu 0x2: CP2Unimpl::lwc2(); 25505222Sksewell@umich.edu 0x6: CP2Unimpl::ldc2(); 25512686Sksewell@umich.edu 0x3: Prefetch::pref(); 25522084SN/A } 25532024SN/A 25542239SN/A 25552686Sksewell@umich.edu 0x7: decode OPCODE_LO { 25568588Sgblack@eecs.umich.edu 0x0: StoreCond::sc({{ Mem_uw = Rt_uw; }}, 25572686Sksewell@umich.edu {{ uint64_t tmp = write_result; 25588588Sgblack@eecs.umich.edu Rt_uw = (tmp == 0 || tmp == 1) ? tmp : Rt_uw; 25596384Sgblack@eecs.umich.edu }}, mem_flags=LLSC, 25606384Sgblack@eecs.umich.edu inst_flags = IsStoreConditional); 25612686Sksewell@umich.edu format StoreMemory { 25628588Sgblack@eecs.umich.edu 0x1: swc1({{ Mem_uw = Ft_uw; }}); 25638588Sgblack@eecs.umich.edu 0x5: sdc1({{ Mem_ud = Ft_ud; }}); 25642084SN/A } 25655222Sksewell@umich.edu 0x2: CP2Unimpl::swc2(); 25665222Sksewell@umich.edu 0x6: CP2Unimpl::sdc2(); 25672027SN/A } 25682024SN/A} 25692022SN/A 25702027SN/A 2571