faults.hh revision 8574:16a168a366d8 
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Gabe Black
30 *          Korey Sewell
31 *          Jaidev Patwardhan
32 */
33
34#ifndef __MIPS_FAULTS_HH__
35#define __MIPS_FAULTS_HH__
36
37#include "sim/faults.hh"
38
39namespace MipsISA
40{
41
42typedef const Addr FaultVect;
43
44class MipsFaultBase : public FaultBase
45{
46  protected:
47    virtual bool skipFaultingInstruction() {return false;}
48    virtual bool setRestartAddress() {return true;}
49  public:
50    struct FaultVals
51    {
52        const FaultName name;
53        const FaultVect vect;
54    };
55
56    Addr badVAddr;
57    Addr entryHiAsid;
58    Addr entryHiVPN2;
59    Addr entryHiVPN2X;
60    Addr contextBadVPN2;
61#if FULL_SYSTEM
62    void invoke(ThreadContext * tc,
63            StaticInst::StaticInstPtr inst = StaticInst::nullStaticInstPtr)
64    {}
65    void setHandlerPC(Addr, ThreadContext *);
66#endif
67    void setExceptionState(ThreadContext *, uint8_t);
68};
69
70template <typename T>
71class MipsFault : public MipsFaultBase
72{
73  protected:
74    static FaultVals vals;
75  public:
76    FaultName name() const { return vals.name; }
77    FaultVect vect() const { return vals.vect; }
78};
79
80class MachineCheckFault : public MipsFault<MachineCheckFault>
81{
82  public:
83    bool isMachineCheckFault() {return true;}
84};
85
86static inline Fault genMachineCheckFault()
87{
88    return new MachineCheckFault;
89}
90
91class NonMaskableInterrupt : public MipsFault<NonMaskableInterrupt>
92{
93  public:
94    bool isNonMaskableInterrupt() {return true;}
95};
96
97class AddressErrorFault : public MipsFault<AddressErrorFault>
98{
99  protected:
100    Addr vaddr;
101    bool store;
102  public:
103    AddressErrorFault(Addr _vaddr, bool _store) : vaddr(_vaddr), store(_store)
104    {}
105#if FULL_SYSTEM
106    void invoke(ThreadContext * tc,
107            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
108#endif
109
110};
111
112class ResetFault : public MipsFault<ResetFault>
113{
114  public:
115    void invoke(ThreadContext * tc,
116            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
117
118};
119
120class SystemCallFault : public MipsFault<SystemCallFault>
121{
122  public:
123#if FULL_SYSTEM
124    void invoke(ThreadContext * tc,
125            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
126#endif
127};
128
129class SoftResetFault : public MipsFault<SoftResetFault>
130{
131  public:
132    void invoke(ThreadContext * tc,
133            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
134};
135
136class CoprocessorUnusableFault : public MipsFault<CoprocessorUnusableFault>
137{
138  protected:
139    int coProcID;
140  public:
141    CoprocessorUnusableFault(int _procid) : coProcID(_procid)
142    {}
143
144    void invoke(ThreadContext * tc,
145            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
146};
147
148class ReservedInstructionFault : public MipsFault<ReservedInstructionFault>
149{
150  public:
151    void invoke(ThreadContext * tc,
152            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
153};
154
155class ThreadFault : public MipsFault<ThreadFault>
156{
157  public:
158    void invoke(ThreadContext * tc,
159            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
160};
161
162class IntegerOverflowFault : public MipsFault<IntegerOverflowFault>
163{
164  protected:
165    bool skipFaultingInstruction() {return true;}
166  public:
167#if FULL_SYSTEM
168    void invoke(ThreadContext * tc,
169            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
170#endif
171};
172
173class InterruptFault : public MipsFault<InterruptFault>
174{
175  protected:
176    bool setRestartAddress() {return false;}
177  public:
178#if FULL_SYSTEM
179    void invoke(ThreadContext * tc,
180            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
181#endif
182};
183
184class TrapFault : public MipsFault<TrapFault>
185{
186  public:
187#if FULL_SYSTEM
188    void invoke(ThreadContext * tc,
189            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
190#endif
191};
192
193class BreakpointFault : public MipsFault<BreakpointFault>
194{
195  public:
196#if FULL_SYSTEM
197    void invoke(ThreadContext * tc,
198            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
199#endif
200};
201
202class TlbRefillFault : public MipsFault<TlbRefillFault>
203{
204  protected:
205    bool store;
206  public:
207    TlbRefillFault(Addr asid, Addr vaddr, Addr vpn, bool _store) :
208        store(_store)
209    {
210        entryHiAsid = asid;
211        entryHiVPN2 = vpn >> 2;
212        entryHiVPN2X = vpn & 0x3;
213        badVAddr = vaddr;
214        contextBadVPN2 = vpn >> 2;
215    }
216#if FULL_SYSTEM
217    void invoke(ThreadContext * tc,
218            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
219#endif
220};
221
222class TlbInvalidFault : public MipsFault<TlbInvalidFault>
223{
224  protected:
225    bool store;
226  public:
227    TlbInvalidFault(Addr asid, Addr vaddr, Addr vpn, bool _store) :
228        store(_store)
229    {
230        entryHiAsid = asid;
231        entryHiVPN2 = vpn >> 2;
232        entryHiVPN2X = vpn & 0x3;
233        badVAddr = vaddr;
234        contextBadVPN2 = vpn >> 2;
235    }
236#if FULL_SYSTEM
237    void invoke(ThreadContext * tc,
238            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
239#endif
240};
241
242class TLBModifiedFault : public MipsFault<TLBModifiedFault>
243{
244  public:
245    TLBModifiedFault(Addr asid, Addr vaddr, Addr vpn)
246    {
247        entryHiAsid = asid;
248        entryHiVPN2 = vpn >> 2;
249        entryHiVPN2X = vpn & 0x3;
250        badVAddr = vaddr;
251        contextBadVPN2 = vpn >> 2;
252    }
253#if FULL_SYSTEM
254    void invoke(ThreadContext * tc,
255            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
256#endif
257};
258
259class DspStateDisabledFault : public MipsFault<DspStateDisabledFault>
260{
261  public:
262    void invoke(ThreadContext * tc,
263            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
264};
265
266} // namespace MipsISA
267
268#endif // __MIPS_FAULTS_HH__
269