main.cc revision 11692
1298SN/A/* 28142SAli.Saidi@ARM.com * Copyright (c) 2012-2015 Advanced Micro Devices, Inc. 38142SAli.Saidi@ARM.com * All rights reserved. 48142SAli.Saidi@ARM.com * 58142SAli.Saidi@ARM.com * For use for simulation and test purposes only 68142SAli.Saidi@ARM.com * 78142SAli.Saidi@ARM.com * Redistribution and use in source and binary forms, with or without 88142SAli.Saidi@ARM.com * modification, are permitted provided that the following conditions are met: 98142SAli.Saidi@ARM.com * 108142SAli.Saidi@ARM.com * 1. Redistributions of source code must retain the above copyright notice, 118142SAli.Saidi@ARM.com * this list of conditions and the following disclaimer. 128142SAli.Saidi@ARM.com * 138142SAli.Saidi@ARM.com * 2. Redistributions in binary form must reproduce the above copyright notice, 148580Ssteve.reinhardt@amd.com * this list of conditions and the following disclaimer in the documentation 152188SN/A * and/or other materials provided with the distribution. 16298SN/A * 17298SN/A * 3. Neither the name of the copyright holder nor the names of its contributors 18298SN/A * may be used to endorse or promote products derived from this software 19298SN/A * without specific prior written permission. 20298SN/A * 21298SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22298SN/A * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23298SN/A * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24298SN/A * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 25298SN/A * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26298SN/A * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27298SN/A * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28298SN/A * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29298SN/A * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30298SN/A * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31298SN/A * POSSIBILITY OF SUCH DAMAGE. 32298SN/A * 33298SN/A * Author: Steve Reinhardt 34298SN/A */ 35298SN/A 36298SN/A#include "arch/hsail/insts/decl.hh" 37298SN/A#include "debug/GPUExec.hh" 38298SN/A#include "gpu-compute/dispatcher.hh" 39298SN/A#include "gpu-compute/simple_pool_manager.hh" 402665Ssaidi@eecs.umich.edu 412665Ssaidi@eecs.umich.edunamespace HsailISA 42298SN/A{ 43298SN/A template<> const char *B1::label = "b1"; 44954SN/A template<> const char *B8::label = "b8"; 45956SN/A template<> const char *B16::label = "b16"; 46956SN/A template<> const char *B32::label = "b32"; 478229Snate@binkert.org template<> const char *B64::label = "b64"; 484078Sbinkertn@umich.edu 49299SN/A template<> const char *S8::label = "s8"; 50299SN/A template<> const char *S16::label = "s16"; 518777Sgblack@eecs.umich.edu template<> const char *S32::label = "s32"; 522170SN/A template<> const char *S64::label = "s64"; 535882Snate@binkert.org 546658Snate@binkert.org template<> const char *U8::label = "u8"; 556658Snate@binkert.org template<> const char *U16::label = "u16"; 561717SN/A template<> const char *U32::label = "u32"; 578229Snate@binkert.org template<> const char *U64::label = "u64"; 582680Sktlim@umich.edu 598232Snate@binkert.org template<> const char *F32::label = "f32"; 608232Snate@binkert.org template<> const char *F64::label = "f64"; 618232Snate@binkert.org 625529Snate@binkert.org const char* 638784Sgblack@eecs.umich.edu cmpOpToString(Brig::BrigCompareOperation cmpOp) 643565Sgblack@eecs.umich.edu { 65298SN/A using namespace Brig; 665606Snate@binkert.org 67298SN/A switch (cmpOp) { 68695SN/A case BRIG_COMPARE_EQ: 69695SN/A return "eq"; 70954SN/A case BRIG_COMPARE_NE: 712080SN/A return "ne"; 72298SN/A case BRIG_COMPARE_LT: 73299SN/A return "lt"; 741052SN/A case BRIG_COMPARE_LE: 75729SN/A return "le"; 762107SN/A case BRIG_COMPARE_GT: 77298SN/A return "gt"; 785504Snate@binkert.org case BRIG_COMPARE_GE: 795504Snate@binkert.org return "ge"; 808784Sgblack@eecs.umich.edu case BRIG_COMPARE_EQU: 818784Sgblack@eecs.umich.edu return "equ"; 828784Sgblack@eecs.umich.edu case BRIG_COMPARE_NEU: 838784Sgblack@eecs.umich.edu return "neu"; 848784Sgblack@eecs.umich.edu case BRIG_COMPARE_LTU: 855780Ssteve.reinhardt@amd.com return "ltu"; 865504Snate@binkert.org case BRIG_COMPARE_LEU: 875504Snate@binkert.org return "leu"; 88298SN/A case BRIG_COMPARE_GTU: 898784Sgblack@eecs.umich.edu return "gtu"; 908784Sgblack@eecs.umich.edu case BRIG_COMPARE_GEU: 918784Sgblack@eecs.umich.edu return "geu"; 928784Sgblack@eecs.umich.edu case BRIG_COMPARE_NUM: 938784Sgblack@eecs.umich.edu return "num"; 948784Sgblack@eecs.umich.edu case BRIG_COMPARE_NAN: 955504Snate@binkert.org return "nan"; 965504Snate@binkert.org case BRIG_COMPARE_SEQ: 975504Snate@binkert.org return "seq"; 985504Snate@binkert.org case BRIG_COMPARE_SNE: 995504Snate@binkert.org return "sne"; 1008784Sgblack@eecs.umich.edu case BRIG_COMPARE_SLT: 1018784Sgblack@eecs.umich.edu return "slt"; 1028784Sgblack@eecs.umich.edu case BRIG_COMPARE_SLE: 1035504Snate@binkert.org return "sle"; 1048784Sgblack@eecs.umich.edu case BRIG_COMPARE_SGT: 1055504Snate@binkert.org return "sgt"; 1068784Sgblack@eecs.umich.edu case BRIG_COMPARE_SGE: 1078784Sgblack@eecs.umich.edu return "sge"; 1088784Sgblack@eecs.umich.edu case BRIG_COMPARE_SGEU: 1098784Sgblack@eecs.umich.edu return "sgeu"; 1108784Sgblack@eecs.umich.edu case BRIG_COMPARE_SEQU: 1118784Sgblack@eecs.umich.edu return "sequ"; 1125504Snate@binkert.org case BRIG_COMPARE_SNEU: 1135504Snate@binkert.org return "sneu"; 1145504Snate@binkert.org case BRIG_COMPARE_SLTU: 1158142SAli.Saidi@ARM.com return "sltu"; 1168142SAli.Saidi@ARM.com case BRIG_COMPARE_SLEU: 1178784Sgblack@eecs.umich.edu return "sleu"; 1188784Sgblack@eecs.umich.edu case BRIG_COMPARE_SNUM: 1198142SAli.Saidi@ARM.com return "snum"; 1208784Sgblack@eecs.umich.edu case BRIG_COMPARE_SNAN: 1218784Sgblack@eecs.umich.edu return "snan"; 1228142SAli.Saidi@ARM.com case BRIG_COMPARE_SGTU: 1238784Sgblack@eecs.umich.edu return "sgtu"; 1248142SAli.Saidi@ARM.com default: 1258784Sgblack@eecs.umich.edu return "unknown"; 1268142SAli.Saidi@ARM.com } 1278784Sgblack@eecs.umich.edu } 1288142SAli.Saidi@ARM.com 1298784Sgblack@eecs.umich.edu void 1308784Sgblack@eecs.umich.edu Ret::execute(GPUDynInstPtr gpuDynInst) 1318142SAli.Saidi@ARM.com { 1328784Sgblack@eecs.umich.edu Wavefront *w = gpuDynInst->wavefront(); 1338784Sgblack@eecs.umich.edu 1348784Sgblack@eecs.umich.edu const VectorMask &mask = w->getPred(); 1358784Sgblack@eecs.umich.edu 1368784Sgblack@eecs.umich.edu // mask off completed work-items 1378784Sgblack@eecs.umich.edu for (int lane = 0; lane < w->computeUnit->wfSize(); ++lane) { 1388142SAli.Saidi@ARM.com if (mask[lane]) { 1398142SAli.Saidi@ARM.com w->initMask[lane] = 0; 1408142SAli.Saidi@ARM.com } 1415504Snate@binkert.org 1425504Snate@binkert.org } 1438784Sgblack@eecs.umich.edu 1448784Sgblack@eecs.umich.edu // delete extra instructions fetched for completed work-items 1457819Ssteve.reinhardt@amd.com w->instructionBuffer.erase(w->instructionBuffer.begin() + 1, 1468784Sgblack@eecs.umich.edu w->instructionBuffer.end()); 1478784Sgblack@eecs.umich.edu if (w->pendingFetch) { 1485504Snate@binkert.org w->dropFetch = true; 1498784Sgblack@eecs.umich.edu } 1505504Snate@binkert.org 1518784Sgblack@eecs.umich.edu // if all work-items have completed, then wave-front is done 1525504Snate@binkert.org if (w->initMask.none()) { 1538784Sgblack@eecs.umich.edu w->status = Wavefront::S_STOPPED; 1545504Snate@binkert.org 1558784Sgblack@eecs.umich.edu int32_t refCount = w->computeUnit->getLds(). 1568784Sgblack@eecs.umich.edu decreaseRefCounter(w->dispatchId, w->wgId); 1575504Snate@binkert.org 1588784Sgblack@eecs.umich.edu DPRINTF(GPUExec, "CU%d: decrease ref ctr WG[%d] to [%d]\n", 1598784Sgblack@eecs.umich.edu w->computeUnit->cu_id, w->wgId, refCount); 1608784Sgblack@eecs.umich.edu 1618784Sgblack@eecs.umich.edu // free the vector registers of the completed wavefront 1628784Sgblack@eecs.umich.edu w->computeUnit->vectorRegsReserved[w->simdId] -= 1638784Sgblack@eecs.umich.edu w->reservedVectorRegs; 1645504Snate@binkert.org 1655504Snate@binkert.org assert(w->computeUnit->vectorRegsReserved[w->simdId] >= 0); 1665504Snate@binkert.org 1675504Snate@binkert.org uint32_t endIndex = (w->startVgprIndex + 1685504Snate@binkert.org w->reservedVectorRegs - 1) % 1698784Sgblack@eecs.umich.edu w->computeUnit->vrf[w->simdId]->numRegs(); 1708784Sgblack@eecs.umich.edu 1717819Ssteve.reinhardt@amd.com w->computeUnit->vrf[w->simdId]->manager-> 1728784Sgblack@eecs.umich.edu freeRegion(w->startVgprIndex, endIndex); 1738784Sgblack@eecs.umich.edu 1745504Snate@binkert.org w->reservedVectorRegs = 0; 1758784Sgblack@eecs.umich.edu w->startVgprIndex = 0; 1765504Snate@binkert.org w->computeUnit->completedWfs++; 1778784Sgblack@eecs.umich.edu 1785504Snate@binkert.org DPRINTF(GPUExec, "Doing return for CU%d: WF[%d][%d][%d]\n", 1798784Sgblack@eecs.umich.edu w->computeUnit->cu_id, w->simdId, w->wfSlotId, w->wfDynId); 1805504Snate@binkert.org 1818784Sgblack@eecs.umich.edu if (!refCount) { 1828784Sgblack@eecs.umich.edu setFlag(SystemScope); 1835504Snate@binkert.org setFlag(Release); 1848784Sgblack@eecs.umich.edu setFlag(GlobalSegment); 1858784Sgblack@eecs.umich.edu // Notify Memory System of Kernel Completion 1868784Sgblack@eecs.umich.edu // Kernel End = isKernel + isRelease 1878784Sgblack@eecs.umich.edu w->status = Wavefront::S_RETURNING; 1888784Sgblack@eecs.umich.edu GPUDynInstPtr local_mempacket = gpuDynInst; 1898784Sgblack@eecs.umich.edu local_mempacket->useContinuation = false; 1905504Snate@binkert.org local_mempacket->simdId = w->simdId; 1915504Snate@binkert.org local_mempacket->wfSlotId = w->wfSlotId; 1925504Snate@binkert.org local_mempacket->wfDynId = w->wfDynId; 1935504Snate@binkert.org w->computeUnit->injectGlobalMemFence(local_mempacket, true); 1945504Snate@binkert.org } else { 1958784Sgblack@eecs.umich.edu w->computeUnit->shader->dispatcher->scheduleDispatch(); 1968784Sgblack@eecs.umich.edu } 1978784Sgblack@eecs.umich.edu } 1988784Sgblack@eecs.umich.edu } 1998784Sgblack@eecs.umich.edu 2008784Sgblack@eecs.umich.edu void 2018784Sgblack@eecs.umich.edu Barrier::execute(GPUDynInstPtr gpuDynInst) 2025504Snate@binkert.org { 2035504Snate@binkert.org Wavefront *w = gpuDynInst->wavefront(); 2045741Snate@binkert.org 2055741Snate@binkert.org assert(w->barrierCnt == w->oldBarrierCnt); 2065741Snate@binkert.org w->barrierCnt = w->oldBarrierCnt + 1; 2077823Ssteve.reinhardt@amd.com w->stalledAtBarrier = true; 2085741Snate@binkert.org } 2095741Snate@binkert.org} // namespace HsailISA 2105504Snate@binkert.org