system.cc revision 12005
12567SN/A/* 211234Sandreas.sandberg@arm.com * Copyright (c) 2010, 2012-2013, 2015 ARM Limited 37585SAli.Saidi@arm.com * All rights reserved 47585SAli.Saidi@arm.com * 57585SAli.Saidi@arm.com * The license below extends only to copyright in the software and shall 67585SAli.Saidi@arm.com * not be construed as granting a license to any other intellectual 77585SAli.Saidi@arm.com * property including but not limited to intellectual property relating 87585SAli.Saidi@arm.com * to a hardware implementation of the functionality of the software 97585SAli.Saidi@arm.com * licensed hereunder. You may use the software subject to the license 107585SAli.Saidi@arm.com * terms below provided that you ensure that this notice is replicated 117585SAli.Saidi@arm.com * unmodified and in its entirety in all distributions of the software, 127585SAli.Saidi@arm.com * modified or unmodified, in source code or in binary form. 137585SAli.Saidi@arm.com * 142567SN/A * Copyright (c) 2002-2006 The Regents of The University of Michigan 152567SN/A * All rights reserved. 162567SN/A * 172567SN/A * Redistribution and use in source and binary forms, with or without 182567SN/A * modification, are permitted provided that the following conditions are 192567SN/A * met: redistributions of source code must retain the above copyright 202567SN/A * notice, this list of conditions and the following disclaimer; 212567SN/A * redistributions in binary form must reproduce the above copyright 222567SN/A * notice, this list of conditions and the following disclaimer in the 232567SN/A * documentation and/or other materials provided with the distribution; 242567SN/A * neither the name of the copyright holders nor the names of its 252567SN/A * contributors may be used to endorse or promote products derived from 262567SN/A * this software without specific prior written permission. 272567SN/A * 282567SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 292567SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 302567SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 312567SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322567SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332567SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 342567SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 352567SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 362567SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 372567SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382567SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 392665SN/A * 402665SN/A * Authors: Ali Saidi 412567SN/A */ 422567SN/A 4311793Sbrandon.potter@amd.com#include "arch/arm/system.hh" 4411793Sbrandon.potter@amd.com 458229Snate@binkert.org#include <iostream> 468229Snate@binkert.org 478286SAli.Saidi@ARM.com#include "base/loader/object_file.hh" 488286SAli.Saidi@ARM.com#include "base/loader/symtab.hh" 498286SAli.Saidi@ARM.com#include "cpu/thread_context.hh" 5011793Sbrandon.potter@amd.com#include "mem/fs_translating_port_proxy.hh" 518286SAli.Saidi@ARM.com#include "mem/physical.hh" 5210037SARM gem5 Developers#include "sim/full_system.hh" 532567SN/A 547650SAli.Saidi@ARM.comusing namespace std; 557650SAli.Saidi@ARM.comusing namespace Linux; 562567SN/A 576757SAli.Saidi@ARM.comArmSystem::ArmSystem(Params *p) 5811234Sandreas.sandberg@arm.com : System(p), 5911234Sandreas.sandberg@arm.com bootLoaders(), bootldr(nullptr), 6011234Sandreas.sandberg@arm.com _haveSecurity(p->have_security), 6110037SARM gem5 Developers _haveLPAE(p->have_lpae), 6210037SARM gem5 Developers _haveVirtualization(p->have_virtualization), 6310537Sandreas.hansson@arm.com _genericTimer(nullptr), 6410037SARM gem5 Developers _highestELIs64(p->highest_el_is_64), 6510037SARM gem5 Developers _resetAddr64(p->reset_addr_64), 6610037SARM gem5 Developers _physAddrRange64(p->phys_addr_range_64), 6710037SARM gem5 Developers _haveLargeAsid64(p->have_large_asid_64), 6812005Sandreas.sandberg@arm.com _m5opRange(p->m5ops_base ? 6912005Sandreas.sandberg@arm.com RangeSize(p->m5ops_base, 0x10000) : 7012005Sandreas.sandberg@arm.com AddrRange(1, 0)), // Create an empty range if disabled 7110037SARM gem5 Developers multiProc(p->multi_proc) 722567SN/A{ 7310037SARM gem5 Developers // Check if the physical address range is valid 7410037SARM gem5 Developers if (_highestELIs64 && ( 7510037SARM gem5 Developers _physAddrRange64 < 32 || 7610037SARM gem5 Developers _physAddrRange64 > 48 || 7710037SARM gem5 Developers (_physAddrRange64 % 4 != 0 && _physAddrRange64 != 42))) { 7810037SARM gem5 Developers fatal("Invalid physical address range (%d)\n", _physAddrRange64); 7910037SARM gem5 Developers } 8010037SARM gem5 Developers 8111234Sandreas.sandberg@arm.com bootLoaders.reserve(p->boot_loader.size()); 8211234Sandreas.sandberg@arm.com for (const auto &bl : p->boot_loader) { 8311234Sandreas.sandberg@arm.com std::unique_ptr<ObjectFile> obj; 8411234Sandreas.sandberg@arm.com obj.reset(createObjectFile(bl)); 858885SAli.Saidi@ARM.com 8611234Sandreas.sandberg@arm.com fatal_if(!obj, "Could not read bootloader: %s\n", bl); 8711234Sandreas.sandberg@arm.com bootLoaders.emplace_back(std::move(obj)); 8811234Sandreas.sandberg@arm.com } 898885SAli.Saidi@ARM.com 9011234Sandreas.sandberg@arm.com if (kernel) { 9111234Sandreas.sandberg@arm.com bootldr = getBootLoader(kernel); 9211234Sandreas.sandberg@arm.com } else if (!bootLoaders.empty()) { 9311234Sandreas.sandberg@arm.com // No kernel specified, default to the first boot loader 9411234Sandreas.sandberg@arm.com bootldr = bootLoaders[0].get(); 9511234Sandreas.sandberg@arm.com } 9611234Sandreas.sandberg@arm.com 9711234Sandreas.sandberg@arm.com if (!bootLoaders.empty() && !bootldr) 9811234Sandreas.sandberg@arm.com fatal("Can't find a matching boot loader / kernel combination!"); 9911234Sandreas.sandberg@arm.com 10011234Sandreas.sandberg@arm.com if (bootldr) { 10111234Sandreas.sandberg@arm.com bootldr->loadGlobalSymbols(debugSymbolTable); 10210037SARM gem5 Developers if ((bootldr->getArch() == ObjectFile::Arm64) && !_highestELIs64) { 10310037SARM gem5 Developers warn("Highest ARM exception-level set to AArch32 but bootloader " 10410037SARM gem5 Developers "is for AArch64. Assuming you wanted these to match.\n"); 10510037SARM gem5 Developers _highestELIs64 = true; 10610037SARM gem5 Developers } else if ((bootldr->getArch() == ObjectFile::Arm) && _highestELIs64) { 10710037SARM gem5 Developers warn("Highest ARM exception-level set to AArch64 but bootloader " 10810037SARM gem5 Developers "is for AArch32. Assuming you wanted these to match.\n"); 10910037SARM gem5 Developers _highestELIs64 = false; 11010037SARM gem5 Developers } 11111234Sandreas.sandberg@arm.com } 11210037SARM gem5 Developers 1138885SAli.Saidi@ARM.com debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk"); 1148706Sandreas.hansson@arm.com} 1158706Sandreas.hansson@arm.com 1168706Sandreas.hansson@arm.comvoid 1178706Sandreas.hansson@arm.comArmSystem::initState() 1188706Sandreas.hansson@arm.com{ 1198706Sandreas.hansson@arm.com // Moved from the constructor to here since it relies on the 1208706Sandreas.hansson@arm.com // address map being resolved in the interconnect 1218706Sandreas.hansson@arm.com 1228706Sandreas.hansson@arm.com // Call the initialisation of the super class 1238706Sandreas.hansson@arm.com System::initState(); 1248706Sandreas.hansson@arm.com 1258706Sandreas.hansson@arm.com const Params* p = params(); 1262567SN/A 1278885SAli.Saidi@ARM.com if (bootldr) { 1288706Sandreas.hansson@arm.com bootldr->loadSections(physProxy); 1298286SAli.Saidi@ARM.com 13010037SARM gem5 Developers uint8_t jump_to_bl_32[] = 1318286SAli.Saidi@ARM.com { 13210037SARM gem5 Developers 0x07, 0xf0, 0xa0, 0xe1 // branch to r7 in aarch32 1338286SAli.Saidi@ARM.com }; 13410037SARM gem5 Developers 13510037SARM gem5 Developers uint8_t jump_to_bl_64[] = 13610037SARM gem5 Developers { 13710037SARM gem5 Developers 0xe0, 0x00, 0x1f, 0xd6 // instruction "br x7" in aarch64 13810037SARM gem5 Developers }; 13910037SARM gem5 Developers 14010037SARM gem5 Developers // write the jump to branch table into address 0 14110037SARM gem5 Developers if (!_highestELIs64) 14210037SARM gem5 Developers physProxy.writeBlob(0x0, jump_to_bl_32, sizeof(jump_to_bl_32)); 14310037SARM gem5 Developers else 14410037SARM gem5 Developers physProxy.writeBlob(0x0, jump_to_bl_64, sizeof(jump_to_bl_64)); 1458286SAli.Saidi@ARM.com 1468286SAli.Saidi@ARM.com inform("Using bootloader at address %#x\n", bootldr->entryPoint()); 1478286SAli.Saidi@ARM.com 1488286SAli.Saidi@ARM.com // Put the address of the boot loader into r7 so we know 1498286SAli.Saidi@ARM.com // where to branch to after the reset fault 1508286SAli.Saidi@ARM.com // All other values needed by the boot loader to know what to do 1518885SAli.Saidi@ARM.com if (!p->gic_cpu_addr || !p->flags_addr) 1528885SAli.Saidi@ARM.com fatal("gic_cpu_addr && flags_addr must be set with bootloader\n"); 1538885SAli.Saidi@ARM.com 1548286SAli.Saidi@ARM.com for (int i = 0; i < threadContexts.size(); i++) { 15510037SARM gem5 Developers if (!_highestELIs64) 15610037SARM gem5 Developers threadContexts[i]->setIntReg(3, (kernelEntry & loadAddrMask) + 15710037SARM gem5 Developers loadAddrOffset); 1588286SAli.Saidi@ARM.com threadContexts[i]->setIntReg(4, params()->gic_cpu_addr); 1598286SAli.Saidi@ARM.com threadContexts[i]->setIntReg(5, params()->flags_addr); 1608286SAli.Saidi@ARM.com threadContexts[i]->setIntReg(7, bootldr->entryPoint()); 1618286SAli.Saidi@ARM.com } 16210037SARM gem5 Developers inform("Using kernel entry physical address at %#x\n", 16310037SARM gem5 Developers (kernelEntry & loadAddrMask) + loadAddrOffset); 1648286SAli.Saidi@ARM.com } else { 1658286SAli.Saidi@ARM.com // Set the initial PC to be at start of the kernel code 16610037SARM gem5 Developers if (!_highestELIs64) 16710037SARM gem5 Developers threadContexts[0]->pcState((kernelEntry & loadAddrMask) + 16810037SARM gem5 Developers loadAddrOffset); 1698286SAli.Saidi@ARM.com } 1702567SN/A} 1712567SN/A 17210037SARM gem5 Developersbool 17310037SARM gem5 DevelopersArmSystem::haveSecurity(ThreadContext *tc) 17410037SARM gem5 Developers{ 17510037SARM gem5 Developers if (!FullSystem) 17610037SARM gem5 Developers return false; 17710037SARM gem5 Developers 17810037SARM gem5 Developers ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr()); 17910037SARM gem5 Developers assert(a_sys); 18010037SARM gem5 Developers return a_sys->haveSecurity(); 18110037SARM gem5 Developers} 18210037SARM gem5 Developers 18310037SARM gem5 Developers 1846757SAli.Saidi@ARM.comArmSystem::~ArmSystem() 1852567SN/A{ 1868286SAli.Saidi@ARM.com if (debugPrintkEvent) 1878286SAli.Saidi@ARM.com delete debugPrintkEvent; 1882567SN/A} 1892567SN/A 19011234Sandreas.sandberg@arm.comObjectFile * 19111234Sandreas.sandberg@arm.comArmSystem::getBootLoader(ObjectFile *const obj) 19211234Sandreas.sandberg@arm.com{ 19311234Sandreas.sandberg@arm.com for (auto &bl : bootLoaders) { 19411234Sandreas.sandberg@arm.com if (bl->getArch() == obj->getArch()) 19511234Sandreas.sandberg@arm.com return bl.get(); 19611234Sandreas.sandberg@arm.com } 19711234Sandreas.sandberg@arm.com 19811234Sandreas.sandberg@arm.com return nullptr; 19911234Sandreas.sandberg@arm.com} 20011234Sandreas.sandberg@arm.com 20110037SARM gem5 Developersbool 20210037SARM gem5 DevelopersArmSystem::haveLPAE(ThreadContext *tc) 20310037SARM gem5 Developers{ 20410037SARM gem5 Developers if (!FullSystem) 20510037SARM gem5 Developers return false; 2066757SAli.Saidi@ARM.com 20710037SARM gem5 Developers ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr()); 20810037SARM gem5 Developers assert(a_sys); 20910037SARM gem5 Developers return a_sys->haveLPAE(); 21010037SARM gem5 Developers} 21110037SARM gem5 Developers 21210037SARM gem5 Developersbool 21310037SARM gem5 DevelopersArmSystem::haveVirtualization(ThreadContext *tc) 21410037SARM gem5 Developers{ 21510037SARM gem5 Developers if (!FullSystem) 21610037SARM gem5 Developers return false; 21710037SARM gem5 Developers 21810037SARM gem5 Developers ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr()); 21910037SARM gem5 Developers assert(a_sys); 22010037SARM gem5 Developers return a_sys->haveVirtualization(); 22110037SARM gem5 Developers} 22210037SARM gem5 Developers 22310037SARM gem5 Developersbool 22410037SARM gem5 DevelopersArmSystem::highestELIs64(ThreadContext *tc) 22510037SARM gem5 Developers{ 22611494Sandreas.sandberg@arm.com return FullSystem ? 22711494Sandreas.sandberg@arm.com dynamic_cast<ArmSystem *>(tc->getSystemPtr())->highestELIs64() : 22811494Sandreas.sandberg@arm.com true; 22910037SARM gem5 Developers} 23010037SARM gem5 Developers 23110037SARM gem5 DevelopersExceptionLevel 23210037SARM gem5 DevelopersArmSystem::highestEL(ThreadContext *tc) 23310037SARM gem5 Developers{ 23411494Sandreas.sandberg@arm.com return FullSystem ? 23511494Sandreas.sandberg@arm.com dynamic_cast<ArmSystem *>(tc->getSystemPtr())->highestEL() : 23611494Sandreas.sandberg@arm.com EL1; 23710037SARM gem5 Developers} 23810037SARM gem5 Developers 23910037SARM gem5 DevelopersAddr 24010037SARM gem5 DevelopersArmSystem::resetAddr64(ThreadContext *tc) 24110037SARM gem5 Developers{ 24210037SARM gem5 Developers return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->resetAddr64(); 24310037SARM gem5 Developers} 24410037SARM gem5 Developers 24510037SARM gem5 Developersuint8_t 24610037SARM gem5 DevelopersArmSystem::physAddrRange(ThreadContext *tc) 24710037SARM gem5 Developers{ 24810037SARM gem5 Developers return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->physAddrRange(); 24910037SARM gem5 Developers} 25010037SARM gem5 Developers 25110037SARM gem5 DevelopersAddr 25210037SARM gem5 DevelopersArmSystem::physAddrMask(ThreadContext *tc) 25310037SARM gem5 Developers{ 25410037SARM gem5 Developers return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->physAddrMask(); 25510037SARM gem5 Developers} 25610037SARM gem5 Developers 25710037SARM gem5 Developersbool 25810037SARM gem5 DevelopersArmSystem::haveLargeAsid64(ThreadContext *tc) 25910037SARM gem5 Developers{ 26010037SARM gem5 Developers return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->haveLargeAsid64(); 26110037SARM gem5 Developers} 26210810Sbr@bsdpad.com 2636757SAli.Saidi@ARM.comArmSystem * 2646757SAli.Saidi@ARM.comArmSystemParams::create() 2652567SN/A{ 2666757SAli.Saidi@ARM.com return new ArmSystem(this); 2672567SN/A} 26810810Sbr@bsdpad.com 26910810Sbr@bsdpad.comvoid 27010810Sbr@bsdpad.comGenericArmSystem::initState() 27110810Sbr@bsdpad.com{ 27210810Sbr@bsdpad.com // Moved from the constructor to here since it relies on the 27310810Sbr@bsdpad.com // address map being resolved in the interconnect 27410810Sbr@bsdpad.com 27510810Sbr@bsdpad.com // Call the initialisation of the super class 27610810Sbr@bsdpad.com ArmSystem::initState(); 27710810Sbr@bsdpad.com} 27810810Sbr@bsdpad.com 27910810Sbr@bsdpad.comGenericArmSystem * 28010810Sbr@bsdpad.comGenericArmSystemParams::create() 28110810Sbr@bsdpad.com{ 28210810Sbr@bsdpad.com 28310810Sbr@bsdpad.com return new GenericArmSystem(this); 28410810Sbr@bsdpad.com} 285