remote_gdb.cc revision 9374:227a38f9d98c
19793Sakash.bagdia@arm.com/* 27586SAli.Saidi@arm.com * Copyright (c) 2010 ARM Limited 37586SAli.Saidi@arm.com * All rights reserved 47586SAli.Saidi@arm.com * 57586SAli.Saidi@arm.com * The license below extends only to copyright in the software and shall 67586SAli.Saidi@arm.com * not be construed as granting a license to any other intellectual 77586SAli.Saidi@arm.com * property including but not limited to intellectual property relating 87586SAli.Saidi@arm.com * to a hardware implementation of the functionality of the software 97586SAli.Saidi@arm.com * licensed hereunder. You may use the software subject to the license 107586SAli.Saidi@arm.com * terms below provided that you ensure that this notice is replicated 117586SAli.Saidi@arm.com * unmodified and in its entirety in all distributions of the software, 127586SAli.Saidi@arm.com * modified or unmodified, in source code or in binary form. 133970Sgblack@eecs.umich.edu * 143005Sstever@eecs.umich.edu * Copyright (c) 2002-2005 The Regents of The University of Michigan 153005Sstever@eecs.umich.edu * All rights reserved. 163005Sstever@eecs.umich.edu * 173005Sstever@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 183005Sstever@eecs.umich.edu * modification, are permitted provided that the following conditions are 193005Sstever@eecs.umich.edu * met: redistributions of source code must retain the above copyright 203005Sstever@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 213005Sstever@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 223005Sstever@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 233005Sstever@eecs.umich.edu * documentation and/or other materials provided with the distribution; 243005Sstever@eecs.umich.edu * neither the name of the copyright holders nor the names of its 253005Sstever@eecs.umich.edu * contributors may be used to endorse or promote products derived from 263005Sstever@eecs.umich.edu * this software without specific prior written permission. 273005Sstever@eecs.umich.edu * 283005Sstever@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 293005Sstever@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 303005Sstever@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 313005Sstever@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 323005Sstever@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 333005Sstever@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 343005Sstever@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 353005Sstever@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 363005Sstever@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 373005Sstever@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 383005Sstever@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 393005Sstever@eecs.umich.edu * 403005Sstever@eecs.umich.edu * Authors: Nathan Binkert 416654Snate@binkert.org * William Wang 426654Snate@binkert.org */ 432889SN/A 442710SN/A/* 456654Snate@binkert.org * Copyright (c) 1990, 1993 The Regents of the University of California 466654Snate@binkert.org * All rights reserved 476654Snate@binkert.org * 485457Ssaidi@eecs.umich.edu * This software was developed by the Computer Systems Engineering group 496654Snate@binkert.org * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 506654Snate@binkert.org * contributed to Berkeley. 512934SN/A * 522549SN/A * All advertising materials mentioning features or use of this software 532995SN/A * must display the following acknowledgement: 543395Shsul@eecs.umich.edu * This product includes software developed by the University of 556981SLisa.Hsu@amd.com * California, Lawrence Berkeley Laboratories. 563448Shsul@eecs.umich.edu * 578920Snilay@cs.wisc.edu * Redistribution and use in source and binary forms, with or without 583444Sktlim@umich.edu * modification, are permitted provided that the following conditions 592889SN/A * are met: 608920Snilay@cs.wisc.edu * 1. Redistributions of source code must retain the above copyright 618920Snilay@cs.wisc.edu * notice, this list of conditions and the following disclaimer. 623322Shsul@eecs.umich.edu * 2. Redistributions in binary form must reproduce the above copyright 632710SN/A * notice, this list of conditions and the following disclaimer in the 642710SN/A * documentation and/or other materials provided with the distribution. 652710SN/A * 3. All advertising materials mentioning features or use of this software 662710SN/A * must display the following acknowledgement: 672710SN/A * This product includes software developed by the University of 682710SN/A * California, Berkeley and its contributors. 693322Shsul@eecs.umich.edu * 4. Neither the name of the University nor the names of its contributors 703304Sstever@eecs.umich.edu * may be used to endorse or promote products derived from this software 713322Shsul@eecs.umich.edu * without specific prior written permission. 723322Shsul@eecs.umich.edu * 733304Sstever@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 749653SAndreas.Sandberg@ARM.com * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 759653SAndreas.Sandberg@ARM.com * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 769653SAndreas.Sandberg@ARM.com * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 779653SAndreas.Sandberg@ARM.com * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 789653SAndreas.Sandberg@ARM.com * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 799653SAndreas.Sandberg@ARM.com * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 809653SAndreas.Sandberg@ARM.com * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 813481Shsul@eecs.umich.edu * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 823481Shsul@eecs.umich.edu * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 832566SN/A * SUCH DAMAGE. 849665Sandreas.hansson@arm.com * 859665Sandreas.hansson@arm.com * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94 869665Sandreas.hansson@arm.com */ 879665Sandreas.hansson@arm.com 889665Sandreas.hansson@arm.com/*- 892995SN/A * Copyright (c) 2001 The NetBSD Foundation, Inc. 903304Sstever@eecs.umich.edu * All rights reserved. 913304Sstever@eecs.umich.edu * 923304Sstever@eecs.umich.edu * This code is derived from software contributed to The NetBSD Foundation 932995SN/A * by Jason R. Thorpe. 942995SN/A * 952995SN/A * Redistribution and use in source and binary forms, with or without 962917SN/A * modification, are permitted provided that the following conditions 972995SN/A * are met: 988956Sjayneel@cs.wisc.edu * 1. Redistributions of source code must retain the above copyright 992995SN/A * notice, this list of conditions and the following disclaimer. 1008956Sjayneel@cs.wisc.edu * 2. Redistributions in binary form must reproduce the above copyright 1013304Sstever@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 1026135Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution. 1036135Sgblack@eecs.umich.edu * 3. All advertising materials mentioning features or use of this software 1046654Snate@binkert.org * must display the following acknowledgement: 1059665Sandreas.hansson@arm.com * This product includes software developed by the NetBSD 1066654Snate@binkert.org * Foundation, Inc. and its contributors. 1079665Sandreas.hansson@arm.com * 4. Neither the name of The NetBSD Foundation nor the names of its 1086654Snate@binkert.org * contributors may be used to endorse or promote products derived 1099665Sandreas.hansson@arm.com * from this software without specific prior written permission. 1106654Snate@binkert.org * 1119665Sandreas.hansson@arm.com * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 1129665Sandreas.hansson@arm.com * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 1137586SAli.Saidi@arm.com * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 1149665Sandreas.hansson@arm.com * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 1159665Sandreas.hansson@arm.com * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 1169665Sandreas.hansson@arm.com * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 1173819Shsul@eecs.umich.edu * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 1189059Snilay@cs.wisc.edu * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 1193819Shsul@eecs.umich.edu * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 1209793Sakash.bagdia@arm.com * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 1219793Sakash.bagdia@arm.com * POSSIBILITY OF SUCH DAMAGE. 1229793Sakash.bagdia@arm.com */ 1239793Sakash.bagdia@arm.com 1249793Sakash.bagdia@arm.com/* 1259790Sakash.bagdia@arm.com * $NetBSD: kgdb_stub.c,v 1.8 2001/07/07 22:58:00 wdk Exp $ 1263873Sbinkertn@umich.edu * 1273873Sbinkertn@umich.edu * Taken from NetBSD 1283873Sbinkertn@umich.edu * 1293873Sbinkertn@umich.edu * "Stub" to allow remote cpu to debug over a serial line using gdb. 1303873Sbinkertn@umich.edu */ 1313873Sbinkertn@umich.edu 1328659SAli.Saidi@ARM.com#include <sys/signal.h> 1338659SAli.Saidi@ARM.com#include <unistd.h> 1349793Sakash.bagdia@arm.com 1359793Sakash.bagdia@arm.com#include <string> 1369793Sakash.bagdia@arm.com 1373668Srdreslin@umich.edu#include "arch/arm/decoder.hh" 1389653SAndreas.Sandberg@ARM.com#include "arch/arm/pagetable.hh" 1399653SAndreas.Sandberg@ARM.com#include "arch/arm/registers.hh" 1409653SAndreas.Sandberg@ARM.com#include "arch/arm/remote_gdb.hh" 1416636Ssteve.reinhardt@amd.com#include "arch/arm/utility.hh" 1429788Sakash.bagdia@arm.com#include "arch/arm/vtophys.hh" 1439788Sakash.bagdia@arm.com#include "base/intmath.hh" 1448839Sandreas.hansson@arm.com#include "base/remote_gdb.hh" 1458839Sandreas.hansson@arm.com#include "base/socket.hh" 1468713Sandreas.hansson@arm.com#include "base/trace.hh" 1479408Sandreas.hansson@arm.com#include "cpu/static_inst.hh" 1488839Sandreas.hansson@arm.com#include "cpu/thread_context.hh" 1498839Sandreas.hansson@arm.com#include "cpu/thread_state.hh" 1505142Ssaidi@eecs.umich.edu#include "debug/GDBAcc.hh" 1518926Sandreas.hansson@arm.com#include "debug/GDBMisc.hh" 1529317Sandreas.hansson@arm.com#include "mem/page_table.hh" 1539317Sandreas.hansson@arm.com#include "mem/physical.hh" 1549317Sandreas.hansson@arm.com#include "mem/port.hh" 1559317Sandreas.hansson@arm.com#include "sim/full_system.hh" 1569317Sandreas.hansson@arm.com#include "sim/system.hh" 1578926Sandreas.hansson@arm.com 1583312Sstever@eecs.umich.eduusing namespace std; 1594968Sacolyte@umich.eduusing namespace ArmISA; 1608926Sandreas.hansson@arm.com 1618887Sgeoffrey.blake@arm.comRemoteGDB::RemoteGDB(System *_system, ThreadContext *tc) 1628887Sgeoffrey.blake@arm.com : BaseRemoteGDB(_system, tc, NUMREGS) 1639384SAndreas.Sandberg@arm.com{ 1648887Sgeoffrey.blake@arm.com} 1658887Sgeoffrey.blake@arm.com 1664968Sacolyte@umich.edu/* 1673005Sstever@eecs.umich.edu * Determine if the mapping at va..(va+len) is valid. 1686654Snate@binkert.org */ 1699665Sandreas.hansson@arm.combool 1706654Snate@binkert.orgRemoteGDB::acc(Addr va, size_t len) 1719665Sandreas.hansson@arm.com{ 1726654Snate@binkert.org if (FullSystem) { 1739665Sandreas.hansson@arm.com Addr last_va; 1746654Snate@binkert.org va = truncPage(va); 1759665Sandreas.hansson@arm.com last_va = roundPage(va + len); 1767586SAli.Saidi@arm.com 1779665Sandreas.hansson@arm.com do { 1789665Sandreas.hansson@arm.com if (virtvalid(context, va)) { 1798661SAli.Saidi@ARM.com return true; 1809793Sakash.bagdia@arm.com } 1819793Sakash.bagdia@arm.com va += PageBytes; 1829790Sakash.bagdia@arm.com } while (va < last_va); 1839793Sakash.bagdia@arm.com 1849793Sakash.bagdia@arm.com DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va); 1859793Sakash.bagdia@arm.com return true; 1869793Sakash.bagdia@arm.com } else { 1879793Sakash.bagdia@arm.com TlbEntry entry; 1889384SAndreas.Sandberg@arm.com //Check to make sure the first byte is mapped into the processes address 1898863Snilay@cs.wisc.edu //space. 1907876Sgblack@eecs.umich.edu if (context->getProcessPtr()->pTable->lookup(va, entry)) 1914968Sacolyte@umich.edu return true; 1928926Sandreas.hansson@arm.com return false; 1934837Ssaidi@eecs.umich.edu } 1944837Ssaidi@eecs.umich.edu} 1959408Sandreas.hansson@arm.com 1969653SAndreas.Sandberg@ARM.com/* 1979653SAndreas.Sandberg@ARM.com * Translate the kernel debugger register format into the GDB register 1989653SAndreas.Sandberg@ARM.com * format. 1999164Sandreas.hansson@arm.com */ 2009408Sandreas.hansson@arm.comvoid 2018845Sandreas.hansson@arm.comRemoteGDB::getregs() 2028845Sandreas.hansson@arm.com{ 2034837Ssaidi@eecs.umich.edu DPRINTF(GDBAcc, "getregs in remotegdb \n"); 2048659SAli.Saidi@ARM.com 2058801Sgblack@eecs.umich.edu memset(gdbregs.regs, 0, gdbregs.bytes()); 2063005Sstever@eecs.umich.edu 2078801Sgblack@eecs.umich.edu // R0-R15 supervisor mode 2083005Sstever@eecs.umich.edu // arm registers are 32 bits wide, gdb registers are 64 bits wide 2093005Sstever@eecs.umich.edu // two arm registers are packed into one gdb register (little endian) 2103005Sstever@eecs.umich.edu gdbregs.regs[REG_R0 + 0] = context->readIntReg(INTREG_R1) << 32 | 2112566SN/A context->readIntReg(INTREG_R0); 2127861Sgblack@eecs.umich.edu gdbregs.regs[REG_R0 + 1] = context->readIntReg(INTREG_R3) << 32 | 2137861Sgblack@eecs.umich.edu context->readIntReg(INTREG_R2); 2147861Sgblack@eecs.umich.edu gdbregs.regs[REG_R0 + 2] = context->readIntReg(INTREG_R5) << 32 | 2158635Schris.emmons@arm.com context->readIntReg(INTREG_R4); 2168635Schris.emmons@arm.com gdbregs.regs[REG_R0 + 3] = context->readIntReg(INTREG_R7) << 32 | 2178635Schris.emmons@arm.com context->readIntReg(INTREG_R6); 2189061Snilay@cs.wisc.edu gdbregs.regs[REG_R0 + 4] = context->readIntReg(INTREG_R9) << 32 | 2193481Shsul@eecs.umich.edu context->readIntReg(INTREG_R8); 220 gdbregs.regs[REG_R0 + 5] = context->readIntReg(INTREG_R11) << 32| 221 context->readIntReg(INTREG_R10); 222 gdbregs.regs[REG_R0 + 6] = context->readIntReg(INTREG_SP) << 32 | 223 context->readIntReg(INTREG_R12); 224 gdbregs.regs[REG_R0 + 7] = context->pcState().pc() << 32 | 225 context->readIntReg(INTREG_LR); 226 227 // CPSR 228 gdbregs.regs[REG_CPSR] = context->readMiscRegNoEffect(MISCREG_CPSR); 229 230 // vfpv3/neon floating point registers (32 double or 64 float) 231 232 gdbregs.regs[REG_F0] = 233 static_cast<uint64_t>(context->readFloatRegBits(0)) << 32 | 234 gdbregs.regs[REG_CPSR]; 235 236 for (int i = 1; i < (NumFloatArchRegs>>1); ++i) { 237 gdbregs.regs[i + REG_F0] = 238 static_cast<uint64_t>(context->readFloatRegBits(2*i)) << 32 | 239 context->readFloatRegBits(2*i-1); 240 } 241 242 // FPSCR 243 gdbregs.regs[REG_FPSCR] = 244 static_cast<uint64_t>(context->readMiscRegNoEffect(MISCREG_FPSCR)) << 32 | 245 context->readFloatRegBits(NumFloatArchRegs - 1); 246} 247 248/* 249 * Translate the GDB register format into the kernel debugger register 250 * format. 251 */ 252void 253RemoteGDB::setregs() 254{ 255 256 DPRINTF(GDBAcc, "setregs in remotegdb \n"); 257 258 // R0-R15 supervisor mode 259 // arm registers are 32 bits wide, gdb registers are 64 bits wide 260 // two arm registers are packed into one gdb register (little endian) 261 context->setIntReg(INTREG_R0 , bits(gdbregs.regs[REG_R0 + 0], 31, 0)); 262 context->setIntReg(INTREG_R1 , bits(gdbregs.regs[REG_R0 + 0], 63, 32)); 263 context->setIntReg(INTREG_R2 , bits(gdbregs.regs[REG_R0 + 1], 31, 0)); 264 context->setIntReg(INTREG_R3 , bits(gdbregs.regs[REG_R0 + 1], 63, 32)); 265 context->setIntReg(INTREG_R4 , bits(gdbregs.regs[REG_R0 + 2], 31, 0)); 266 context->setIntReg(INTREG_R5 , bits(gdbregs.regs[REG_R0 + 2], 63, 32)); 267 context->setIntReg(INTREG_R6 , bits(gdbregs.regs[REG_R0 + 3], 31, 0)); 268 context->setIntReg(INTREG_R7 , bits(gdbregs.regs[REG_R0 + 3], 63, 32)); 269 context->setIntReg(INTREG_R8 , bits(gdbregs.regs[REG_R0 + 4], 31, 0)); 270 context->setIntReg(INTREG_R9 , bits(gdbregs.regs[REG_R0 + 4], 63, 32)); 271 context->setIntReg(INTREG_R10, bits(gdbregs.regs[REG_R0 + 5], 31, 0)); 272 context->setIntReg(INTREG_R11, bits(gdbregs.regs[REG_R0 + 5], 63, 32)); 273 context->setIntReg(INTREG_R12, bits(gdbregs.regs[REG_R0 + 6], 31, 0)); 274 context->setIntReg(INTREG_SP , bits(gdbregs.regs[REG_R0 + 6], 63, 32)); 275 context->setIntReg(INTREG_LR , bits(gdbregs.regs[REG_R0 + 7], 31, 0)); 276 context->pcState(bits(gdbregs.regs[REG_R0 + 7], 63, 32)); 277 278 //CPSR 279 context->setMiscRegNoEffect(MISCREG_CPSR, gdbregs.regs[REG_CPSR]); 280 281 //vfpv3/neon floating point registers (32 double or 64 float) 282 context->setFloatRegBits(0, gdbregs.regs[REG_F0]>>32); 283 284 for (int i = 1; i < NumFloatArchRegs; ++i) { 285 if(i%2){ 286 int j = (i+1)/2; 287 context->setFloatRegBits(i, bits(gdbregs.regs[j + REG_F0], 31, 0)); 288 } 289 else{ 290 int j = i/2; 291 context->setFloatRegBits(i, gdbregs.regs[j + REG_F0]>>32); 292 } 293 } 294 295 //FPSCR 296 context->setMiscReg(MISCREG_FPSCR, gdbregs.regs[REG_FPSCR]>>32); 297} 298 299void 300RemoteGDB::clearSingleStep() 301{ 302 DPRINTF(GDBMisc, "clearSingleStep bt_addr=%#x nt_addr=%#x\n", 303 takenBkpt, notTakenBkpt); 304 305 if (takenBkpt != 0) 306 clearTempBreakpoint(takenBkpt); 307 308 if (notTakenBkpt != 0) 309 clearTempBreakpoint(notTakenBkpt); 310} 311 312void 313RemoteGDB::setSingleStep() 314{ 315 PCState pc = context->pcState(); 316 PCState bpc; 317 bool set_bt = false; 318 319 // User was stopped at pc, e.g. the instruction at pc was not 320 // executed. 321 MachInst inst = read<MachInst>(pc.pc()); 322 StaticInstPtr si = context->getDecoderPtr()->decode(inst, pc.pc()); 323 if (si->hasBranchTarget(pc, context, bpc)) { 324 // Don't bother setting a breakpoint on the taken branch if it 325 // is the same as the next pc 326 if (bpc.pc() != pc.npc()) 327 set_bt = true; 328 } 329 330 DPRINTF(GDBMisc, "setSingleStep bt_addr=%#x nt_addr=%#x\n", 331 takenBkpt, notTakenBkpt); 332 333 setTempBreakpoint(notTakenBkpt = pc.npc()); 334 335 if (set_bt) 336 setTempBreakpoint(takenBkpt = bpc.pc()); 337} 338 339// Write bytes to kernel address space for debugger. 340bool 341RemoteGDB::write(Addr vaddr, size_t size, const char *data) 342{ 343 return BaseRemoteGDB::write(vaddr, size, data); 344} 345 346