remote_gdb.cc revision 9020
1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2002-2005 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Nathan Binkert 41 * William Wang 42 */ 43 44/* 45 * Copyright (c) 1990, 1993 The Regents of the University of California 46 * All rights reserved 47 * 48 * This software was developed by the Computer Systems Engineering group 49 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 50 * contributed to Berkeley. 51 * 52 * All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by the University of 55 * California, Lawrence Berkeley Laboratories. 56 * 57 * Redistribution and use in source and binary forms, with or without 58 * modification, are permitted provided that the following conditions 59 * are met: 60 * 1. Redistributions of source code must retain the above copyright 61 * notice, this list of conditions and the following disclaimer. 62 * 2. Redistributions in binary form must reproduce the above copyright 63 * notice, this list of conditions and the following disclaimer in the 64 * documentation and/or other materials provided with the distribution. 65 * 3. All advertising materials mentioning features or use of this software 66 * must display the following acknowledgement: 67 * This product includes software developed by the University of 68 * California, Berkeley and its contributors. 69 * 4. Neither the name of the University nor the names of its contributors 70 * may be used to endorse or promote products derived from this software 71 * without specific prior written permission. 72 * 73 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 74 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 76 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 77 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 78 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 79 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 80 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 81 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 82 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 83 * SUCH DAMAGE. 84 * 85 * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94 86 */ 87 88/*- 89 * Copyright (c) 2001 The NetBSD Foundation, Inc. 90 * All rights reserved. 91 * 92 * This code is derived from software contributed to The NetBSD Foundation 93 * by Jason R. Thorpe. 94 * 95 * Redistribution and use in source and binary forms, with or without 96 * modification, are permitted provided that the following conditions 97 * are met: 98 * 1. Redistributions of source code must retain the above copyright 99 * notice, this list of conditions and the following disclaimer. 100 * 2. Redistributions in binary form must reproduce the above copyright 101 * notice, this list of conditions and the following disclaimer in the 102 * documentation and/or other materials provided with the distribution. 103 * 3. All advertising materials mentioning features or use of this software 104 * must display the following acknowledgement: 105 * This product includes software developed by the NetBSD 106 * Foundation, Inc. and its contributors. 107 * 4. Neither the name of The NetBSD Foundation nor the names of its 108 * contributors may be used to endorse or promote products derived 109 * from this software without specific prior written permission. 110 * 111 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 112 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 113 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 114 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 115 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 116 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 117 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 118 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 119 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 120 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 121 * POSSIBILITY OF SUCH DAMAGE. 122 */ 123 124/* 125 * $NetBSD: kgdb_stub.c,v 1.8 2001/07/07 22:58:00 wdk Exp $ 126 * 127 * Taken from NetBSD 128 * 129 * "Stub" to allow remote cpu to debug over a serial line using gdb. 130 */ 131 132#include <sys/signal.h> 133#include <unistd.h> 134 135#include <string> 136 137#include "arch/arm/decoder.hh" 138#include "arch/arm/pagetable.hh" 139#include "arch/arm/registers.hh" 140#include "arch/arm/remote_gdb.hh" 141#include "arch/arm/utility.hh" 142#include "arch/arm/vtophys.hh" 143#include "base/intmath.hh" 144#include "base/remote_gdb.hh" 145#include "base/socket.hh" 146#include "base/trace.hh" 147#include "cpu/static_inst.hh" 148#include "cpu/thread_context.hh" 149#include "cpu/thread_state.hh" 150#include "debug/GDBAcc.hh" 151#include "debug/GDBMisc.hh" 152#include "mem/page_table.hh" 153#include "mem/physical.hh" 154#include "mem/port.hh" 155#include "sim/full_system.hh" 156#include "sim/system.hh" 157 158using namespace std; 159using namespace ArmISA; 160 161RemoteGDB::RemoteGDB(System *_system, ThreadContext *tc) 162 : BaseRemoteGDB(_system, tc, NUMREGS) 163{ 164} 165 166/* 167 * Determine if the mapping at va..(va+len) is valid. 168 */ 169bool 170RemoteGDB::acc(Addr va, size_t len) 171{ 172 if (FullSystem) { 173 Addr last_va; 174 va = truncPage(va); 175 last_va = roundPage(va + len); 176 177 do { 178 if (virtvalid(context, va)) { 179 return true; 180 } 181 va += PageBytes; 182 } while (va < last_va); 183 184 DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va); 185 return true; 186 } else { 187 TlbEntry entry; 188 //Check to make sure the first byte is mapped into the processes address 189 //space. 190 if (context->getProcessPtr()->pTable->lookup(va, entry)) 191 return true; 192 return false; 193 } 194} 195 196/* 197 * Translate the kernel debugger register format into the GDB register 198 * format. 199 */ 200void 201RemoteGDB::getregs() 202{ 203 DPRINTF(GDBAcc, "getregs in remotegdb \n"); 204 205 memset(gdbregs.regs, 0, gdbregs.bytes()); 206 207 // R0-R15 supervisor mode 208 // arm registers are 32 bits wide, gdb registers are 64 bits wide 209 // two arm registers are packed into one gdb register (little endian) 210 gdbregs.regs[REG_R0 + 0] = context->readIntReg(INTREG_R1) << 32 | 211 context->readIntReg(INTREG_R0); 212 gdbregs.regs[REG_R0 + 1] = context->readIntReg(INTREG_R3) << 32 | 213 context->readIntReg(INTREG_R2); 214 gdbregs.regs[REG_R0 + 2] = context->readIntReg(INTREG_R5) << 32 | 215 context->readIntReg(INTREG_R4); 216 gdbregs.regs[REG_R0 + 3] = context->readIntReg(INTREG_R7) << 32 | 217 context->readIntReg(INTREG_R6); 218 gdbregs.regs[REG_R0 + 4] = context->readIntReg(INTREG_R9) << 32 | 219 context->readIntReg(INTREG_R8); 220 gdbregs.regs[REG_R0 + 5] = context->readIntReg(INTREG_R11) << 32| 221 context->readIntReg(INTREG_R10); 222 gdbregs.regs[REG_R0 + 6] = context->readIntReg(INTREG_SP) << 32 | 223 context->readIntReg(INTREG_R12); 224 gdbregs.regs[REG_R0 + 7] = context->pcState().pc() << 32 | 225 context->readIntReg(INTREG_LR); 226 227 // CPSR 228 gdbregs.regs[REG_CPSR] = context->readMiscRegNoEffect(MISCREG_CPSR); 229 230 // vfpv3/neon floating point registers (32 double or 64 float) 231 232 gdbregs.regs[REG_F0] = 233 static_cast<uint64_t>(context->readFloatRegBits(0)) << 32 | 234 gdbregs.regs[REG_CPSR]; 235 236 for (int i = 1; i < (NumFloatArchRegs>>1); ++i) { 237 gdbregs.regs[i + REG_F0] = 238 static_cast<uint64_t>(context->readFloatRegBits(2*i)) << 32 | 239 context->readFloatRegBits(2*i-1); 240 } 241 242 // FPSCR 243 gdbregs.regs[REG_FPSCR] = 244 static_cast<uint64_t>(context->readMiscRegNoEffect(MISCREG_FPSCR)) << 32 | 245 context->readFloatRegBits(NumFloatArchRegs - 1); 246} 247 248/* 249 * Translate the GDB register format into the kernel debugger register 250 * format. 251 */ 252void 253RemoteGDB::setregs() 254{ 255 256 DPRINTF(GDBAcc, "setregs in remotegdb \n"); 257 258 // R0-R15 supervisor mode 259 // arm registers are 32 bits wide, gdb registers are 64 bits wide 260 // two arm registers are packed into one gdb register (little endian) 261 context->setIntReg(INTREG_R0 , bits(gdbregs.regs[REG_R0 + 0], 31, 0)); 262 context->setIntReg(INTREG_R1 , bits(gdbregs.regs[REG_R0 + 0], 63, 32)); 263 context->setIntReg(INTREG_R2 , bits(gdbregs.regs[REG_R0 + 1], 31, 0)); 264 context->setIntReg(INTREG_R3 , bits(gdbregs.regs[REG_R0 + 1], 63, 32)); 265 context->setIntReg(INTREG_R4 , bits(gdbregs.regs[REG_R0 + 2], 31, 0)); 266 context->setIntReg(INTREG_R5 , bits(gdbregs.regs[REG_R0 + 2], 63, 32)); 267 context->setIntReg(INTREG_R6 , bits(gdbregs.regs[REG_R0 + 3], 31, 0)); 268 context->setIntReg(INTREG_R7 , bits(gdbregs.regs[REG_R0 + 3], 63, 32)); 269 context->setIntReg(INTREG_R8 , bits(gdbregs.regs[REG_R0 + 4], 31, 0)); 270 context->setIntReg(INTREG_R9 , bits(gdbregs.regs[REG_R0 + 4], 63, 32)); 271 context->setIntReg(INTREG_R10, bits(gdbregs.regs[REG_R0 + 5], 31, 0)); 272 context->setIntReg(INTREG_R11, bits(gdbregs.regs[REG_R0 + 5], 63, 32)); 273 context->setIntReg(INTREG_R12, bits(gdbregs.regs[REG_R0 + 6], 31, 0)); 274 context->setIntReg(INTREG_SP , bits(gdbregs.regs[REG_R0 + 6], 63, 32)); 275 context->setIntReg(INTREG_LR , bits(gdbregs.regs[REG_R0 + 7], 31, 0)); 276 context->pcState(bits(gdbregs.regs[REG_R0 + 7], 63, 32)); 277 278 //CPSR 279 context->setMiscRegNoEffect(MISCREG_CPSR, gdbregs.regs[REG_CPSR]); 280 281 //vfpv3/neon floating point registers (32 double or 64 float) 282 context->setFloatRegBits(0, gdbregs.regs[REG_F0]>>32); 283 284 for (int i = 1; i < NumFloatArchRegs; ++i) { 285 if(i%2){ 286 int j = (i+1)/2; 287 context->setFloatRegBits(i, bits(gdbregs.regs[j + REG_F0], 31, 0)); 288 } 289 else{ 290 int j = i/2; 291 context->setFloatRegBits(i, gdbregs.regs[j + REG_F0]>>32); 292 } 293 } 294 295 //FPSCR 296 context->setMiscRegNoEffect(MISCREG_FPSCR, gdbregs.regs[REG_FPSCR]>>32); 297} 298 299void 300RemoteGDB::clearSingleStep() 301{ 302 DPRINTF(GDBMisc, "clearSingleStep bt_addr=%#x nt_addr=%#x\n", 303 takenBkpt, notTakenBkpt); 304 305 if (takenBkpt != 0) 306 clearTempBreakpoint(takenBkpt); 307 308 if (notTakenBkpt != 0) 309 clearTempBreakpoint(notTakenBkpt); 310} 311 312void 313RemoteGDB::setSingleStep() 314{ 315 PCState pc = context->pcState(); 316 PCState bpc; 317 bool set_bt = false; 318 319 // User was stopped at pc, e.g. the instruction at pc was not 320 // executed. 321 MachInst inst = read<MachInst>(pc.pc()); 322 StaticInstPtr si = context->getDecoderPtr()->decode(inst, pc.pc()); 323 if (si->hasBranchTarget(pc, context, bpc)) { 324 // Don't bother setting a breakpoint on the taken branch if it 325 // is the same as the next pc 326 if (bpc.pc() != pc.npc()) 327 set_bt = true; 328 } 329 330 DPRINTF(GDBMisc, "setSingleStep bt_addr=%#x nt_addr=%#x\n", 331 takenBkpt, notTakenBkpt); 332 333 setTempBreakpoint(notTakenBkpt = pc.npc()); 334 335 if (set_bt) 336 setTempBreakpoint(takenBkpt = bpc.pc()); 337} 338 339// Write bytes to kernel address space for debugger. 340bool 341RemoteGDB::write(Addr vaddr, size_t size, const char *data) 342{ 343 return BaseRemoteGDB::write(vaddr, size, data); 344} 345 346