remote_gdb.cc revision 8229
12686Sksewell@umich.edu/* 22100SN/A * Copyright (c) 2010 ARM Limited 35254Sksewell@umich.edu * All rights reserved 45254Sksewell@umich.edu * 55254Sksewell@umich.edu * The license below extends only to copyright in the software and shall 65254Sksewell@umich.edu * not be construed as granting a license to any other intellectual 75254Sksewell@umich.edu * property including but not limited to intellectual property relating 85254Sksewell@umich.edu * to a hardware implementation of the functionality of the software 95254Sksewell@umich.edu * licensed hereunder. You may use the software subject to the license 105254Sksewell@umich.edu * terms below provided that you ensure that this notice is replicated 115254Sksewell@umich.edu * unmodified and in its entirety in all distributions of the software, 125254Sksewell@umich.edu * modified or unmodified, in source code or in binary form. 135254Sksewell@umich.edu * 145254Sksewell@umich.edu * Copyright (c) 2002-2005 The Regents of The University of Michigan 155254Sksewell@umich.edu * All rights reserved. 165254Sksewell@umich.edu * 175254Sksewell@umich.edu * Redistribution and use in source and binary forms, with or without 185254Sksewell@umich.edu * modification, are permitted provided that the following conditions are 195254Sksewell@umich.edu * met: redistributions of source code must retain the above copyright 205254Sksewell@umich.edu * notice, this list of conditions and the following disclaimer; 215254Sksewell@umich.edu * redistributions in binary form must reproduce the above copyright 225254Sksewell@umich.edu * notice, this list of conditions and the following disclaimer in the 235254Sksewell@umich.edu * documentation and/or other materials provided with the distribution; 245254Sksewell@umich.edu * neither the name of the copyright holders nor the names of its 255254Sksewell@umich.edu * contributors may be used to endorse or promote products derived from 265254Sksewell@umich.edu * this software without specific prior written permission. 275254Sksewell@umich.edu * 285254Sksewell@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 295254Sksewell@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 305254Sksewell@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 315254Sksewell@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322706Sksewell@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332022SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 342022SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 352043SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 362024SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 372024SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382043SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 392686Sksewell@umich.edu * 404661Sksewell@umich.edu * Authors: Nathan Binkert 412022SN/A * William Wang 422083SN/A */ 432686Sksewell@umich.edu 442101SN/A/* 452043SN/A * Copyright (c) 1990, 1993 462043SN/A * The Regents of the University of California. All rights reserved. 472101SN/A * 482101SN/A * This software was developed by the Computer Systems Engineering group 496384Sgblack@eecs.umich.edu * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 506384Sgblack@eecs.umich.edu * contributed to Berkeley. 516384Sgblack@eecs.umich.edu * 526384Sgblack@eecs.umich.edu * All advertising materials mentioning features or use of this software 536384Sgblack@eecs.umich.edu * must display the following acknowledgement: 546384Sgblack@eecs.umich.edu * This product includes software developed by the University of 552101SN/A * California, Lawrence Berkeley Laboratories. 562101SN/A * 572101SN/A * Redistribution and use in source and binary forms, with or without 582046SN/A * modification, are permitted provided that the following conditions 592686Sksewell@umich.edu * are met: 602686Sksewell@umich.edu * 1. Redistributions of source code must retain the above copyright 612686Sksewell@umich.edu * notice, this list of conditions and the following disclaimer. 622470SN/A * 2. Redistributions in binary form must reproduce the above copyright 632686Sksewell@umich.edu * notice, this list of conditions and the following disclaimer in the 644661Sksewell@umich.edu * documentation and/or other materials provided with the distribution. 655222Sksewell@umich.edu * 3. All advertising materials mentioning features or use of this software 665222Sksewell@umich.edu * must display the following acknowledgement: 672686Sksewell@umich.edu * This product includes software developed by the University of 682686Sksewell@umich.edu * California, Berkeley and its contributors. 692470SN/A * 4. Neither the name of the University nor the names of its contributors 702241SN/A * may be used to endorse or promote products derived from this software 712101SN/A * without specific prior written permission. 722495SN/A * 732495SN/A * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 742495SN/A * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 752101SN/A * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 766384Sgblack@eecs.umich.edu * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 776384Sgblack@eecs.umich.edu * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 786384Sgblack@eecs.umich.edu * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 796384Sgblack@eecs.umich.edu * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 806384Sgblack@eecs.umich.edu * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 812495SN/A * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 822101SN/A * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 832101SN/A * SUCH DAMAGE. 842495SN/A * 852495SN/A * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94 862495SN/A */ 872495SN/A 882495SN/A/*- 892495SN/A * Copyright (c) 2001 The NetBSD Foundation, Inc. 902495SN/A * All rights reserved. 912495SN/A * 922495SN/A * This code is derived from software contributed to The NetBSD Foundation 932495SN/A * by Jason R. Thorpe. 942495SN/A * 952495SN/A * Redistribution and use in source and binary forms, with or without 962495SN/A * modification, are permitted provided that the following conditions 972101SN/A * are met: 982101SN/A * 1. Redistributions of source code must retain the above copyright 992101SN/A * notice, this list of conditions and the following disclaimer. 1002101SN/A * 2. Redistributions in binary form must reproduce the above copyright 1012101SN/A * notice, this list of conditions and the following disclaimer in the 1022101SN/A * documentation and/or other materials provided with the distribution. 1036384Sgblack@eecs.umich.edu * 3. All advertising materials mentioning features or use of this software 1046384Sgblack@eecs.umich.edu * must display the following acknowledgement: 1056384Sgblack@eecs.umich.edu * This product includes software developed by the NetBSD 1066384Sgblack@eecs.umich.edu * Foundation, Inc. and its contributors. 1076384Sgblack@eecs.umich.edu * 4. Neither the name of The NetBSD Foundation nor the names of its 1086384Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived 1092101SN/A * from this software without specific prior written permission. 1102101SN/A * 1112495SN/A * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 1122495SN/A * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 1132495SN/A * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 1142495SN/A * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 1152495SN/A * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 1166384Sgblack@eecs.umich.edu * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 1176384Sgblack@eecs.umich.edu * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 1186384Sgblack@eecs.umich.edu * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 1196384Sgblack@eecs.umich.edu * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 1206384Sgblack@eecs.umich.edu * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 1212495SN/A * POSSIBILITY OF SUCH DAMAGE. 1226384Sgblack@eecs.umich.edu */ 1232495SN/A 1242495SN/A/* 1252043SN/A * $NetBSD: kgdb_stub.c,v 1.8 2001/07/07 22:58:00 wdk Exp $ 1262043SN/A * 1272025SN/A * Taken from NetBSD 1282043SN/A * 1292686Sksewell@umich.edu * "Stub" to allow remote cpu to debug over a serial line using gdb. 1302686Sksewell@umich.edu */ 1312123SN/A 1322101SN/A#include <sys/signal.h> 1336376Sgblack@eecs.umich.edu#include <unistd.h> 1346376Sgblack@eecs.umich.edu 1356376Sgblack@eecs.umich.edu#include <string> 1367792Sgblack@eecs.umich.edu 1376376Sgblack@eecs.umich.edu#include "config/full_system.hh" 1386376Sgblack@eecs.umich.edu#if FULL_SYSTEM 1396376Sgblack@eecs.umich.edu#include "arch/arm/vtophys.hh" 1406376Sgblack@eecs.umich.edu#endif 1416376Sgblack@eecs.umich.edu 1426376Sgblack@eecs.umich.edu#include "arch/arm/pagetable.hh" 1436376Sgblack@eecs.umich.edu#include "arch/arm/registers.hh" 1447792Sgblack@eecs.umich.edu#include "arch/arm/remote_gdb.hh" 1456376Sgblack@eecs.umich.edu#include "arch/arm/utility.hh" 1466376Sgblack@eecs.umich.edu#include "arch/arm/vtophys.hh" 1476376Sgblack@eecs.umich.edu#include "base/intmath.hh" 1486376Sgblack@eecs.umich.edu#include "base/remote_gdb.hh" 1492101SN/A#include "base/socket.hh" 1502042SN/A#include "base/trace.hh" 1512101SN/A#include "cpu/static_inst.hh" 1527720Sgblack@eecs.umich.edu#include "cpu/thread_context.hh" 1537792Sgblack@eecs.umich.edu#include "cpu/thread_state.hh" 1547792Sgblack@eecs.umich.edu#include "mem/page_table.hh" 1557720Sgblack@eecs.umich.edu#include "mem/physical.hh" 1567720Sgblack@eecs.umich.edu#include "mem/port.hh" 1577792Sgblack@eecs.umich.edu#include "sim/system.hh" 1587792Sgblack@eecs.umich.edu 1597720Sgblack@eecs.umich.eduusing namespace std; 1602101SN/Ausing namespace ArmISA; 1612101SN/A 1622042SN/ARemoteGDB::RemoteGDB(System *_system, ThreadContext *tc) 1632101SN/A : BaseRemoteGDB(_system, tc, NUMREGS) 1642686Sksewell@umich.edu{ 1652686Sksewell@umich.edu} 1665222Sksewell@umich.edu 1676384Sgblack@eecs.umich.edu/* 1685222Sksewell@umich.edu * Determine if the mapping at va..(va+len) is valid. 1692965Sksewell@umich.edu */ 1706037Sksewell@umich.edubool 1715222Sksewell@umich.eduRemoteGDB::acc(Addr va, size_t len) 1722686Sksewell@umich.edu{ 1735222Sksewell@umich.edu#if FULL_SYSTEM 1742101SN/A Addr last_va; 1752083SN/A va = truncPage(va); 1762043SN/A last_va = roundPage(va + len); 1772025SN/A 1782043SN/A do { 1796384Sgblack@eecs.umich.edu if (virtvalid(context, va)) { 1806384Sgblack@eecs.umich.edu return true; 1814661Sksewell@umich.edu } 1826384Sgblack@eecs.umich.edu va += PageBytes; 1836384Sgblack@eecs.umich.edu } while (va < last_va); 1844661Sksewell@umich.edu 1852083SN/A DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va); 1862025SN/A return true; 1872043SN/A#else 1884661Sksewell@umich.edu TlbEntry entry; 1895222Sksewell@umich.edu //Check to make sure the first byte is mapped into the processes address 1905222Sksewell@umich.edu //space. 1914661Sksewell@umich.edu if (context->getProcessPtr()->pTable->lookup(va, entry)) 1924661Sksewell@umich.edu return true; 1932686Sksewell@umich.edu return false; 1946384Sgblack@eecs.umich.edu#endif 1956384Sgblack@eecs.umich.edu} 1966384Sgblack@eecs.umich.edu 1976384Sgblack@eecs.umich.edu/* 1986384Sgblack@eecs.umich.edu * Translate the kernel debugger register format into the GDB register 1995222Sksewell@umich.edu * format. 2005222Sksewell@umich.edu */ 2016384Sgblack@eecs.umich.eduvoid 2026384Sgblack@eecs.umich.eduRemoteGDB::getregs() 2036384Sgblack@eecs.umich.edu{ 2046384Sgblack@eecs.umich.edu DPRINTF(GDBAcc, "getregs in remotegdb \n"); 2056384Sgblack@eecs.umich.edu 2065222Sksewell@umich.edu memset(gdbregs.regs, 0, gdbregs.bytes()); 2072101SN/A 2082084SN/A // R0-R15 supervisor mode 2092025SN/A // arm registers are 32 bits wide, gdb registers are 64 bits wide 2102495SN/A // two arm registers are packed into one gdb register (little endian) 2112495SN/A gdbregs.regs[REG_R0 + 0] = context->readIntReg(INTREG_R1) << 32 | 2122495SN/A context->readIntReg(INTREG_R0); 2136384Sgblack@eecs.umich.edu gdbregs.regs[REG_R0 + 1] = context->readIntReg(INTREG_R3) << 32 | 2146384Sgblack@eecs.umich.edu context->readIntReg(INTREG_R2); 2156384Sgblack@eecs.umich.edu gdbregs.regs[REG_R0 + 2] = context->readIntReg(INTREG_R5) << 32 | 2166384Sgblack@eecs.umich.edu context->readIntReg(INTREG_R4); 2176384Sgblack@eecs.umich.edu gdbregs.regs[REG_R0 + 3] = context->readIntReg(INTREG_R7) << 32 | 2186384Sgblack@eecs.umich.edu context->readIntReg(INTREG_R6); 2196384Sgblack@eecs.umich.edu gdbregs.regs[REG_R0 + 4] = context->readIntReg(INTREG_R9) << 32 | 2206384Sgblack@eecs.umich.edu context->readIntReg(INTREG_R8); 2216384Sgblack@eecs.umich.edu gdbregs.regs[REG_R0 + 5] = context->readIntReg(INTREG_R11) << 32| 2225222Sksewell@umich.edu context->readIntReg(INTREG_R10); 2236384Sgblack@eecs.umich.edu gdbregs.regs[REG_R0 + 6] = context->readIntReg(INTREG_SP) << 32 | 2246384Sgblack@eecs.umich.edu context->readIntReg(INTREG_R12); 2256384Sgblack@eecs.umich.edu gdbregs.regs[REG_R0 + 7] = context->pcState().pc() << 32 | 2266384Sgblack@eecs.umich.edu context->readIntReg(INTREG_LR); 2275222Sksewell@umich.edu 2286384Sgblack@eecs.umich.edu // CPSR 2296384Sgblack@eecs.umich.edu gdbregs.regs[REG_CPSR] = context->readMiscRegNoEffect(MISCREG_CPSR); 2306384Sgblack@eecs.umich.edu 2316384Sgblack@eecs.umich.edu // vfpv3/neon floating point registers (32 double or 64 float) 2326384Sgblack@eecs.umich.edu 2335222Sksewell@umich.edu gdbregs.regs[REG_F0] = 2346384Sgblack@eecs.umich.edu static_cast<uint64_t>(context->readFloatRegBits(0)) << 32 | 2352495SN/A gdbregs.regs[REG_CPSR]; 2365222Sksewell@umich.edu 2376384Sgblack@eecs.umich.edu for (int i = 1; i < (NumFloatArchRegs>>1); ++i) { 2386384Sgblack@eecs.umich.edu gdbregs.regs[i + REG_F0] = 2396384Sgblack@eecs.umich.edu static_cast<uint64_t>(context->readFloatRegBits(2*i)) << 32 | 2406384Sgblack@eecs.umich.edu context->readFloatRegBits(2*i-1); 2416384Sgblack@eecs.umich.edu } 2425222Sksewell@umich.edu 2436384Sgblack@eecs.umich.edu // FPSCR 2446384Sgblack@eecs.umich.edu gdbregs.regs[REG_FPSCR] = 2455222Sksewell@umich.edu static_cast<uint64_t>(context->readMiscRegNoEffect(MISCREG_FPSCR)) << 32 | 2466384Sgblack@eecs.umich.edu context->readFloatRegBits(NumFloatArchRegs - 1); 2475222Sksewell@umich.edu} 2486384Sgblack@eecs.umich.edu 2496384Sgblack@eecs.umich.edu/* 2506384Sgblack@eecs.umich.edu * Translate the GDB register format into the kernel debugger register 2515222Sksewell@umich.edu * format. 2526384Sgblack@eecs.umich.edu */ 2536384Sgblack@eecs.umich.eduvoid 2546384Sgblack@eecs.umich.eduRemoteGDB::setregs() 2556384Sgblack@eecs.umich.edu{ 2566384Sgblack@eecs.umich.edu 2576384Sgblack@eecs.umich.edu DPRINTF(GDBAcc, "setregs in remotegdb \n"); 2582495SN/A 2592101SN/A // R0-R15 supervisor mode 2602043SN/A // arm registers are 32 bits wide, gdb registers are 64 bits wide 2612025SN/A // two arm registers are packed into one gdb register (little endian) 2622495SN/A context->setIntReg(INTREG_R0 , bits(gdbregs.regs[REG_R0 + 0], 31, 0)); 2632495SN/A context->setIntReg(INTREG_R1 , bits(gdbregs.regs[REG_R0 + 0], 63, 32)); 2642495SN/A context->setIntReg(INTREG_R2 , bits(gdbregs.regs[REG_R0 + 1], 31, 0)); 2656384Sgblack@eecs.umich.edu context->setIntReg(INTREG_R3 , bits(gdbregs.regs[REG_R0 + 1], 63, 32)); 2666384Sgblack@eecs.umich.edu context->setIntReg(INTREG_R4 , bits(gdbregs.regs[REG_R0 + 2], 31, 0)); 2672495SN/A context->setIntReg(INTREG_R5 , bits(gdbregs.regs[REG_R0 + 2], 63, 32)); 2682101SN/A context->setIntReg(INTREG_R6 , bits(gdbregs.regs[REG_R0 + 3], 31, 0)); 2692084SN/A context->setIntReg(INTREG_R7 , bits(gdbregs.regs[REG_R0 + 3], 63, 32)); 2702024SN/A context->setIntReg(INTREG_R8 , bits(gdbregs.regs[REG_R0 + 4], 31, 0)); 2712043SN/A context->setIntReg(INTREG_R9 , bits(gdbregs.regs[REG_R0 + 4], 63, 32)); 2722239SN/A context->setIntReg(INTREG_R10, bits(gdbregs.regs[REG_R0 + 5], 31, 0)); 2732239SN/A context->setIntReg(INTREG_R11, bits(gdbregs.regs[REG_R0 + 5], 63, 32)); 2742101SN/A context->setIntReg(INTREG_R12, bits(gdbregs.regs[REG_R0 + 6], 31, 0)); 2752101SN/A context->setIntReg(INTREG_SP , bits(gdbregs.regs[REG_R0 + 6], 63, 32)); 2765222Sksewell@umich.edu context->setIntReg(INTREG_LR , bits(gdbregs.regs[REG_R0 + 7], 31, 0)); 2772101SN/A context->pcState(bits(gdbregs.regs[REG_R0 + 7], 63, 32)); 2782101SN/A 2792101SN/A //CPSR 2802043SN/A context->setMiscRegNoEffect(MISCREG_CPSR, gdbregs.regs[REG_CPSR]); 2812043SN/A 2822025SN/A //vfpv3/neon floating point registers (32 double or 64 float) 2832043SN/A context->setFloatRegBits(0, gdbregs.regs[REG_F0]>>32); 2842043SN/A 2852101SN/A for (int i = 1; i < NumFloatArchRegs; ++i) { 2862101SN/A if(i%2){ 2872101SN/A int j = (i+1)/2; 2882686Sksewell@umich.edu context->setFloatRegBits(i, bits(gdbregs.regs[j + REG_F0], 31, 0)); 2892686Sksewell@umich.edu } 2902101SN/A else{ 2912043SN/A int j = i/2; 2922025SN/A context->setFloatRegBits(i, gdbregs.regs[j + REG_F0]>>32); 2932043SN/A } 2945222Sksewell@umich.edu } 2955222Sksewell@umich.edu 2966384Sgblack@eecs.umich.edu //FPSCR 2976384Sgblack@eecs.umich.edu context->setMiscRegNoEffect(MISCREG_FPSCR, gdbregs.regs[REG_FPSCR]>>32); 2986384Sgblack@eecs.umich.edu} 2995222Sksewell@umich.edu 3006384Sgblack@eecs.umich.eduvoid 3016384Sgblack@eecs.umich.eduRemoteGDB::clearSingleStep() 3026384Sgblack@eecs.umich.edu{ 3036384Sgblack@eecs.umich.edu DPRINTF(GDBMisc, "clearSingleStep bt_addr=%#x nt_addr=%#x\n", 3046384Sgblack@eecs.umich.edu takenBkpt, notTakenBkpt); 3052101SN/A 3062043SN/A if (takenBkpt != 0) 3072043SN/A clearTempBreakpoint(takenBkpt); 3082043SN/A 3092101SN/A if (notTakenBkpt != 0) 3102686Sksewell@umich.edu clearTempBreakpoint(notTakenBkpt); 3112686Sksewell@umich.edu} 3122686Sksewell@umich.edu 3132686Sksewell@umich.eduvoid 3142686Sksewell@umich.eduRemoteGDB::setSingleStep() 3152686Sksewell@umich.edu{ 3162686Sksewell@umich.edu PCState pc = context->pcState(); 3172101SN/A PCState bpc; 3182043SN/A bool set_bt = false; 3192043SN/A 3202043SN/A // User was stopped at pc, e.g. the instruction at pc was not 3216384Sgblack@eecs.umich.edu // executed. 3226384Sgblack@eecs.umich.edu MachInst inst = read<MachInst>(pc.pc()); 3234661Sksewell@umich.edu StaticInstPtr si(inst, pc.pc()); 3242101SN/A if (si->hasBranchTarget(pc, context, bpc)) { 3252101SN/A // Don't bother setting a breakpoint on the taken branch if it 3262101SN/A // is the same as the next pc 3272043SN/A if (bpc.pc() != pc.npc()) 3282043SN/A set_bt = true; 3292043SN/A } 3302123SN/A 3317792Sgblack@eecs.umich.edu DPRINTF(GDBMisc, "setSingleStep bt_addr=%#x nt_addr=%#x\n", 3327792Sgblack@eecs.umich.edu takenBkpt, notTakenBkpt); 3337792Sgblack@eecs.umich.edu 3342043SN/A setTempBreakpoint(notTakenBkpt = pc.npc()); 3352043SN/A 3362100SN/A if (set_bt) 3372686Sksewell@umich.edu setTempBreakpoint(takenBkpt = bpc.pc()); 3382686Sksewell@umich.edu} 3392686Sksewell@umich.edu 3402686Sksewell@umich.edu// Write bytes to kernel address space for debugger. 3412239SN/Abool 3422686Sksewell@umich.eduRemoteGDB::write(Addr vaddr, size_t size, const char *data) 3432686Sksewell@umich.edu{ 3442043SN/A return BaseRemoteGDB::write(vaddr, size, data); 3452084SN/A} 3462024SN/A 3472101SN/A