remote_gdb.cc revision 7720
17259Sgblack@eecs.umich.edu/*
211574SCurtis.Dunham@arm.com * Copyright (c) 2002-2005 The Regents of The University of Michigan
37259Sgblack@eecs.umich.edu * All rights reserved.
47259Sgblack@eecs.umich.edu *
57259Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without
67259Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are
77259Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright
87259Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer;
97259Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright
107259Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the
117259Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution;
127259Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its
137259Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from
147259Sgblack@eecs.umich.edu * this software without specific prior written permission.
157259Sgblack@eecs.umich.edu *
167259Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
177259Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
187259Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
197259Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
207259Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
217259Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
227259Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
237259Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
247259Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
257259Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
267259Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
277259Sgblack@eecs.umich.edu *
287259Sgblack@eecs.umich.edu * Authors: Nathan Binkert
297259Sgblack@eecs.umich.edu */
307259Sgblack@eecs.umich.edu
317259Sgblack@eecs.umich.edu/*
327259Sgblack@eecs.umich.edu * Copyright (c) 1990, 1993
337259Sgblack@eecs.umich.edu *      The Regents of the University of California.  All rights reserved.
347259Sgblack@eecs.umich.edu *
357259Sgblack@eecs.umich.edu * This software was developed by the Computer Systems Engineering group
367259Sgblack@eecs.umich.edu * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
377259Sgblack@eecs.umich.edu * contributed to Berkeley.
387405SAli.Saidi@ARM.com *
3910037SARM gem5 Developers * All advertising materials mentioning features or use of this software
407259Sgblack@eecs.umich.edu * must display the following acknowledgement:
417259Sgblack@eecs.umich.edu *      This product includes software developed by the University of
427405SAli.Saidi@ARM.com *      California, Lawrence Berkeley Laboratories.
437259Sgblack@eecs.umich.edu *
447404SAli.Saidi@ARM.com * Redistribution and use in source and binary forms, with or without
4510037SARM gem5 Developers * modification, are permitted provided that the following conditions
4610828SGiacomo.Gabrielli@arm.com * are met:
477259Sgblack@eecs.umich.edu * 1. Redistributions of source code must retain the above copyright
487259Sgblack@eecs.umich.edu *    notice, this list of conditions and the following disclaimer.
497259Sgblack@eecs.umich.edu * 2. Redistributions in binary form must reproduce the above copyright
507259Sgblack@eecs.umich.edu *    notice, this list of conditions and the following disclaimer in the
517259Sgblack@eecs.umich.edu *    documentation and/or other materials provided with the distribution.
528868SMatt.Horsnell@arm.com * 3. All advertising materials mentioning features or use of this software
538868SMatt.Horsnell@arm.com *    must display the following acknowledgement:
548868SMatt.Horsnell@arm.com *      This product includes software developed by the University of
558868SMatt.Horsnell@arm.com *      California, Berkeley and its contributors.
5610037SARM gem5 Developers * 4. Neither the name of the University nor the names of its contributors
578868SMatt.Horsnell@arm.com *    may be used to endorse or promote products derived from this software
5810037SARM gem5 Developers *    without specific prior written permission.
598868SMatt.Horsnell@arm.com *
6010037SARM gem5 Developers * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
6110037SARM gem5 Developers * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
6210037SARM gem5 Developers * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
6310037SARM gem5 Developers * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
6410037SARM gem5 Developers * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
6510037SARM gem5 Developers * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
6610037SARM gem5 Developers * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
678868SMatt.Horsnell@arm.com * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
6810037SARM gem5 Developers * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
6910037SARM gem5 Developers * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
7010037SARM gem5 Developers * SUCH DAMAGE.
7110037SARM gem5 Developers *
7210037SARM gem5 Developers *      @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
7310037SARM gem5 Developers */
7410037SARM gem5 Developers
7510037SARM gem5 Developers/*-
7610037SARM gem5 Developers * Copyright (c) 2001 The NetBSD Foundation, Inc.
7710037SARM gem5 Developers * All rights reserved.
7810037SARM gem5 Developers *
799959Schander.sudanthi@arm.com * This code is derived from software contributed to The NetBSD Foundation
8010037SARM gem5 Developers * by Jason R. Thorpe.
819959Schander.sudanthi@arm.com *
829959Schander.sudanthi@arm.com * Redistribution and use in source and binary forms, with or without
839959Schander.sudanthi@arm.com * modification, are permitted provided that the following conditions
849959Schander.sudanthi@arm.com * are met:
859959Schander.sudanthi@arm.com * 1. Redistributions of source code must retain the above copyright
869959Schander.sudanthi@arm.com *    notice, this list of conditions and the following disclaimer.
879959Schander.sudanthi@arm.com * 2. Redistributions in binary form must reproduce the above copyright
889959Schander.sudanthi@arm.com *    notice, this list of conditions and the following disclaimer in the
899959Schander.sudanthi@arm.com *    documentation and/or other materials provided with the distribution.
9010037SARM gem5 Developers * 3. All advertising materials mentioning features or use of this software
919959Schander.sudanthi@arm.com *    must display the following acknowledgement:
9210037SARM gem5 Developers *      This product includes software developed by the NetBSD
9310037SARM gem5 Developers *      Foundation, Inc. and its contributors.
9410037SARM gem5 Developers * 4. Neither the name of The NetBSD Foundation nor the names of its
9510037SARM gem5 Developers *    contributors may be used to endorse or promote products derived
9610037SARM gem5 Developers *    from this software without specific prior written permission.
9710037SARM gem5 Developers *
9810037SARM gem5 Developers * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
9910037SARM gem5 Developers * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
10010037SARM gem5 Developers * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
10110037SARM gem5 Developers * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
10210037SARM gem5 Developers * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
1038868SMatt.Horsnell@arm.com * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
10410037SARM gem5 Developers * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
10510037SARM gem5 Developers * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
10610037SARM gem5 Developers * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
10710037SARM gem5 Developers * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
10810037SARM gem5 Developers * POSSIBILITY OF SUCH DAMAGE.
10910037SARM gem5 Developers */
11010037SARM gem5 Developers
11110037SARM gem5 Developers/*
11210037SARM gem5 Developers * $NetBSD: kgdb_stub.c,v 1.8 2001/07/07 22:58:00 wdk Exp $
11310037SARM gem5 Developers *
11410037SARM gem5 Developers * Taken from NetBSD
11510037SARM gem5 Developers *
11610037SARM gem5 Developers * "Stub" to allow remote cpu to debug over a serial line using gdb.
11710037SARM gem5 Developers */
11810037SARM gem5 Developers
1198868SMatt.Horsnell@arm.com#include <sys/signal.h>
12010037SARM gem5 Developers#include <unistd.h>
12110037SARM gem5 Developers
12210037SARM gem5 Developers#include <string>
12310037SARM gem5 Developers
12410037SARM gem5 Developers#include "config/full_system.hh"
1258868SMatt.Horsnell@arm.com#if FULL_SYSTEM
12610037SARM gem5 Developers#include "arch/alpha/vtophys.hh"
12710037SARM gem5 Developers#endif
12810037SARM gem5 Developers
12910037SARM gem5 Developers#include "arch/alpha/kgdb.h"
13010506SAli.Saidi@ARM.com#include "arch/alpha/utility.hh"
13110037SARM gem5 Developers#include "arch/alpha/regredir.hh"
13210506SAli.Saidi@ARM.com#include "arch/alpha/remote_gdb.hh"
13310037SARM gem5 Developers#include "base/intmath.hh"
13410506SAli.Saidi@ARM.com#include "base/remote_gdb.hh"
13510037SARM gem5 Developers#include "base/socket.hh"
13610506SAli.Saidi@ARM.com#include "base/trace.hh"
13710037SARM gem5 Developers#include "cpu/thread_context.hh"
13810506SAli.Saidi@ARM.com#include "cpu/static_inst.hh"
13910037SARM gem5 Developers#include "mem/physical.hh"
14010506SAli.Saidi@ARM.com#include "mem/port.hh"
14110037SARM gem5 Developers#include "sim/system.hh"
14210506SAli.Saidi@ARM.com
14310037SARM gem5 Developersusing namespace std;
14410506SAli.Saidi@ARM.comusing namespace AlphaISA;
14510037SARM gem5 Developers
14610506SAli.Saidi@ARM.comRemoteGDB::RemoteGDB(System *_system, ThreadContext *tc)
14710037SARM gem5 Developers    : BaseRemoteGDB(_system, tc, KGDB_NUMREGS)
14810506SAli.Saidi@ARM.com{
14910037SARM gem5 Developers    memset(gdbregs.regs, 0, gdbregs.bytes());
15010506SAli.Saidi@ARM.com}
15110037SARM gem5 Developers
15210506SAli.Saidi@ARM.com/*
15310037SARM gem5 Developers * Determine if the mapping at va..(va+len) is valid.
15410506SAli.Saidi@ARM.com */
15510037SARM gem5 Developersbool
15610506SAli.Saidi@ARM.comRemoteGDB::acc(Addr va, size_t len)
15710037SARM gem5 Developers{
15810506SAli.Saidi@ARM.com#if !FULL_SYSTEM
15910037SARM gem5 Developers    panic("acc function needs to be rewritten for SE mode\n");
16010037SARM gem5 Developers#else
16110037SARM gem5 Developers    Addr last_va;
16210506SAli.Saidi@ARM.com
16310037SARM gem5 Developers    va = TruncPage(va);
16410506SAli.Saidi@ARM.com    last_va = RoundPage(va + len);
16510037SARM gem5 Developers
16610506SAli.Saidi@ARM.com    do  {
16710037SARM gem5 Developers        if (IsK0Seg(va)) {
16810506SAli.Saidi@ARM.com            if (va < (K0SegBase + pmem->size())) {
16910037SARM gem5 Developers                DPRINTF(GDBAcc, "acc:   Mapping is valid  K0SEG <= "
17010506SAli.Saidi@ARM.com                        "%#x < K0SEG + size\n", va);
17110037SARM gem5 Developers                return true;
17210506SAli.Saidi@ARM.com            } else {
17310037SARM gem5 Developers                DPRINTF(GDBAcc, "acc:   Mapping invalid %#x > K0SEG + size\n",
17410506SAli.Saidi@ARM.com                        va);
17510037SARM gem5 Developers                return false;
17610506SAli.Saidi@ARM.com            }
17710037SARM gem5 Developers        }
17810506SAli.Saidi@ARM.com
17910037SARM gem5 Developers        /**
18010506SAli.Saidi@ARM.com         * This code says that all accesses to palcode (instruction
18110037SARM gem5 Developers         * and data) are valid since there isn't a va->pa mapping
18210506SAli.Saidi@ARM.com         * because palcode is accessed physically. At some point this
18310037SARM gem5 Developers         * should probably be cleaned up but there is no easy way to
18410506SAli.Saidi@ARM.com         * do it.
18510037SARM gem5 Developers         */
18610506SAli.Saidi@ARM.com
18710037SARM gem5 Developers        if (PcPAL(va) || va < 0x10000)
18810506SAli.Saidi@ARM.com            return true;
18910037SARM gem5 Developers
19010506SAli.Saidi@ARM.com        Addr ptbr = context->readMiscRegNoEffect(IPR_PALtemp20);
19110037SARM gem5 Developers        PageTableEntry pte =
19210037SARM gem5 Developers            kernel_pte_lookup(context->getPhysPort(), ptbr, va);
19310037SARM gem5 Developers        if (!pte.valid()) {
19410506SAli.Saidi@ARM.com            DPRINTF(GDBAcc, "acc:   %#x pte is invalid\n", va);
19510037SARM gem5 Developers            return false;
19610506SAli.Saidi@ARM.com        }
19710037SARM gem5 Developers        va += PageBytes;
19810506SAli.Saidi@ARM.com    } while (va < last_va);
19910037SARM gem5 Developers
20010506SAli.Saidi@ARM.com    DPRINTF(GDBAcc, "acc:   %#x mapping is valid\n", va);
20110037SARM gem5 Developers    return true;
20210506SAli.Saidi@ARM.com#endif
20310037SARM gem5 Developers}
20410506SAli.Saidi@ARM.com
20510037SARM gem5 Developers/*
20610506SAli.Saidi@ARM.com * Translate the kernel debugger register format into the GDB register
20710037SARM gem5 Developers * format.
20810506SAli.Saidi@ARM.com */
20910037SARM gem5 Developersvoid
21010506SAli.Saidi@ARM.comRemoteGDB::getregs()
21110037SARM gem5 Developers{
21210506SAli.Saidi@ARM.com    memset(gdbregs.regs, 0, gdbregs.bytes());
21310037SARM gem5 Developers
21410506SAli.Saidi@ARM.com    gdbregs.regs[KGDB_REG_PC] = context->pcState().pc();
21510037SARM gem5 Developers
21610506SAli.Saidi@ARM.com    // @todo: Currently this is very Alpha specific.
21710037SARM gem5 Developers    if (PcPAL(gdbregs.regs[KGDB_REG_PC])) {
21810506SAli.Saidi@ARM.com        for (int i = 0; i < NumIntArchRegs; ++i) {
21910037SARM gem5 Developers            gdbregs.regs[i] = context->readIntReg(reg_redir[i]);
22010506SAli.Saidi@ARM.com        }
22110037SARM gem5 Developers    } else {
22210506SAli.Saidi@ARM.com        for (int i = 0; i < NumIntArchRegs; ++i) {
22310037SARM gem5 Developers            gdbregs.regs[i] = context->readIntReg(i);
22410506SAli.Saidi@ARM.com        }
22510037SARM gem5 Developers    }
22610506SAli.Saidi@ARM.com
22710037SARM gem5 Developers#ifdef KGDB_FP_REGS
22810506SAli.Saidi@ARM.com    for (int i = 0; i < NumFloatArchRegs; ++i) {
22910037SARM gem5 Developers        gdbregs.regs[i + KGDB_REG_F0] = context->readFloatRegBits(i);
23010506SAli.Saidi@ARM.com    }
23110037SARM gem5 Developers#endif
23210506SAli.Saidi@ARM.com}
23310037SARM gem5 Developers
23410506SAli.Saidi@ARM.com/*
23510037SARM gem5 Developers * Translate the GDB register format into the kernel debugger register
23610506SAli.Saidi@ARM.com * format.
23710037SARM gem5 Developers */
23810506SAli.Saidi@ARM.comvoid
23910037SARM gem5 DevelopersRemoteGDB::setregs()
24010506SAli.Saidi@ARM.com{
24110037SARM gem5 Developers    // @todo: Currently this is very Alpha specific.
24210506SAli.Saidi@ARM.com    if (PcPAL(gdbregs.regs[KGDB_REG_PC])) {
24310037SARM gem5 Developers        for (int i = 0; i < NumIntArchRegs; ++i) {
24410506SAli.Saidi@ARM.com            context->setIntReg(reg_redir[i], gdbregs.regs[i]);
24510037SARM gem5 Developers        }
24610506SAli.Saidi@ARM.com    } else {
24710037SARM gem5 Developers        for (int i = 0; i < NumIntArchRegs; ++i) {
24810506SAli.Saidi@ARM.com            context->setIntReg(i, gdbregs.regs[i]);
24910037SARM gem5 Developers        }
25010506SAli.Saidi@ARM.com    }
25110037SARM gem5 Developers
25210506SAli.Saidi@ARM.com#ifdef KGDB_FP_REGS
25310037SARM gem5 Developers    for (int i = 0; i < NumFloatArchRegs; ++i) {
25410506SAli.Saidi@ARM.com        context->setFloatRegBits(i, gdbregs.regs[i + KGDB_REG_F0]);
25510037SARM gem5 Developers    }
25610506SAli.Saidi@ARM.com#endif
25710037SARM gem5 Developers    context->pcState(gdbregs.regs[KGDB_REG_PC]);
25810506SAli.Saidi@ARM.com}
25910037SARM gem5 Developers
26010506SAli.Saidi@ARM.comvoid
26110037SARM gem5 DevelopersRemoteGDB::clearSingleStep()
26210506SAli.Saidi@ARM.com{
26310037SARM gem5 Developers    DPRINTF(GDBMisc, "clearSingleStep bt_addr=%#x nt_addr=%#x\n",
26410506SAli.Saidi@ARM.com            takenBkpt, notTakenBkpt);
26510037SARM gem5 Developers
26610506SAli.Saidi@ARM.com    if (takenBkpt != 0)
26710037SARM gem5 Developers        clearTempBreakpoint(takenBkpt);
26810506SAli.Saidi@ARM.com
26910037SARM gem5 Developers    if (notTakenBkpt != 0)
27010506SAli.Saidi@ARM.com        clearTempBreakpoint(notTakenBkpt);
27110037SARM gem5 Developers}
27210506SAli.Saidi@ARM.com
27310037SARM gem5 Developersvoid
27410506SAli.Saidi@ARM.comRemoteGDB::setSingleStep()
27510037SARM gem5 Developers{
27610506SAli.Saidi@ARM.com    PCState pc = context->pcState();
27710037SARM gem5 Developers    PCState bpc;
27810506SAli.Saidi@ARM.com    bool set_bt = false;
27910037SARM gem5 Developers
28010506SAli.Saidi@ARM.com    // User was stopped at pc, e.g. the instruction at pc was not
28110037SARM gem5 Developers    // executed.
28210506SAli.Saidi@ARM.com    MachInst inst = read<MachInst>(pc.pc());
28310037SARM gem5 Developers    StaticInstPtr si(inst, pc.pc());
28410506SAli.Saidi@ARM.com    if (si->hasBranchTarget(pc, context, bpc)) {
28510037SARM gem5 Developers        // Don't bother setting a breakpoint on the taken branch if it
28610506SAli.Saidi@ARM.com        // is the same as the next pc
28710037SARM gem5 Developers        if (bpc.pc() != pc.npc())
28810506SAli.Saidi@ARM.com            set_bt = true;
28910037SARM gem5 Developers    }
29010506SAli.Saidi@ARM.com
29110037SARM gem5 Developers    DPRINTF(GDBMisc, "setSingleStep bt_addr=%#x nt_addr=%#x\n",
29210506SAli.Saidi@ARM.com            takenBkpt, notTakenBkpt);
29310037SARM gem5 Developers
29410037SARM gem5 Developers    setTempBreakpoint(notTakenBkpt = pc.npc());
29510037SARM gem5 Developers
29610506SAli.Saidi@ARM.com    if (set_bt)
29710037SARM gem5 Developers        setTempBreakpoint(takenBkpt = bpc.pc());
29810506SAli.Saidi@ARM.com}
29910037SARM gem5 Developers
30010506SAli.Saidi@ARM.com// Write bytes to kernel address space for debugger.
30110037SARM gem5 Developersbool
30210506SAli.Saidi@ARM.comRemoteGDB::write(Addr vaddr, size_t size, const char *data)
30310037SARM gem5 Developers{
30410506SAli.Saidi@ARM.com    if (BaseRemoteGDB::write(vaddr, size, data)) {
30510037SARM gem5 Developers#ifdef IMB
30610506SAli.Saidi@ARM.com        alpha_pal_imb();
30710037SARM gem5 Developers#endif
30810506SAli.Saidi@ARM.com        return true;
30910037SARM gem5 Developers    } else {
31010506SAli.Saidi@ARM.com        return false;
31110037SARM gem5 Developers    }
31210506SAli.Saidi@ARM.com}
31310037SARM gem5 Developers
31410506SAli.Saidi@ARM.com