remote_gdb.cc revision 13471
11689SN/A/* 29444SAndreas.Sandberg@ARM.com * Copyright 2015 LabWare 39444SAndreas.Sandberg@ARM.com * Copyright 2014 Google Inc. 49444SAndreas.Sandberg@ARM.com * Copyright (c) 2010, 2013, 2016 ARM Limited 59444SAndreas.Sandberg@ARM.com * All rights reserved 69444SAndreas.Sandberg@ARM.com * 79444SAndreas.Sandberg@ARM.com * The license below extends only to copyright in the software and shall 89444SAndreas.Sandberg@ARM.com * not be construed as granting a license to any other intellectual 99444SAndreas.Sandberg@ARM.com * property including but not limited to intellectual property relating 109444SAndreas.Sandberg@ARM.com * to a hardware implementation of the functionality of the software 119444SAndreas.Sandberg@ARM.com * licensed hereunder. You may use the software subject to the license 129444SAndreas.Sandberg@ARM.com * terms below provided that you ensure that this notice is replicated 139444SAndreas.Sandberg@ARM.com * unmodified and in its entirety in all distributions of the software, 142329SN/A * modified or unmodified, in source code or in binary form. 151689SN/A * 161689SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan 171689SN/A * All rights reserved. 181689SN/A * 191689SN/A * Redistribution and use in source and binary forms, with or without 201689SN/A * modification, are permitted provided that the following conditions are 211689SN/A * met: redistributions of source code must retain the above copyright 221689SN/A * notice, this list of conditions and the following disclaimer; 231689SN/A * redistributions in binary form must reproduce the above copyright 241689SN/A * notice, this list of conditions and the following disclaimer in the 251689SN/A * documentation and/or other materials provided with the distribution; 261689SN/A * neither the name of the copyright holders nor the names of its 271689SN/A * contributors may be used to endorse or promote products derived from 281689SN/A * this software without specific prior written permission. 291689SN/A * 301689SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 311689SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 321689SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 331689SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 341689SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 351689SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 361689SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 371689SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 381689SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 392665Ssaidi@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 402665Ssaidi@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 412831Sksewell@umich.edu * 421689SN/A * Authors: Nathan Binkert 431689SN/A * William Wang 449944Smatt.horsnell@ARM.com * Boris Shingarov 459944Smatt.horsnell@ARM.com */ 469944Smatt.horsnell@ARM.com 476221Snate@binkert.org/* 486221Snate@binkert.org * Copyright (c) 1990, 1993 The Regents of the University of California 4913449Sgabeblack@google.com * All rights reserved 501717SN/A * 518232Snate@binkert.org * This software was developed by the Computer Systems Engineering group 528232Snate@binkert.org * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 539954SFaissal.Sleiman@arm.com * contributed to Berkeley. 541060SN/A * 556221Snate@binkert.org * All advertising materials mentioning features or use of this software 562292SN/A * must display the following acknowledgement: 571061SN/A * This product includes software developed by the University of 589954SFaissal.Sleiman@arm.com * California, Lawrence Berkeley Laboratories. 594329Sktlim@umich.edu * 609954SFaissal.Sleiman@arm.com * Redistribution and use in source and binary forms, with or without 619954SFaissal.Sleiman@arm.com * modification, are permitted provided that the following conditions 621060SN/A * are met: 639954SFaissal.Sleiman@arm.com * 1. Redistributions of source code must retain the above copyright 641060SN/A * notice, this list of conditions and the following disclaimer. 659954SFaissal.Sleiman@arm.com * 2. Redistributions in binary form must reproduce the above copyright 662292SN/A * notice, this list of conditions and the following disclaimer in the 672292SN/A * documentation and/or other materials provided with the distribution. 682292SN/A * 3. All advertising materials mentioning features or use of this software 692292SN/A * must display the following acknowledgement: 702292SN/A * This product includes software developed by the University of 712292SN/A * California, Berkeley and its contributors. 722292SN/A * 4. Neither the name of the University nor the names of its contributors 732292SN/A * may be used to endorse or promote products derived from this software 742292SN/A * without specific prior written permission. 752292SN/A * 766221Snate@binkert.org * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 776221Snate@binkert.org * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 782292SN/A * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 792292SN/A * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 802292SN/A * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 812292SN/A * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 824329Sktlim@umich.edu * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 832292SN/A * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 842292SN/A * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 852292SN/A * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 862292SN/A * SUCH DAMAGE. 872292SN/A * 886221Snate@binkert.org * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94 896221Snate@binkert.org */ 902292SN/A 912292SN/A/*- 922292SN/A * Copyright (c) 2001 The NetBSD Foundation, Inc. 932292SN/A * All rights reserved. 944329Sktlim@umich.edu * 952292SN/A * This code is derived from software contributed to The NetBSD Foundation 969954SFaissal.Sleiman@arm.com * by Jason R. Thorpe. 972292SN/A * 982292SN/A * Redistribution and use in source and binary forms, with or without 996221Snate@binkert.org * modification, are permitted provided that the following conditions 1006221Snate@binkert.org * are met: 1012292SN/A * 1. Redistributions of source code must retain the above copyright 1022292SN/A * notice, this list of conditions and the following disclaimer. 10313449Sgabeblack@google.com * 2. Redistributions in binary form must reproduce the above copyright 10413449Sgabeblack@google.com * notice, this list of conditions and the following disclaimer in the 1052292SN/A * documentation and/or other materials provided with the distribution. 10613453Srekai.gonzalezalberquilla@arm.com * 3. All advertising materials mentioning features or use of this software 10713453Srekai.gonzalezalberquilla@arm.com * must display the following acknowledgement: 10813453Srekai.gonzalezalberquilla@arm.com * This product includes software developed by the NetBSD 1091060SN/A * Foundation, Inc. and its contributors. 1109444SAndreas.Sandberg@ARM.com * 4. Neither the name of The NetBSD Foundation nor the names of its 1119444SAndreas.Sandberg@ARM.com * contributors may be used to endorse or promote products derived 1129444SAndreas.Sandberg@ARM.com * from this software without specific prior written permission. 1139444SAndreas.Sandberg@ARM.com * 1149444SAndreas.Sandberg@ARM.com * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 1159444SAndreas.Sandberg@ARM.com * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 1169444SAndreas.Sandberg@ARM.com * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 11713453Srekai.gonzalezalberquilla@arm.com * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 1189444SAndreas.Sandberg@ARM.com * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 1196221Snate@binkert.org * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 1209444SAndreas.Sandberg@ARM.com * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 12113453Srekai.gonzalezalberquilla@arm.com * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 1222292SN/A * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 1239444SAndreas.Sandberg@ARM.com * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 1241060SN/A * POSSIBILITY OF SUCH DAMAGE. 1252292SN/A */ 1262292SN/A 1272292SN/A/* 1282292SN/A * $NetBSD: kgdb_stub.c,v 1.8 2001/07/07 22:58:00 wdk Exp $ 1292292SN/A * 1302292SN/A * Taken from NetBSD 1312292SN/A * 1324329Sktlim@umich.edu * "Stub" to allow remote cpu to debug over a serial line using gdb. 1334329Sktlim@umich.edu */ 1344329Sktlim@umich.edu 1354329Sktlim@umich.edu#include "arch/arm/remote_gdb.hh" 1364329Sktlim@umich.edu 1374329Sktlim@umich.edu#include <sys/signal.h> 1384329Sktlim@umich.edu#include <unistd.h> 1392292SN/A 1406221Snate@binkert.org#include <string> 1412292SN/A 1422292SN/A#include "arch/arm/decoder.hh" 1432292SN/A#include "arch/arm/pagetable.hh" 1442292SN/A#include "arch/arm/registers.hh" 1452292SN/A#include "arch/arm/system.hh" 1462307SN/A#include "arch/arm/utility.hh" 1472307SN/A#include "arch/arm/vtophys.hh" 1489444SAndreas.Sandberg@ARM.com#include "base/chunk_generator.hh" 1492307SN/A#include "base/intmath.hh" 1509444SAndreas.Sandberg@ARM.com#include "base/remote_gdb.hh" 1519444SAndreas.Sandberg@ARM.com#include "base/socket.hh" 1529444SAndreas.Sandberg@ARM.com#include "base/trace.hh" 1532307SN/A#include "cpu/static_inst.hh" 1542307SN/A#include "cpu/thread_context.hh" 1552307SN/A#include "cpu/thread_state.hh" 1562307SN/A#include "debug/GDBAcc.hh" 1572307SN/A#include "debug/GDBMisc.hh" 1582307SN/A#include "mem/page_table.hh" 1599444SAndreas.Sandberg@ARM.com#include "mem/physical.hh" 1602307SN/A#include "mem/port.hh" 1612292SN/A#include "sim/full_system.hh" 1622292SN/A#include "sim/system.hh" 1632292SN/A 1642292SN/Ausing namespace std; 1652292SN/Ausing namespace ArmISA; 1662292SN/A 1673867Sbinkertn@umich.eduRemoteGDB::RemoteGDB(System *_system, ThreadContext *tc, int _port) 1682292SN/A : BaseRemoteGDB(_system, tc, _port), regCache32(this), regCache64(this) 1696221Snate@binkert.org{ 1706221Snate@binkert.org} 1712292SN/A 1723867Sbinkertn@umich.edu/* 1736221Snate@binkert.org * Determine if the mapping at va..(va+len) is valid. 1743867Sbinkertn@umich.edu */ 1752292SN/Abool 1763867Sbinkertn@umich.eduRemoteGDB::acc(Addr va, size_t len) 1772292SN/A{ 1783867Sbinkertn@umich.edu if (FullSystem) { 1792292SN/A for (ChunkGenerator gen(va, len, PageBytes); !gen.done(); gen.next()) { 1802292SN/A if (!virtvalid(context(), gen.addr())) { 1812292SN/A DPRINTF(GDBAcc, "acc: %#x mapping is invalid\n", va); 1822292SN/A return false; 1832292SN/A } 1842292SN/A } 1852292SN/A 1866221Snate@binkert.org DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va); 1872292SN/A return true; 1882292SN/A } else { 1892292SN/A // Check to make sure the first byte is mapped into the processes 1902292SN/A // address space. 1912292SN/A return context()->getProcessPtr()->pTable->lookup(va) != nullptr; 1922292SN/A } 1931060SN/A} 1941060SN/A 1951061SN/Avoid 1961060SN/ARemoteGDB::AArch64GdbRegCache::getRegs(ThreadContext *context) 1971060SN/A{ 1981060SN/A DPRINTF(GDBAcc, "getRegs in remotegdb \n"); 1996221Snate@binkert.org 2001061SN/A for (int i = 0; i < 31; ++i) 2016221Snate@binkert.org r.x[i] = context->readIntReg(INTREG_X0 + i); 2026221Snate@binkert.org r.spx = context->readIntReg(INTREG_SPX); 2031060SN/A r.pc = context->pcState().pc(); 2042292SN/A r.cpsr = context->readMiscRegNoEffect(MISCREG_CPSR); 2052292SN/A 2061060SN/A size_t base = 0; 2072292SN/A for (int i = 0; i < NumVecV8ArchRegs; i++) { 2082292SN/A auto v = (context->readVecReg(RegId(VecRegClass, i))).as<VecElem>(); 2096221Snate@binkert.org for (size_t j = 0; j < NumVecElemPerVecReg; j++) { 2102292SN/A r.v[base] = v[j]; 2112292SN/A base++; 2121060SN/A } 2131060SN/A } 2141061SN/A} 2151060SN/A 21613429Srekai.gonzalezalberquilla@arm.comvoid 2171060SN/ARemoteGDB::AArch64GdbRegCache::setRegs(ThreadContext *context) const 2181060SN/A{ 2191060SN/A DPRINTF(GDBAcc, "setRegs in remotegdb \n"); 2207897Shestness@cs.utexas.edu 2217897Shestness@cs.utexas.edu for (int i = 0; i < 31; ++i) 2227720Sgblack@eecs.umich.edu context->setIntReg(INTREG_X0 + i, r.x[i]); 2231060SN/A auto pc_state = context->pcState(); 2241060SN/A pc_state.set(r.pc); 2251060SN/A context->pcState(pc_state); 2266221Snate@binkert.org context->setMiscRegNoEffect(MISCREG_CPSR, r.cpsr); 2271060SN/A // Update the stack pointer. This should be done after 2282292SN/A // updating CPSR/PSTATE since that might affect how SPX gets 2292292SN/A // mapped. 2302292SN/A context->setIntReg(INTREG_SPX, r.spx); 2312292SN/A 2322292SN/A size_t base = 0; 2332292SN/A for (int i = 0; i < NumVecV8ArchRegs; i++) { 2341060SN/A auto v = (context->getWritableVecReg( 2351060SN/A RegId(VecRegClass, i))).as<VecElem>(); 2362292SN/A for (size_t j = 0; j < NumVecElemPerVecReg; j++) { 2372292SN/A v[j] = r.v[base]; 2382292SN/A base++; 2392292SN/A } 2402292SN/A } 2412292SN/A} 2422292SN/A 2432292SN/Avoid 2442292SN/ARemoteGDB::AArch32GdbRegCache::getRegs(ThreadContext *context) 2452292SN/A{ 2461060SN/A DPRINTF(GDBAcc, "getRegs in remotegdb \n"); 2471060SN/A 2482292SN/A r.gpr[0] = context->readIntReg(INTREG_R0); 2491060SN/A r.gpr[1] = context->readIntReg(INTREG_R1); 2501060SN/A r.gpr[2] = context->readIntReg(INTREG_R2); 2512292SN/A r.gpr[3] = context->readIntReg(INTREG_R3); 2522292SN/A r.gpr[4] = context->readIntReg(INTREG_R4); 2536221Snate@binkert.org r.gpr[5] = context->readIntReg(INTREG_R5); 2542292SN/A r.gpr[6] = context->readIntReg(INTREG_R6); 2557897Shestness@cs.utexas.edu r.gpr[7] = context->readIntReg(INTREG_R7); 2567897Shestness@cs.utexas.edu r.gpr[8] = context->readIntReg(INTREG_R8); 2571061SN/A r.gpr[9] = context->readIntReg(INTREG_R9); 2581060SN/A r.gpr[10] = context->readIntReg(INTREG_R10); 25913429Srekai.gonzalezalberquilla@arm.com r.gpr[11] = context->readIntReg(INTREG_R11); 2602292SN/A r.gpr[12] = context->readIntReg(INTREG_R12); 2611060SN/A r.gpr[13] = context->readIntReg(INTREG_SP); 26213429Srekai.gonzalezalberquilla@arm.com r.gpr[14] = context->readIntReg(INTREG_LR); 26313429Srekai.gonzalezalberquilla@arm.com r.gpr[15] = context->pcState().pc(); 2641858SN/A 2651060SN/A // One day somebody will implement transfer of FPRs correctly. 2661060SN/A for (int i=0; i<8*3; i++) r.fpr[i] = 0; 2672292SN/A 2687720Sgblack@eecs.umich.edu r.fpscr = context->readMiscRegNoEffect(MISCREG_FPSCR); 2691060SN/A r.cpsr = context->readMiscRegNoEffect(MISCREG_CPSR); 2701060SN/A} 2711060SN/A 2722292SN/Avoid 2731060SN/ARemoteGDB::AArch32GdbRegCache::setRegs(ThreadContext *context) const 2742731Sktlim@umich.edu{ 2752292SN/A DPRINTF(GDBAcc, "setRegs in remotegdb \n"); 2762292SN/A 2772292SN/A context->setIntReg(INTREG_R0, r.gpr[0]); 2782292SN/A context->setIntReg(INTREG_R1, r.gpr[1]); 2792292SN/A context->setIntReg(INTREG_R2, r.gpr[2]); 2802329SN/A context->setIntReg(INTREG_R3, r.gpr[3]); 2812329SN/A context->setIntReg(INTREG_R4, r.gpr[4]); 2822329SN/A context->setIntReg(INTREG_R5, r.gpr[5]); 2831681SN/A context->setIntReg(INTREG_R6, r.gpr[6]); 2841060SN/A context->setIntReg(INTREG_R7, r.gpr[7]); 2852292SN/A context->setIntReg(INTREG_R8, r.gpr[8]); 2862292SN/A context->setIntReg(INTREG_R9, r.gpr[9]); 2872292SN/A context->setIntReg(INTREG_R10, r.gpr[10]); 2886221Snate@binkert.org context->setIntReg(INTREG_R11, r.gpr[11]); 2892292SN/A context->setIntReg(INTREG_R12, r.gpr[12]); 2907897Shestness@cs.utexas.edu context->setIntReg(INTREG_SP, r.gpr[13]); 2912292SN/A context->setIntReg(INTREG_LR, r.gpr[14]); 2922292SN/A auto pc_state = context->pcState(); 2932292SN/A pc_state.set(r.gpr[15]); 2942292SN/A context->pcState(pc_state); 2952292SN/A 2962292SN/A // One day somebody will implement transfer of FPRs correctly. 2972292SN/A 2982292SN/A context->setMiscReg(MISCREG_FPSCR, r.fpscr); 2992292SN/A context->setMiscRegNoEffect(MISCREG_CPSR, r.cpsr); 3002292SN/A} 3012292SN/A 3022292SN/ABaseGdbRegCache* 3036221Snate@binkert.orgRemoteGDB::gdbRegs() 3046221Snate@binkert.org{ 3052292SN/A if (inAArch64(context())) 3063867Sbinkertn@umich.edu return ®Cache64; 3076221Snate@binkert.org else 3082292SN/A return ®Cache32; 3092292SN/A} 3102292SN/A