remote_gdb.cc revision 12455
11689SN/A/* 27944SGiacomo.Gabrielli@arm.com * Copyright 2015 LabWare 37944SGiacomo.Gabrielli@arm.com * Copyright 2014 Google Inc. 47944SGiacomo.Gabrielli@arm.com * Copyright (c) 2010, 2013, 2016 ARM Limited 57944SGiacomo.Gabrielli@arm.com * All rights reserved 67944SGiacomo.Gabrielli@arm.com * 77944SGiacomo.Gabrielli@arm.com * The license below extends only to copyright in the software and shall 87944SGiacomo.Gabrielli@arm.com * not be construed as granting a license to any other intellectual 97944SGiacomo.Gabrielli@arm.com * property including but not limited to intellectual property relating 107944SGiacomo.Gabrielli@arm.com * to a hardware implementation of the functionality of the software 117944SGiacomo.Gabrielli@arm.com * licensed hereunder. You may use the software subject to the license 127944SGiacomo.Gabrielli@arm.com * terms below provided that you ensure that this notice is replicated 137944SGiacomo.Gabrielli@arm.com * unmodified and in its entirety in all distributions of the software, 142326SN/A * modified or unmodified, in source code or in binary form. 151689SN/A * 161689SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan 171689SN/A * All rights reserved. 181689SN/A * 191689SN/A * Redistribution and use in source and binary forms, with or without 201689SN/A * modification, are permitted provided that the following conditions are 211689SN/A * met: redistributions of source code must retain the above copyright 221689SN/A * notice, this list of conditions and the following disclaimer; 231689SN/A * redistributions in binary form must reproduce the above copyright 241689SN/A * notice, this list of conditions and the following disclaimer in the 251689SN/A * documentation and/or other materials provided with the distribution; 261689SN/A * neither the name of the copyright holders nor the names of its 271689SN/A * contributors may be used to endorse or promote products derived from 281689SN/A * this software without specific prior written permission. 291689SN/A * 301689SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 311689SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 321689SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 331689SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 341689SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 351689SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 361689SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 371689SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 381689SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 392665Ssaidi@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 402665Ssaidi@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 412831Sksewell@umich.edu * 421689SN/A * Authors: Nathan Binkert 431689SN/A * William Wang 442064SN/A * Boris Shingarov 451060SN/A */ 461060SN/A 472292SN/A/* 481717SN/A * Copyright (c) 1990, 1993 The Regents of the University of California 494762Snate@binkert.org * All rights reserved 506221Snate@binkert.org * 514762Snate@binkert.org * This software was developed by the Computer Systems Engineering group 521060SN/A * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 536221Snate@binkert.org * contributed to Berkeley. 545529Snate@binkert.org * 551061SN/A * All advertising materials mentioning features or use of this software 562292SN/A * must display the following acknowledgement: 575606Snate@binkert.org * This product includes software developed by the University of 585606Snate@binkert.org * California, Lawrence Berkeley Laboratories. 595606Snate@binkert.org * 601060SN/A * Redistribution and use in source and binary forms, with or without 612292SN/A * modification, are permitted provided that the following conditions 622292SN/A * are met: 632292SN/A * 1. Redistributions of source code must retain the above copyright 642292SN/A * notice, this list of conditions and the following disclaimer. 652292SN/A * 2. Redistributions in binary form must reproduce the above copyright 662292SN/A * notice, this list of conditions and the following disclaimer in the 672292SN/A * documentation and/or other materials provided with the distribution. 682326SN/A * 3. All advertising materials mentioning features or use of this software 692292SN/A * must display the following acknowledgement: 702292SN/A * This product includes software developed by the University of 712292SN/A * California, Berkeley and its contributors. 722292SN/A * 4. Neither the name of the University nor the names of its contributors 732292SN/A * may be used to endorse or promote products derived from this software 742292SN/A * without specific prior written permission. 755336Shines@cs.fsu.edu * 762292SN/A * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 774873Sstever@eecs.umich.edu * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 782292SN/A * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 792292SN/A * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 802292SN/A * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 814329Sktlim@umich.edu * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 825529Snate@binkert.org * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 834329Sktlim@umich.edu * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 844329Sktlim@umich.edu * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 854329Sktlim@umich.edu * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 862292SN/A * SUCH DAMAGE. 872292SN/A * 882292SN/A * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94 892292SN/A */ 902292SN/A 912292SN/A/*- 922292SN/A * Copyright (c) 2001 The NetBSD Foundation, Inc. 932292SN/A * All rights reserved. 942307SN/A * 952307SN/A * This code is derived from software contributed to The NetBSD Foundation 965529Snate@binkert.org * by Jason R. Thorpe. 971060SN/A * 981060SN/A * Redistribution and use in source and binary forms, with or without 991060SN/A * modification, are permitted provided that the following conditions 1001060SN/A * are met: 1011060SN/A * 1. Redistributions of source code must retain the above copyright 1021060SN/A * notice, this list of conditions and the following disclaimer. 1032326SN/A * 2. Redistributions in binary form must reproduce the above copyright 1041060SN/A * notice, this list of conditions and the following disclaimer in the 1051060SN/A * documentation and/or other materials provided with the distribution. 1061060SN/A * 3. All advertising materials mentioning features or use of this software 1071060SN/A * must display the following acknowledgement: 1082292SN/A * This product includes software developed by the NetBSD 1096221Snate@binkert.org * Foundation, Inc. and its contributors. 1106221Snate@binkert.org * 4. Neither the name of The NetBSD Foundation nor the names of its 1116221Snate@binkert.org * contributors may be used to endorse or promote products derived 1121060SN/A * from this software without specific prior written permission. 1131060SN/A * 1142307SN/A * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 1152292SN/A * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 1162980Sgblack@eecs.umich.edu * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 1172292SN/A * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 1182292SN/A * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 1192292SN/A * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 1202292SN/A * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 1212292SN/A * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 1222292SN/A * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 1232292SN/A * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 1242292SN/A * POSSIBILITY OF SUCH DAMAGE. 1252292SN/A */ 1262292SN/A 1276221Snate@binkert.org/* 1286221Snate@binkert.org * $NetBSD: kgdb_stub.c,v 1.8 2001/07/07 22:58:00 wdk Exp $ 1292292SN/A * 1302292SN/A * Taken from NetBSD 1312292SN/A * 1322292SN/A * "Stub" to allow remote cpu to debug over a serial line using gdb. 1332292SN/A */ 1342292SN/A 1352292SN/A#include "arch/arm/remote_gdb.hh" 1362292SN/A 1372292SN/A#include <sys/signal.h> 1386221Snate@binkert.org#include <unistd.h> 1396221Snate@binkert.org 1402292SN/A#include <string> 1412292SN/A 1422831Sksewell@umich.edu#include "arch/arm/decoder.hh" 1432292SN/A#include "arch/arm/pagetable.hh" 1442292SN/A#include "arch/arm/registers.hh" 1452292SN/A#include "arch/arm/system.hh" 1462292SN/A#include "arch/arm/utility.hh" 1472292SN/A#include "arch/arm/vtophys.hh" 1482292SN/A#include "base/chunk_generator.hh" 1492292SN/A#include "base/intmath.hh" 1502292SN/A#include "base/remote_gdb.hh" 1512292SN/A#include "base/socket.hh" 1526221Snate@binkert.org#include "base/trace.hh" 1536221Snate@binkert.org#include "cpu/static_inst.hh" 1542292SN/A#include "cpu/thread_context.hh" 1552292SN/A#include "cpu/thread_state.hh" 1562831Sksewell@umich.edu#include "debug/GDBAcc.hh" 1572292SN/A#include "debug/GDBMisc.hh" 1582292SN/A#include "mem/page_table.hh" 1592292SN/A#include "mem/physical.hh" 1602292SN/A#include "mem/port.hh" 1612292SN/A#include "sim/full_system.hh" 1622292SN/A#include "sim/system.hh" 1632292SN/A 1642292SN/Ausing namespace std; 1652292SN/Ausing namespace ArmISA; 1662292SN/A 1672326SN/ARemoteGDB::RemoteGDB(System *_system, ThreadContext *tc, int _port) 1682348SN/A : BaseRemoteGDB(_system, tc, _port), regCache32(this), regCache64(this) 1692326SN/A{ 1702326SN/A} 1712348SN/A 1722292SN/A/* 1732292SN/A * Determine if the mapping at va..(va+len) is valid. 1742292SN/A */ 1752292SN/Abool 1762292SN/ARemoteGDB::acc(Addr va, size_t len) 1772292SN/A{ 1782292SN/A if (FullSystem) { 1791060SN/A for (ChunkGenerator gen(va, len, PageBytes); !gen.done(); gen.next()) { 1801060SN/A if (!virtvalid(context(), gen.addr())) { 1811061SN/A DPRINTF(GDBAcc, "acc: %#x mapping is invalid\n", va); 1821060SN/A return false; 1831062SN/A } 1841062SN/A } 1852301SN/A 1861062SN/A DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va); 1871062SN/A return true; 1881062SN/A } else { 1891062SN/A // Check to make sure the first byte is mapped into the processes 1901062SN/A // address space. 1911062SN/A return context()->getProcessPtr()->pTable->lookup(va) != nullptr; 1921062SN/A } 1931062SN/A} 1941062SN/A 1951062SN/Avoid 1962301SN/ARemoteGDB::AArch64GdbRegCache::getRegs(ThreadContext *context) 1972301SN/A{ 1982301SN/A DPRINTF(GDBAcc, "getRegs in remotegdb \n"); 1992301SN/A 2001062SN/A for (int i = 0; i < 31; ++i) 2011062SN/A r.x[i] = context->readIntReg(INTREG_X0 + i); 2021062SN/A r.spx = context->readIntReg(INTREG_SPX); 2031062SN/A r.pc = context->pcState().pc(); 2041062SN/A r.cpsr = context->readMiscRegNoEffect(MISCREG_CPSR); 2051062SN/A 2061062SN/A for (int i = 0; i < 32*4; i += 4) { 2071062SN/A r.v[i + 0] = context->readFloatRegBits(i + 2); 2081062SN/A r.v[i + 1] = context->readFloatRegBits(i + 3); 2091062SN/A r.v[i + 2] = context->readFloatRegBits(i + 0); 2101062SN/A r.v[i + 3] = context->readFloatRegBits(i + 1); 2111062SN/A } 2121062SN/A 2131062SN/A for (int i = 0; i < 32; i ++) { 2141062SN/A r.vec[i] = context->readVecReg(RegId(VecRegClass,i)); 2151062SN/A } 2161062SN/A} 2171062SN/A 2181062SN/Avoid 2191062SN/ARemoteGDB::AArch64GdbRegCache::setRegs(ThreadContext *context) const 2201062SN/A{ 2211062SN/A DPRINTF(GDBAcc, "setRegs in remotegdb \n"); 2221062SN/A 2231062SN/A for (int i = 0; i < 31; ++i) 2241062SN/A context->setIntReg(INTREG_X0 + i, r.x[i]); 2251062SN/A context->pcState(r.pc); 2261062SN/A context->setMiscRegNoEffect(MISCREG_CPSR, r.cpsr); 2271062SN/A // Update the stack pointer. This should be done after 2281062SN/A // updating CPSR/PSTATE since that might affect how SPX gets 2291062SN/A // mapped. 2301062SN/A context->setIntReg(INTREG_SPX, r.spx); 2311062SN/A 2321062SN/A for (int i = 0; i < 32*4; i += 4) { 2331062SN/A context->setFloatRegBits(i + 2, r.v[i + 0]); 2341062SN/A context->setFloatRegBits(i + 3, r.v[i + 1]); 2351062SN/A context->setFloatRegBits(i + 0, r.v[i + 2]); 2361062SN/A context->setFloatRegBits(i + 1, r.v[i + 3]); 2371062SN/A } 2381062SN/A 2391062SN/A for (int i = 0; i < 32; i ++) { 2401062SN/A context->setVecReg(RegId(VecRegClass, i), r.vec[i]); 2411062SN/A } 2421062SN/A} 2431062SN/A 2441062SN/Avoid 2451062SN/ARemoteGDB::AArch32GdbRegCache::getRegs(ThreadContext *context) 2461062SN/A{ 2472361SN/A DPRINTF(GDBAcc, "getRegs in remotegdb \n"); 2482326SN/A 2492301SN/A r.gpr[0] = context->readIntReg(INTREG_R0); 2502301SN/A r.gpr[1] = context->readIntReg(INTREG_R1); 2512301SN/A r.gpr[2] = context->readIntReg(INTREG_R2); 2522301SN/A r.gpr[3] = context->readIntReg(INTREG_R3); 2532301SN/A r.gpr[4] = context->readIntReg(INTREG_R4); 2542301SN/A r.gpr[5] = context->readIntReg(INTREG_R5); 2552326SN/A r.gpr[6] = context->readIntReg(INTREG_R6); 2562301SN/A r.gpr[7] = context->readIntReg(INTREG_R7); 2572361SN/A r.gpr[8] = context->readIntReg(INTREG_R8); 2582326SN/A r.gpr[9] = context->readIntReg(INTREG_R9); 2592307SN/A r.gpr[10] = context->readIntReg(INTREG_R10); 2602301SN/A r.gpr[11] = context->readIntReg(INTREG_R11); 2612301SN/A r.gpr[12] = context->readIntReg(INTREG_R12); 2622307SN/A r.gpr[13] = context->readIntReg(INTREG_SP); 2632301SN/A r.gpr[14] = context->readIntReg(INTREG_LR); 2642301SN/A r.gpr[15] = context->pcState().pc(); 2652301SN/A 2662301SN/A // One day somebody will implement transfer of FPRs correctly. 2672301SN/A for (int i=0; i<8*3; i++) r.fpr[i] = 0; 2682301SN/A 2692301SN/A r.fpscr = context->readMiscRegNoEffect(MISCREG_FPSCR); 2702301SN/A r.cpsr = context->readMiscRegNoEffect(MISCREG_CPSR); 2712301SN/A} 2722301SN/A 2732301SN/Avoid 2742301SN/ARemoteGDB::AArch32GdbRegCache::setRegs(ThreadContext *context) const 2752326SN/A{ 2764762Snate@binkert.org DPRINTF(GDBAcc, "setRegs in remotegdb \n"); 2772301SN/A 2782301SN/A context->setIntReg(INTREG_R0, r.gpr[0]); 2792301SN/A context->setIntReg(INTREG_R1, r.gpr[1]); 2802301SN/A context->setIntReg(INTREG_R2, r.gpr[2]); 2814762Snate@binkert.org context->setIntReg(INTREG_R3, r.gpr[3]); 2822301SN/A context->setIntReg(INTREG_R4, r.gpr[4]); 2832301SN/A context->setIntReg(INTREG_R5, r.gpr[5]); 2842301SN/A context->setIntReg(INTREG_R6, r.gpr[6]); 2852301SN/A context->setIntReg(INTREG_R7, r.gpr[7]); 2862361SN/A context->setIntReg(INTREG_R8, r.gpr[8]); 2872326SN/A context->setIntReg(INTREG_R9, r.gpr[9]); 2882301SN/A context->setIntReg(INTREG_R10, r.gpr[10]); 2892301SN/A context->setIntReg(INTREG_R11, r.gpr[11]); 2902301SN/A context->setIntReg(INTREG_R12, r.gpr[12]); 2912301SN/A context->setIntReg(INTREG_SP, r.gpr[13]); 2922301SN/A context->setIntReg(INTREG_LR, r.gpr[14]); 2932301SN/A context->pcState(r.gpr[15]); 2942301SN/A 2952980Sgblack@eecs.umich.edu // One day somebody will implement transfer of FPRs correctly. 2962301SN/A 2972326SN/A context->setMiscReg(MISCREG_FPSCR, r.fpscr); 2982301SN/A context->setMiscRegNoEffect(MISCREG_CPSR, r.cpsr); 2992361SN/A} 3002326SN/A 3012301SN/ABaseGdbRegCache* 3022301SN/ARemoteGDB::gdbRegs() 3032301SN/A{ 3042301SN/A if (inAArch64(context())) 3052326SN/A return ®Cache64; 3062727Sktlim@umich.edu else 3072326SN/A return ®Cache32; 3082301SN/A} 3092301SN/A