registers.hh revision 6717
14159Sgblack@eecs.umich.edu/* 24159Sgblack@eecs.umich.edu * Copyright (c) 2007-2008 The Florida State University 34159Sgblack@eecs.umich.edu * All rights reserved. 44159Sgblack@eecs.umich.edu * 57087Snate@binkert.org * Redistribution and use in source and binary forms, with or without 67087Snate@binkert.org * modification, are permitted provided that the following conditions are 77087Snate@binkert.org * met: redistributions of source code must retain the above copyright 87087Snate@binkert.org * notice, this list of conditions and the following disclaimer; 97087Snate@binkert.org * redistributions in binary form must reproduce the above copyright 107087Snate@binkert.org * notice, this list of conditions and the following disclaimer in the 117087Snate@binkert.org * documentation and/or other materials provided with the distribution; 127087Snate@binkert.org * neither the name of the copyright holders nor the names of its 134159Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 147087Snate@binkert.org * this software without specific prior written permission. 157087Snate@binkert.org * 167087Snate@binkert.org * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 177087Snate@binkert.org * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 187087Snate@binkert.org * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 197087Snate@binkert.org * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 207087Snate@binkert.org * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 217087Snate@binkert.org * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 224159Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 237087Snate@binkert.org * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 244159Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 254159Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 264159Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 274159Sgblack@eecs.umich.edu * 284159Sgblack@eecs.umich.edu * Authors: Stephen Hines 294159Sgblack@eecs.umich.edu */ 304159Sgblack@eecs.umich.edu 314159Sgblack@eecs.umich.edu#ifndef __ARCH_ARM_REGISTERS_HH__ 324159Sgblack@eecs.umich.edu#define __ARCH_ARM_REGISTERS_HH__ 334159Sgblack@eecs.umich.edu 344159Sgblack@eecs.umich.edu#include "arch/arm/max_inst_regs.hh" 354159Sgblack@eecs.umich.edu#include "arch/arm/intregs.hh" 364159Sgblack@eecs.umich.edu#include "arch/arm/miscregs.hh" 374159Sgblack@eecs.umich.edu 384159Sgblack@eecs.umich.edunamespace ArmISA { 394159Sgblack@eecs.umich.edu 404159Sgblack@eecs.umich.eduusing ArmISAInst::MaxInstSrcRegs; 418229Snate@binkert.orgusing ArmISAInst::MaxInstDestRegs; 424159Sgblack@eecs.umich.edu 434159Sgblack@eecs.umich.edutypedef uint8_t RegIndex; 444159Sgblack@eecs.umich.edu 458229Snate@binkert.orgtypedef uint64_t IntReg; 464159Sgblack@eecs.umich.edu 474159Sgblack@eecs.umich.edu// floating point register file entry type 484159Sgblack@eecs.umich.edutypedef uint32_t FloatRegBits; 494159Sgblack@eecs.umich.edutypedef float FloatReg; 504159Sgblack@eecs.umich.edu 514159Sgblack@eecs.umich.edu// cop-0/cop-1 system control register 524159Sgblack@eecs.umich.edutypedef uint64_t MiscReg; 535567Snate@binkert.org 544159Sgblack@eecs.umich.edu// Constants Related to the number of registers 554159Sgblack@eecs.umich.educonst int NumIntArchRegs = NUM_ARCH_INTREGS; 564159Sgblack@eecs.umich.educonst int NumFloatArchRegs = 16; 574159Sgblack@eecs.umich.educonst int NumFloatSpecialRegs = 5; 584159Sgblack@eecs.umich.educonst int NumInternalProcRegs = 0; 594159Sgblack@eecs.umich.edu 604159Sgblack@eecs.umich.educonst int NumIntRegs = NUM_INTREGS; 614159Sgblack@eecs.umich.educonst int NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs; 624159Sgblack@eecs.umich.edu 634159Sgblack@eecs.umich.educonst int NumMiscRegs = NUM_MISCREGS; 644159Sgblack@eecs.umich.edu 654159Sgblack@eecs.umich.edu 664159Sgblack@eecs.umich.edu// semantically meaningful register indices 674159Sgblack@eecs.umich.educonst int ReturnValueReg = 0; 684159Sgblack@eecs.umich.educonst int ReturnValueReg1 = 1; 694159Sgblack@eecs.umich.educonst int ReturnValueReg2 = 2; 704159Sgblack@eecs.umich.educonst int ArgumentReg0 = 0; 714159Sgblack@eecs.umich.educonst int ArgumentReg1 = 1; 724159Sgblack@eecs.umich.educonst int ArgumentReg2 = 2; 734159Sgblack@eecs.umich.educonst int ArgumentReg3 = 3; 744159Sgblack@eecs.umich.educonst int FramePointerReg = 11; 754159Sgblack@eecs.umich.educonst int StackPointerReg = INTREG_SP; 764159Sgblack@eecs.umich.educonst int ReturnAddressReg = INTREG_LR; 774159Sgblack@eecs.umich.educonst int PCReg = INTREG_PC; 784159Sgblack@eecs.umich.edu 794159Sgblack@eecs.umich.educonst int ZeroReg = INTREG_ZERO; 804159Sgblack@eecs.umich.edu 814159Sgblack@eecs.umich.educonst int SyscallNumReg = ReturnValueReg; 824159Sgblack@eecs.umich.educonst int SyscallPseudoReturnReg = ReturnValueReg; 83const int SyscallSuccessReg = ReturnValueReg; 84 85// These help enumerate all the registers for dependence tracking. 86const int FP_Base_DepTag = NumIntRegs; 87const int Ctrl_Base_DepTag = FP_Base_DepTag + NumFloatRegs; 88 89typedef union { 90 IntReg intreg; 91 FloatReg fpreg; 92 MiscReg ctrlreg; 93} AnyReg; 94 95enum FPControlRegNums { 96 FIR = NumFloatArchRegs, 97 FCCR, 98 FEXR, 99 FENR, 100 FCSR 101}; 102 103enum FCSRBits { 104 Inexact = 1, 105 Underflow, 106 Overflow, 107 DivideByZero, 108 Invalid, 109 Unimplemented 110}; 111 112enum FCSRFields { 113 Flag_Field = 1, 114 Enable_Field = 6, 115 Cause_Field = 11 116}; 117 118} // namespace ArmISA 119 120#endif 121