process.hh revision 11851:824055fe6b30
1/* 2* Copyright (c) 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2007-2008 The Florida State University 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Stephen Hines 41 */ 42 43#ifndef __ARM_PROCESS_HH__ 44#define __ARM_PROCESS_HH__ 45 46#include <string> 47#include <vector> 48 49#include "arch/arm/intregs.hh" 50#include "base/loader/object_file.hh" 51#include "mem/page_table.hh" 52#include "sim/process.hh" 53 54class ObjectFile; 55 56class ArmProcess : public Process 57{ 58 protected: 59 ObjectFile::Arch arch; 60 ArmProcess(ProcessParams * params, ObjectFile *objFile, 61 ObjectFile::Arch _arch); 62 template<class IntType> 63 void argsInit(int pageSize, ArmISA::IntRegIndex spIndex); 64}; 65 66class ArmProcess32 : public ArmProcess 67{ 68 protected: 69 ArmProcess32(ProcessParams * params, ObjectFile *objFile, 70 ObjectFile::Arch _arch); 71 72 void initState(); 73 74 public: 75 76 ArmISA::IntReg getSyscallArg(ThreadContext *tc, int &i, int width); 77 ArmISA::IntReg getSyscallArg(ThreadContext *tc, int &i); 78 void setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val); 79 void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value); 80}; 81 82class ArmProcess64 : public ArmProcess 83{ 84 protected: 85 ArmProcess64(ProcessParams * params, ObjectFile *objFile, 86 ObjectFile::Arch _arch); 87 88 void initState(); 89 90 public: 91 92 ArmISA::IntReg getSyscallArg(ThreadContext *tc, int &i, int width); 93 ArmISA::IntReg getSyscallArg(ThreadContext *tc, int &i); 94 void setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val); 95 void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value); 96}; 97 98/* No architectural page table defined for this ISA */ 99typedef NoArchPageTable ArchPageTable; 100 101#endif // __ARM_PROCESS_HH__ 102 103