process.cc revision 13028
1/*
2 * Copyright (c) 2010, 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2007-2008 The Florida State University
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Stephen Hines
41 *          Ali Saidi
42 */
43
44#include "arch/arm/process.hh"
45
46#include "arch/arm/isa_traits.hh"
47#include "arch/arm/types.hh"
48#include "base/loader/elf_object.hh"
49#include "base/loader/object_file.hh"
50#include "base/logging.hh"
51#include "cpu/thread_context.hh"
52#include "debug/Stack.hh"
53#include "mem/page_table.hh"
54#include "params/Process.hh"
55#include "sim/aux_vector.hh"
56#include "sim/byteswap.hh"
57#include "sim/process_impl.hh"
58#include "sim/syscall_return.hh"
59#include "sim/system.hh"
60
61using namespace std;
62using namespace ArmISA;
63
64ArmProcess::ArmProcess(ProcessParams *params, ObjectFile *objFile,
65                       ObjectFile::Arch _arch)
66    : Process(params,
67              new EmulationPageTable(params->name, params->pid, PageBytes),
68              objFile),
69      arch(_arch)
70{
71    fatal_if(params->useArchPT, "Arch page tables not implemented.");
72}
73
74ArmProcess32::ArmProcess32(ProcessParams *params, ObjectFile *objFile,
75                           ObjectFile::Arch _arch)
76    : ArmProcess(params, objFile, _arch)
77{
78    Addr brk_point = roundUp(objFile->dataBase() + objFile->dataSize() +
79                             objFile->bssSize(), PageBytes);
80    Addr stack_base = 0xbf000000L;
81    Addr max_stack_size = 8 * 1024 * 1024;
82    Addr next_thread_stack_base = stack_base - max_stack_size;
83    Addr mmap_end = 0x40000000L;
84
85    memState = make_shared<MemState>(brk_point, stack_base, max_stack_size,
86                                     next_thread_stack_base, mmap_end);
87}
88
89ArmProcess64::ArmProcess64(ProcessParams *params, ObjectFile *objFile,
90                           ObjectFile::Arch _arch)
91    : ArmProcess(params, objFile, _arch)
92{
93    Addr brk_point = roundUp(objFile->dataBase() + objFile->dataSize() +
94                             objFile->bssSize(), PageBytes);
95    Addr stack_base = 0x7fffff0000L;
96    Addr max_stack_size = 8 * 1024 * 1024;
97    Addr next_thread_stack_base = stack_base - max_stack_size;
98    Addr mmap_end = 0x4000000000L;
99
100    memState = make_shared<MemState>(brk_point, stack_base, max_stack_size,
101                                     next_thread_stack_base, mmap_end);
102}
103
104void
105ArmProcess32::initState()
106{
107    Process::initState();
108    argsInit<uint32_t>(PageBytes, INTREG_SP);
109    for (int i = 0; i < contextIds.size(); i++) {
110        ThreadContext * tc = system->getThreadContext(contextIds[i]);
111        CPACR cpacr = tc->readMiscReg(MISCREG_CPACR);
112        // Enable the floating point coprocessors.
113        cpacr.cp10 = 0x3;
114        cpacr.cp11 = 0x3;
115        tc->setMiscReg(MISCREG_CPACR, cpacr);
116        // Generically enable floating point support.
117        FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC);
118        fpexc.en = 1;
119        tc->setMiscReg(MISCREG_FPEXC, fpexc);
120    }
121}
122
123void
124ArmProcess64::initState()
125{
126    Process::initState();
127    argsInit<uint64_t>(PageBytes, INTREG_SP0);
128    for (int i = 0; i < contextIds.size(); i++) {
129        ThreadContext * tc = system->getThreadContext(contextIds[i]);
130        CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
131        cpsr.mode = MODE_EL0T;
132        tc->setMiscReg(MISCREG_CPSR, cpsr);
133        CPACR cpacr = tc->readMiscReg(MISCREG_CPACR_EL1);
134        // Enable the floating point coprocessors.
135        cpacr.cp10 = 0x3;
136        cpacr.cp11 = 0x3;
137        tc->setMiscReg(MISCREG_CPACR_EL1, cpacr);
138        // Generically enable floating point support.
139        FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC);
140        fpexc.en = 1;
141        tc->setMiscReg(MISCREG_FPEXC, fpexc);
142    }
143}
144
145template <class IntType>
146void
147ArmProcess::argsInit(int pageSize, IntRegIndex spIndex)
148{
149    int intSize = sizeof(IntType);
150
151    typedef AuxVector<IntType> auxv_t;
152    std::vector<auxv_t> auxv;
153
154    string filename;
155    if (argv.size() < 1)
156        filename = "";
157    else
158        filename = argv[0];
159
160    //We want 16 byte alignment
161    uint64_t align = 16;
162
163    // Patch the ld_bias for dynamic executables.
164    updateBias();
165
166    // load object file into target memory
167    objFile->loadSections(initVirtMem);
168
169    enum ArmCpuFeature {
170        Arm_Swp = 1 << 0,
171        Arm_Half = 1 << 1,
172        Arm_Thumb = 1 << 2,
173        Arm_26Bit = 1 << 3,
174        Arm_FastMult = 1 << 4,
175        Arm_Fpa = 1 << 5,
176        Arm_Vfp = 1 << 6,
177        Arm_Edsp = 1 << 7,
178        Arm_Java = 1 << 8,
179        Arm_Iwmmxt = 1 << 9,
180        Arm_Crunch = 1 << 10,
181        Arm_ThumbEE = 1 << 11,
182        Arm_Neon = 1 << 12,
183        Arm_Vfpv3 = 1 << 13,
184        Arm_Vfpv3d16 = 1 << 14
185    };
186
187    //Setup the auxilliary vectors. These will already have endian conversion.
188    //Auxilliary vectors are loaded only for elf formatted executables.
189    ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
190    if (elfObject) {
191
192        if (objFile->getOpSys() == ObjectFile::Linux) {
193            IntType features =
194                Arm_Swp |
195                Arm_Half |
196                Arm_Thumb |
197//                Arm_26Bit |
198                Arm_FastMult |
199//                Arm_Fpa |
200                Arm_Vfp |
201                Arm_Edsp |
202//                Arm_Java |
203//                Arm_Iwmmxt |
204//                Arm_Crunch |
205                Arm_ThumbEE |
206                Arm_Neon |
207                Arm_Vfpv3 |
208                Arm_Vfpv3d16 |
209                0;
210
211            //Bits which describe the system hardware capabilities
212            //XXX Figure out what these should be
213            auxv.push_back(auxv_t(M5_AT_HWCAP, features));
214            //Frequency at which times() increments
215            auxv.push_back(auxv_t(M5_AT_CLKTCK, 0x64));
216            //Whether to enable "secure mode" in the executable
217            auxv.push_back(auxv_t(M5_AT_SECURE, 0));
218            // Pointer to 16 bytes of random data
219            auxv.push_back(auxv_t(M5_AT_RANDOM, 0));
220            //The filename of the program
221            auxv.push_back(auxv_t(M5_AT_EXECFN, 0));
222            //The string "v71" -- ARM v7 architecture
223            auxv.push_back(auxv_t(M5_AT_PLATFORM, 0));
224        }
225
226        //The system page size
227        auxv.push_back(auxv_t(M5_AT_PAGESZ, ArmISA::PageBytes));
228        // For statically linked executables, this is the virtual address of the
229        // program header tables if they appear in the executable image
230        auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
231        // This is the size of a program header entry from the elf file.
232        auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
233        // This is the number of program headers from the original elf file.
234        auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
235        // This is the base address of the ELF interpreter; it should be
236        // zero for static executables or contain the base address for
237        // dynamic executables.
238        auxv.push_back(auxv_t(M5_AT_BASE, getBias()));
239        //XXX Figure out what this should be.
240        auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
241        //The entry point to the program
242        auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
243        //Different user and group IDs
244        auxv.push_back(auxv_t(M5_AT_UID, uid()));
245        auxv.push_back(auxv_t(M5_AT_EUID, euid()));
246        auxv.push_back(auxv_t(M5_AT_GID, gid()));
247        auxv.push_back(auxv_t(M5_AT_EGID, egid()));
248    }
249
250    //Figure out how big the initial stack nedes to be
251
252    // A sentry NULL void pointer at the top of the stack.
253    int sentry_size = intSize;
254
255    string platform = "v71";
256    int platform_size = platform.size() + 1;
257
258    // Bytes for AT_RANDOM above, we'll just keep them 0
259    int aux_random_size = 16; // as per the specification
260
261    // The aux vectors are put on the stack in two groups. The first group are
262    // the vectors that are generated as the elf is loaded. The second group
263    // are the ones that were computed ahead of time and include the platform
264    // string.
265    int aux_data_size = filename.size() + 1;
266
267    int env_data_size = 0;
268    for (int i = 0; i < envp.size(); ++i) {
269        env_data_size += envp[i].size() + 1;
270    }
271    int arg_data_size = 0;
272    for (int i = 0; i < argv.size(); ++i) {
273        arg_data_size += argv[i].size() + 1;
274    }
275
276    int info_block_size =
277        sentry_size + env_data_size + arg_data_size +
278        aux_data_size + platform_size + aux_random_size;
279
280    //Each auxilliary vector is two 4 byte words
281    int aux_array_size = intSize * 2 * (auxv.size() + 1);
282
283    int envp_array_size = intSize * (envp.size() + 1);
284    int argv_array_size = intSize * (argv.size() + 1);
285
286    int argc_size = intSize;
287
288    //Figure out the size of the contents of the actual initial frame
289    int frame_size =
290        info_block_size +
291        aux_array_size +
292        envp_array_size +
293        argv_array_size +
294        argc_size;
295
296    //There needs to be padding after the auxiliary vector data so that the
297    //very bottom of the stack is aligned properly.
298    int partial_size = frame_size;
299    int aligned_partial_size = roundUp(partial_size, align);
300    int aux_padding = aligned_partial_size - partial_size;
301
302    int space_needed = frame_size + aux_padding;
303
304    memState->setStackMin(memState->getStackBase() - space_needed);
305    memState->setStackMin(roundDown(memState->getStackMin(), align));
306    memState->setStackSize(memState->getStackBase() - memState->getStackMin());
307
308    // map memory
309    allocateMem(roundDown(memState->getStackMin(), pageSize),
310                          roundUp(memState->getStackSize(), pageSize));
311
312    // map out initial stack contents
313    IntType sentry_base = memState->getStackBase() - sentry_size;
314    IntType aux_data_base = sentry_base - aux_data_size;
315    IntType env_data_base = aux_data_base - env_data_size;
316    IntType arg_data_base = env_data_base - arg_data_size;
317    IntType platform_base = arg_data_base - platform_size;
318    IntType aux_random_base = platform_base - aux_random_size;
319    IntType auxv_array_base = aux_random_base - aux_array_size - aux_padding;
320    IntType envp_array_base = auxv_array_base - envp_array_size;
321    IntType argv_array_base = envp_array_base - argv_array_size;
322    IntType argc_base = argv_array_base - argc_size;
323
324    DPRINTF(Stack, "The addresses of items on the initial stack:\n");
325    DPRINTF(Stack, "0x%x - aux data\n", aux_data_base);
326    DPRINTF(Stack, "0x%x - env data\n", env_data_base);
327    DPRINTF(Stack, "0x%x - arg data\n", arg_data_base);
328    DPRINTF(Stack, "0x%x - random data\n", aux_random_base);
329    DPRINTF(Stack, "0x%x - platform base\n", platform_base);
330    DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base);
331    DPRINTF(Stack, "0x%x - envp array\n", envp_array_base);
332    DPRINTF(Stack, "0x%x - argv array\n", argv_array_base);
333    DPRINTF(Stack, "0x%x - argc \n", argc_base);
334    DPRINTF(Stack, "0x%x - stack min\n", memState->getStackMin());
335
336    // write contents to stack
337
338    // figure out argc
339    IntType argc = argv.size();
340    IntType guestArgc = ArmISA::htog(argc);
341
342    //Write out the sentry void *
343    IntType sentry_NULL = 0;
344    initVirtMem.writeBlob(sentry_base,
345            (uint8_t*)&sentry_NULL, sentry_size);
346
347    //Fix up the aux vectors which point to other data
348    for (int i = auxv.size() - 1; i >= 0; i--) {
349        if (auxv[i].getHostAuxType() == M5_AT_PLATFORM) {
350            auxv[i].setAuxVal(platform_base);
351            initVirtMem.writeString(platform_base, platform.c_str());
352        } else if (auxv[i].getHostAuxType() == M5_AT_EXECFN) {
353            auxv[i].setAuxVal(aux_data_base);
354            initVirtMem.writeString(aux_data_base, filename.c_str());
355        } else if (auxv[i].getHostAuxType() == M5_AT_RANDOM) {
356            auxv[i].setAuxVal(aux_random_base);
357            // Just leave the value 0, we don't want randomness
358        }
359    }
360
361    //Copy the aux stuff
362    for (int x = 0; x < auxv.size(); x++) {
363        initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
364                              (uint8_t*)&(auxv[x].getAuxType()),
365                              intSize);
366        initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
367                              (uint8_t*)&(auxv[x].getAuxVal()),
368                              intSize);
369    }
370    //Write out the terminating zeroed auxilliary vector
371    const uint64_t zero = 0;
372    initVirtMem.writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
373            (uint8_t*)&zero, 2 * intSize);
374
375    copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
376    copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
377
378    initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
379
380    ThreadContext *tc = system->getThreadContext(contextIds[0]);
381    //Set the stack pointer register
382    tc->setIntReg(spIndex, memState->getStackMin());
383    //A pointer to a function to run when the program exits. We'll set this
384    //to zero explicitly to make sure this isn't used.
385    tc->setIntReg(ArgumentReg0, 0);
386    //Set argument regs 1 and 2 to argv[0] and envp[0] respectively
387    if (argv.size() > 0) {
388        tc->setIntReg(ArgumentReg1, arg_data_base + arg_data_size -
389                                    argv[argv.size() - 1].size() - 1);
390    } else {
391        tc->setIntReg(ArgumentReg1, 0);
392    }
393    if (envp.size() > 0) {
394        tc->setIntReg(ArgumentReg2, env_data_base + env_data_size -
395                                    envp[envp.size() - 1].size() - 1);
396    } else {
397        tc->setIntReg(ArgumentReg2, 0);
398    }
399
400    PCState pc;
401    pc.thumb(arch == ObjectFile::Thumb);
402    pc.nextThumb(pc.thumb());
403    pc.aarch64(arch == ObjectFile::Arm64);
404    pc.nextAArch64(pc.aarch64());
405    pc.set(getStartPC() & ~mask(1));
406    tc->pcState(pc);
407
408    //Align the "stackMin" to a page boundary.
409    memState->setStackMin(roundDown(memState->getStackMin(), pageSize));
410}
411
412ArmISA::IntReg
413ArmProcess32::getSyscallArg(ThreadContext *tc, int &i)
414{
415    assert(i < 6);
416    return tc->readIntReg(ArgumentReg0 + i++);
417}
418
419ArmISA::IntReg
420ArmProcess64::getSyscallArg(ThreadContext *tc, int &i)
421{
422    assert(i < 8);
423    return tc->readIntReg(ArgumentReg0 + i++);
424}
425
426ArmISA::IntReg
427ArmProcess32::getSyscallArg(ThreadContext *tc, int &i, int width)
428{
429    assert(width == 32 || width == 64);
430    if (width == 32)
431        return getSyscallArg(tc, i);
432
433    // 64 bit arguments are passed starting in an even register
434    if (i % 2 != 0)
435       i++;
436
437    // Registers r0-r6 can be used
438    assert(i < 5);
439    uint64_t val;
440    val = tc->readIntReg(ArgumentReg0 + i++);
441    val |= ((uint64_t)tc->readIntReg(ArgumentReg0 + i++) << 32);
442    return val;
443}
444
445ArmISA::IntReg
446ArmProcess64::getSyscallArg(ThreadContext *tc, int &i, int width)
447{
448    return getSyscallArg(tc, i);
449}
450
451
452void
453ArmProcess32::setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val)
454{
455    assert(i < 6);
456    tc->setIntReg(ArgumentReg0 + i, val);
457}
458
459void
460ArmProcess64::setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val)
461{
462    assert(i < 8);
463    tc->setIntReg(ArgumentReg0 + i, val);
464}
465
466void
467ArmProcess32::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
468{
469
470    if (objFile->getOpSys() == ObjectFile::FreeBSD) {
471        // Decode return value
472        if (sysret.encodedValue() >= 0)
473            // FreeBSD checks the carry bit to determine if syscall is succeeded
474            tc->setCCReg(CCREG_C, 0);
475        else {
476            sysret = -sysret.encodedValue();
477        }
478    }
479
480    tc->setIntReg(ReturnValueReg, sysret.encodedValue());
481}
482
483void
484ArmProcess64::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
485{
486
487    if (objFile->getOpSys() == ObjectFile::FreeBSD) {
488        // Decode return value
489        if (sysret.encodedValue() >= 0)
490            // FreeBSD checks the carry bit to determine if syscall is succeeded
491            tc->setCCReg(CCREG_C, 0);
492        else {
493            sysret = -sysret.encodedValue();
494        }
495    }
496
497    tc->setIntReg(ReturnValueReg, sysret.encodedValue());
498}
499