miscregs.hh revision 7285
16242Sgblack@eecs.umich.edu/* 27093Sgblack@eecs.umich.edu * Copyright (c) 2010 ARM Limited 37093Sgblack@eecs.umich.edu * All rights reserved 47093Sgblack@eecs.umich.edu * 57093Sgblack@eecs.umich.edu * The license below extends only to copyright in the software and shall 67093Sgblack@eecs.umich.edu * not be construed as granting a license to any other intellectual 77093Sgblack@eecs.umich.edu * property including but not limited to intellectual property relating 87093Sgblack@eecs.umich.edu * to a hardware implementation of the functionality of the software 97093Sgblack@eecs.umich.edu * licensed hereunder. You may use the software subject to the license 107093Sgblack@eecs.umich.edu * terms below provided that you ensure that this notice is replicated 117093Sgblack@eecs.umich.edu * unmodified and in its entirety in all distributions of the software, 127093Sgblack@eecs.umich.edu * modified or unmodified, in source code or in binary form. 137093Sgblack@eecs.umich.edu * 146242Sgblack@eecs.umich.edu * Copyright (c) 2009 The Regents of The University of Michigan 156242Sgblack@eecs.umich.edu * All rights reserved. 166242Sgblack@eecs.umich.edu * 176242Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 186242Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 196242Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 206242Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 216242Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 226242Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 236242Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 246242Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 256242Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 266242Sgblack@eecs.umich.edu * this software without specific prior written permission. 276242Sgblack@eecs.umich.edu * 286242Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 296242Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 306242Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 316242Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 326242Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 336242Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 346242Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 356242Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 366242Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 376242Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 386242Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 396242Sgblack@eecs.umich.edu * 406242Sgblack@eecs.umich.edu * Authors: Gabe Black 416242Sgblack@eecs.umich.edu */ 426242Sgblack@eecs.umich.edu#ifndef __ARCH_ARM_MISCREGS_HH__ 436242Sgblack@eecs.umich.edu#define __ARCH_ARM_MISCREGS_HH__ 446242Sgblack@eecs.umich.edu 456242Sgblack@eecs.umich.edu#include "base/bitunion.hh" 466242Sgblack@eecs.umich.edu 476242Sgblack@eecs.umich.edunamespace ArmISA 486242Sgblack@eecs.umich.edu{ 496242Sgblack@eecs.umich.edu enum ConditionCode { 506242Sgblack@eecs.umich.edu COND_EQ = 0, 516242Sgblack@eecs.umich.edu COND_NE, // 1 526242Sgblack@eecs.umich.edu COND_CS, // 2 536242Sgblack@eecs.umich.edu COND_CC, // 3 546242Sgblack@eecs.umich.edu COND_MI, // 4 556242Sgblack@eecs.umich.edu COND_PL, // 5 566242Sgblack@eecs.umich.edu COND_VS, // 6 576242Sgblack@eecs.umich.edu COND_VC, // 7 586242Sgblack@eecs.umich.edu COND_HI, // 8 596242Sgblack@eecs.umich.edu COND_LS, // 9 606242Sgblack@eecs.umich.edu COND_GE, // 10 616242Sgblack@eecs.umich.edu COND_LT, // 11 626242Sgblack@eecs.umich.edu COND_GT, // 12 636242Sgblack@eecs.umich.edu COND_LE, // 13 646242Sgblack@eecs.umich.edu COND_AL, // 14 657111Sgblack@eecs.umich.edu COND_UC // 15 666242Sgblack@eecs.umich.edu }; 676242Sgblack@eecs.umich.edu 686242Sgblack@eecs.umich.edu enum MiscRegIndex { 696242Sgblack@eecs.umich.edu MISCREG_CPSR = 0, 706735Sgblack@eecs.umich.edu MISCREG_SPSR, 716242Sgblack@eecs.umich.edu MISCREG_SPSR_FIQ, 726242Sgblack@eecs.umich.edu MISCREG_SPSR_IRQ, 736242Sgblack@eecs.umich.edu MISCREG_SPSR_SVC, 746723Sgblack@eecs.umich.edu MISCREG_SPSR_MON, 756242Sgblack@eecs.umich.edu MISCREG_SPSR_UND, 766242Sgblack@eecs.umich.edu MISCREG_SPSR_ABT, 776261Sgblack@eecs.umich.edu MISCREG_FPSR, 786403Sgblack@eecs.umich.edu MISCREG_FPSID, 796403Sgblack@eecs.umich.edu MISCREG_FPSCR, 806403Sgblack@eecs.umich.edu MISCREG_FPEXC, 817259Sgblack@eecs.umich.edu 827259Sgblack@eecs.umich.edu // CP15 registers 837259Sgblack@eecs.umich.edu MISCREG_CP15_START, 847259Sgblack@eecs.umich.edu MISCREG_SCTLR = MISCREG_CP15_START, 857264Sgblack@eecs.umich.edu MISCREG_DCCISW, 867267Sgblack@eecs.umich.edu MISCREG_DCCIMVAC, 877285Sgblack@eecs.umich.edu MISCREG_DCCMVAC, 887265Sgblack@eecs.umich.edu MISCREG_CONTEXTIDR, 897266Sgblack@eecs.umich.edu MISCREG_TPIDRURW, 907266Sgblack@eecs.umich.edu MISCREG_TPIDRURO, 917266Sgblack@eecs.umich.edu MISCREG_TPIDRPRW, 927268Sgblack@eecs.umich.edu MISCREG_CP15ISB, 937272Sgblack@eecs.umich.edu MISCREG_CP15DSB, 947272Sgblack@eecs.umich.edu MISCREG_CP15DMB, 957271Sgblack@eecs.umich.edu MISCREG_CPACR, 967273Sgblack@eecs.umich.edu MISCREG_CLIDR, 977274Sgblack@eecs.umich.edu MISCREG_ICIALLUIS, 987275Sgblack@eecs.umich.edu MISCREG_ICIALLU, 997276Sgblack@eecs.umich.edu MISCREG_ICIMVAU, 1007259Sgblack@eecs.umich.edu MISCREG_CP15_UNIMP_START, 1017259Sgblack@eecs.umich.edu MISCREG_CTR = MISCREG_CP15_UNIMP_START, 1027259Sgblack@eecs.umich.edu MISCREG_TCMTR, 1037259Sgblack@eecs.umich.edu MISCREG_MPUIR, 1047259Sgblack@eecs.umich.edu MISCREG_MPIDR, 1057259Sgblack@eecs.umich.edu MISCREG_MIDR, 1067259Sgblack@eecs.umich.edu MISCREG_ID_PFR0, 1077259Sgblack@eecs.umich.edu MISCREG_ID_PFR1, 1087259Sgblack@eecs.umich.edu MISCREG_ID_DFR0, 1097259Sgblack@eecs.umich.edu MISCREG_ID_AFR0, 1107259Sgblack@eecs.umich.edu MISCREG_ID_MMFR0, 1117259Sgblack@eecs.umich.edu MISCREG_ID_MMFR1, 1127259Sgblack@eecs.umich.edu MISCREG_ID_MMFR2, 1137259Sgblack@eecs.umich.edu MISCREG_ID_MMFR3, 1147259Sgblack@eecs.umich.edu MISCREG_ID_ISAR0, 1157259Sgblack@eecs.umich.edu MISCREG_ID_ISAR1, 1167259Sgblack@eecs.umich.edu MISCREG_ID_ISAR2, 1177259Sgblack@eecs.umich.edu MISCREG_ID_ISAR3, 1187259Sgblack@eecs.umich.edu MISCREG_ID_ISAR4, 1197259Sgblack@eecs.umich.edu MISCREG_ID_ISAR5, 1207259Sgblack@eecs.umich.edu MISCREG_CCSIDR, 1217259Sgblack@eecs.umich.edu MISCREG_AIDR, 1227259Sgblack@eecs.umich.edu MISCREG_CSSELR, 1237259Sgblack@eecs.umich.edu MISCREG_ACTLR, 1247259Sgblack@eecs.umich.edu MISCREG_DFSR, 1257259Sgblack@eecs.umich.edu MISCREG_IFSR, 1267259Sgblack@eecs.umich.edu MISCREG_ADFSR, 1277259Sgblack@eecs.umich.edu MISCREG_AIFSR, 1287259Sgblack@eecs.umich.edu MISCREG_DFAR, 1297259Sgblack@eecs.umich.edu MISCREG_IFAR, 1307259Sgblack@eecs.umich.edu MISCREG_DRBAR, 1317259Sgblack@eecs.umich.edu MISCREG_IRBAR, 1327259Sgblack@eecs.umich.edu MISCREG_DRSR, 1337259Sgblack@eecs.umich.edu MISCREG_IRSR, 1347259Sgblack@eecs.umich.edu MISCREG_DRACR, 1357259Sgblack@eecs.umich.edu MISCREG_IRACR, 1367259Sgblack@eecs.umich.edu MISCREG_RGNR, 1377259Sgblack@eecs.umich.edu MISCREG_BPIALLIS, 1387259Sgblack@eecs.umich.edu MISCREG_BPIALL, 1397259Sgblack@eecs.umich.edu MISCREG_BPIMVA, 1407259Sgblack@eecs.umich.edu MISCREG_DCIMVAC, 1417259Sgblack@eecs.umich.edu MISCREG_DCISW, 1427259Sgblack@eecs.umich.edu MISCREG_MCCSW, 1437259Sgblack@eecs.umich.edu MISCREG_DCCMVAU, 1447259Sgblack@eecs.umich.edu 1457259Sgblack@eecs.umich.edu MISCREG_CP15_END, 1467259Sgblack@eecs.umich.edu 1477259Sgblack@eecs.umich.edu // Dummy indices 1487259Sgblack@eecs.umich.edu MISCREG_NOP = MISCREG_CP15_END, 1497259Sgblack@eecs.umich.edu MISCREG_RAZ, 1507259Sgblack@eecs.umich.edu 1516735Sgblack@eecs.umich.edu NUM_MISCREGS 1526261Sgblack@eecs.umich.edu }; 1536261Sgblack@eecs.umich.edu 1547259Sgblack@eecs.umich.edu MiscRegIndex decodeCP15Reg(unsigned crn, unsigned opc1, 1557259Sgblack@eecs.umich.edu unsigned crm, unsigned opc2); 1567259Sgblack@eecs.umich.edu 1576261Sgblack@eecs.umich.edu const char * const miscRegName[NUM_MISCREGS] = { 1587259Sgblack@eecs.umich.edu "cpsr", "spsr", "spsr_fiq", "spsr_irq", "spsr_svc", 1597259Sgblack@eecs.umich.edu "spsr_mon", "spsr_und", "spsr_abt", 1607259Sgblack@eecs.umich.edu "fpsr", "fpsid", "fpscr", "fpexc", 1617285Sgblack@eecs.umich.edu "sctlr", "dccisw", "dccimvac", "dccmvac", 1627267Sgblack@eecs.umich.edu "contextidr", "tpidrurw", "tpidruro", "tpidrprw", 1637275Sgblack@eecs.umich.edu "cp15isb", "cp15dsb", "cp15dmb", "cpacr", "clidr", 1647276Sgblack@eecs.umich.edu "icialluis", "iciallu", "icimvau", 1657272Sgblack@eecs.umich.edu "ctr", "tcmtr", "mpuir", "mpidr", "midr", 1667259Sgblack@eecs.umich.edu "id_pfr0", "id_pfr1", "id_dfr0", "id_afr0", 1677259Sgblack@eecs.umich.edu "id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3", 1687259Sgblack@eecs.umich.edu "id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5", 1697273Sgblack@eecs.umich.edu "ccsidr", "aidr", "csselr", "actlr", 1707259Sgblack@eecs.umich.edu "dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar", 1717259Sgblack@eecs.umich.edu "drbar", "irbar", "drsr", "irsr", "dracr", "iracr", 1727276Sgblack@eecs.umich.edu "rgnr", "bpiallis", 1737285Sgblack@eecs.umich.edu "bpiall", "bpimva", "dcimvac", "dcisw", "mccsw", 1747272Sgblack@eecs.umich.edu "dccmvau", 1757259Sgblack@eecs.umich.edu "nop", "raz" 1766242Sgblack@eecs.umich.edu }; 1776242Sgblack@eecs.umich.edu 1786242Sgblack@eecs.umich.edu BitUnion32(CPSR) 1796242Sgblack@eecs.umich.edu Bitfield<31> n; 1806242Sgblack@eecs.umich.edu Bitfield<30> z; 1816242Sgblack@eecs.umich.edu Bitfield<29> c; 1826242Sgblack@eecs.umich.edu Bitfield<28> v; 1836242Sgblack@eecs.umich.edu Bitfield<27> q; 1846735Sgblack@eecs.umich.edu Bitfield<26,25> it1; 1856242Sgblack@eecs.umich.edu Bitfield<24> j; 1866242Sgblack@eecs.umich.edu Bitfield<19, 16> ge; 1876735Sgblack@eecs.umich.edu Bitfield<15,10> it2; 1886242Sgblack@eecs.umich.edu Bitfield<9> e; 1896242Sgblack@eecs.umich.edu Bitfield<8> a; 1906242Sgblack@eecs.umich.edu Bitfield<7> i; 1916242Sgblack@eecs.umich.edu Bitfield<6> f; 1926242Sgblack@eecs.umich.edu Bitfield<5> t; 1936242Sgblack@eecs.umich.edu Bitfield<4, 0> mode; 1946242Sgblack@eecs.umich.edu EndBitUnion(CPSR) 1956735Sgblack@eecs.umich.edu 1966750Sgblack@eecs.umich.edu // This mask selects bits of the CPSR that actually go in the CondCodes 1976750Sgblack@eecs.umich.edu // integer register to allow renaming. 1986750Sgblack@eecs.umich.edu static const uint32_t CondCodesMask = 0xF80F0000; 1996750Sgblack@eecs.umich.edu 2007093Sgblack@eecs.umich.edu // These otherwise unused bits of the PC are used to select a mode 2017093Sgblack@eecs.umich.edu // like the J and T bits of the CPSR. 2027093Sgblack@eecs.umich.edu static const Addr PcJBitShift = 33; 2037093Sgblack@eecs.umich.edu static const Addr PcTBitShift = 34; 2047093Sgblack@eecs.umich.edu static const Addr PcModeMask = (ULL(1) << PcJBitShift) | 2057093Sgblack@eecs.umich.edu (ULL(1) << PcTBitShift); 2067093Sgblack@eecs.umich.edu 2076735Sgblack@eecs.umich.edu BitUnion32(SCTLR) 2086735Sgblack@eecs.umich.edu Bitfield<30> te; // Thumb Exception Enable 2096735Sgblack@eecs.umich.edu Bitfield<29> afe; // Access flag enable 2106735Sgblack@eecs.umich.edu Bitfield<28> tre; // TEX Remap bit 2116735Sgblack@eecs.umich.edu Bitfield<27> nmfi;// Non-maskable fast interrupts enable 2126735Sgblack@eecs.umich.edu Bitfield<25> ee; // Exception Endianness bit 2136735Sgblack@eecs.umich.edu Bitfield<24> ve; // Interrupt vectors enable 2146735Sgblack@eecs.umich.edu Bitfield<23> rao1;// Read as one 2156735Sgblack@eecs.umich.edu Bitfield<22> u; // Alignment (now unused) 2166735Sgblack@eecs.umich.edu Bitfield<21> fi; // Fast interrupts configuration enable 2176735Sgblack@eecs.umich.edu Bitfield<18> rao2;// Read as one 2186735Sgblack@eecs.umich.edu Bitfield<17> ha; // Hardware access flag enable 2196735Sgblack@eecs.umich.edu Bitfield<16> rao3;// Read as one 2206735Sgblack@eecs.umich.edu Bitfield<14> rr; // Round robin cache replacement 2216735Sgblack@eecs.umich.edu Bitfield<13> v; // Base address for exception vectors 2226735Sgblack@eecs.umich.edu Bitfield<12> i; // instruction cache enable 2236735Sgblack@eecs.umich.edu Bitfield<11> z; // branch prediction enable bit 2246735Sgblack@eecs.umich.edu Bitfield<10> sw; // Enable swp/swpb 2256735Sgblack@eecs.umich.edu Bitfield<6,3> rao4;// Read as one 2266735Sgblack@eecs.umich.edu Bitfield<7> b; // Endianness support (unused) 2276735Sgblack@eecs.umich.edu Bitfield<2> c; // Cache enable bit 2286735Sgblack@eecs.umich.edu Bitfield<1> a; // Alignment fault checking 2296735Sgblack@eecs.umich.edu Bitfield<0> m; // MMU enable bit 2306735Sgblack@eecs.umich.edu EndBitUnion(SCTLR) 2316242Sgblack@eecs.umich.edu}; 2326242Sgblack@eecs.umich.edu 2336242Sgblack@eecs.umich.edu#endif // __ARCH_ARM_MISCREGS_HH__ 234