linux.hh revision 11382
16019Shines@cs.fsu.edu/* 210850SGiacomo.Gabrielli@arm.com * Copyright (c) 2010, 2011-2012, 2015 ARM Limited 37416SAli.Saidi@ARM.com * All rights reserved 47416SAli.Saidi@ARM.com * 57416SAli.Saidi@ARM.com * The license below extends only to copyright in the software and shall 67416SAli.Saidi@ARM.com * not be construed as granting a license to any other intellectual 77416SAli.Saidi@ARM.com * property including but not limited to intellectual property relating 87416SAli.Saidi@ARM.com * to a hardware implementation of the functionality of the software 97416SAli.Saidi@ARM.com * licensed hereunder. You may use the software subject to the license 107416SAli.Saidi@ARM.com * terms below provided that you ensure that this notice is replicated 117416SAli.Saidi@ARM.com * unmodified and in its entirety in all distributions of the software, 127416SAli.Saidi@ARM.com * modified or unmodified, in source code or in binary form. 137416SAli.Saidi@ARM.com * 146019Shines@cs.fsu.edu * Copyright (c) 2003-2005 The Regents of The University of Michigan 156019Shines@cs.fsu.edu * Copyright (c) 2007-2008 The Florida State University 166019Shines@cs.fsu.edu * All rights reserved. 176019Shines@cs.fsu.edu * 186019Shines@cs.fsu.edu * Redistribution and use in source and binary forms, with or without 196019Shines@cs.fsu.edu * modification, are permitted provided that the following conditions are 206019Shines@cs.fsu.edu * met: redistributions of source code must retain the above copyright 216019Shines@cs.fsu.edu * notice, this list of conditions and the following disclaimer; 226019Shines@cs.fsu.edu * redistributions in binary form must reproduce the above copyright 236019Shines@cs.fsu.edu * notice, this list of conditions and the following disclaimer in the 246019Shines@cs.fsu.edu * documentation and/or other materials provided with the distribution; 256019Shines@cs.fsu.edu * neither the name of the copyright holders nor the names of its 266019Shines@cs.fsu.edu * contributors may be used to endorse or promote products derived from 276019Shines@cs.fsu.edu * this software without specific prior written permission. 286019Shines@cs.fsu.edu * 296019Shines@cs.fsu.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 306019Shines@cs.fsu.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 316019Shines@cs.fsu.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 326019Shines@cs.fsu.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 336019Shines@cs.fsu.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 346019Shines@cs.fsu.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 356019Shines@cs.fsu.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 366019Shines@cs.fsu.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 376019Shines@cs.fsu.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 386019Shines@cs.fsu.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 396019Shines@cs.fsu.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 406019Shines@cs.fsu.edu * 417416SAli.Saidi@ARM.com * Authors: Ali Saidi 427416SAli.Saidi@ARM.com * Stephen Hines 436019Shines@cs.fsu.edu */ 446019Shines@cs.fsu.edu 456019Shines@cs.fsu.edu#ifndef __ARCH_ARM_LINUX_LINUX_HH__ 466019Shines@cs.fsu.edu#define __ARCH_ARM_LINUX_LINUX_HH__ 476019Shines@cs.fsu.edu 486019Shines@cs.fsu.edu#include "kern/linux/linux.hh" 496019Shines@cs.fsu.edu 5010037SARM gem5 Developersclass ArmLinux32 : public Linux 516019Shines@cs.fsu.edu{ 526019Shines@cs.fsu.edu public: 536019Shines@cs.fsu.edu 5411382Sbrandon.potter@amd.com static const int TGT_SIGHUP = 0x000001; 5511382Sbrandon.potter@amd.com static const int TGT_SIGINT = 0x000002; 5611382Sbrandon.potter@amd.com static const int TGT_SIGQUIT = 0x000003; 5711382Sbrandon.potter@amd.com static const int TGT_SIGILL = 0x000004; 5811382Sbrandon.potter@amd.com static const int TGT_SIGTRAP = 0x000005; 5911382Sbrandon.potter@amd.com static const int TGT_SIGABRT = 0x000006; 6011382Sbrandon.potter@amd.com static const int TGT_SIGIOT = 0x000006; 6111382Sbrandon.potter@amd.com static const int TGT_SIGBUS = 0x000007; 6211382Sbrandon.potter@amd.com static const int TGT_SIGFPE = 0x000008; 6311382Sbrandon.potter@amd.com static const int TGT_SIGKILL = 0x000009; 6411382Sbrandon.potter@amd.com static const int TGT_SIGUSR1 = 0x00000a; 6511382Sbrandon.potter@amd.com static const int TGT_SIGSEGV = 0x00000b; 6611382Sbrandon.potter@amd.com static const int TGT_SIGUSR2 = 0x00000c; 6711382Sbrandon.potter@amd.com static const int TGT_SIGPIPE = 0x00000d; 6811382Sbrandon.potter@amd.com static const int TGT_SIGALRM = 0x00000e; 6911382Sbrandon.potter@amd.com static const int TGT_SIGTERM = 0x00000f; 7011382Sbrandon.potter@amd.com static const int TGT_SIGSTKFLT = 0x000010; 7111382Sbrandon.potter@amd.com static const int TGT_SIGCHLD = 0x000011; 7211382Sbrandon.potter@amd.com static const int TGT_SIGCONT = 0x000012; 7311382Sbrandon.potter@amd.com static const int TGT_SIGSTOP = 0x000013; 7411382Sbrandon.potter@amd.com static const int TGT_SIGTSTP = 0x000014; 7511382Sbrandon.potter@amd.com static const int TGT_SIGTTIN = 0x000015; 7611382Sbrandon.potter@amd.com static const int TGT_SIGTTOU = 0x000016; 7711382Sbrandon.potter@amd.com static const int TGT_SIGURG = 0x000017; 7811382Sbrandon.potter@amd.com static const int TGT_SIGXCPU = 0x000018; 7911382Sbrandon.potter@amd.com static const int TGT_SIGXFSZ = 0x000019; 8011382Sbrandon.potter@amd.com static const int TGT_SIGVTALRM = 0x00001a; 8111382Sbrandon.potter@amd.com static const int TGT_SIGPROF = 0x00001b; 8211382Sbrandon.potter@amd.com static const int TGT_SIGWINCH = 0x00001c; 8311382Sbrandon.potter@amd.com static const int TGT_SIGIO = 0x00001d; 8411382Sbrandon.potter@amd.com static const int TGT_SIGPOLL = 0x00001d; 8511382Sbrandon.potter@amd.com static const int TGT_SIGPWR = 0x00001e; 8611382Sbrandon.potter@amd.com static const int TGT_SIGSYS = 0x00001f; 8711382Sbrandon.potter@amd.com static const int TGT_SIGUNUSED = 0x00001f; 8811382Sbrandon.potter@amd.com 896019Shines@cs.fsu.edu /// This table maps the target open() flags to the corresponding 906019Shines@cs.fsu.edu /// host open() flags. 9111381Sbrandon.potter@amd.com static SyscallFlagTransTable openFlagTable[]; 926019Shines@cs.fsu.edu 936019Shines@cs.fsu.edu /// Number of entries in openFlagTable[]. 946019Shines@cs.fsu.edu static const int NUM_OPEN_FLAGS; 956019Shines@cs.fsu.edu 966019Shines@cs.fsu.edu //@{ 977416SAli.Saidi@ARM.com /// Basic ARM Linux types 987416SAli.Saidi@ARM.com typedef uint32_t size_t; 997416SAli.Saidi@ARM.com typedef uint32_t off_t; 1007416SAli.Saidi@ARM.com typedef int32_t time_t; 1017416SAli.Saidi@ARM.com typedef int32_t clock_t; 1027416SAli.Saidi@ARM.com //@} 1037416SAli.Saidi@ARM.com 1047416SAli.Saidi@ARM.com //@{ 1056019Shines@cs.fsu.edu /// open(2) flag values. 10611382Sbrandon.potter@amd.com static const int TGT_O_RDONLY = 000000000; //!< O_RDONLY 10711382Sbrandon.potter@amd.com static const int TGT_O_WRONLY = 000000001; //!< O_WRONLY 10811382Sbrandon.potter@amd.com static const int TGT_O_RDWR = 000000002; //!< O_RDWR 10911382Sbrandon.potter@amd.com static const int TGT_O_CREAT = 000000100; //!< O_CREAT 11011382Sbrandon.potter@amd.com static const int TGT_O_EXCL = 000000200; //!< O_EXCL 11111382Sbrandon.potter@amd.com static const int TGT_O_NOCTTY = 000000400; //!< O_NOCTTY 11211382Sbrandon.potter@amd.com static const int TGT_O_TRUNC = 000001000; //!< O_TRUNC 11311382Sbrandon.potter@amd.com static const int TGT_O_APPEND = 000002000; //!< O_APPEND 11411382Sbrandon.potter@amd.com static const int TGT_O_NONBLOCK = 000004000; //!< O_NONBLOCK 11511382Sbrandon.potter@amd.com static const int TGT_O_DSYNC = 000010000; //!< O_DSYNC 11611382Sbrandon.potter@amd.com static const int TGT_FASYNC = 000020000; //!< FASYNC 11711382Sbrandon.potter@amd.com static const int TGT_O_DIRECT = 000200000; //!< O_DIRECT 11811382Sbrandon.potter@amd.com static const int TGT_O_LARGEFILE = 000400000; //!< O_LARGEFILE 11911382Sbrandon.potter@amd.com static const int TGT_O_DIRECTORY = 000040000; //!< O_DIRECTORY 12011382Sbrandon.potter@amd.com static const int TGT_O_NOFOLLOW = 000100000; //!< O_NOFOLLOW 12111382Sbrandon.potter@amd.com static const int TGT_O_NOATIME = 001000000; //!< O_NOATIME 12211382Sbrandon.potter@amd.com static const int TGT_O_CLOEXEC = 002000000; //!< O_NOATIME 12311382Sbrandon.potter@amd.com static const int TGT_O_SYNC = 004010000; //!< O_SYNC 12411382Sbrandon.potter@amd.com static const int TGT_O_PATH = 010000000; //!< O_PATH 1256019Shines@cs.fsu.edu //@} 1266019Shines@cs.fsu.edu 1276019Shines@cs.fsu.edu /// For mmap(). 1286413Ssaidi@eecs.umich.edu static const unsigned TGT_MAP_ANONYMOUS = 0x20; 1298600Ssteve.reinhardt@amd.com static const unsigned TGT_MAP_FIXED = 0x10; 1306019Shines@cs.fsu.edu 1316019Shines@cs.fsu.edu /// For table(). 1326019Shines@cs.fsu.edu static const int TBL_SYSINFO = 12; 1336019Shines@cs.fsu.edu 1347416SAli.Saidi@ARM.com /// Limit struct for getrlimit/setrlimit. 1357416SAli.Saidi@ARM.com struct rlimit { 1367416SAli.Saidi@ARM.com uint32_t rlim_cur; //!< soft limit 1377416SAli.Saidi@ARM.com uint32_t rlim_max; //!< hard limit 1387416SAli.Saidi@ARM.com }; 1397416SAli.Saidi@ARM.com 1407416SAli.Saidi@ARM.com /// For gettimeofday(). 1417416SAli.Saidi@ARM.com struct timeval { 1427416SAli.Saidi@ARM.com int32_t tv_sec; //!< seconds 1437416SAli.Saidi@ARM.com int32_t tv_usec; //!< microseconds 1447416SAli.Saidi@ARM.com }; 1457416SAli.Saidi@ARM.com 14610850SGiacomo.Gabrielli@arm.com struct timespec { 14710850SGiacomo.Gabrielli@arm.com int32_t tv_sec; //!< seconds 14810850SGiacomo.Gabrielli@arm.com int32_t tv_nsec; //!< nanoseconds 14910850SGiacomo.Gabrielli@arm.com }; 15010850SGiacomo.Gabrielli@arm.com 1517416SAli.Saidi@ARM.com // For writev/readv 1527416SAli.Saidi@ARM.com struct tgt_iovec { 1537416SAli.Saidi@ARM.com uint32_t iov_base; // void * 1547416SAli.Saidi@ARM.com uint32_t iov_len; 1557416SAli.Saidi@ARM.com }; 1567416SAli.Saidi@ARM.com 1577416SAli.Saidi@ARM.com 1586395Ssaidi@eecs.umich.edu typedef struct { 1596395Ssaidi@eecs.umich.edu uint32_t st_dev; 1606395Ssaidi@eecs.umich.edu uint32_t st_ino; 1616395Ssaidi@eecs.umich.edu uint16_t st_mode; 1626395Ssaidi@eecs.umich.edu uint16_t st_nlink; 1636395Ssaidi@eecs.umich.edu uint16_t st_uid; 1646395Ssaidi@eecs.umich.edu uint16_t st_gid; 1656395Ssaidi@eecs.umich.edu uint32_t st_rdev; 16610037SARM gem5 Developers uint32_t __pad1; 1676395Ssaidi@eecs.umich.edu uint32_t st_size; 1686395Ssaidi@eecs.umich.edu uint32_t st_blksize; 16910037SARM gem5 Developers uint32_t __pad2; 1706395Ssaidi@eecs.umich.edu uint32_t st_blocks; 1716395Ssaidi@eecs.umich.edu uint32_t st_atimeX; 1726395Ssaidi@eecs.umich.edu uint32_t st_atime_nsec; 1736395Ssaidi@eecs.umich.edu uint32_t st_mtimeX; 1746395Ssaidi@eecs.umich.edu uint32_t st_mtime_nsec; 1756395Ssaidi@eecs.umich.edu uint32_t st_ctimeX; 1766395Ssaidi@eecs.umich.edu uint32_t st_ctime_nsec; 1776395Ssaidi@eecs.umich.edu } tgt_stat; 1786395Ssaidi@eecs.umich.edu 1796395Ssaidi@eecs.umich.edu typedef struct { 1806395Ssaidi@eecs.umich.edu uint64_t st_dev; 1816395Ssaidi@eecs.umich.edu uint8_t __pad0[4]; 1826395Ssaidi@eecs.umich.edu uint32_t __st_ino; 1836395Ssaidi@eecs.umich.edu uint32_t st_mode; 1846395Ssaidi@eecs.umich.edu uint32_t st_nlink; 1856395Ssaidi@eecs.umich.edu uint32_t st_uid; 1866395Ssaidi@eecs.umich.edu uint32_t st_gid; 1876395Ssaidi@eecs.umich.edu uint64_t st_rdev; 1886395Ssaidi@eecs.umich.edu uint8_t __pad3[4]; 1896395Ssaidi@eecs.umich.edu int64_t __attribute__ ((aligned (8))) st_size; 1906395Ssaidi@eecs.umich.edu uint32_t st_blksize; 1916395Ssaidi@eecs.umich.edu uint64_t __attribute__ ((aligned (8))) st_blocks; 1926395Ssaidi@eecs.umich.edu uint32_t st_atimeX; 1936395Ssaidi@eecs.umich.edu uint32_t st_atime_nsec; 1946395Ssaidi@eecs.umich.edu uint32_t st_mtimeX; 1956395Ssaidi@eecs.umich.edu uint32_t st_mtime_nsec; 1966395Ssaidi@eecs.umich.edu uint32_t st_ctimeX; 1976395Ssaidi@eecs.umich.edu uint32_t st_ctime_nsec; 1986395Ssaidi@eecs.umich.edu uint64_t st_ino; 1996395Ssaidi@eecs.umich.edu } tgt_stat64; 2006395Ssaidi@eecs.umich.edu 2016640Svince@csl.cornell.edu typedef struct { 2026640Svince@csl.cornell.edu int32_t uptime; /* Seconds since boot */ 2036640Svince@csl.cornell.edu uint32_t loads[3]; /* 1, 5, and 15 minute load averages */ 2046640Svince@csl.cornell.edu uint32_t totalram; /* Total usable main memory size */ 2056640Svince@csl.cornell.edu uint32_t freeram; /* Available memory size */ 2066640Svince@csl.cornell.edu uint32_t sharedram; /* Amount of shared memory */ 2076640Svince@csl.cornell.edu uint32_t bufferram; /* Memory used by buffers */ 2086640Svince@csl.cornell.edu uint32_t totalswap; /* Total swap space size */ 2096640Svince@csl.cornell.edu uint32_t freeswap; /* swap space still available */ 2106640Svince@csl.cornell.edu uint16_t procs; /* Number of current processes */ 2116640Svince@csl.cornell.edu uint32_t totalhigh; /* Total high memory size */ 2126640Svince@csl.cornell.edu uint32_t freehigh; /* Available high memory size */ 2136640Svince@csl.cornell.edu uint32_t mem_unit; /* Memory unit size in bytes */ 2146640Svince@csl.cornell.edu } tgt_sysinfo; 21511320Ssteve.reinhardt@amd.com 2167416SAli.Saidi@ARM.com /// For getrusage(). 2177416SAli.Saidi@ARM.com struct rusage { 2187416SAli.Saidi@ARM.com struct timeval ru_utime; //!< user time used 2197416SAli.Saidi@ARM.com struct timeval ru_stime; //!< system time used 2207416SAli.Saidi@ARM.com int32_t ru_maxrss; //!< max rss 2217416SAli.Saidi@ARM.com int32_t ru_ixrss; //!< integral shared memory size 2227416SAli.Saidi@ARM.com int32_t ru_idrss; //!< integral unshared data " 2237416SAli.Saidi@ARM.com int32_t ru_isrss; //!< integral unshared stack " 2247416SAli.Saidi@ARM.com int32_t ru_minflt; //!< page reclaims - total vmfaults 2257416SAli.Saidi@ARM.com int32_t ru_majflt; //!< page faults 2267416SAli.Saidi@ARM.com int32_t ru_nswap; //!< swaps 2277416SAli.Saidi@ARM.com int32_t ru_inblock; //!< block input operations 2287416SAli.Saidi@ARM.com int32_t ru_oublock; //!< block output operations 2297416SAli.Saidi@ARM.com int32_t ru_msgsnd; //!< messages sent 2307416SAli.Saidi@ARM.com int32_t ru_msgrcv; //!< messages received 2317416SAli.Saidi@ARM.com int32_t ru_nsignals; //!< signals received 2327416SAli.Saidi@ARM.com int32_t ru_nvcsw; //!< voluntary context switches 2337416SAli.Saidi@ARM.com int32_t ru_nivcsw; //!< involuntary " 2347416SAli.Saidi@ARM.com }; 2357416SAli.Saidi@ARM.com 2367416SAli.Saidi@ARM.com /// For times(). 2377416SAli.Saidi@ARM.com struct tms { 2387416SAli.Saidi@ARM.com int32_t tms_utime; //!< user time 2397416SAli.Saidi@ARM.com int32_t tms_stime; //!< system time 2407416SAli.Saidi@ARM.com int32_t tms_cutime; //!< user time of children 2417416SAli.Saidi@ARM.com int32_t tms_cstime; //!< system time of children 2427416SAli.Saidi@ARM.com }; 24310037SARM gem5 Developers}; 2447416SAli.Saidi@ARM.com 24510037SARM gem5 Developersclass ArmLinux64 : public Linux 24610037SARM gem5 Developers{ 24710037SARM gem5 Developers public: 2486395Ssaidi@eecs.umich.edu 24911382Sbrandon.potter@amd.com static const int TGT_SIGHUP = 0x000001; 25011382Sbrandon.potter@amd.com static const int TGT_SIGINT = 0x000002; 25111382Sbrandon.potter@amd.com static const int TGT_SIGQUIT = 0x000003; 25211382Sbrandon.potter@amd.com static const int TGT_SIGILL = 0x000004; 25311382Sbrandon.potter@amd.com static const int TGT_SIGTRAP = 0x000005; 25411382Sbrandon.potter@amd.com static const int TGT_SIGABRT = 0x000006; 25511382Sbrandon.potter@amd.com static const int TGT_SIGIOT = 0x000006; 25611382Sbrandon.potter@amd.com static const int TGT_SIGBUS = 0x000007; 25711382Sbrandon.potter@amd.com static const int TGT_SIGFPE = 0x000008; 25811382Sbrandon.potter@amd.com static const int TGT_SIGKILL = 0x000009; 25911382Sbrandon.potter@amd.com static const int TGT_SIGUSR1 = 0x00000a; 26011382Sbrandon.potter@amd.com static const int TGT_SIGSEGV = 0x00000b; 26111382Sbrandon.potter@amd.com static const int TGT_SIGUSR2 = 0x00000c; 26211382Sbrandon.potter@amd.com static const int TGT_SIGPIPE = 0x00000d; 26311382Sbrandon.potter@amd.com static const int TGT_SIGALRM = 0x00000e; 26411382Sbrandon.potter@amd.com static const int TGT_SIGTERM = 0x00000f; 26511382Sbrandon.potter@amd.com static const int TGT_SIGSTKFLT = 0x000010; 26611382Sbrandon.potter@amd.com static const int TGT_SIGCHLD = 0x000011; 26711382Sbrandon.potter@amd.com static const int TGT_SIGCONT = 0x000012; 26811382Sbrandon.potter@amd.com static const int TGT_SIGSTOP = 0x000013; 26911382Sbrandon.potter@amd.com static const int TGT_SIGTSTP = 0x000014; 27011382Sbrandon.potter@amd.com static const int TGT_SIGTTIN = 0x000015; 27111382Sbrandon.potter@amd.com static const int TGT_SIGTTOU = 0x000016; 27211382Sbrandon.potter@amd.com static const int TGT_SIGURG = 0x000017; 27311382Sbrandon.potter@amd.com static const int TGT_SIGXCPU = 0x000018; 27411382Sbrandon.potter@amd.com static const int TGT_SIGXFSZ = 0x000019; 27511382Sbrandon.potter@amd.com static const int TGT_SIGVTALRM = 0x00001a; 27611382Sbrandon.potter@amd.com static const int TGT_SIGPROF = 0x00001b; 27711382Sbrandon.potter@amd.com static const int TGT_SIGWINCH = 0x00001c; 27811382Sbrandon.potter@amd.com static const int TGT_SIGIO = 0x00001d; 27911382Sbrandon.potter@amd.com static const int TGT_SIGPOLL = 0x00001d; 28011382Sbrandon.potter@amd.com static const int TGT_SIGPWR = 0x00001e; 28111382Sbrandon.potter@amd.com static const int TGT_SIGSYS = 0x00001f; 28211382Sbrandon.potter@amd.com static const int TGT_SIGUNUSED = 0x00001f; 28311382Sbrandon.potter@amd.com 28410037SARM gem5 Developers /// This table maps the target open() flags to the corresponding 28510037SARM gem5 Developers /// host open() flags. 28611381Sbrandon.potter@amd.com static SyscallFlagTransTable openFlagTable[]; 28710037SARM gem5 Developers 28810037SARM gem5 Developers /// Number of entries in openFlagTable[]. 28910037SARM gem5 Developers static const int NUM_OPEN_FLAGS; 29010037SARM gem5 Developers 29110037SARM gem5 Developers //@{ 29210037SARM gem5 Developers /// Basic ARM Linux types 29310037SARM gem5 Developers typedef uint64_t size_t; 29410037SARM gem5 Developers typedef uint64_t off_t; 29510037SARM gem5 Developers typedef int64_t time_t; 29610037SARM gem5 Developers typedef int64_t clock_t; 29710037SARM gem5 Developers //@} 29810037SARM gem5 Developers 29910037SARM gem5 Developers //@{ 30010037SARM gem5 Developers /// open(2) flag values. 30111382Sbrandon.potter@amd.com static const int TGT_O_RDONLY = 000000000; //!< O_RDONLY 30211382Sbrandon.potter@amd.com static const int TGT_O_WRONLY = 000000001; //!< O_WRONLY 30311382Sbrandon.potter@amd.com static const int TGT_O_RDWR = 000000002; //!< O_RDWR 30411382Sbrandon.potter@amd.com static const int TGT_O_CREAT = 000000100; //!< O_CREAT 30511382Sbrandon.potter@amd.com static const int TGT_O_EXCL = 000000200; //!< O_EXCL 30611382Sbrandon.potter@amd.com static const int TGT_O_NOCTTY = 000000400; //!< O_NOCTTY 30711382Sbrandon.potter@amd.com static const int TGT_O_TRUNC = 000001000; //!< O_TRUNC 30811382Sbrandon.potter@amd.com static const int TGT_O_APPEND = 000002000; //!< O_APPEND 30911382Sbrandon.potter@amd.com static const int TGT_O_NONBLOCK = 000004000; //!< O_NONBLOCK 31011382Sbrandon.potter@amd.com static const int TGT_O_DSYNC = 000010000; //!< O_DSYNC 31111382Sbrandon.potter@amd.com static const int TGT_FASYNC = 000020000; //!< FASYNC 31211382Sbrandon.potter@amd.com static const int TGT_O_DIRECT = 000200000; //!< O_DIRECT 31311382Sbrandon.potter@amd.com static const int TGT_O_LARGEFILE = 000400000; //!< O_LARGEFILE 31411382Sbrandon.potter@amd.com static const int TGT_O_DIRECTORY = 000040000; //!< O_DIRECTORY 31511382Sbrandon.potter@amd.com static const int TGT_O_NOFOLLOW = 000100000; //!< O_NOFOLLOW 31611382Sbrandon.potter@amd.com static const int TGT_O_NOATIME = 001000000; //!< O_NOATIME 31711382Sbrandon.potter@amd.com static const int TGT_O_CLOEXEC = 002000000; //!< O_NOATIME 31811382Sbrandon.potter@amd.com static const int TGT_O_SYNC = 004010000; //!< O_SYNC 31911382Sbrandon.potter@amd.com static const int TGT_O_PATH = 010000000; //!< O_PATH 32010037SARM gem5 Developers //@} 32110037SARM gem5 Developers 32210037SARM gem5 Developers /// For mmap(). 32310037SARM gem5 Developers static const unsigned TGT_MAP_ANONYMOUS = 0x20; 32410037SARM gem5 Developers static const unsigned TGT_MAP_FIXED = 0x10; 32510037SARM gem5 Developers 32610037SARM gem5 Developers //@{ 32710037SARM gem5 Developers /// For getrusage(). 32810037SARM gem5 Developers static const int TGT_RUSAGE_SELF = 0; 32910037SARM gem5 Developers static const int TGT_RUSAGE_CHILDREN = -1; 33010037SARM gem5 Developers static const int TGT_RUSAGE_BOTH = -2; 33110037SARM gem5 Developers //@} 33210037SARM gem5 Developers 33310037SARM gem5 Developers //@{ 33410037SARM gem5 Developers /// ioctl() command codes. 33510037SARM gem5 Developers static const unsigned TIOCGETP_ = 0x5401; 33610037SARM gem5 Developers static const unsigned TIOCSETP_ = 0x80067409; 33710037SARM gem5 Developers static const unsigned TIOCSETN_ = 0x8006740a; 33810037SARM gem5 Developers static const unsigned TIOCSETC_ = 0x80067411; 33910037SARM gem5 Developers static const unsigned TIOCGETC_ = 0x40067412; 34010037SARM gem5 Developers static const unsigned FIONREAD_ = 0x4004667f; 34110037SARM gem5 Developers static const unsigned TIOCISATTY_ = 0x2000745e; 34210037SARM gem5 Developers static const unsigned TIOCGETS_ = 0x402c7413; 34310037SARM gem5 Developers static const unsigned TIOCGETA_ = 0x5405; 34410037SARM gem5 Developers static const unsigned TCSETAW_ = 0x5407; // 2.6.15 kernel 34510037SARM gem5 Developers //@} 34610037SARM gem5 Developers 34710037SARM gem5 Developers /// For table(). 34810037SARM gem5 Developers static const int TBL_SYSINFO = 12; 34910037SARM gem5 Developers 35010037SARM gem5 Developers /// Resource enumeration for getrlimit(). 35110037SARM gem5 Developers enum rlimit_resources { 35210037SARM gem5 Developers TGT_RLIMIT_CPU = 0, 35310037SARM gem5 Developers TGT_RLIMIT_FSIZE = 1, 35410037SARM gem5 Developers TGT_RLIMIT_DATA = 2, 35510037SARM gem5 Developers TGT_RLIMIT_STACK = 3, 35610037SARM gem5 Developers TGT_RLIMIT_CORE = 4, 35710037SARM gem5 Developers TGT_RLIMIT_RSS = 5, 35810037SARM gem5 Developers TGT_RLIMIT_NPROC = 6, 35910037SARM gem5 Developers TGT_RLIMIT_NOFILE = 7, 36010037SARM gem5 Developers TGT_RLIMIT_MEMLOCK = 8, 36110037SARM gem5 Developers TGT_RLIMIT_AS = 9, 36210037SARM gem5 Developers TGT_RLIMIT_LOCKS = 10 36310037SARM gem5 Developers }; 36410037SARM gem5 Developers 36510037SARM gem5 Developers /// Limit struct for getrlimit/setrlimit. 36610037SARM gem5 Developers struct rlimit { 36710037SARM gem5 Developers uint64_t rlim_cur; //!< soft limit 36810037SARM gem5 Developers uint64_t rlim_max; //!< hard limit 36910037SARM gem5 Developers }; 37010037SARM gem5 Developers 37110037SARM gem5 Developers /// For gettimeofday(). 37210037SARM gem5 Developers struct timeval { 37310037SARM gem5 Developers int64_t tv_sec; //!< seconds 37410037SARM gem5 Developers int64_t tv_usec; //!< microseconds 37510037SARM gem5 Developers }; 37610037SARM gem5 Developers 37710850SGiacomo.Gabrielli@arm.com struct timespec { 37810850SGiacomo.Gabrielli@arm.com int64_t tv_sec; //!< seconds 37910850SGiacomo.Gabrielli@arm.com int64_t tv_nsec; //!< nanoseconds 38010850SGiacomo.Gabrielli@arm.com }; 38110850SGiacomo.Gabrielli@arm.com 38210037SARM gem5 Developers // For writev/readv 38310037SARM gem5 Developers struct tgt_iovec { 38410037SARM gem5 Developers uint64_t iov_base; // void * 38510037SARM gem5 Developers uint64_t iov_len; 38610037SARM gem5 Developers }; 38710037SARM gem5 Developers 38810037SARM gem5 Developers typedef struct { 38910037SARM gem5 Developers uint64_t st_dev; 39010037SARM gem5 Developers uint64_t st_ino; 39110037SARM gem5 Developers uint64_t st_nlink; 39210037SARM gem5 Developers uint32_t st_mode; 39310037SARM gem5 Developers uint32_t st_uid; 39410037SARM gem5 Developers uint32_t st_gid; 39510037SARM gem5 Developers uint32_t __pad0; 39610037SARM gem5 Developers uint64_t st_rdev; 39710037SARM gem5 Developers uint64_t st_size; 39810037SARM gem5 Developers uint64_t st_blksize; 39910037SARM gem5 Developers uint64_t st_blocks; 40010037SARM gem5 Developers uint64_t st_atimeX; 40110037SARM gem5 Developers uint64_t st_atime_nsec; 40210037SARM gem5 Developers uint64_t st_mtimeX; 40310037SARM gem5 Developers uint64_t st_mtime_nsec; 40410037SARM gem5 Developers uint64_t st_ctimeX; 40510037SARM gem5 Developers uint64_t st_ctime_nsec; 40610037SARM gem5 Developers } tgt_stat; 40710037SARM gem5 Developers 40810037SARM gem5 Developers typedef struct { 40910037SARM gem5 Developers uint64_t st_dev; 41010037SARM gem5 Developers uint64_t st_ino; 41110037SARM gem5 Developers uint32_t st_mode; 41210037SARM gem5 Developers uint32_t st_nlink; 41310037SARM gem5 Developers uint32_t st_uid; 41410037SARM gem5 Developers uint32_t st_gid; 41510037SARM gem5 Developers uint32_t __pad0; 41610037SARM gem5 Developers uint64_t st_rdev; 41710037SARM gem5 Developers uint64_t st_size; 41810037SARM gem5 Developers uint64_t st_blksize; 41910037SARM gem5 Developers uint64_t st_blocks; 42010037SARM gem5 Developers uint64_t st_atimeX; 42110037SARM gem5 Developers uint64_t st_atime_nsec; 42210037SARM gem5 Developers uint64_t st_mtimeX; 42310037SARM gem5 Developers uint64_t st_mtime_nsec; 42410037SARM gem5 Developers uint64_t st_ctimeX; 42510037SARM gem5 Developers uint64_t st_ctime_nsec; 42610037SARM gem5 Developers } tgt_stat64; 42710037SARM gem5 Developers 42810037SARM gem5 Developers typedef struct { 42910037SARM gem5 Developers int64_t uptime; /* Seconds since boot */ 43010037SARM gem5 Developers uint64_t loads[3]; /* 1, 5, and 15 minute load averages */ 43110037SARM gem5 Developers uint64_t totalram; /* Total usable main memory size */ 43210037SARM gem5 Developers uint64_t freeram; /* Available memory size */ 43310037SARM gem5 Developers uint64_t sharedram; /* Amount of shared memory */ 43410037SARM gem5 Developers uint64_t bufferram; /* Memory used by buffers */ 43510037SARM gem5 Developers uint64_t totalswap; /* Total swap space size */ 43610037SARM gem5 Developers uint64_t freeswap; /* swap space still available */ 43710037SARM gem5 Developers uint16_t procs; /* Number of current processes */ 43810037SARM gem5 Developers uint16_t pad; 43910037SARM gem5 Developers uint64_t totalhigh; /* Total high memory size */ 44010037SARM gem5 Developers uint64_t freehigh; /* Available high memory size */ 44110037SARM gem5 Developers uint32_t mem_unit; /* Memory unit size in bytes */ 44210037SARM gem5 Developers } tgt_sysinfo; 44310037SARM gem5 Developers 44410037SARM gem5 Developers /// For getrusage(). 44510037SARM gem5 Developers struct rusage { 44610037SARM gem5 Developers struct timeval ru_utime; //!< user time used 44710037SARM gem5 Developers struct timeval ru_stime; //!< system time used 44810037SARM gem5 Developers int64_t ru_maxrss; //!< max rss 44910037SARM gem5 Developers int64_t ru_ixrss; //!< integral shared memory size 45010037SARM gem5 Developers int64_t ru_idrss; //!< integral unshared data " 45110037SARM gem5 Developers int64_t ru_isrss; //!< integral unshared stack " 45210037SARM gem5 Developers int64_t ru_minflt; //!< page reclaims - total vmfaults 45310037SARM gem5 Developers int64_t ru_majflt; //!< page faults 45410037SARM gem5 Developers int64_t ru_nswap; //!< swaps 45510037SARM gem5 Developers int64_t ru_inblock; //!< block input operations 45610037SARM gem5 Developers int64_t ru_oublock; //!< block output operations 45710037SARM gem5 Developers int64_t ru_msgsnd; //!< messages sent 45810037SARM gem5 Developers int64_t ru_msgrcv; //!< messages received 45910037SARM gem5 Developers int64_t ru_nsignals; //!< signals received 46010037SARM gem5 Developers int64_t ru_nvcsw; //!< voluntary context switches 46110037SARM gem5 Developers int64_t ru_nivcsw; //!< involuntary " 46210037SARM gem5 Developers }; 46310037SARM gem5 Developers 46410037SARM gem5 Developers /// For times(). 46510037SARM gem5 Developers struct tms { 46610037SARM gem5 Developers int64_t tms_utime; //!< user time 46710037SARM gem5 Developers int64_t tms_stime; //!< system time 46810037SARM gem5 Developers int64_t tms_cutime; //!< user time of children 46910037SARM gem5 Developers int64_t tms_cstime; //!< system time of children 47010037SARM gem5 Developers }; 4716019Shines@cs.fsu.edu}; 4726019Shines@cs.fsu.edu 4736019Shines@cs.fsu.edu#endif 474