gic.cc revision 10905:a6ca6831e775
1/* 2 * Copyright (c) 2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions are 16 * met: redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer; 18 * redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution; 21 * neither the name of the copyright holders nor the names of its 22 * contributors may be used to endorse or promote products derived from 23 * this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Authors: Andreas Sandberg 38 */ 39 40#include "arch/arm/kvm/gic.hh" 41 42#include <linux/kvm.h> 43 44#include "debug/Interrupt.hh" 45#include "params/KvmGic.hh" 46 47KvmGic::KvmGic(const KvmGicParams *p) 48 : BaseGic(p), 49 system(*p->system), 50 vm(*p->kvmVM), 51 kdev(vm.createDevice(KVM_DEV_TYPE_ARM_VGIC_V2)), 52 distRange(RangeSize(p->dist_addr, KVM_VGIC_V2_DIST_SIZE)), 53 cpuRange(RangeSize(p->cpu_addr, KVM_VGIC_V2_CPU_SIZE)), 54 addrRanges{distRange, cpuRange} 55{ 56 kdev.setAttr<uint64_t>( 57 KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_DIST, 58 p->dist_addr); 59 kdev.setAttr<uint64_t>( 60 KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_CPU, 61 p->cpu_addr); 62} 63 64KvmGic::~KvmGic() 65{ 66} 67 68void 69KvmGic::serialize(CheckpointOut &cp) const 70{ 71 panic("Checkpointing unsupported\n"); 72} 73 74void 75KvmGic::unserialize(CheckpointIn &cp) 76{ 77 panic("Checkpointing unsupported\n"); 78} 79 80Tick 81KvmGic::read(PacketPtr pkt) 82{ 83 panic("KvmGic: PIO from gem5 is currently unsupported\n"); 84} 85 86Tick 87KvmGic::write(PacketPtr pkt) 88{ 89 panic("KvmGic: PIO from gem5 is currently unsupported\n"); 90} 91 92void 93KvmGic::sendInt(uint32_t num) 94{ 95 DPRINTF(Interrupt, "Set SPI %d\n", num); 96 setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, num, true); 97} 98 99void 100KvmGic::clearInt(uint32_t num) 101{ 102 DPRINTF(Interrupt, "Clear SPI %d\n", num); 103 setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, num, false); 104} 105 106void 107KvmGic::sendPPInt(uint32_t num, uint32_t cpu) 108{ 109 DPRINTF(Interrupt, "Set PPI %d:%d\n", cpu, num); 110 setIntState(KVM_ARM_IRQ_TYPE_PPI, cpu, num, true); 111} 112 113void 114KvmGic::clearPPInt(uint32_t num, uint32_t cpu) 115{ 116 DPRINTF(Interrupt, "Clear PPI %d:%d\n", cpu, num); 117 setIntState(KVM_ARM_IRQ_TYPE_PPI, cpu, num, false); 118} 119 120void 121KvmGic::verifyMemoryMode() const 122{ 123 if (!(system.isAtomicMode() && system.bypassCaches())) { 124 fatal("The in-kernel KVM GIC can only be used with KVM CPUs, but the " 125 "current memory mode does not support KVM.\n"); 126 } 127} 128 129void 130KvmGic::setIntState(uint8_t type, uint8_t vcpu, uint16_t irq, bool high) 131{ 132 assert(type < KVM_ARM_IRQ_TYPE_MASK); 133 assert(vcpu < KVM_ARM_IRQ_VCPU_MASK); 134 assert(irq < KVM_ARM_IRQ_NUM_MASK); 135 const uint32_t line( 136 (type << KVM_ARM_IRQ_TYPE_SHIFT) | 137 (vcpu << KVM_ARM_IRQ_VCPU_SHIFT) | 138 (irq << KVM_ARM_IRQ_NUM_SHIFT)); 139 140 vm.setIRQLine(line, high); 141} 142 143 144KvmGic * 145KvmGicParams::create() 146{ 147 return new KvmGic(this); 148} 149