gic.cc revision 11840
110859Sandreas.sandberg@arm.com/* 211840SCurtis.Dunham@arm.com * Copyright (c) 2015-2017 ARM Limited 310859Sandreas.sandberg@arm.com * All rights reserved 410859Sandreas.sandberg@arm.com * 510859Sandreas.sandberg@arm.com * The license below extends only to copyright in the software and shall 610859Sandreas.sandberg@arm.com * not be construed as granting a license to any other intellectual 710859Sandreas.sandberg@arm.com * property including but not limited to intellectual property relating 810859Sandreas.sandberg@arm.com * to a hardware implementation of the functionality of the software 910859Sandreas.sandberg@arm.com * licensed hereunder. You may use the software subject to the license 1010859Sandreas.sandberg@arm.com * terms below provided that you ensure that this notice is replicated 1110859Sandreas.sandberg@arm.com * unmodified and in its entirety in all distributions of the software, 1210859Sandreas.sandberg@arm.com * modified or unmodified, in source code or in binary form. 1310859Sandreas.sandberg@arm.com * 1410859Sandreas.sandberg@arm.com * Redistribution and use in source and binary forms, with or without 1510859Sandreas.sandberg@arm.com * modification, are permitted provided that the following conditions are 1610859Sandreas.sandberg@arm.com * met: redistributions of source code must retain the above copyright 1710859Sandreas.sandberg@arm.com * notice, this list of conditions and the following disclaimer; 1810859Sandreas.sandberg@arm.com * redistributions in binary form must reproduce the above copyright 1910859Sandreas.sandberg@arm.com * notice, this list of conditions and the following disclaimer in the 2010859Sandreas.sandberg@arm.com * documentation and/or other materials provided with the distribution; 2110859Sandreas.sandberg@arm.com * neither the name of the copyright holders nor the names of its 2210859Sandreas.sandberg@arm.com * contributors may be used to endorse or promote products derived from 2310859Sandreas.sandberg@arm.com * this software without specific prior written permission. 2410859Sandreas.sandberg@arm.com * 2510859Sandreas.sandberg@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2610859Sandreas.sandberg@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2710859Sandreas.sandberg@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2810859Sandreas.sandberg@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2910859Sandreas.sandberg@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3010859Sandreas.sandberg@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3110859Sandreas.sandberg@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3210859Sandreas.sandberg@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3310859Sandreas.sandberg@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3410859Sandreas.sandberg@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3510859Sandreas.sandberg@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3610859Sandreas.sandberg@arm.com * 3710859Sandreas.sandberg@arm.com * Authors: Andreas Sandberg 3811840SCurtis.Dunham@arm.com * Curtis Dunham 3910859Sandreas.sandberg@arm.com */ 4010859Sandreas.sandberg@arm.com 4110859Sandreas.sandberg@arm.com#include "arch/arm/kvm/gic.hh" 4210859Sandreas.sandberg@arm.com 4310859Sandreas.sandberg@arm.com#include <linux/kvm.h> 4410859Sandreas.sandberg@arm.com 4511840SCurtis.Dunham@arm.com#include "arch/arm/kvm/base_cpu.hh" 4610859Sandreas.sandberg@arm.com#include "debug/Interrupt.hh" 4710859Sandreas.sandberg@arm.com#include "params/KvmGic.hh" 4811840SCurtis.Dunham@arm.com#include "params/MuxingKvmGic.hh" 4910859Sandreas.sandberg@arm.com 5011462Sandreas.sandberg@arm.comKvmKernelGicV2::KvmKernelGicV2(KvmVM &_vm, Addr cpu_addr, Addr dist_addr, 5111462Sandreas.sandberg@arm.com unsigned it_lines) 5211461Sandreas.sandberg@arm.com : cpuRange(RangeSize(cpu_addr, KVM_VGIC_V2_CPU_SIZE)), 5311461Sandreas.sandberg@arm.com distRange(RangeSize(dist_addr, KVM_VGIC_V2_DIST_SIZE)), 5411461Sandreas.sandberg@arm.com vm(_vm), 5511461Sandreas.sandberg@arm.com kdev(vm.createDevice(KVM_DEV_TYPE_ARM_VGIC_V2)) 5611461Sandreas.sandberg@arm.com{ 5711461Sandreas.sandberg@arm.com kdev.setAttr<uint64_t>( 5811461Sandreas.sandberg@arm.com KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_DIST, dist_addr); 5911461Sandreas.sandberg@arm.com kdev.setAttr<uint64_t>( 6011461Sandreas.sandberg@arm.com KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_CPU, cpu_addr); 6111462Sandreas.sandberg@arm.com 6211462Sandreas.sandberg@arm.com kdev.setAttr<uint32_t>(KVM_DEV_ARM_VGIC_GRP_NR_IRQS, 0, it_lines); 6311461Sandreas.sandberg@arm.com} 6411461Sandreas.sandberg@arm.com 6511461Sandreas.sandberg@arm.comKvmKernelGicV2::~KvmKernelGicV2() 6611461Sandreas.sandberg@arm.com{ 6711461Sandreas.sandberg@arm.com} 6811461Sandreas.sandberg@arm.com 6911461Sandreas.sandberg@arm.comvoid 7011461Sandreas.sandberg@arm.comKvmKernelGicV2::setSPI(unsigned spi) 7111461Sandreas.sandberg@arm.com{ 7211461Sandreas.sandberg@arm.com setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, spi, true); 7311461Sandreas.sandberg@arm.com} 7411461Sandreas.sandberg@arm.com 7511461Sandreas.sandberg@arm.comvoid 7611461Sandreas.sandberg@arm.comKvmKernelGicV2::clearSPI(unsigned spi) 7711461Sandreas.sandberg@arm.com{ 7811461Sandreas.sandberg@arm.com setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, spi, false); 7911461Sandreas.sandberg@arm.com} 8011461Sandreas.sandberg@arm.com 8111461Sandreas.sandberg@arm.comvoid 8211461Sandreas.sandberg@arm.comKvmKernelGicV2::setPPI(unsigned vcpu, unsigned ppi) 8311461Sandreas.sandberg@arm.com{ 8411461Sandreas.sandberg@arm.com setIntState(KVM_ARM_IRQ_TYPE_PPI, vcpu, ppi, true); 8511461Sandreas.sandberg@arm.com} 8611461Sandreas.sandberg@arm.com 8711461Sandreas.sandberg@arm.comvoid 8811461Sandreas.sandberg@arm.comKvmKernelGicV2::clearPPI(unsigned vcpu, unsigned ppi) 8911461Sandreas.sandberg@arm.com{ 9011461Sandreas.sandberg@arm.com setIntState(KVM_ARM_IRQ_TYPE_PPI, vcpu, ppi, false); 9111461Sandreas.sandberg@arm.com} 9211461Sandreas.sandberg@arm.com 9311461Sandreas.sandberg@arm.comvoid 9411461Sandreas.sandberg@arm.comKvmKernelGicV2::setIntState(unsigned type, unsigned vcpu, unsigned irq, 9511461Sandreas.sandberg@arm.com bool high) 9611461Sandreas.sandberg@arm.com{ 9711461Sandreas.sandberg@arm.com assert(type <= KVM_ARM_IRQ_TYPE_MASK); 9811461Sandreas.sandberg@arm.com assert(vcpu <= KVM_ARM_IRQ_VCPU_MASK); 9911461Sandreas.sandberg@arm.com assert(irq <= KVM_ARM_IRQ_NUM_MASK); 10011461Sandreas.sandberg@arm.com const uint32_t line( 10111461Sandreas.sandberg@arm.com (type << KVM_ARM_IRQ_TYPE_SHIFT) | 10211461Sandreas.sandberg@arm.com (vcpu << KVM_ARM_IRQ_VCPU_SHIFT) | 10311461Sandreas.sandberg@arm.com (irq << KVM_ARM_IRQ_NUM_SHIFT)); 10411461Sandreas.sandberg@arm.com 10511461Sandreas.sandberg@arm.com vm.setIRQLine(line, high); 10611461Sandreas.sandberg@arm.com} 10711461Sandreas.sandberg@arm.com 10811461Sandreas.sandberg@arm.com 10910859Sandreas.sandberg@arm.comKvmGic::KvmGic(const KvmGicParams *p) 11010859Sandreas.sandberg@arm.com : BaseGic(p), 11110859Sandreas.sandberg@arm.com system(*p->system), 11211839SCurtis.Dunham@arm.com kernelGic(*system.getKvmVM(), 11311839SCurtis.Dunham@arm.com p->cpu_addr, p->dist_addr, p->it_lines), 11411461Sandreas.sandberg@arm.com addrRanges{kernelGic.distRange, kernelGic.cpuRange} 11510859Sandreas.sandberg@arm.com{ 11610859Sandreas.sandberg@arm.com} 11710859Sandreas.sandberg@arm.com 11810859Sandreas.sandberg@arm.comKvmGic::~KvmGic() 11910859Sandreas.sandberg@arm.com{ 12010859Sandreas.sandberg@arm.com} 12110859Sandreas.sandberg@arm.com 12210859Sandreas.sandberg@arm.comvoid 12310905Sandreas.sandberg@arm.comKvmGic::serialize(CheckpointOut &cp) const 12410859Sandreas.sandberg@arm.com{ 12510859Sandreas.sandberg@arm.com panic("Checkpointing unsupported\n"); 12610859Sandreas.sandberg@arm.com} 12710859Sandreas.sandberg@arm.com 12810859Sandreas.sandberg@arm.comvoid 12910905Sandreas.sandberg@arm.comKvmGic::unserialize(CheckpointIn &cp) 13010859Sandreas.sandberg@arm.com{ 13110859Sandreas.sandberg@arm.com panic("Checkpointing unsupported\n"); 13210859Sandreas.sandberg@arm.com} 13310859Sandreas.sandberg@arm.com 13410859Sandreas.sandberg@arm.comTick 13510859Sandreas.sandberg@arm.comKvmGic::read(PacketPtr pkt) 13610859Sandreas.sandberg@arm.com{ 13710859Sandreas.sandberg@arm.com panic("KvmGic: PIO from gem5 is currently unsupported\n"); 13810859Sandreas.sandberg@arm.com} 13910859Sandreas.sandberg@arm.com 14010859Sandreas.sandberg@arm.comTick 14110859Sandreas.sandberg@arm.comKvmGic::write(PacketPtr pkt) 14210859Sandreas.sandberg@arm.com{ 14310859Sandreas.sandberg@arm.com panic("KvmGic: PIO from gem5 is currently unsupported\n"); 14410859Sandreas.sandberg@arm.com} 14510859Sandreas.sandberg@arm.com 14610859Sandreas.sandberg@arm.comvoid 14710859Sandreas.sandberg@arm.comKvmGic::sendInt(uint32_t num) 14810859Sandreas.sandberg@arm.com{ 14910859Sandreas.sandberg@arm.com DPRINTF(Interrupt, "Set SPI %d\n", num); 15011461Sandreas.sandberg@arm.com kernelGic.setSPI(num); 15110859Sandreas.sandberg@arm.com} 15210859Sandreas.sandberg@arm.com 15310859Sandreas.sandberg@arm.comvoid 15410859Sandreas.sandberg@arm.comKvmGic::clearInt(uint32_t num) 15510859Sandreas.sandberg@arm.com{ 15610859Sandreas.sandberg@arm.com DPRINTF(Interrupt, "Clear SPI %d\n", num); 15711461Sandreas.sandberg@arm.com kernelGic.clearSPI(num); 15810859Sandreas.sandberg@arm.com} 15910859Sandreas.sandberg@arm.com 16010859Sandreas.sandberg@arm.comvoid 16110859Sandreas.sandberg@arm.comKvmGic::sendPPInt(uint32_t num, uint32_t cpu) 16210859Sandreas.sandberg@arm.com{ 16310859Sandreas.sandberg@arm.com DPRINTF(Interrupt, "Set PPI %d:%d\n", cpu, num); 16411461Sandreas.sandberg@arm.com kernelGic.setPPI(cpu, num); 16510859Sandreas.sandberg@arm.com} 16610859Sandreas.sandberg@arm.com 16710859Sandreas.sandberg@arm.comvoid 16810859Sandreas.sandberg@arm.comKvmGic::clearPPInt(uint32_t num, uint32_t cpu) 16910859Sandreas.sandberg@arm.com{ 17010859Sandreas.sandberg@arm.com DPRINTF(Interrupt, "Clear PPI %d:%d\n", cpu, num); 17111461Sandreas.sandberg@arm.com kernelGic.clearPPI(cpu, num); 17210859Sandreas.sandberg@arm.com} 17310859Sandreas.sandberg@arm.com 17410859Sandreas.sandberg@arm.comvoid 17510859Sandreas.sandberg@arm.comKvmGic::verifyMemoryMode() const 17610859Sandreas.sandberg@arm.com{ 17710859Sandreas.sandberg@arm.com if (!(system.isAtomicMode() && system.bypassCaches())) { 17810859Sandreas.sandberg@arm.com fatal("The in-kernel KVM GIC can only be used with KVM CPUs, but the " 17910859Sandreas.sandberg@arm.com "current memory mode does not support KVM.\n"); 18010859Sandreas.sandberg@arm.com } 18110859Sandreas.sandberg@arm.com} 18210859Sandreas.sandberg@arm.com 18310859Sandreas.sandberg@arm.com 18410859Sandreas.sandberg@arm.comKvmGic * 18510859Sandreas.sandberg@arm.comKvmGicParams::create() 18610859Sandreas.sandberg@arm.com{ 18710859Sandreas.sandberg@arm.com return new KvmGic(this); 18810859Sandreas.sandberg@arm.com} 18911840SCurtis.Dunham@arm.com 19011840SCurtis.Dunham@arm.com 19111840SCurtis.Dunham@arm.comMuxingKvmGic::MuxingKvmGic(const MuxingKvmGicParams *p) 19211840SCurtis.Dunham@arm.com : Pl390(p), 19311840SCurtis.Dunham@arm.com system(*p->system), 19411840SCurtis.Dunham@arm.com kernelGic(nullptr), 19511840SCurtis.Dunham@arm.com usingKvm(false) 19611840SCurtis.Dunham@arm.com{ 19711840SCurtis.Dunham@arm.com if (auto vm = system.getKvmVM()) { 19811840SCurtis.Dunham@arm.com kernelGic = new KvmKernelGicV2(*vm, p->cpu_addr, p->dist_addr, 19911840SCurtis.Dunham@arm.com p->it_lines); 20011840SCurtis.Dunham@arm.com } 20111840SCurtis.Dunham@arm.com} 20211840SCurtis.Dunham@arm.com 20311840SCurtis.Dunham@arm.comMuxingKvmGic::~MuxingKvmGic() 20411840SCurtis.Dunham@arm.com{ 20511840SCurtis.Dunham@arm.com} 20611840SCurtis.Dunham@arm.com 20711840SCurtis.Dunham@arm.comvoid 20811840SCurtis.Dunham@arm.comMuxingKvmGic::startup() 20911840SCurtis.Dunham@arm.com{ 21011840SCurtis.Dunham@arm.com usingKvm = (kernelGic != nullptr) && validKvmEnvironment(); 21111840SCurtis.Dunham@arm.com} 21211840SCurtis.Dunham@arm.com 21311840SCurtis.Dunham@arm.comvoid 21411840SCurtis.Dunham@arm.comMuxingKvmGic::drainResume() 21511840SCurtis.Dunham@arm.com{ 21611840SCurtis.Dunham@arm.com bool use_kvm = (kernelGic != nullptr) && validKvmEnvironment(); 21711840SCurtis.Dunham@arm.com if (use_kvm != usingKvm) { 21811840SCurtis.Dunham@arm.com if (use_kvm) // from simulation to KVM emulation 21911840SCurtis.Dunham@arm.com fromPl390ToKvm(); 22011840SCurtis.Dunham@arm.com else // from KVM emulation to simulation 22111840SCurtis.Dunham@arm.com fromKvmToPl390(); 22211840SCurtis.Dunham@arm.com 22311840SCurtis.Dunham@arm.com usingKvm = use_kvm; 22411840SCurtis.Dunham@arm.com } 22511840SCurtis.Dunham@arm.com} 22611840SCurtis.Dunham@arm.com 22711840SCurtis.Dunham@arm.comvoid 22811840SCurtis.Dunham@arm.comMuxingKvmGic::serialize(CheckpointOut &cp) const 22911840SCurtis.Dunham@arm.com{ 23011840SCurtis.Dunham@arm.com if (!usingKvm) 23111840SCurtis.Dunham@arm.com return Pl390::serialize(cp); 23211840SCurtis.Dunham@arm.com 23311840SCurtis.Dunham@arm.com panic("Checkpointing unsupported\n"); 23411840SCurtis.Dunham@arm.com} 23511840SCurtis.Dunham@arm.com 23611840SCurtis.Dunham@arm.comvoid 23711840SCurtis.Dunham@arm.comMuxingKvmGic::unserialize(CheckpointIn &cp) 23811840SCurtis.Dunham@arm.com{ 23911840SCurtis.Dunham@arm.com if (!usingKvm) 24011840SCurtis.Dunham@arm.com return Pl390::unserialize(cp); 24111840SCurtis.Dunham@arm.com 24211840SCurtis.Dunham@arm.com panic("Checkpointing unsupported\n"); 24311840SCurtis.Dunham@arm.com} 24411840SCurtis.Dunham@arm.com 24511840SCurtis.Dunham@arm.comTick 24611840SCurtis.Dunham@arm.comMuxingKvmGic::read(PacketPtr pkt) 24711840SCurtis.Dunham@arm.com{ 24811840SCurtis.Dunham@arm.com if (!usingKvm) 24911840SCurtis.Dunham@arm.com return Pl390::read(pkt); 25011840SCurtis.Dunham@arm.com 25111840SCurtis.Dunham@arm.com panic("MuxingKvmGic: PIO from gem5 is currently unsupported\n"); 25211840SCurtis.Dunham@arm.com} 25311840SCurtis.Dunham@arm.com 25411840SCurtis.Dunham@arm.comTick 25511840SCurtis.Dunham@arm.comMuxingKvmGic::write(PacketPtr pkt) 25611840SCurtis.Dunham@arm.com{ 25711840SCurtis.Dunham@arm.com if (!usingKvm) 25811840SCurtis.Dunham@arm.com return Pl390::write(pkt); 25911840SCurtis.Dunham@arm.com 26011840SCurtis.Dunham@arm.com panic("MuxingKvmGic: PIO from gem5 is currently unsupported\n"); 26111840SCurtis.Dunham@arm.com} 26211840SCurtis.Dunham@arm.com 26311840SCurtis.Dunham@arm.comvoid 26411840SCurtis.Dunham@arm.comMuxingKvmGic::sendInt(uint32_t num) 26511840SCurtis.Dunham@arm.com{ 26611840SCurtis.Dunham@arm.com if (!usingKvm) 26711840SCurtis.Dunham@arm.com return Pl390::sendInt(num); 26811840SCurtis.Dunham@arm.com 26911840SCurtis.Dunham@arm.com DPRINTF(Interrupt, "Set SPI %d\n", num); 27011840SCurtis.Dunham@arm.com kernelGic->setSPI(num); 27111840SCurtis.Dunham@arm.com} 27211840SCurtis.Dunham@arm.com 27311840SCurtis.Dunham@arm.comvoid 27411840SCurtis.Dunham@arm.comMuxingKvmGic::clearInt(uint32_t num) 27511840SCurtis.Dunham@arm.com{ 27611840SCurtis.Dunham@arm.com if (!usingKvm) 27711840SCurtis.Dunham@arm.com return Pl390::clearInt(num); 27811840SCurtis.Dunham@arm.com 27911840SCurtis.Dunham@arm.com DPRINTF(Interrupt, "Clear SPI %d\n", num); 28011840SCurtis.Dunham@arm.com kernelGic->clearSPI(num); 28111840SCurtis.Dunham@arm.com} 28211840SCurtis.Dunham@arm.com 28311840SCurtis.Dunham@arm.comvoid 28411840SCurtis.Dunham@arm.comMuxingKvmGic::sendPPInt(uint32_t num, uint32_t cpu) 28511840SCurtis.Dunham@arm.com{ 28611840SCurtis.Dunham@arm.com if (!usingKvm) 28711840SCurtis.Dunham@arm.com return Pl390::sendPPInt(num, cpu); 28811840SCurtis.Dunham@arm.com DPRINTF(Interrupt, "Set PPI %d:%d\n", cpu, num); 28911840SCurtis.Dunham@arm.com kernelGic->setPPI(cpu, num); 29011840SCurtis.Dunham@arm.com} 29111840SCurtis.Dunham@arm.com 29211840SCurtis.Dunham@arm.comvoid 29311840SCurtis.Dunham@arm.comMuxingKvmGic::clearPPInt(uint32_t num, uint32_t cpu) 29411840SCurtis.Dunham@arm.com{ 29511840SCurtis.Dunham@arm.com if (!usingKvm) 29611840SCurtis.Dunham@arm.com return Pl390::clearPPInt(num, cpu); 29711840SCurtis.Dunham@arm.com 29811840SCurtis.Dunham@arm.com DPRINTF(Interrupt, "Clear PPI %d:%d\n", cpu, num); 29911840SCurtis.Dunham@arm.com kernelGic->clearPPI(cpu, num); 30011840SCurtis.Dunham@arm.com} 30111840SCurtis.Dunham@arm.com 30211840SCurtis.Dunham@arm.combool 30311840SCurtis.Dunham@arm.comMuxingKvmGic::validKvmEnvironment() const 30411840SCurtis.Dunham@arm.com{ 30511840SCurtis.Dunham@arm.com if (system.threadContexts.empty()) 30611840SCurtis.Dunham@arm.com return false; 30711840SCurtis.Dunham@arm.com 30811840SCurtis.Dunham@arm.com for (auto tc : system.threadContexts) { 30911840SCurtis.Dunham@arm.com if (dynamic_cast<BaseArmKvmCPU*>(tc->getCpuPtr()) == nullptr) { 31011840SCurtis.Dunham@arm.com return false; 31111840SCurtis.Dunham@arm.com } 31211840SCurtis.Dunham@arm.com } 31311840SCurtis.Dunham@arm.com return true; 31411840SCurtis.Dunham@arm.com} 31511840SCurtis.Dunham@arm.com 31611840SCurtis.Dunham@arm.comvoid 31711840SCurtis.Dunham@arm.comMuxingKvmGic::fromPl390ToKvm() 31811840SCurtis.Dunham@arm.com{ 31911840SCurtis.Dunham@arm.com panic("Gic multiplexing not implemented.\n"); 32011840SCurtis.Dunham@arm.com} 32111840SCurtis.Dunham@arm.com 32211840SCurtis.Dunham@arm.comvoid 32311840SCurtis.Dunham@arm.comMuxingKvmGic::fromKvmToPl390() 32411840SCurtis.Dunham@arm.com{ 32511840SCurtis.Dunham@arm.com panic("Gic multiplexing not implemented.\n"); 32611840SCurtis.Dunham@arm.com} 32711840SCurtis.Dunham@arm.com 32811840SCurtis.Dunham@arm.comMuxingKvmGic * 32911840SCurtis.Dunham@arm.comMuxingKvmGicParams::create() 33011840SCurtis.Dunham@arm.com{ 33111840SCurtis.Dunham@arm.com return new MuxingKvmGic(this); 33211840SCurtis.Dunham@arm.com} 333