vfp64.isa revision 10037
1// -*- mode:c++ -*- 2 3// Copyright (c) 2012 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating 9// to a hardware implementation of the functionality of the software 10// licensed hereunder. You may use the software subject to the license 11// terms below provided that you ensure that this notice is replicated 12// unmodified and in its entirety in all distributions of the software, 13// modified or unmodified, in source code or in binary form. 14// 15// Redistribution and use in source and binary forms, with or without 16// modification, are permitted provided that the following conditions are 17// met: redistributions of source code must retain the above copyright 18// notice, this list of conditions and the following disclaimer; 19// redistributions in binary form must reproduce the above copyright 20// notice, this list of conditions and the following disclaimer in the 21// documentation and/or other materials provided with the distribution; 22// neither the name of the copyright holders nor the names of its 23// contributors may be used to endorse or promote products derived from 24// this software without specific prior written permission. 25// 26// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 29// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 30// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 31// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 32// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 33// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 34// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 37// 38// Authors: Thomas Grocutt 39 40def template AA64FpRegRegOpConstructor {{ 41 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 42 IntRegIndex _dest, IntRegIndex _op1, 43 VfpMicroMode mode) 44 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 45 _dest, _op1, mode) 46 { 47 %(constructor)s; 48 for (int x = 0; x < _numDestRegs; x++) { 49 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 50 } 51 } 52}}; 53 54def template AA64FpRegRegOpConstructor {{ 55 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 56 IntRegIndex _dest, IntRegIndex _op1, 57 VfpMicroMode mode) 58 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 59 _dest, _op1, mode) 60 { 61 %(constructor)s; 62 for (int x = 0; x < _numDestRegs; x++) { 63 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 64 } 65 } 66}}; 67 68def template AA64FpRegImmOpConstructor {{ 69 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 70 IntRegIndex _dest, uint64_t _imm, VfpMicroMode mode) 71 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 72 _dest, _imm, mode) 73 { 74 %(constructor)s; 75 for (int x = 0; x < _numDestRegs; x++) { 76 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 77 } 78 } 79}}; 80 81def template AA64FpRegRegImmOpConstructor {{ 82 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 83 IntRegIndex _dest, 84 IntRegIndex _op1, 85 uint64_t _imm, 86 VfpMicroMode mode) 87 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 88 _dest, _op1, _imm, mode) 89 { 90 %(constructor)s; 91 for (int x = 0; x < _numDestRegs; x++) { 92 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 93 } 94 } 95}}; 96 97def template AA64FpRegRegRegOpConstructor {{ 98 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 99 IntRegIndex _dest, 100 IntRegIndex _op1, 101 IntRegIndex _op2, 102 VfpMicroMode mode) 103 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 104 _dest, _op1, _op2, mode) 105 { 106 %(constructor)s; 107 for (int x = 0; x < _numDestRegs; x++) { 108 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 109 } 110 } 111}}; 112 113def template AA64FpRegRegRegRegOpDeclare {{ 114class %(class_name)s : public %(base_class)s 115{ 116 public: 117 // Constructor 118 %(class_name)s(ExtMachInst machInst, 119 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 120 IntRegIndex _op3, VfpMicroMode mode = VfpNotAMicroop); 121 %(BasicExecDeclare)s 122}; 123}}; 124 125def template AA64FpRegRegRegRegOpConstructor {{ 126 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 127 IntRegIndex _dest, 128 IntRegIndex _op1, 129 IntRegIndex _op2, 130 IntRegIndex _op3, 131 VfpMicroMode mode) 132 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 133 _dest, _op1, _op2, _op3, mode) 134 { 135 %(constructor)s; 136 for (int x = 0; x < _numDestRegs; x++) { 137 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 138 } 139 } 140}}; 141