pred.isa revision 7133:4a1af4580b7d
1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating 9// to a hardware implementation of the functionality of the software 10// licensed hereunder. You may use the software subject to the license 11// terms below provided that you ensure that this notice is replicated 12// unmodified and in its entirety in all distributions of the software, 13// modified or unmodified, in source code or in binary form. 14// 15// Copyright (c) 2007-2008 The Florida State University 16// All rights reserved. 17// 18// Redistribution and use in source and binary forms, with or without 19// modification, are permitted provided that the following conditions are 20// met: redistributions of source code must retain the above copyright 21// notice, this list of conditions and the following disclaimer; 22// redistributions in binary form must reproduce the above copyright 23// notice, this list of conditions and the following disclaimer in the 24// documentation and/or other materials provided with the distribution; 25// neither the name of the copyright holders nor the names of its 26// contributors may be used to endorse or promote products derived from 27// this software without specific prior written permission. 28// 29// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40// 41// Authors: Stephen Hines 42 43//////////////////////////////////////////////////////////////////// 44// 45// Predicated Instruction Execution 46// 47 48let {{ 49 predicateTest = 'testPredicate(CondCodes, condCode)' 50}}; 51 52def template PredOpExecute {{ 53 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const 54 { 55 Fault fault = NoFault; 56 uint64_t resTemp = 0; 57 resTemp = resTemp; 58 %(op_decl)s; 59 %(op_rd)s; 60 61 if (%(predicate_test)s) 62 { 63 %(code)s; 64 if (fault == NoFault) 65 { 66 %(op_wb)s; 67 } 68 } 69 70 return fault; 71 } 72}}; 73 74def template DataDecode {{ 75 if (machInst.opcode4 == 0) { 76 if (machInst.sField == 0) 77 return new %(class_name)sImm(machInst); 78 else 79 return new %(class_name)sImmCc(machInst); 80 } else { 81 if (machInst.sField == 0) 82 return new %(class_name)s(machInst); 83 else 84 return new %(class_name)sCc(machInst); 85 } 86}}; 87 88def template DataImmDecode {{ 89 if (machInst.sField == 0) 90 return new %(class_name)s(machInst); 91 else 92 return new %(class_name)sCc(machInst); 93}}; 94