pred.isa revision 6724
12817Sksewell@umich.edu// -*- mode:c++ -*- 22817Sksewell@umich.edu 32817Sksewell@umich.edu// Copyright (c) 2007-2008 The Florida State University 42817Sksewell@umich.edu// All rights reserved. 52817Sksewell@umich.edu// 62817Sksewell@umich.edu// Redistribution and use in source and binary forms, with or without 72817Sksewell@umich.edu// modification, are permitted provided that the following conditions are 82817Sksewell@umich.edu// met: redistributions of source code must retain the above copyright 92817Sksewell@umich.edu// notice, this list of conditions and the following disclaimer; 102817Sksewell@umich.edu// redistributions in binary form must reproduce the above copyright 112817Sksewell@umich.edu// notice, this list of conditions and the following disclaimer in the 122817Sksewell@umich.edu// documentation and/or other materials provided with the distribution; 132817Sksewell@umich.edu// neither the name of the copyright holders nor the names of its 142817Sksewell@umich.edu// contributors may be used to endorse or promote products derived from 152817Sksewell@umich.edu// this software without specific prior written permission. 162817Sksewell@umich.edu// 172817Sksewell@umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182817Sksewell@umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192817Sksewell@umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202817Sksewell@umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212817Sksewell@umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222817Sksewell@umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232817Sksewell@umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242817Sksewell@umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252817Sksewell@umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262817Sksewell@umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272817Sksewell@umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282817Sksewell@umich.edu// 292817Sksewell@umich.edu// Authors: Stephen Hines 302817Sksewell@umich.edu 312817Sksewell@umich.edu//////////////////////////////////////////////////////////////////// 322817Sksewell@umich.edu// 332817Sksewell@umich.edu// Predicated Instruction Execution 342817Sksewell@umich.edu// 352817Sksewell@umich.edu 362817Sksewell@umich.edulet {{ 372817Sksewell@umich.edu predicateTest = 'testPredicate(CondCodes, condCode)' 382817Sksewell@umich.edu}}; 392817Sksewell@umich.edu 402817Sksewell@umich.edudef template PredOpExecute {{ 412817Sksewell@umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const 422817Sksewell@umich.edu { 432817Sksewell@umich.edu Fault fault = NoFault; 442817Sksewell@umich.edu uint64_t resTemp = 0; 452817Sksewell@umich.edu resTemp = resTemp; 462817Sksewell@umich.edu %(op_decl)s; 472817Sksewell@umich.edu %(op_rd)s; 482817Sksewell@umich.edu 492817Sksewell@umich.edu if (%(predicate_test)s) 502817Sksewell@umich.edu { 512817Sksewell@umich.edu %(code)s; 522817Sksewell@umich.edu if (fault == NoFault) 532817Sksewell@umich.edu { 542817Sksewell@umich.edu %(op_wb)s; 552935Sksewell@umich.edu } 562935Sksewell@umich.edu } 572935Sksewell@umich.edu 582935Sksewell@umich.edu return fault; 592935Sksewell@umich.edu } 602935Sksewell@umich.edu}}; 612817Sksewell@umich.edu 622978Sgblack@eecs.umich.edudef template DataDecode {{ 632978Sgblack@eecs.umich.edu if (machInst.opcode4 == 0) { 642978Sgblack@eecs.umich.edu if (machInst.sField == 0) 652978Sgblack@eecs.umich.edu return new %(class_name)sImm(machInst); 662978Sgblack@eecs.umich.edu else 672978Sgblack@eecs.umich.edu return new %(class_name)sImmCc(machInst); 682817Sksewell@umich.edu } else { 692817Sksewell@umich.edu if (machInst.sField == 0) 702817Sksewell@umich.edu return new %(class_name)s(machInst); 712817Sksewell@umich.edu else 722817Sksewell@umich.edu return new %(class_name)sCc(machInst); 732817Sksewell@umich.edu } 742817Sksewell@umich.edu}}; 752817Sksewell@umich.edu 762817Sksewell@umich.edudef template DataImmDecode {{ 772817Sksewell@umich.edu if (machInst.sField == 0) 78 return new %(class_name)s(machInst); 79 else 80 return new %(class_name)sCc(machInst); 81}}; 82 83let {{ 84 85 calcCcCode = ''' 86 uint16_t _ic, _iv, _iz, _in; 87 88 _in = (resTemp >> 31) & 1; 89 _iz = (resTemp == 0); 90 _iv = %(ivValue)s & 1; 91 _ic = %(icValue)s & 1; 92 93 CondCodes = _in << 31 | _iz << 30 | _ic << 29 | _iv << 28 | 94 (CondCodes & 0x0FFFFFFF); 95 96 DPRINTF(Arm, "in = %%d\\n", _in); 97 DPRINTF(Arm, "iz = %%d\\n", _iz); 98 DPRINTF(Arm, "ic = %%d\\n", _ic); 99 DPRINTF(Arm, "iv = %%d\\n", _iv); 100 ''' 101 102}}; 103 104let {{ 105 def getCcCode(flagtype): 106 icReg = icImm = iv = '' 107 if flagtype == "none": 108 icReg = icImm = 'CondCodes<29:>' 109 iv = 'CondCodes<28:>' 110 elif flagtype == "add": 111 icReg = icImm = 'findCarry(32, resTemp, Rn, op2)' 112 iv = 'findOverflow(32, resTemp, Rn, op2)' 113 elif flagtype == "sub": 114 icReg = icImm ='findCarry(32, resTemp, Rn, ~op2)' 115 iv = 'findOverflow(32, resTemp, Rn, ~op2)' 116 elif flagtype == "rsb": 117 icReg = icImm = 'findCarry(32, resTemp, op2, ~Rn)' 118 iv = 'findOverflow(32, resTemp, op2, ~Rn)' 119 else: 120 icReg = 'shift_carry_rs(Rm, Rs, shift, CondCodes<29:>)' 121 icImm = 'shift_carry_imm(Rm, shift_size, shift, CondCodes<29:>)' 122 iv = 'CondCodes<28:>' 123 return (calcCcCode % {"icValue" : icReg, "ivValue" : iv}, 124 calcCcCode % {"icValue" : icImm, "ivValue" : iv}) 125 126 def getImmCcCode(flagtype): 127 ivValue = icValue = '' 128 if flagtype == "none": 129 icValue = 'CondCodes<29:>' 130 ivValue = 'CondCodes<28:>' 131 elif flagtype == "add": 132 icValue = 'findCarry(32, resTemp, Rn, rotated_imm)' 133 ivValue = 'findOverflow(32, resTemp, Rn, rotated_imm)' 134 elif flagtype == "sub": 135 icValue = 'findCarry(32, resTemp, Rn, ~rotated_imm)' 136 ivValue = 'findOverflow(32, resTemp, Rn, ~rotated_imm)' 137 elif flagtype == "rsb": 138 icValue = 'findCarry(32, resTemp, rotated_imm, ~Rn)' 139 ivValue = 'findOverflow(32, resTemp, rotated_imm, ~Rn)' 140 else: 141 icValue = '(rotate ? rotated_carry:CondCodes<29:>)' 142 ivValue = 'CondCodes<28:>' 143 return calcCcCode % vars() 144}}; 145 146def format DataOp(code, flagtype = logic) {{ 147 (regCcCode, immCcCode) = getCcCode(flagtype) 148 regCode = '''uint32_t op2 = shift_rm_rs(Rm, Rs, 149 shift, CondCodes<29:0>); 150 op2 = op2;''' + code 151 immCode = '''uint32_t op2 = shift_rm_imm(Rm, shift_size, 152 shift, CondCodes<29:0>); 153 op2 = op2;''' + code 154 regIop = InstObjParams(name, Name, 'PredIntOp', 155 {"code": regCode, 156 "predicate_test": predicateTest}) 157 immIop = InstObjParams(name, Name + "Imm", 'PredIntOp', 158 {"code": immCode, 159 "predicate_test": predicateTest}) 160 regCcIop = InstObjParams(name, Name + "Cc", 'PredIntOp', 161 {"code": regCode + regCcCode, 162 "predicate_test": predicateTest}) 163 immCcIop = InstObjParams(name, Name + "ImmCc", 'PredIntOp', 164 {"code": immCode + immCcCode, 165 "predicate_test": predicateTest}) 166 header_output = BasicDeclare.subst(regIop) + \ 167 BasicDeclare.subst(immIop) + \ 168 BasicDeclare.subst(regCcIop) + \ 169 BasicDeclare.subst(immCcIop) 170 decoder_output = BasicConstructor.subst(regIop) + \ 171 BasicConstructor.subst(immIop) + \ 172 BasicConstructor.subst(regCcIop) + \ 173 BasicConstructor.subst(immCcIop) 174 exec_output = PredOpExecute.subst(regIop) + \ 175 PredOpExecute.subst(immIop) + \ 176 PredOpExecute.subst(regCcIop) + \ 177 PredOpExecute.subst(immCcIop) 178 decode_block = DataDecode.subst(regIop) 179}}; 180 181def format DataImmOp(code, flagtype = logic) {{ 182 code += "resTemp = resTemp;" 183 iop = InstObjParams(name, Name, 'PredImmOp', 184 {"code": code, 185 "predicate_test": predicateTest}) 186 ccIop = InstObjParams(name, Name + "Cc", 'PredImmOp', 187 {"code": code + getImmCcCode(flagtype), 188 "predicate_test": predicateTest}) 189 header_output = BasicDeclare.subst(iop) + \ 190 BasicDeclare.subst(ccIop) 191 decoder_output = BasicConstructor.subst(iop) + \ 192 BasicConstructor.subst(ccIop) 193 exec_output = PredOpExecute.subst(iop) + \ 194 PredOpExecute.subst(ccIop) 195 decode_block = DataImmDecode.subst(iop) 196}}; 197 198def format PredOp(code, *opt_flags) {{ 199 iop = InstObjParams(name, Name, 'PredOp', 200 {"code": code, 201 "predicate_test": predicateTest}, 202 opt_flags) 203 header_output = BasicDeclare.subst(iop) 204 decoder_output = BasicConstructor.subst(iop) 205 decode_block = BasicDecode.subst(iop) 206 exec_output = PredOpExecute.subst(iop) 207}}; 208 209def format PredImmOp(code, *opt_flags) {{ 210 iop = InstObjParams(name, Name, 'PredImmOp', 211 {"code": code, 212 "predicate_test": predicateTest}, 213 opt_flags) 214 header_output = BasicDeclare.subst(iop) 215 decoder_output = BasicConstructor.subst(iop) 216 decode_block = BasicDecode.subst(iop) 217 exec_output = PredOpExecute.subst(iop) 218}}; 219 220def format PredImmOpCc(code, icValue, ivValue, *opt_flags) {{ 221 ccCode = calcCcCode % vars() 222 code += ccCode; 223 iop = InstObjParams(name, Name, 'PredImmOp', 224 {"code": code, 225 "cc_code": ccCode, 226 "predicate_test": predicateTest}, 227 opt_flags) 228 header_output = BasicDeclare.subst(iop) 229 decoder_output = BasicConstructor.subst(iop) 230 decode_block = BasicDecode.subst(iop) 231 exec_output = PredOpExecute.subst(iop) 232}}; 233 234def format PredIntOp(code, *opt_flags) {{ 235 new_code = ArmGenericCodeSubs(code) 236 iop = InstObjParams(name, Name, 'PredIntOp', 237 {"code": new_code, 238 "predicate_test": predicateTest}, 239 opt_flags) 240 header_output = BasicDeclare.subst(iop) 241 decoder_output = BasicConstructor.subst(iop) 242 decode_block = BasicDecode.subst(iop) 243 exec_output = PredOpExecute.subst(iop) 244}}; 245 246def format PredIntOpCc(code, icValue, ivValue, *opt_flags) {{ 247 ccCode = calcCcCode % vars() 248 code += ccCode; 249 new_code = ArmGenericCodeSubs(code) 250 iop = InstObjParams(name, Name, 'PredIntOp', 251 {"code": new_code, 252 "cc_code": ccCode, 253 "predicate_test": predicateTest}, 254 opt_flags) 255 header_output = BasicDeclare.subst(iop) 256 decoder_output = BasicConstructor.subst(iop) 257 decode_block = BasicDecode.subst(iop) 258 exec_output = PredOpExecute.subst(iop) 259}}; 260 261