mult.isa revision 10184:bbfa3152bdea
1955SN/A// -*- mode:c++ -*-
2955SN/A
310841Sandreas.sandberg@arm.com// Copyright (c) 2010 ARM Limited
49812Sandreas.hansson@arm.com// All rights reserved
59812Sandreas.hansson@arm.com//
69812Sandreas.hansson@arm.com// The license below extends only to copyright in the software and shall
79812Sandreas.hansson@arm.com// not be construed as granting a license to any other intellectual
89812Sandreas.hansson@arm.com// property including but not limited to intellectual property relating
99812Sandreas.hansson@arm.com// to a hardware implementation of the functionality of the software
109812Sandreas.hansson@arm.com// licensed hereunder.  You may use the software subject to the license
119812Sandreas.hansson@arm.com// terms below provided that you ensure that this notice is replicated
129812Sandreas.hansson@arm.com// unmodified and in its entirety in all distributions of the software,
139812Sandreas.hansson@arm.com// modified or unmodified, in source code or in binary form.
149812Sandreas.hansson@arm.com//
157816Ssteve.reinhardt@amd.com// Redistribution and use in source and binary forms, with or without
165871Snate@binkert.org// modification, are permitted provided that the following conditions are
171762SN/A// met: redistributions of source code must retain the above copyright
18955SN/A// notice, this list of conditions and the following disclaimer;
19955SN/A// redistributions in binary form must reproduce the above copyright
20955SN/A// notice, this list of conditions and the following disclaimer in the
21955SN/A// documentation and/or other materials provided with the distribution;
22955SN/A// neither the name of the copyright holders nor the names of its
23955SN/A// contributors may be used to endorse or promote products derived from
24955SN/A// this software without specific prior written permission.
25955SN/A//
26955SN/A// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27955SN/A// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28955SN/A// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29955SN/A// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30955SN/A// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31955SN/A// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32955SN/A// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33955SN/A// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34955SN/A// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35955SN/A// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36955SN/A// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37955SN/A//
38955SN/A// Authors: Gabe Black
39955SN/A
40955SN/Adef template Mult3Declare {{
41955SN/Aclass %(class_name)s : public %(base_class)s
422665Ssaidi@eecs.umich.edu{
432665Ssaidi@eecs.umich.edu    public:
445863Snate@binkert.org        // Constructor
45955SN/A        %(class_name)s(ExtMachInst machInst, IntRegIndex _reg0,
46955SN/A                       IntRegIndex _reg1, IntRegIndex _reg2);
47955SN/A        %(BasicExecDeclare)s
48955SN/A};
49955SN/A}};
508878Ssteve.reinhardt@amd.com
512632Sstever@eecs.umich.edudef template Mult3Constructor {{
528878Ssteve.reinhardt@amd.com    %(class_name)s::%(class_name)s(ExtMachInst machInst,
532632Sstever@eecs.umich.edu                                          IntRegIndex _reg0,
54955SN/A                                          IntRegIndex _reg1,
558878Ssteve.reinhardt@amd.com                                          IntRegIndex _reg2)
562632Sstever@eecs.umich.edu        : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
572761Sstever@eecs.umich.edu                         _reg0, _reg1, _reg2)
582632Sstever@eecs.umich.edu    {
592632Sstever@eecs.umich.edu        %(constructor)s;
602632Sstever@eecs.umich.edu        if (!(condCode == COND_AL || condCode == COND_UC)) {
612761Sstever@eecs.umich.edu            for (int x = 0; x < _numDestRegs; x++) {
622761Sstever@eecs.umich.edu                _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
632761Sstever@eecs.umich.edu            }
648878Ssteve.reinhardt@amd.com        }
658878Ssteve.reinhardt@amd.com    }
662761Sstever@eecs.umich.edu}};
672761Sstever@eecs.umich.edu
682761Sstever@eecs.umich.edudef template Mult4Declare {{
692761Sstever@eecs.umich.educlass %(class_name)s : public %(base_class)s
702761Sstever@eecs.umich.edu{
718878Ssteve.reinhardt@amd.com    public:
728878Ssteve.reinhardt@amd.com        // Constructor
732632Sstever@eecs.umich.edu        %(class_name)s(ExtMachInst machInst,
742632Sstever@eecs.umich.edu                       IntRegIndex _reg0, IntRegIndex _reg1,
758878Ssteve.reinhardt@amd.com                       IntRegIndex _reg2, IntRegIndex _reg3);
768878Ssteve.reinhardt@amd.com        %(BasicExecDeclare)s
772632Sstever@eecs.umich.edu};
78955SN/A}};
79955SN/A
80955SN/Adef template Mult4Constructor {{
815863Snate@binkert.org    %(class_name)s::%(class_name)s(ExtMachInst machInst,
825863Snate@binkert.org                                          IntRegIndex _reg0,
835863Snate@binkert.org                                          IntRegIndex _reg1,
845863Snate@binkert.org                                          IntRegIndex _reg2,
855863Snate@binkert.org                                          IntRegIndex _reg3)
865863Snate@binkert.org        : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
875863Snate@binkert.org                         _reg0, _reg1, _reg2, _reg3)
885863Snate@binkert.org    {
895863Snate@binkert.org        %(constructor)s;
905863Snate@binkert.org        if (!(condCode == COND_AL || condCode == COND_UC)) {
915863Snate@binkert.org            for (int x = 0; x < _numDestRegs; x++) {
928878Ssteve.reinhardt@amd.com                _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
935863Snate@binkert.org            }
945863Snate@binkert.org        }
955863Snate@binkert.org    }
969812Sandreas.hansson@arm.com}};
979812Sandreas.hansson@arm.com