misc.isa revision 7253:38b991b82859
13970Sgblack@eecs.umich.edu// -*- mode:c++ -*- 23005Sstever@eecs.umich.edu 33005Sstever@eecs.umich.edu// Copyright (c) 2010 ARM Limited 43005Sstever@eecs.umich.edu// All rights reserved 53005Sstever@eecs.umich.edu// 63005Sstever@eecs.umich.edu// The license below extends only to copyright in the software and shall 73005Sstever@eecs.umich.edu// not be construed as granting a license to any other intellectual 83005Sstever@eecs.umich.edu// property including but not limited to intellectual property relating 93005Sstever@eecs.umich.edu// to a hardware implementation of the functionality of the software 103005Sstever@eecs.umich.edu// licensed hereunder. You may use the software subject to the license 113005Sstever@eecs.umich.edu// terms below provided that you ensure that this notice is replicated 123005Sstever@eecs.umich.edu// unmodified and in its entirety in all distributions of the software, 133005Sstever@eecs.umich.edu// modified or unmodified, in source code or in binary form. 143005Sstever@eecs.umich.edu// 153005Sstever@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 163005Sstever@eecs.umich.edu// modification, are permitted provided that the following conditions are 173005Sstever@eecs.umich.edu// met: redistributions of source code must retain the above copyright 183005Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 193005Sstever@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 203005Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 213005Sstever@eecs.umich.edu// documentation and/or other materials provided with the distribution; 223005Sstever@eecs.umich.edu// neither the name of the copyright holders nor the names of its 233005Sstever@eecs.umich.edu// contributors may be used to endorse or promote products derived from 243005Sstever@eecs.umich.edu// this software without specific prior written permission. 253005Sstever@eecs.umich.edu// 263005Sstever@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 273005Sstever@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 283005Sstever@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 296654Snate@binkert.org// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 306654Snate@binkert.org// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 316654Snate@binkert.org// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 322889SN/A// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 332710SN/A// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 346654Snate@binkert.org// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 356654Snate@binkert.org// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 366654Snate@binkert.org// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 375457Ssaidi@eecs.umich.edu// 386654Snate@binkert.org// Authors: Gabe Black 396654Snate@binkert.org 405457Ssaidi@eecs.umich.edudef template MrsDeclare {{ 416654Snate@binkert.orgclass %(class_name)s : public %(base_class)s 426654Snate@binkert.org{ 432934SN/A protected: 442549SN/A public: 452995SN/A // Constructor 463395Shsul@eecs.umich.edu %(class_name)s(ExtMachInst machInst, IntRegIndex _dest); 476981SLisa.Hsu@amd.com %(BasicExecDeclare)s 483448Shsul@eecs.umich.edu}; 492549SN/A}}; 503444Sktlim@umich.edu 513444Sktlim@umich.edudef template MrsConstructor {{ 523444Sktlim@umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 533444Sktlim@umich.edu IntRegIndex _dest) 542889SN/A : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest) 552710SN/A { 563873Sbinkertn@umich.edu %(constructor)s; 573873Sbinkertn@umich.edu } 583873Sbinkertn@umich.edu}}; 593873Sbinkertn@umich.edu 603322Shsul@eecs.umich.edudef template MsrRegDeclare {{ 612995SN/Aclass %(class_name)s : public %(base_class)s 622995SN/A{ 632995SN/A protected: 642995SN/A public: 652995SN/A // Constructor 663143Shsul@eecs.umich.edu %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, uint8_t mask); 673322Shsul@eecs.umich.edu %(BasicExecDeclare)s 683322Shsul@eecs.umich.edu}; 693025Ssaidi@eecs.umich.edu}}; 703143Shsul@eecs.umich.edu 713143Shsul@eecs.umich.edudef template MsrRegConstructor {{ 723322Shsul@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 733444Sktlim@umich.edu IntRegIndex _op1, 743322Shsul@eecs.umich.edu uint8_t mask) 752710SN/A : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, mask) 762710SN/A { 772710SN/A %(constructor)s; 782710SN/A } 792710SN/A}}; 802710SN/A 813322Shsul@eecs.umich.edudef template MsrImmDeclare {{ 823304Sstever@eecs.umich.educlass %(class_name)s : public %(base_class)s 833322Shsul@eecs.umich.edu{ 843322Shsul@eecs.umich.edu protected: 853304Sstever@eecs.umich.edu public: 863481Shsul@eecs.umich.edu // Constructor 873481Shsul@eecs.umich.edu %(class_name)s(ExtMachInst machInst, uint32_t imm, uint8_t mask); 882566SN/A %(BasicExecDeclare)s 893322Shsul@eecs.umich.edu}; 903322Shsul@eecs.umich.edu}}; 912995SN/A 922995SN/Adef template MsrImmConstructor {{ 933304Sstever@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 943304Sstever@eecs.umich.edu uint32_t imm, 953304Sstever@eecs.umich.edu uint8_t mask) 962995SN/A : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, imm, mask) 972995SN/A { 982995SN/A %(constructor)s; 992917SN/A } 1002995SN/A}}; 1013304Sstever@eecs.umich.edu 1022995SN/Adef template RevOpDeclare {{ 1033304Sstever@eecs.umich.educlass %(class_name)s : public %(base_class)s 1043304Sstever@eecs.umich.edu{ 1056135Sgblack@eecs.umich.edu protected: 1066135Sgblack@eecs.umich.edu public: 1076654Snate@binkert.org // Constructor 1083819Shsul@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 1096654Snate@binkert.org IntRegIndex _dest, IntRegIndex _op1); 1105222Sksewell@umich.edu %(BasicExecDeclare)s 1116654Snate@binkert.org}; 1123819Shsul@eecs.umich.edu}}; 1136654Snate@binkert.org 1146135Sgblack@eecs.umich.edudef template RevOpConstructor {{ 1153819Shsul@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 1166654Snate@binkert.org IntRegIndex _dest, IntRegIndex _op1) 1173819Shsul@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1) 1183873Sbinkertn@umich.edu { 1193873Sbinkertn@umich.edu %(constructor)s; 1203873Sbinkertn@umich.edu } 1213873Sbinkertn@umich.edu}}; 1223873Sbinkertn@umich.edu 1233873Sbinkertn@umich.edudef template RegRegRegImmOpDeclare {{ 1246981SLisa.Hsu@amd.comclass %(class_name)s : public %(base_class)s 1253668Srdreslin@umich.edu{ 1263322Shsul@eecs.umich.edu protected: 1275142Ssaidi@eecs.umich.edu public: 1286636Ssteve.reinhardt@amd.com // Constructor 1295142Ssaidi@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 1305142Ssaidi@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 1316122SSteve.Reinhardt@amd.com uint32_t _imm); 1325142Ssaidi@eecs.umich.edu %(BasicExecDeclare)s 1335142Ssaidi@eecs.umich.edu}; 1345142Ssaidi@eecs.umich.edu}}; 1353312Sstever@eecs.umich.edu 1364968Sacolyte@umich.edudef template RegRegRegImmOpConstructor {{ 1374968Sacolyte@umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 1384968Sacolyte@umich.edu IntRegIndex _dest, 1396654Snate@binkert.org IntRegIndex _op1, 1405254Sksewell@umich.edu IntRegIndex _op2, 1415222Sksewell@umich.edu uint32_t _imm) 1423005Sstever@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 1436654Snate@binkert.org _dest, _op1, _op2, _imm) 1443819Shsul@eecs.umich.edu { 1456654Snate@binkert.org %(constructor)s; 1465222Sksewell@umich.edu } 1476654Snate@binkert.org}}; 1483819Shsul@eecs.umich.edu 1496654Snate@binkert.orgdef template RegRegRegRegOpDeclare {{ 1506135Sgblack@eecs.umich.educlass %(class_name)s : public %(base_class)s 1513322Shsul@eecs.umich.edu{ 1523322Shsul@eecs.umich.edu protected: 1534968Sacolyte@umich.edu public: 1544968Sacolyte@umich.edu // Constructor 1554837Ssaidi@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 1564837Ssaidi@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, 1574837Ssaidi@eecs.umich.edu IntRegIndex _op2, IntRegIndex _op3); 1583322Shsul@eecs.umich.edu %(BasicExecDeclare)s 1593005Sstever@eecs.umich.edu}; 1604167Sbinkertn@umich.edu}}; 1613005Sstever@eecs.umich.edu 1623005Sstever@eecs.umich.edudef template RegRegRegRegOpConstructor {{ 1633005Sstever@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 1642566SN/A IntRegIndex _dest, 1653481Shsul@eecs.umich.edu IntRegIndex _op1, 166 IntRegIndex _op2, 167 IntRegIndex _op3) 168 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 169 _dest, _op1, _op2, _op3) 170 { 171 %(constructor)s; 172 } 173}}; 174 175def template RegRegRegOpDeclare {{ 176class %(class_name)s : public %(base_class)s 177{ 178 protected: 179 public: 180 // Constructor 181 %(class_name)s(ExtMachInst machInst, 182 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2); 183 %(BasicExecDeclare)s 184}; 185}}; 186 187def template RegRegRegOpConstructor {{ 188 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 189 IntRegIndex _dest, 190 IntRegIndex _op1, 191 IntRegIndex _op2) 192 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 193 _dest, _op1, _op2) 194 { 195 %(constructor)s; 196 } 197}}; 198 199def template RegRegImmImmOpDeclare {{ 200class %(class_name)s : public %(base_class)s 201{ 202 protected: 203 public: 204 // Constructor 205 %(class_name)s(ExtMachInst machInst, 206 IntRegIndex _dest, IntRegIndex _op1, 207 uint32_t _imm1, uint32_t _imm2); 208 %(BasicExecDeclare)s 209}; 210}}; 211 212def template RegRegImmImmOpConstructor {{ 213 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 214 IntRegIndex _dest, 215 IntRegIndex _op1, 216 uint32_t _imm1, 217 uint32_t _imm2) 218 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 219 _dest, _op1, _imm1, _imm2) 220 { 221 %(constructor)s; 222 } 223}}; 224 225def template RegImmRegOpDeclare {{ 226class %(class_name)s : public %(base_class)s 227{ 228 protected: 229 public: 230 // Constructor 231 %(class_name)s(ExtMachInst machInst, 232 IntRegIndex _dest, uint32_t _imm, IntRegIndex _op1); 233 %(BasicExecDeclare)s 234}; 235}}; 236 237def template RegImmRegOpConstructor {{ 238 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 239 IntRegIndex _dest, 240 uint32_t _imm, 241 IntRegIndex _op1) 242 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 243 _dest, _imm, _op1) 244 { 245 %(constructor)s; 246 } 247}}; 248 249def template RegImmRegShiftOpDeclare {{ 250class %(class_name)s : public %(base_class)s 251{ 252 protected: 253 public: 254 // Constructor 255 %(class_name)s(ExtMachInst machInst, 256 IntRegIndex _dest, uint32_t _imm, IntRegIndex _op1, 257 int32_t _shiftAmt, ArmShiftType _shiftType); 258 %(BasicExecDeclare)s 259}; 260}}; 261 262def template RegImmRegShiftOpConstructor {{ 263 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 264 IntRegIndex _dest, 265 uint32_t _imm, 266 IntRegIndex _op1, 267 int32_t _shiftAmt, 268 ArmShiftType _shiftType) 269 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 270 _dest, _imm, _op1, _shiftAmt, _shiftType) 271 { 272 %(constructor)s; 273 } 274}}; 275