mem.isa revision 7312
17119Sgblack@eecs.umich.edu// -*- mode:c++ -*- 27119Sgblack@eecs.umich.edu 37120Sgblack@eecs.umich.edu// Copyright (c) 2010 ARM Limited 47120Sgblack@eecs.umich.edu// All rights reserved 57120Sgblack@eecs.umich.edu// 67120Sgblack@eecs.umich.edu// The license below extends only to copyright in the software and shall 77120Sgblack@eecs.umich.edu// not be construed as granting a license to any other intellectual 87120Sgblack@eecs.umich.edu// property including but not limited to intellectual property relating 97120Sgblack@eecs.umich.edu// to a hardware implementation of the functionality of the software 107120Sgblack@eecs.umich.edu// licensed hereunder. You may use the software subject to the license 117120Sgblack@eecs.umich.edu// terms below provided that you ensure that this notice is replicated 127120Sgblack@eecs.umich.edu// unmodified and in its entirety in all distributions of the software, 137120Sgblack@eecs.umich.edu// modified or unmodified, in source code or in binary form. 147120Sgblack@eecs.umich.edu// 157119Sgblack@eecs.umich.edu// Copyright (c) 2007-2008 The Florida State University 167119Sgblack@eecs.umich.edu// All rights reserved. 177119Sgblack@eecs.umich.edu// 187119Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 197119Sgblack@eecs.umich.edu// modification, are permitted provided that the following conditions are 207119Sgblack@eecs.umich.edu// met: redistributions of source code must retain the above copyright 217119Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 227119Sgblack@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 237119Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 247119Sgblack@eecs.umich.edu// documentation and/or other materials provided with the distribution; 257119Sgblack@eecs.umich.edu// neither the name of the copyright holders nor the names of its 267119Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 277119Sgblack@eecs.umich.edu// this software without specific prior written permission. 287119Sgblack@eecs.umich.edu// 297119Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 307119Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 317119Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 327119Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 337119Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 347119Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 357119Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 367119Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 377119Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 387119Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 397119Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 407119Sgblack@eecs.umich.edu// 417119Sgblack@eecs.umich.edu// Authors: Stephen Hines 427119Sgblack@eecs.umich.edu 437119Sgblack@eecs.umich.edu 447205Sgblack@eecs.umich.edudef template SwapExecute {{ 457205Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 467205Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 477205Sgblack@eecs.umich.edu { 487205Sgblack@eecs.umich.edu Addr EA; 497205Sgblack@eecs.umich.edu Fault fault = NoFault; 507205Sgblack@eecs.umich.edu 517205Sgblack@eecs.umich.edu %(op_decl)s; 527205Sgblack@eecs.umich.edu uint64_t memData = 0; 537205Sgblack@eecs.umich.edu %(op_rd)s; 547205Sgblack@eecs.umich.edu %(ea_code)s; 557205Sgblack@eecs.umich.edu 567205Sgblack@eecs.umich.edu if (%(predicate_test)s) 577205Sgblack@eecs.umich.edu { 587205Sgblack@eecs.umich.edu %(preacc_code)s; 597205Sgblack@eecs.umich.edu 607205Sgblack@eecs.umich.edu if (fault == NoFault) { 617205Sgblack@eecs.umich.edu fault = xc->write((uint%(mem_acc_size)d_t&)Mem, 627205Sgblack@eecs.umich.edu EA, memAccessFlags, &memData); 637205Sgblack@eecs.umich.edu } 647205Sgblack@eecs.umich.edu 657205Sgblack@eecs.umich.edu if (fault == NoFault) { 667205Sgblack@eecs.umich.edu %(postacc_code)s; 677205Sgblack@eecs.umich.edu } 687205Sgblack@eecs.umich.edu 697205Sgblack@eecs.umich.edu if (fault == NoFault) { 707205Sgblack@eecs.umich.edu %(op_wb)s; 717205Sgblack@eecs.umich.edu } 727205Sgblack@eecs.umich.edu } 737205Sgblack@eecs.umich.edu 747205Sgblack@eecs.umich.edu return fault; 757205Sgblack@eecs.umich.edu } 767205Sgblack@eecs.umich.edu}}; 777205Sgblack@eecs.umich.edu 787205Sgblack@eecs.umich.edudef template SwapInitiateAcc {{ 797205Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, 807205Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 817205Sgblack@eecs.umich.edu { 827205Sgblack@eecs.umich.edu Addr EA; 837205Sgblack@eecs.umich.edu Fault fault = NoFault; 847205Sgblack@eecs.umich.edu 857205Sgblack@eecs.umich.edu %(op_decl)s; 867205Sgblack@eecs.umich.edu uint64_t memData = 0; 877205Sgblack@eecs.umich.edu %(op_rd)s; 887205Sgblack@eecs.umich.edu %(ea_code)s; 897205Sgblack@eecs.umich.edu 907205Sgblack@eecs.umich.edu if (%(predicate_test)s) 917205Sgblack@eecs.umich.edu { 927205Sgblack@eecs.umich.edu %(preacc_code)s; 937205Sgblack@eecs.umich.edu 947205Sgblack@eecs.umich.edu if (fault == NoFault) { 957205Sgblack@eecs.umich.edu fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, 967205Sgblack@eecs.umich.edu memAccessFlags, &memData); 977205Sgblack@eecs.umich.edu } 987205Sgblack@eecs.umich.edu 997205Sgblack@eecs.umich.edu if (fault == NoFault) { 1007205Sgblack@eecs.umich.edu %(op_wb)s; 1017205Sgblack@eecs.umich.edu } 1027205Sgblack@eecs.umich.edu } 1037205Sgblack@eecs.umich.edu 1047205Sgblack@eecs.umich.edu return fault; 1057205Sgblack@eecs.umich.edu } 1067205Sgblack@eecs.umich.edu}}; 1077205Sgblack@eecs.umich.edu 1087205Sgblack@eecs.umich.edudef template SwapCompleteAcc {{ 1097205Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr pkt, 1107205Sgblack@eecs.umich.edu %(CPU_exec_context)s *xc, 1117205Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1127205Sgblack@eecs.umich.edu { 1137205Sgblack@eecs.umich.edu Fault fault = NoFault; 1147205Sgblack@eecs.umich.edu 1157205Sgblack@eecs.umich.edu %(op_decl)s; 1167205Sgblack@eecs.umich.edu %(op_rd)s; 1177205Sgblack@eecs.umich.edu 1187205Sgblack@eecs.umich.edu if (%(predicate_test)s) 1197205Sgblack@eecs.umich.edu { 1207205Sgblack@eecs.umich.edu // ARM instructions will not have a pkt if the predicate is false 1217205Sgblack@eecs.umich.edu uint64_t memData = pkt->get<typeof(Mem)>(); 1227205Sgblack@eecs.umich.edu 1237205Sgblack@eecs.umich.edu %(postacc_code)s; 1247205Sgblack@eecs.umich.edu 1257205Sgblack@eecs.umich.edu if (fault == NoFault) { 1267205Sgblack@eecs.umich.edu %(op_wb)s; 1277205Sgblack@eecs.umich.edu } 1287205Sgblack@eecs.umich.edu } 1297205Sgblack@eecs.umich.edu 1307205Sgblack@eecs.umich.edu return fault; 1317205Sgblack@eecs.umich.edu } 1327205Sgblack@eecs.umich.edu}}; 1337205Sgblack@eecs.umich.edu 1347119Sgblack@eecs.umich.edudef template LoadExecute {{ 1357119Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 1367119Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1377119Sgblack@eecs.umich.edu { 1387119Sgblack@eecs.umich.edu Addr EA; 1397119Sgblack@eecs.umich.edu Fault fault = NoFault; 1407119Sgblack@eecs.umich.edu 1417119Sgblack@eecs.umich.edu %(op_decl)s; 1427119Sgblack@eecs.umich.edu %(op_rd)s; 1437119Sgblack@eecs.umich.edu %(ea_code)s; 1447119Sgblack@eecs.umich.edu 1457119Sgblack@eecs.umich.edu if (%(predicate_test)s) 1467119Sgblack@eecs.umich.edu { 1477119Sgblack@eecs.umich.edu if (fault == NoFault) { 1487119Sgblack@eecs.umich.edu fault = xc->read(EA, (uint%(mem_acc_size)d_t&)Mem, memAccessFlags); 1497119Sgblack@eecs.umich.edu %(memacc_code)s; 1507119Sgblack@eecs.umich.edu } 1517119Sgblack@eecs.umich.edu 1527119Sgblack@eecs.umich.edu if (fault == NoFault) { 1537119Sgblack@eecs.umich.edu %(op_wb)s; 1547119Sgblack@eecs.umich.edu } 1557119Sgblack@eecs.umich.edu } 1567119Sgblack@eecs.umich.edu 1577119Sgblack@eecs.umich.edu return fault; 1587119Sgblack@eecs.umich.edu } 1597119Sgblack@eecs.umich.edu}}; 1607119Sgblack@eecs.umich.edu 1617120Sgblack@eecs.umich.edudef template StoreExecute {{ 1627120Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 1637120Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1647120Sgblack@eecs.umich.edu { 1657120Sgblack@eecs.umich.edu Addr EA; 1667120Sgblack@eecs.umich.edu Fault fault = NoFault; 1677120Sgblack@eecs.umich.edu 1687120Sgblack@eecs.umich.edu %(op_decl)s; 1697120Sgblack@eecs.umich.edu %(op_rd)s; 1707120Sgblack@eecs.umich.edu %(ea_code)s; 1717120Sgblack@eecs.umich.edu 1727120Sgblack@eecs.umich.edu if (%(predicate_test)s) 1737120Sgblack@eecs.umich.edu { 1747120Sgblack@eecs.umich.edu if (fault == NoFault) { 1757120Sgblack@eecs.umich.edu %(memacc_code)s; 1767120Sgblack@eecs.umich.edu } 1777120Sgblack@eecs.umich.edu 1787120Sgblack@eecs.umich.edu if (fault == NoFault) { 1797120Sgblack@eecs.umich.edu fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, 1807120Sgblack@eecs.umich.edu memAccessFlags, NULL); 1817120Sgblack@eecs.umich.edu if (traceData) { traceData->setData(Mem); } 1827120Sgblack@eecs.umich.edu } 1837120Sgblack@eecs.umich.edu 1847120Sgblack@eecs.umich.edu if (fault == NoFault) { 1857120Sgblack@eecs.umich.edu %(op_wb)s; 1867120Sgblack@eecs.umich.edu } 1877120Sgblack@eecs.umich.edu } 1887120Sgblack@eecs.umich.edu 1897120Sgblack@eecs.umich.edu return fault; 1907120Sgblack@eecs.umich.edu } 1917120Sgblack@eecs.umich.edu}}; 1927120Sgblack@eecs.umich.edu 1937303Sgblack@eecs.umich.edudef template StoreExExecute {{ 1947303Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 1957303Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1967303Sgblack@eecs.umich.edu { 1977303Sgblack@eecs.umich.edu Addr EA; 1987303Sgblack@eecs.umich.edu Fault fault = NoFault; 1997303Sgblack@eecs.umich.edu 2007303Sgblack@eecs.umich.edu %(op_decl)s; 2017303Sgblack@eecs.umich.edu %(op_rd)s; 2027303Sgblack@eecs.umich.edu %(ea_code)s; 2037303Sgblack@eecs.umich.edu 2047303Sgblack@eecs.umich.edu if (%(predicate_test)s) 2057303Sgblack@eecs.umich.edu { 2067303Sgblack@eecs.umich.edu if (fault == NoFault) { 2077303Sgblack@eecs.umich.edu %(memacc_code)s; 2087303Sgblack@eecs.umich.edu } 2097303Sgblack@eecs.umich.edu 2107303Sgblack@eecs.umich.edu uint64_t writeResult; 2117303Sgblack@eecs.umich.edu 2127303Sgblack@eecs.umich.edu if (fault == NoFault) { 2137303Sgblack@eecs.umich.edu fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, 2147303Sgblack@eecs.umich.edu memAccessFlags, &writeResult); 2157303Sgblack@eecs.umich.edu if (traceData) { traceData->setData(Mem); } 2167303Sgblack@eecs.umich.edu } 2177303Sgblack@eecs.umich.edu 2187303Sgblack@eecs.umich.edu if (fault == NoFault) { 2197303Sgblack@eecs.umich.edu %(postacc_code)s; 2207303Sgblack@eecs.umich.edu } 2217303Sgblack@eecs.umich.edu 2227303Sgblack@eecs.umich.edu if (fault == NoFault) { 2237303Sgblack@eecs.umich.edu %(op_wb)s; 2247303Sgblack@eecs.umich.edu } 2257303Sgblack@eecs.umich.edu } 2267303Sgblack@eecs.umich.edu 2277303Sgblack@eecs.umich.edu return fault; 2287303Sgblack@eecs.umich.edu } 2297303Sgblack@eecs.umich.edu}}; 2307303Sgblack@eecs.umich.edu 2317303Sgblack@eecs.umich.edudef template StoreExInitiateAcc {{ 2327303Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, 2337303Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 2347303Sgblack@eecs.umich.edu { 2357303Sgblack@eecs.umich.edu Addr EA; 2367303Sgblack@eecs.umich.edu Fault fault = NoFault; 2377303Sgblack@eecs.umich.edu 2387303Sgblack@eecs.umich.edu %(op_decl)s; 2397303Sgblack@eecs.umich.edu %(op_rd)s; 2407303Sgblack@eecs.umich.edu %(ea_code)s; 2417303Sgblack@eecs.umich.edu 2427303Sgblack@eecs.umich.edu if (%(predicate_test)s) 2437303Sgblack@eecs.umich.edu { 2447303Sgblack@eecs.umich.edu if (fault == NoFault) { 2457303Sgblack@eecs.umich.edu %(memacc_code)s; 2467303Sgblack@eecs.umich.edu } 2477303Sgblack@eecs.umich.edu 2487303Sgblack@eecs.umich.edu if (fault == NoFault) { 2497303Sgblack@eecs.umich.edu fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, 2507303Sgblack@eecs.umich.edu memAccessFlags, NULL); 2517303Sgblack@eecs.umich.edu if (traceData) { traceData->setData(Mem); } 2527303Sgblack@eecs.umich.edu } 2537303Sgblack@eecs.umich.edu 2547303Sgblack@eecs.umich.edu // Need to write back any potential address register update 2557303Sgblack@eecs.umich.edu if (fault == NoFault) { 2567303Sgblack@eecs.umich.edu %(op_wb)s; 2577303Sgblack@eecs.umich.edu } 2587303Sgblack@eecs.umich.edu } 2597303Sgblack@eecs.umich.edu 2607303Sgblack@eecs.umich.edu return fault; 2617303Sgblack@eecs.umich.edu } 2627303Sgblack@eecs.umich.edu}}; 2637303Sgblack@eecs.umich.edu 2647120Sgblack@eecs.umich.edudef template StoreInitiateAcc {{ 2657120Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, 2667120Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 2677120Sgblack@eecs.umich.edu { 2687120Sgblack@eecs.umich.edu Addr EA; 2697120Sgblack@eecs.umich.edu Fault fault = NoFault; 2707120Sgblack@eecs.umich.edu 2717120Sgblack@eecs.umich.edu %(op_decl)s; 2727120Sgblack@eecs.umich.edu %(op_rd)s; 2737120Sgblack@eecs.umich.edu %(ea_code)s; 2747120Sgblack@eecs.umich.edu 2757120Sgblack@eecs.umich.edu if (%(predicate_test)s) 2767120Sgblack@eecs.umich.edu { 2777120Sgblack@eecs.umich.edu if (fault == NoFault) { 2787120Sgblack@eecs.umich.edu %(memacc_code)s; 2797120Sgblack@eecs.umich.edu } 2807120Sgblack@eecs.umich.edu 2817120Sgblack@eecs.umich.edu if (fault == NoFault) { 2827120Sgblack@eecs.umich.edu fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, 2837120Sgblack@eecs.umich.edu memAccessFlags, NULL); 2847120Sgblack@eecs.umich.edu if (traceData) { traceData->setData(Mem); } 2857120Sgblack@eecs.umich.edu } 2867120Sgblack@eecs.umich.edu 2877120Sgblack@eecs.umich.edu // Need to write back any potential address register update 2887120Sgblack@eecs.umich.edu if (fault == NoFault) { 2897120Sgblack@eecs.umich.edu %(op_wb)s; 2907120Sgblack@eecs.umich.edu } 2917120Sgblack@eecs.umich.edu } 2927120Sgblack@eecs.umich.edu 2937120Sgblack@eecs.umich.edu return fault; 2947120Sgblack@eecs.umich.edu } 2957120Sgblack@eecs.umich.edu}}; 2967120Sgblack@eecs.umich.edu 2977119Sgblack@eecs.umich.edudef template LoadInitiateAcc {{ 2987119Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, 2997119Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 3007119Sgblack@eecs.umich.edu { 3017119Sgblack@eecs.umich.edu Addr EA; 3027119Sgblack@eecs.umich.edu Fault fault = NoFault; 3037119Sgblack@eecs.umich.edu 3047119Sgblack@eecs.umich.edu %(op_src_decl)s; 3057119Sgblack@eecs.umich.edu %(op_rd)s; 3067119Sgblack@eecs.umich.edu %(ea_code)s; 3077119Sgblack@eecs.umich.edu 3087119Sgblack@eecs.umich.edu if (%(predicate_test)s) 3097119Sgblack@eecs.umich.edu { 3107119Sgblack@eecs.umich.edu if (fault == NoFault) { 3117119Sgblack@eecs.umich.edu fault = xc->read(EA, (uint%(mem_acc_size)d_t &)Mem, memAccessFlags); 3127119Sgblack@eecs.umich.edu } 3137119Sgblack@eecs.umich.edu } 3147119Sgblack@eecs.umich.edu 3157119Sgblack@eecs.umich.edu return fault; 3167119Sgblack@eecs.umich.edu } 3177119Sgblack@eecs.umich.edu}}; 3187119Sgblack@eecs.umich.edu 3197119Sgblack@eecs.umich.edudef template LoadCompleteAcc {{ 3207119Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr pkt, 3217119Sgblack@eecs.umich.edu %(CPU_exec_context)s *xc, 3227119Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 3237119Sgblack@eecs.umich.edu { 3247119Sgblack@eecs.umich.edu Fault fault = NoFault; 3257119Sgblack@eecs.umich.edu 3267119Sgblack@eecs.umich.edu %(op_decl)s; 3277119Sgblack@eecs.umich.edu %(op_rd)s; 3287119Sgblack@eecs.umich.edu 3297119Sgblack@eecs.umich.edu if (%(predicate_test)s) 3307119Sgblack@eecs.umich.edu { 3317119Sgblack@eecs.umich.edu // ARM instructions will not have a pkt if the predicate is false 3327119Sgblack@eecs.umich.edu Mem = pkt->get<typeof(Mem)>(); 3337119Sgblack@eecs.umich.edu 3347119Sgblack@eecs.umich.edu if (fault == NoFault) { 3357119Sgblack@eecs.umich.edu %(memacc_code)s; 3367119Sgblack@eecs.umich.edu } 3377119Sgblack@eecs.umich.edu 3387119Sgblack@eecs.umich.edu if (fault == NoFault) { 3397119Sgblack@eecs.umich.edu %(op_wb)s; 3407119Sgblack@eecs.umich.edu } 3417119Sgblack@eecs.umich.edu } 3427119Sgblack@eecs.umich.edu 3437119Sgblack@eecs.umich.edu return fault; 3447119Sgblack@eecs.umich.edu } 3457119Sgblack@eecs.umich.edu}}; 3467119Sgblack@eecs.umich.edu 3477120Sgblack@eecs.umich.edudef template StoreCompleteAcc {{ 3487120Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr pkt, 3497120Sgblack@eecs.umich.edu %(CPU_exec_context)s *xc, 3507120Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 3517120Sgblack@eecs.umich.edu { 3527120Sgblack@eecs.umich.edu Fault fault = NoFault; 3537120Sgblack@eecs.umich.edu 3547120Sgblack@eecs.umich.edu %(op_decl)s; 3557120Sgblack@eecs.umich.edu %(op_rd)s; 3567120Sgblack@eecs.umich.edu 3577120Sgblack@eecs.umich.edu if (%(predicate_test)s) 3587120Sgblack@eecs.umich.edu { 3597120Sgblack@eecs.umich.edu if (fault == NoFault) { 3607120Sgblack@eecs.umich.edu %(op_wb)s; 3617120Sgblack@eecs.umich.edu } 3627120Sgblack@eecs.umich.edu } 3637120Sgblack@eecs.umich.edu 3647120Sgblack@eecs.umich.edu return fault; 3657120Sgblack@eecs.umich.edu } 3667120Sgblack@eecs.umich.edu}}; 3677120Sgblack@eecs.umich.edu 3687303Sgblack@eecs.umich.edudef template StoreExCompleteAcc {{ 3697303Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr pkt, 3707303Sgblack@eecs.umich.edu %(CPU_exec_context)s *xc, 3717303Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 3727303Sgblack@eecs.umich.edu { 3737303Sgblack@eecs.umich.edu Fault fault = NoFault; 3747303Sgblack@eecs.umich.edu 3757303Sgblack@eecs.umich.edu %(op_decl)s; 3767303Sgblack@eecs.umich.edu %(op_rd)s; 3777303Sgblack@eecs.umich.edu 3787303Sgblack@eecs.umich.edu if (%(predicate_test)s) 3797303Sgblack@eecs.umich.edu { 3807303Sgblack@eecs.umich.edu uint64_t writeResult = pkt->req->getExtraData(); 3817303Sgblack@eecs.umich.edu %(postacc_code)s; 3827303Sgblack@eecs.umich.edu 3837303Sgblack@eecs.umich.edu if (fault == NoFault) { 3847303Sgblack@eecs.umich.edu %(op_wb)s; 3857303Sgblack@eecs.umich.edu } 3867303Sgblack@eecs.umich.edu } 3877303Sgblack@eecs.umich.edu 3887303Sgblack@eecs.umich.edu return fault; 3897303Sgblack@eecs.umich.edu } 3907303Sgblack@eecs.umich.edu}}; 3917303Sgblack@eecs.umich.edu 3927291Sgblack@eecs.umich.edudef template RfeDeclare {{ 3937291Sgblack@eecs.umich.edu /** 3947291Sgblack@eecs.umich.edu * Static instruction class for "%(mnemonic)s". 3957291Sgblack@eecs.umich.edu */ 3967291Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 3977291Sgblack@eecs.umich.edu { 3987291Sgblack@eecs.umich.edu public: 3997291Sgblack@eecs.umich.edu 4007291Sgblack@eecs.umich.edu /// Constructor. 4017291Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 4027291Sgblack@eecs.umich.edu uint32_t _base, int _mode, bool _wb); 4037291Sgblack@eecs.umich.edu 4047291Sgblack@eecs.umich.edu %(BasicExecDeclare)s 4057291Sgblack@eecs.umich.edu 4067291Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 4077291Sgblack@eecs.umich.edu 4087291Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 4097291Sgblack@eecs.umich.edu }; 4107291Sgblack@eecs.umich.edu}}; 4117291Sgblack@eecs.umich.edu 4127312Sgblack@eecs.umich.edudef template SrsDeclare {{ 4137312Sgblack@eecs.umich.edu /** 4147312Sgblack@eecs.umich.edu * Static instruction class for "%(mnemonic)s". 4157312Sgblack@eecs.umich.edu */ 4167312Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 4177312Sgblack@eecs.umich.edu { 4187312Sgblack@eecs.umich.edu public: 4197312Sgblack@eecs.umich.edu 4207312Sgblack@eecs.umich.edu /// Constructor. 4217312Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 4227312Sgblack@eecs.umich.edu uint32_t _regMode, int _mode, bool _wb); 4237312Sgblack@eecs.umich.edu 4247312Sgblack@eecs.umich.edu %(BasicExecDeclare)s 4257312Sgblack@eecs.umich.edu 4267312Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 4277312Sgblack@eecs.umich.edu 4287312Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 4297312Sgblack@eecs.umich.edu }; 4307312Sgblack@eecs.umich.edu}}; 4317312Sgblack@eecs.umich.edu 4327205Sgblack@eecs.umich.edudef template SwapDeclare {{ 4337205Sgblack@eecs.umich.edu /** 4347205Sgblack@eecs.umich.edu * Static instruction class for "%(mnemonic)s". 4357205Sgblack@eecs.umich.edu */ 4367205Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 4377205Sgblack@eecs.umich.edu { 4387205Sgblack@eecs.umich.edu public: 4397205Sgblack@eecs.umich.edu 4407205Sgblack@eecs.umich.edu /// Constructor. 4417205Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 4427205Sgblack@eecs.umich.edu uint32_t _dest, uint32_t _op1, uint32_t _base); 4437205Sgblack@eecs.umich.edu 4447205Sgblack@eecs.umich.edu %(BasicExecDeclare)s 4457205Sgblack@eecs.umich.edu 4467205Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 4477205Sgblack@eecs.umich.edu 4487205Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 4497205Sgblack@eecs.umich.edu }; 4507205Sgblack@eecs.umich.edu}}; 4517205Sgblack@eecs.umich.edu 4527279Sgblack@eecs.umich.edudef template LoadStoreDImmDeclare {{ 4537279Sgblack@eecs.umich.edu /** 4547279Sgblack@eecs.umich.edu * Static instruction class for "%(mnemonic)s". 4557279Sgblack@eecs.umich.edu */ 4567279Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 4577279Sgblack@eecs.umich.edu { 4587279Sgblack@eecs.umich.edu public: 4597279Sgblack@eecs.umich.edu 4607279Sgblack@eecs.umich.edu /// Constructor. 4617279Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 4627279Sgblack@eecs.umich.edu uint32_t _dest, uint32_t _dest2, 4637279Sgblack@eecs.umich.edu uint32_t _base, bool _add, int32_t _imm); 4647279Sgblack@eecs.umich.edu 4657279Sgblack@eecs.umich.edu %(BasicExecDeclare)s 4667279Sgblack@eecs.umich.edu 4677279Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 4687279Sgblack@eecs.umich.edu 4697279Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 4707279Sgblack@eecs.umich.edu }; 4717279Sgblack@eecs.umich.edu}}; 4727279Sgblack@eecs.umich.edu 4737303Sgblack@eecs.umich.edudef template StoreExDImmDeclare {{ 4747303Sgblack@eecs.umich.edu /** 4757303Sgblack@eecs.umich.edu * Static instruction class for "%(mnemonic)s". 4767303Sgblack@eecs.umich.edu */ 4777303Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 4787303Sgblack@eecs.umich.edu { 4797303Sgblack@eecs.umich.edu public: 4807303Sgblack@eecs.umich.edu 4817303Sgblack@eecs.umich.edu /// Constructor. 4827303Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 4837303Sgblack@eecs.umich.edu uint32_t _result, uint32_t _dest, uint32_t _dest2, 4847303Sgblack@eecs.umich.edu uint32_t _base, bool _add, int32_t _imm); 4857303Sgblack@eecs.umich.edu 4867303Sgblack@eecs.umich.edu %(BasicExecDeclare)s 4877303Sgblack@eecs.umich.edu 4887303Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 4897303Sgblack@eecs.umich.edu 4907303Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 4917303Sgblack@eecs.umich.edu }; 4927303Sgblack@eecs.umich.edu}}; 4937303Sgblack@eecs.umich.edu 4947119Sgblack@eecs.umich.edudef template LoadStoreImmDeclare {{ 4957119Sgblack@eecs.umich.edu /** 4967119Sgblack@eecs.umich.edu * Static instruction class for "%(mnemonic)s". 4977119Sgblack@eecs.umich.edu */ 4987119Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 4997119Sgblack@eecs.umich.edu { 5007119Sgblack@eecs.umich.edu public: 5017119Sgblack@eecs.umich.edu 5027119Sgblack@eecs.umich.edu /// Constructor. 5037119Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 5047119Sgblack@eecs.umich.edu uint32_t _dest, uint32_t _base, bool _add, int32_t _imm); 5057119Sgblack@eecs.umich.edu 5067119Sgblack@eecs.umich.edu %(BasicExecDeclare)s 5077119Sgblack@eecs.umich.edu 5087119Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 5097119Sgblack@eecs.umich.edu 5107119Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 5117119Sgblack@eecs.umich.edu }; 5127119Sgblack@eecs.umich.edu}}; 5137119Sgblack@eecs.umich.edu 5147303Sgblack@eecs.umich.edudef template StoreExImmDeclare {{ 5157303Sgblack@eecs.umich.edu /** 5167303Sgblack@eecs.umich.edu * Static instruction class for "%(mnemonic)s". 5177303Sgblack@eecs.umich.edu */ 5187303Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 5197303Sgblack@eecs.umich.edu { 5207303Sgblack@eecs.umich.edu public: 5217303Sgblack@eecs.umich.edu 5227303Sgblack@eecs.umich.edu /// Constructor. 5237303Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 5247303Sgblack@eecs.umich.edu uint32_t _result, uint32_t _dest, uint32_t _base, 5257303Sgblack@eecs.umich.edu bool _add, int32_t _imm); 5267303Sgblack@eecs.umich.edu 5277303Sgblack@eecs.umich.edu %(BasicExecDeclare)s 5287303Sgblack@eecs.umich.edu 5297303Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 5307303Sgblack@eecs.umich.edu 5317303Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 5327303Sgblack@eecs.umich.edu }; 5337303Sgblack@eecs.umich.edu}}; 5347303Sgblack@eecs.umich.edu 5357279Sgblack@eecs.umich.edudef template LoadStoreDRegDeclare {{ 5367279Sgblack@eecs.umich.edu /** 5377279Sgblack@eecs.umich.edu * Static instruction class for "%(mnemonic)s". 5387279Sgblack@eecs.umich.edu */ 5397279Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 5407279Sgblack@eecs.umich.edu { 5417279Sgblack@eecs.umich.edu public: 5427279Sgblack@eecs.umich.edu 5437279Sgblack@eecs.umich.edu /// Constructor. 5447279Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 5457279Sgblack@eecs.umich.edu uint32_t _dest, uint32_t _dest2, 5467279Sgblack@eecs.umich.edu uint32_t _base, bool _add, 5477279Sgblack@eecs.umich.edu int32_t _shiftAmt, uint32_t _shiftType, 5487279Sgblack@eecs.umich.edu uint32_t _index); 5497279Sgblack@eecs.umich.edu 5507279Sgblack@eecs.umich.edu %(BasicExecDeclare)s 5517279Sgblack@eecs.umich.edu 5527279Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 5537279Sgblack@eecs.umich.edu 5547279Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 5557279Sgblack@eecs.umich.edu }; 5567279Sgblack@eecs.umich.edu}}; 5577279Sgblack@eecs.umich.edu 5587119Sgblack@eecs.umich.edudef template LoadStoreRegDeclare {{ 5597119Sgblack@eecs.umich.edu /** 5607119Sgblack@eecs.umich.edu * Static instruction class for "%(mnemonic)s". 5617119Sgblack@eecs.umich.edu */ 5627119Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 5637119Sgblack@eecs.umich.edu { 5647119Sgblack@eecs.umich.edu public: 5657119Sgblack@eecs.umich.edu 5667119Sgblack@eecs.umich.edu /// Constructor. 5677119Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 5687119Sgblack@eecs.umich.edu uint32_t _dest, uint32_t _base, bool _add, 5697119Sgblack@eecs.umich.edu int32_t _shiftAmt, uint32_t _shiftType, 5707119Sgblack@eecs.umich.edu uint32_t _index); 5717119Sgblack@eecs.umich.edu 5727119Sgblack@eecs.umich.edu %(BasicExecDeclare)s 5737119Sgblack@eecs.umich.edu 5747119Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 5757119Sgblack@eecs.umich.edu 5767119Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 5777119Sgblack@eecs.umich.edu }; 5787119Sgblack@eecs.umich.edu}}; 5797119Sgblack@eecs.umich.edu 5807119Sgblack@eecs.umich.edudef template InitiateAccDeclare {{ 5817119Sgblack@eecs.umich.edu Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const; 5827119Sgblack@eecs.umich.edu}}; 5837119Sgblack@eecs.umich.edu 5847119Sgblack@eecs.umich.edudef template CompleteAccDeclare {{ 5857119Sgblack@eecs.umich.edu Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const; 5867119Sgblack@eecs.umich.edu}}; 5877119Sgblack@eecs.umich.edu 5887291Sgblack@eecs.umich.edudef template RfeConstructor {{ 5897291Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 5907291Sgblack@eecs.umich.edu uint32_t _base, int _mode, bool _wb) 5917291Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 5927291Sgblack@eecs.umich.edu (IntRegIndex)_base, (AddrMode)_mode, _wb) 5937291Sgblack@eecs.umich.edu { 5947291Sgblack@eecs.umich.edu %(constructor)s; 5957291Sgblack@eecs.umich.edu } 5967291Sgblack@eecs.umich.edu}}; 5977291Sgblack@eecs.umich.edu 5987312Sgblack@eecs.umich.edudef template SrsConstructor {{ 5997312Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 6007312Sgblack@eecs.umich.edu uint32_t _regMode, int _mode, bool _wb) 6017312Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 6027312Sgblack@eecs.umich.edu (OperatingMode)_regMode, (AddrMode)_mode, _wb) 6037312Sgblack@eecs.umich.edu { 6047312Sgblack@eecs.umich.edu %(constructor)s; 6057312Sgblack@eecs.umich.edu } 6067312Sgblack@eecs.umich.edu}}; 6077312Sgblack@eecs.umich.edu 6087205Sgblack@eecs.umich.edudef template SwapConstructor {{ 6097205Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 6107205Sgblack@eecs.umich.edu uint32_t _dest, uint32_t _op1, uint32_t _base) 6117205Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 6127205Sgblack@eecs.umich.edu (IntRegIndex)_dest, (IntRegIndex)_op1, (IntRegIndex)_base) 6137205Sgblack@eecs.umich.edu { 6147205Sgblack@eecs.umich.edu %(constructor)s; 6157205Sgblack@eecs.umich.edu } 6167205Sgblack@eecs.umich.edu}}; 6177205Sgblack@eecs.umich.edu 6187279Sgblack@eecs.umich.edudef template LoadStoreDImmConstructor {{ 6197279Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 6207279Sgblack@eecs.umich.edu uint32_t _dest, uint32_t _dest2, 6217279Sgblack@eecs.umich.edu uint32_t _base, bool _add, int32_t _imm) 6227279Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 6237279Sgblack@eecs.umich.edu (IntRegIndex)_dest, (IntRegIndex)_dest2, 6247279Sgblack@eecs.umich.edu (IntRegIndex)_base, _add, _imm) 6257279Sgblack@eecs.umich.edu { 6267279Sgblack@eecs.umich.edu %(constructor)s; 6277279Sgblack@eecs.umich.edu } 6287279Sgblack@eecs.umich.edu}}; 6297279Sgblack@eecs.umich.edu 6307303Sgblack@eecs.umich.edudef template StoreExDImmConstructor {{ 6317303Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 6327303Sgblack@eecs.umich.edu uint32_t _result, uint32_t _dest, uint32_t _dest2, 6337303Sgblack@eecs.umich.edu uint32_t _base, bool _add, int32_t _imm) 6347303Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 6357303Sgblack@eecs.umich.edu (IntRegIndex)_result, 6367303Sgblack@eecs.umich.edu (IntRegIndex)_dest, (IntRegIndex)_dest2, 6377303Sgblack@eecs.umich.edu (IntRegIndex)_base, _add, _imm) 6387303Sgblack@eecs.umich.edu { 6397303Sgblack@eecs.umich.edu %(constructor)s; 6407303Sgblack@eecs.umich.edu } 6417303Sgblack@eecs.umich.edu}}; 6427303Sgblack@eecs.umich.edu 6437119Sgblack@eecs.umich.edudef template LoadStoreImmConstructor {{ 6447119Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 6457119Sgblack@eecs.umich.edu uint32_t _dest, uint32_t _base, bool _add, int32_t _imm) 6467119Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 6477119Sgblack@eecs.umich.edu (IntRegIndex)_dest, (IntRegIndex)_base, _add, _imm) 6487119Sgblack@eecs.umich.edu { 6497119Sgblack@eecs.umich.edu %(constructor)s; 6507119Sgblack@eecs.umich.edu } 6517119Sgblack@eecs.umich.edu}}; 6527119Sgblack@eecs.umich.edu 6537303Sgblack@eecs.umich.edudef template StoreExImmConstructor {{ 6547303Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 6557303Sgblack@eecs.umich.edu uint32_t _result, uint32_t _dest, uint32_t _base, 6567303Sgblack@eecs.umich.edu bool _add, int32_t _imm) 6577303Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 6587303Sgblack@eecs.umich.edu (IntRegIndex)_result, (IntRegIndex)_dest, 6597303Sgblack@eecs.umich.edu (IntRegIndex)_base, _add, _imm) 6607303Sgblack@eecs.umich.edu { 6617303Sgblack@eecs.umich.edu %(constructor)s; 6627303Sgblack@eecs.umich.edu } 6637303Sgblack@eecs.umich.edu}}; 6647303Sgblack@eecs.umich.edu 6657279Sgblack@eecs.umich.edudef template LoadStoreDRegConstructor {{ 6667279Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 6677279Sgblack@eecs.umich.edu uint32_t _dest, uint32_t _dest2, uint32_t _base, bool _add, 6687279Sgblack@eecs.umich.edu int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index) 6697279Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 6707279Sgblack@eecs.umich.edu (IntRegIndex)_dest, (IntRegIndex)_dest2, 6717279Sgblack@eecs.umich.edu (IntRegIndex)_base, _add, 6727279Sgblack@eecs.umich.edu _shiftAmt, (ArmShiftType)_shiftType, 6737279Sgblack@eecs.umich.edu (IntRegIndex)_index) 6747279Sgblack@eecs.umich.edu { 6757279Sgblack@eecs.umich.edu %(constructor)s; 6767279Sgblack@eecs.umich.edu } 6777279Sgblack@eecs.umich.edu}}; 6787279Sgblack@eecs.umich.edu 6797119Sgblack@eecs.umich.edudef template LoadStoreRegConstructor {{ 6807119Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 6817119Sgblack@eecs.umich.edu uint32_t _dest, uint32_t _base, bool _add, 6827119Sgblack@eecs.umich.edu int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index) 6837119Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 6847119Sgblack@eecs.umich.edu (IntRegIndex)_dest, (IntRegIndex)_base, _add, 6857119Sgblack@eecs.umich.edu _shiftAmt, (ArmShiftType)_shiftType, 6867119Sgblack@eecs.umich.edu (IntRegIndex)_index) 6877119Sgblack@eecs.umich.edu { 6887119Sgblack@eecs.umich.edu %(constructor)s; 6897119Sgblack@eecs.umich.edu } 6907119Sgblack@eecs.umich.edu}}; 691