mem.isa revision 7120
17119Sgblack@eecs.umich.edu// -*- mode:c++ -*- 27119Sgblack@eecs.umich.edu 37120Sgblack@eecs.umich.edu// Copyright (c) 2010 ARM Limited 47120Sgblack@eecs.umich.edu// All rights reserved 57120Sgblack@eecs.umich.edu// 67120Sgblack@eecs.umich.edu// The license below extends only to copyright in the software and shall 77120Sgblack@eecs.umich.edu// not be construed as granting a license to any other intellectual 87120Sgblack@eecs.umich.edu// property including but not limited to intellectual property relating 97120Sgblack@eecs.umich.edu// to a hardware implementation of the functionality of the software 107120Sgblack@eecs.umich.edu// licensed hereunder. You may use the software subject to the license 117120Sgblack@eecs.umich.edu// terms below provided that you ensure that this notice is replicated 127120Sgblack@eecs.umich.edu// unmodified and in its entirety in all distributions of the software, 137120Sgblack@eecs.umich.edu// modified or unmodified, in source code or in binary form. 147120Sgblack@eecs.umich.edu// 157119Sgblack@eecs.umich.edu// Copyright (c) 2007-2008 The Florida State University 167119Sgblack@eecs.umich.edu// All rights reserved. 177119Sgblack@eecs.umich.edu// 187119Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 197119Sgblack@eecs.umich.edu// modification, are permitted provided that the following conditions are 207119Sgblack@eecs.umich.edu// met: redistributions of source code must retain the above copyright 217119Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 227119Sgblack@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 237119Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 247119Sgblack@eecs.umich.edu// documentation and/or other materials provided with the distribution; 257119Sgblack@eecs.umich.edu// neither the name of the copyright holders nor the names of its 267119Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 277119Sgblack@eecs.umich.edu// this software without specific prior written permission. 287119Sgblack@eecs.umich.edu// 297119Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 307119Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 317119Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 327119Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 337119Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 347119Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 357119Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 367119Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 377119Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 387119Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 397119Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 407119Sgblack@eecs.umich.edu// 417119Sgblack@eecs.umich.edu// Authors: Stephen Hines 427119Sgblack@eecs.umich.edu 437119Sgblack@eecs.umich.edu 447119Sgblack@eecs.umich.edudef template LoadExecute {{ 457119Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 467119Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 477119Sgblack@eecs.umich.edu { 487119Sgblack@eecs.umich.edu Addr EA; 497119Sgblack@eecs.umich.edu Fault fault = NoFault; 507119Sgblack@eecs.umich.edu 517119Sgblack@eecs.umich.edu %(op_decl)s; 527119Sgblack@eecs.umich.edu %(op_rd)s; 537119Sgblack@eecs.umich.edu %(ea_code)s; 547119Sgblack@eecs.umich.edu 557119Sgblack@eecs.umich.edu if (%(predicate_test)s) 567119Sgblack@eecs.umich.edu { 577119Sgblack@eecs.umich.edu if (fault == NoFault) { 587119Sgblack@eecs.umich.edu fault = xc->read(EA, (uint%(mem_acc_size)d_t&)Mem, memAccessFlags); 597119Sgblack@eecs.umich.edu %(memacc_code)s; 607119Sgblack@eecs.umich.edu } 617119Sgblack@eecs.umich.edu 627119Sgblack@eecs.umich.edu if (fault == NoFault) { 637119Sgblack@eecs.umich.edu %(op_wb)s; 647119Sgblack@eecs.umich.edu } 657119Sgblack@eecs.umich.edu } 667119Sgblack@eecs.umich.edu 677119Sgblack@eecs.umich.edu return fault; 687119Sgblack@eecs.umich.edu } 697119Sgblack@eecs.umich.edu}}; 707119Sgblack@eecs.umich.edu 717120Sgblack@eecs.umich.edudef template StoreExecute {{ 727120Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 737120Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 747120Sgblack@eecs.umich.edu { 757120Sgblack@eecs.umich.edu Addr EA; 767120Sgblack@eecs.umich.edu Fault fault = NoFault; 777120Sgblack@eecs.umich.edu 787120Sgblack@eecs.umich.edu %(op_decl)s; 797120Sgblack@eecs.umich.edu %(op_rd)s; 807120Sgblack@eecs.umich.edu %(ea_code)s; 817120Sgblack@eecs.umich.edu 827120Sgblack@eecs.umich.edu if (%(predicate_test)s) 837120Sgblack@eecs.umich.edu { 847120Sgblack@eecs.umich.edu if (fault == NoFault) { 857120Sgblack@eecs.umich.edu %(memacc_code)s; 867120Sgblack@eecs.umich.edu } 877120Sgblack@eecs.umich.edu 887120Sgblack@eecs.umich.edu if (fault == NoFault) { 897120Sgblack@eecs.umich.edu fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, 907120Sgblack@eecs.umich.edu memAccessFlags, NULL); 917120Sgblack@eecs.umich.edu if (traceData) { traceData->setData(Mem); } 927120Sgblack@eecs.umich.edu } 937120Sgblack@eecs.umich.edu 947120Sgblack@eecs.umich.edu if (fault == NoFault) { 957120Sgblack@eecs.umich.edu %(op_wb)s; 967120Sgblack@eecs.umich.edu } 977120Sgblack@eecs.umich.edu } 987120Sgblack@eecs.umich.edu 997120Sgblack@eecs.umich.edu return fault; 1007120Sgblack@eecs.umich.edu } 1017120Sgblack@eecs.umich.edu}}; 1027120Sgblack@eecs.umich.edu 1037120Sgblack@eecs.umich.edudef template StoreInitiateAcc {{ 1047120Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, 1057120Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1067120Sgblack@eecs.umich.edu { 1077120Sgblack@eecs.umich.edu Addr EA; 1087120Sgblack@eecs.umich.edu Fault fault = NoFault; 1097120Sgblack@eecs.umich.edu 1107120Sgblack@eecs.umich.edu %(op_decl)s; 1117120Sgblack@eecs.umich.edu %(op_rd)s; 1127120Sgblack@eecs.umich.edu %(ea_code)s; 1137120Sgblack@eecs.umich.edu 1147120Sgblack@eecs.umich.edu if (%(predicate_test)s) 1157120Sgblack@eecs.umich.edu { 1167120Sgblack@eecs.umich.edu if (fault == NoFault) { 1177120Sgblack@eecs.umich.edu %(memacc_code)s; 1187120Sgblack@eecs.umich.edu } 1197120Sgblack@eecs.umich.edu 1207120Sgblack@eecs.umich.edu if (fault == NoFault) { 1217120Sgblack@eecs.umich.edu fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, 1227120Sgblack@eecs.umich.edu memAccessFlags, NULL); 1237120Sgblack@eecs.umich.edu if (traceData) { traceData->setData(Mem); } 1247120Sgblack@eecs.umich.edu } 1257120Sgblack@eecs.umich.edu 1267120Sgblack@eecs.umich.edu // Need to write back any potential address register update 1277120Sgblack@eecs.umich.edu if (fault == NoFault) { 1287120Sgblack@eecs.umich.edu %(op_wb)s; 1297120Sgblack@eecs.umich.edu } 1307120Sgblack@eecs.umich.edu } 1317120Sgblack@eecs.umich.edu 1327120Sgblack@eecs.umich.edu return fault; 1337120Sgblack@eecs.umich.edu } 1347120Sgblack@eecs.umich.edu}}; 1357120Sgblack@eecs.umich.edu 1367119Sgblack@eecs.umich.edudef template LoadInitiateAcc {{ 1377119Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, 1387119Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1397119Sgblack@eecs.umich.edu { 1407119Sgblack@eecs.umich.edu Addr EA; 1417119Sgblack@eecs.umich.edu Fault fault = NoFault; 1427119Sgblack@eecs.umich.edu 1437119Sgblack@eecs.umich.edu %(op_src_decl)s; 1447119Sgblack@eecs.umich.edu %(op_rd)s; 1457119Sgblack@eecs.umich.edu %(ea_code)s; 1467119Sgblack@eecs.umich.edu 1477119Sgblack@eecs.umich.edu if (%(predicate_test)s) 1487119Sgblack@eecs.umich.edu { 1497119Sgblack@eecs.umich.edu if (fault == NoFault) { 1507119Sgblack@eecs.umich.edu fault = xc->read(EA, (uint%(mem_acc_size)d_t &)Mem, memAccessFlags); 1517119Sgblack@eecs.umich.edu } 1527119Sgblack@eecs.umich.edu } 1537119Sgblack@eecs.umich.edu 1547119Sgblack@eecs.umich.edu return fault; 1557119Sgblack@eecs.umich.edu } 1567119Sgblack@eecs.umich.edu}}; 1577119Sgblack@eecs.umich.edu 1587119Sgblack@eecs.umich.edudef template LoadCompleteAcc {{ 1597119Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr pkt, 1607119Sgblack@eecs.umich.edu %(CPU_exec_context)s *xc, 1617119Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1627119Sgblack@eecs.umich.edu { 1637119Sgblack@eecs.umich.edu Fault fault = NoFault; 1647119Sgblack@eecs.umich.edu 1657119Sgblack@eecs.umich.edu %(op_decl)s; 1667119Sgblack@eecs.umich.edu %(op_rd)s; 1677119Sgblack@eecs.umich.edu 1687119Sgblack@eecs.umich.edu if (%(predicate_test)s) 1697119Sgblack@eecs.umich.edu { 1707119Sgblack@eecs.umich.edu // ARM instructions will not have a pkt if the predicate is false 1717119Sgblack@eecs.umich.edu Mem = pkt->get<typeof(Mem)>(); 1727119Sgblack@eecs.umich.edu 1737119Sgblack@eecs.umich.edu if (fault == NoFault) { 1747119Sgblack@eecs.umich.edu %(memacc_code)s; 1757119Sgblack@eecs.umich.edu } 1767119Sgblack@eecs.umich.edu 1777119Sgblack@eecs.umich.edu if (fault == NoFault) { 1787119Sgblack@eecs.umich.edu %(op_wb)s; 1797119Sgblack@eecs.umich.edu } 1807119Sgblack@eecs.umich.edu } 1817119Sgblack@eecs.umich.edu 1827119Sgblack@eecs.umich.edu return fault; 1837119Sgblack@eecs.umich.edu } 1847119Sgblack@eecs.umich.edu}}; 1857119Sgblack@eecs.umich.edu 1867120Sgblack@eecs.umich.edudef template StoreCompleteAcc {{ 1877120Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr pkt, 1887120Sgblack@eecs.umich.edu %(CPU_exec_context)s *xc, 1897120Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1907120Sgblack@eecs.umich.edu { 1917120Sgblack@eecs.umich.edu Fault fault = NoFault; 1927120Sgblack@eecs.umich.edu 1937120Sgblack@eecs.umich.edu %(op_decl)s; 1947120Sgblack@eecs.umich.edu %(op_rd)s; 1957120Sgblack@eecs.umich.edu 1967120Sgblack@eecs.umich.edu if (%(predicate_test)s) 1977120Sgblack@eecs.umich.edu { 1987120Sgblack@eecs.umich.edu if (fault == NoFault) { 1997120Sgblack@eecs.umich.edu %(op_wb)s; 2007120Sgblack@eecs.umich.edu } 2017120Sgblack@eecs.umich.edu } 2027120Sgblack@eecs.umich.edu 2037120Sgblack@eecs.umich.edu return fault; 2047120Sgblack@eecs.umich.edu } 2057120Sgblack@eecs.umich.edu}}; 2067120Sgblack@eecs.umich.edu 2077119Sgblack@eecs.umich.edudef template LoadStoreImmDeclare {{ 2087119Sgblack@eecs.umich.edu /** 2097119Sgblack@eecs.umich.edu * Static instruction class for "%(mnemonic)s". 2107119Sgblack@eecs.umich.edu */ 2117119Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 2127119Sgblack@eecs.umich.edu { 2137119Sgblack@eecs.umich.edu public: 2147119Sgblack@eecs.umich.edu 2157119Sgblack@eecs.umich.edu /// Constructor. 2167119Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 2177119Sgblack@eecs.umich.edu uint32_t _dest, uint32_t _base, bool _add, int32_t _imm); 2187119Sgblack@eecs.umich.edu 2197119Sgblack@eecs.umich.edu %(BasicExecDeclare)s 2207119Sgblack@eecs.umich.edu 2217119Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 2227119Sgblack@eecs.umich.edu 2237119Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 2247119Sgblack@eecs.umich.edu }; 2257119Sgblack@eecs.umich.edu}}; 2267119Sgblack@eecs.umich.edu 2277119Sgblack@eecs.umich.edudef template LoadStoreRegDeclare {{ 2287119Sgblack@eecs.umich.edu /** 2297119Sgblack@eecs.umich.edu * Static instruction class for "%(mnemonic)s". 2307119Sgblack@eecs.umich.edu */ 2317119Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 2327119Sgblack@eecs.umich.edu { 2337119Sgblack@eecs.umich.edu public: 2347119Sgblack@eecs.umich.edu 2357119Sgblack@eecs.umich.edu /// Constructor. 2367119Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst, 2377119Sgblack@eecs.umich.edu uint32_t _dest, uint32_t _base, bool _add, 2387119Sgblack@eecs.umich.edu int32_t _shiftAmt, uint32_t _shiftType, 2397119Sgblack@eecs.umich.edu uint32_t _index); 2407119Sgblack@eecs.umich.edu 2417119Sgblack@eecs.umich.edu %(BasicExecDeclare)s 2427119Sgblack@eecs.umich.edu 2437119Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 2447119Sgblack@eecs.umich.edu 2457119Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 2467119Sgblack@eecs.umich.edu }; 2477119Sgblack@eecs.umich.edu}}; 2487119Sgblack@eecs.umich.edu 2497119Sgblack@eecs.umich.edudef template InitiateAccDeclare {{ 2507119Sgblack@eecs.umich.edu Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const; 2517119Sgblack@eecs.umich.edu}}; 2527119Sgblack@eecs.umich.edu 2537119Sgblack@eecs.umich.edudef template CompleteAccDeclare {{ 2547119Sgblack@eecs.umich.edu Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const; 2557119Sgblack@eecs.umich.edu}}; 2567119Sgblack@eecs.umich.edu 2577119Sgblack@eecs.umich.edudef template LoadStoreImmConstructor {{ 2587119Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 2597119Sgblack@eecs.umich.edu uint32_t _dest, uint32_t _base, bool _add, int32_t _imm) 2607119Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 2617119Sgblack@eecs.umich.edu (IntRegIndex)_dest, (IntRegIndex)_base, _add, _imm) 2627119Sgblack@eecs.umich.edu { 2637119Sgblack@eecs.umich.edu %(constructor)s; 2647119Sgblack@eecs.umich.edu } 2657119Sgblack@eecs.umich.edu}}; 2667119Sgblack@eecs.umich.edu 2677119Sgblack@eecs.umich.edudef template LoadStoreRegConstructor {{ 2687119Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 2697119Sgblack@eecs.umich.edu uint32_t _dest, uint32_t _base, bool _add, 2707119Sgblack@eecs.umich.edu int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index) 2717119Sgblack@eecs.umich.edu : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 2727119Sgblack@eecs.umich.edu (IntRegIndex)_dest, (IntRegIndex)_base, _add, 2737119Sgblack@eecs.umich.edu _shiftAmt, (ArmShiftType)_shiftType, 2747119Sgblack@eecs.umich.edu (IntRegIndex)_index) 2757119Sgblack@eecs.umich.edu { 2767119Sgblack@eecs.umich.edu %(constructor)s; 2777119Sgblack@eecs.umich.edu } 2787119Sgblack@eecs.umich.edu}}; 279