operands.isa revision 6403
15647Sgblack@eecs.umich.edu// -*- mode:c++ -*- 25647Sgblack@eecs.umich.edu 35647Sgblack@eecs.umich.edu// Copyright (c) 2007-2008 The Florida State University 45647Sgblack@eecs.umich.edu// All rights reserved. 55647Sgblack@eecs.umich.edu// 65647Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 75647Sgblack@eecs.umich.edu// modification, are permitted provided that the following conditions are 85647Sgblack@eecs.umich.edu// met: redistributions of source code must retain the above copyright 95647Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 105647Sgblack@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 115647Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 125647Sgblack@eecs.umich.edu// documentation and/or other materials provided with the distribution; 135647Sgblack@eecs.umich.edu// neither the name of the copyright holders nor the names of its 145647Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 155647Sgblack@eecs.umich.edu// this software without specific prior written permission. 165647Sgblack@eecs.umich.edu// 175647Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 185647Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 195647Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 205647Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 215647Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 225647Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 235647Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 245647Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 255647Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 265647Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 275647Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 285647Sgblack@eecs.umich.edu// 295647Sgblack@eecs.umich.edu// Authors: Stephen Hines 305647Sgblack@eecs.umich.edu 315647Sgblack@eecs.umich.edudef operand_types {{ 325647Sgblack@eecs.umich.edu 'sb' : ('signed int', 8), 335647Sgblack@eecs.umich.edu 'ub' : ('unsigned int', 8), 345647Sgblack@eecs.umich.edu 'sh' : ('signed int', 16), 355647Sgblack@eecs.umich.edu 'uh' : ('unsigned int', 16), 365647Sgblack@eecs.umich.edu 'sw' : ('signed int', 32), 375647Sgblack@eecs.umich.edu 'uw' : ('unsigned int', 32), 385647Sgblack@eecs.umich.edu 'ud' : ('unsigned int', 64), 395647Sgblack@eecs.umich.edu 'sf' : ('float', 32), 405647Sgblack@eecs.umich.edu 'df' : ('float', 64) 415647Sgblack@eecs.umich.edu}}; 425647Sgblack@eecs.umich.edu 435647Sgblack@eecs.umich.edulet {{ 445647Sgblack@eecs.umich.edu maybePCRead = ''' 455647Sgblack@eecs.umich.edu ((%(reg_idx)s == PCReg) ? (xc->readPC() + 8) : 465647Sgblack@eecs.umich.edu xc->%(func)s(this, %(op_idx)s)) 475647Sgblack@eecs.umich.edu ''' 485647Sgblack@eecs.umich.edu maybePCWrite = ''' 495647Sgblack@eecs.umich.edu ((%(reg_idx)s == PCReg) ? xc->setNextPC(%(final_val)s) : 505647Sgblack@eecs.umich.edu xc->%(func)s(this, %(op_idx)s, %(final_val)s)) 515647Sgblack@eecs.umich.edu ''' 525647Sgblack@eecs.umich.edu}}; 535647Sgblack@eecs.umich.edu 545647Sgblack@eecs.umich.edudef operands {{ 555647Sgblack@eecs.umich.edu #General Purpose Integer Reg Operands 565647Sgblack@eecs.umich.edu 'Rd': ('IntReg', 'uw', 'RD', 'IsInteger', 1, maybePCRead, maybePCWrite), 575647Sgblack@eecs.umich.edu 'Rm': ('IntReg', 'uw', 'RM', 'IsInteger', 2, maybePCRead, maybePCWrite), 585648Sgblack@eecs.umich.edu 'Rs': ('IntReg', 'uw', 'RS', 'IsInteger', 3, maybePCRead, maybePCWrite), 595647Sgblack@eecs.umich.edu 'Rn': ('IntReg', 'uw', 'RN', 'IsInteger', 4, maybePCRead, maybePCWrite), 605654Sgblack@eecs.umich.edu 'R7': ('IntReg', 'uw', '7', 'IsInteger', 5), 615647Sgblack@eecs.umich.edu 625654Sgblack@eecs.umich.edu #Destination register for load/store double instructions 635647Sgblack@eecs.umich.edu 'Rdo': ('IntReg', 'uw', '(RD & ~1)', 'IsInteger', 4, maybePCRead, maybePCWrite), 645648Sgblack@eecs.umich.edu 'Rde': ('IntReg', 'uw', '(RD | 1)', 'IsInteger', 5, maybePCRead, maybePCWrite), 655648Sgblack@eecs.umich.edu 665647Sgblack@eecs.umich.edu 'Raddr': ('IntReg', 'uw', '17', 'IsInteger', 6), 675647Sgblack@eecs.umich.edu 'Rhi': ('IntReg', 'uw', '18', 'IsInteger', 7), 685647Sgblack@eecs.umich.edu 'Rlo': ('IntReg', 'uw', '19', 'IsInteger', 8), 695647Sgblack@eecs.umich.edu 'LR': ('IntReg', 'uw', '14', 'IsInteger', 9), 705647Sgblack@eecs.umich.edu 715647Sgblack@eecs.umich.edu #Register fields for microops 725647Sgblack@eecs.umich.edu 'Ra' : ('IntReg', 'uw', 'ura', 'IsInteger', 11, maybePCRead, maybePCWrite), 735647Sgblack@eecs.umich.edu 'Rb' : ('IntReg', 'uw', 'urb', 'IsInteger', 12, maybePCRead, maybePCWrite), 745647Sgblack@eecs.umich.edu 755648Sgblack@eecs.umich.edu #General Purpose Floating Point Reg Operands 765647Sgblack@eecs.umich.edu 'Fd': ('FloatReg', 'df', 'FD', 'IsFloating', 20), 775648Sgblack@eecs.umich.edu 'Fn': ('FloatReg', 'df', 'FN', 'IsFloating', 21), 785648Sgblack@eecs.umich.edu 'Fm': ('FloatReg', 'df', 'FM', 'IsFloating', 22), 795648Sgblack@eecs.umich.edu 805648Sgblack@eecs.umich.edu #Memory Operand 815648Sgblack@eecs.umich.edu 'Mem': ('Mem', 'uw', None, ('IsMemRef', 'IsLoad', 'IsStore'), 30), 825648Sgblack@eecs.umich.edu 835648Sgblack@eecs.umich.edu 'Cpsr': ('ControlReg', 'uw', 'MISCREG_CPSR', 'IsInteger', 40), 845648Sgblack@eecs.umich.edu 'Fpsr': ('ControlReg', 'uw', 'MISCREG_FPSR', 'IsInteger', 41), 855648Sgblack@eecs.umich.edu 'Fpsid': ('ControlReg', 'uw', 'MISCREG_FPSID', 'IsInteger', 42), 865648Sgblack@eecs.umich.edu 'Fpscr': ('ControlReg', 'uw', 'MISCREG_FPSCR', 'IsInteger', 43), 875648Sgblack@eecs.umich.edu 'Fpexc': ('ControlReg', 'uw', 'MISCREG_FPEXC', 'IsInteger', 44), 885648Sgblack@eecs.umich.edu 'NPC': ('NPC', 'uw', None, (None, None, 'IsControl'), 45), 895648Sgblack@eecs.umich.edu 'NNPC': ('NNPC', 'uw', None, (None, None, 'IsControl'), 46) 905648Sgblack@eecs.umich.edu 915648Sgblack@eecs.umich.edu}}; 925648Sgblack@eecs.umich.edu