neon.isa revision 7640
17639Sgblack@eecs.umich.edu// -*- mode:c++ -*- 27639Sgblack@eecs.umich.edu 37639Sgblack@eecs.umich.edu// Copyright (c) 2010 ARM Limited 47639Sgblack@eecs.umich.edu// All rights reserved 57639Sgblack@eecs.umich.edu// 67639Sgblack@eecs.umich.edu// The license below extends only to copyright in the software and shall 77639Sgblack@eecs.umich.edu// not be construed as granting a license to any other intellectual 87639Sgblack@eecs.umich.edu// property including but not limited to intellectual property relating 97639Sgblack@eecs.umich.edu// to a hardware implementation of the functionality of the software 107639Sgblack@eecs.umich.edu// licensed hereunder. You may use the software subject to the license 117639Sgblack@eecs.umich.edu// terms below provided that you ensure that this notice is replicated 127639Sgblack@eecs.umich.edu// unmodified and in its entirety in all distributions of the software, 137639Sgblack@eecs.umich.edu// modified or unmodified, in source code or in binary form. 147639Sgblack@eecs.umich.edu// 157639Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 167639Sgblack@eecs.umich.edu// modification, are permitted provided that the following conditions are 177639Sgblack@eecs.umich.edu// met: redistributions of source code must retain the above copyright 187639Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 197639Sgblack@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 207639Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 217639Sgblack@eecs.umich.edu// documentation and/or other materials provided with the distribution; 227639Sgblack@eecs.umich.edu// neither the name of the copyright holders nor the names of its 237639Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 247639Sgblack@eecs.umich.edu// this software without specific prior written permission. 257639Sgblack@eecs.umich.edu// 267639Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 277639Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 287639Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 297639Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 307639Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 317639Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 327639Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 337639Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 347639Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 357639Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 367639Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 377639Sgblack@eecs.umich.edu// 387639Sgblack@eecs.umich.edu// Authors: Gabe Black 397639Sgblack@eecs.umich.edu 407639Sgblack@eecs.umich.eduoutput header {{ 417639Sgblack@eecs.umich.edu template <template <typename T> class Base> 427639Sgblack@eecs.umich.edu StaticInstPtr 437639Sgblack@eecs.umich.edu decodeNeonUThreeUReg(unsigned size, 447639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 457639Sgblack@eecs.umich.edu IntRegIndex op1, IntRegIndex op2) 467639Sgblack@eecs.umich.edu { 477639Sgblack@eecs.umich.edu switch (size) { 487639Sgblack@eecs.umich.edu case 0: 497639Sgblack@eecs.umich.edu return new Base<uint8_t>(machInst, dest, op1, op2); 507639Sgblack@eecs.umich.edu case 1: 517639Sgblack@eecs.umich.edu return new Base<uint16_t>(machInst, dest, op1, op2); 527639Sgblack@eecs.umich.edu case 2: 537639Sgblack@eecs.umich.edu return new Base<uint32_t>(machInst, dest, op1, op2); 547639Sgblack@eecs.umich.edu case 3: 557639Sgblack@eecs.umich.edu return new Base<uint64_t>(machInst, dest, op1, op2); 567639Sgblack@eecs.umich.edu default: 577639Sgblack@eecs.umich.edu return new Unknown(machInst); 587639Sgblack@eecs.umich.edu } 597639Sgblack@eecs.umich.edu } 607639Sgblack@eecs.umich.edu 617639Sgblack@eecs.umich.edu template <template <typename T> class Base> 627639Sgblack@eecs.umich.edu StaticInstPtr 637639Sgblack@eecs.umich.edu decodeNeonSThreeUReg(unsigned size, 647639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 657639Sgblack@eecs.umich.edu IntRegIndex op1, IntRegIndex op2) 667639Sgblack@eecs.umich.edu { 677639Sgblack@eecs.umich.edu switch (size) { 687639Sgblack@eecs.umich.edu case 0: 697639Sgblack@eecs.umich.edu return new Base<int8_t>(machInst, dest, op1, op2); 707639Sgblack@eecs.umich.edu case 1: 717639Sgblack@eecs.umich.edu return new Base<int16_t>(machInst, dest, op1, op2); 727639Sgblack@eecs.umich.edu case 2: 737639Sgblack@eecs.umich.edu return new Base<int32_t>(machInst, dest, op1, op2); 747639Sgblack@eecs.umich.edu case 3: 757639Sgblack@eecs.umich.edu return new Base<int64_t>(machInst, dest, op1, op2); 767639Sgblack@eecs.umich.edu default: 777639Sgblack@eecs.umich.edu return new Unknown(machInst); 787639Sgblack@eecs.umich.edu } 797639Sgblack@eecs.umich.edu } 807639Sgblack@eecs.umich.edu 817639Sgblack@eecs.umich.edu template <template <typename T> class Base> 827639Sgblack@eecs.umich.edu StaticInstPtr 837639Sgblack@eecs.umich.edu decodeNeonUSThreeUReg(bool notSigned, unsigned size, 847639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 857639Sgblack@eecs.umich.edu IntRegIndex op1, IntRegIndex op2) 867639Sgblack@eecs.umich.edu { 877639Sgblack@eecs.umich.edu if (notSigned) { 887639Sgblack@eecs.umich.edu return decodeNeonUThreeUReg<Base>(size, machInst, dest, op1, op2); 897639Sgblack@eecs.umich.edu } else { 907639Sgblack@eecs.umich.edu return decodeNeonSThreeUReg<Base>(size, machInst, dest, op1, op2); 917639Sgblack@eecs.umich.edu } 927639Sgblack@eecs.umich.edu } 937639Sgblack@eecs.umich.edu 947639Sgblack@eecs.umich.edu template <template <typename T> class Base> 957639Sgblack@eecs.umich.edu StaticInstPtr 967639Sgblack@eecs.umich.edu decodeNeonUThreeUSReg(unsigned size, 977639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 987639Sgblack@eecs.umich.edu IntRegIndex op1, IntRegIndex op2) 997639Sgblack@eecs.umich.edu { 1007639Sgblack@eecs.umich.edu switch (size) { 1017639Sgblack@eecs.umich.edu case 0: 1027639Sgblack@eecs.umich.edu return new Base<uint8_t>(machInst, dest, op1, op2); 1037639Sgblack@eecs.umich.edu case 1: 1047639Sgblack@eecs.umich.edu return new Base<uint16_t>(machInst, dest, op1, op2); 1057639Sgblack@eecs.umich.edu case 2: 1067639Sgblack@eecs.umich.edu return new Base<uint32_t>(machInst, dest, op1, op2); 1077639Sgblack@eecs.umich.edu default: 1087639Sgblack@eecs.umich.edu return new Unknown(machInst); 1097639Sgblack@eecs.umich.edu } 1107639Sgblack@eecs.umich.edu } 1117639Sgblack@eecs.umich.edu 1127639Sgblack@eecs.umich.edu template <template <typename T> class Base> 1137639Sgblack@eecs.umich.edu StaticInstPtr 1147639Sgblack@eecs.umich.edu decodeNeonSThreeUSReg(unsigned size, 1157639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 1167639Sgblack@eecs.umich.edu IntRegIndex op1, IntRegIndex op2) 1177639Sgblack@eecs.umich.edu { 1187639Sgblack@eecs.umich.edu switch (size) { 1197639Sgblack@eecs.umich.edu case 0: 1207639Sgblack@eecs.umich.edu return new Base<int8_t>(machInst, dest, op1, op2); 1217639Sgblack@eecs.umich.edu case 1: 1227639Sgblack@eecs.umich.edu return new Base<int16_t>(machInst, dest, op1, op2); 1237639Sgblack@eecs.umich.edu case 2: 1247639Sgblack@eecs.umich.edu return new Base<int32_t>(machInst, dest, op1, op2); 1257639Sgblack@eecs.umich.edu default: 1267639Sgblack@eecs.umich.edu return new Unknown(machInst); 1277639Sgblack@eecs.umich.edu } 1287639Sgblack@eecs.umich.edu } 1297639Sgblack@eecs.umich.edu 1307639Sgblack@eecs.umich.edu template <template <typename T> class Base> 1317639Sgblack@eecs.umich.edu StaticInstPtr 1327639Sgblack@eecs.umich.edu decodeNeonUSThreeUSReg(bool notSigned, unsigned size, 1337639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 1347639Sgblack@eecs.umich.edu IntRegIndex op1, IntRegIndex op2) 1357639Sgblack@eecs.umich.edu { 1367639Sgblack@eecs.umich.edu if (notSigned) { 1377639Sgblack@eecs.umich.edu return decodeNeonUThreeUSReg<Base>( 1387639Sgblack@eecs.umich.edu size, machInst, dest, op1, op2); 1397639Sgblack@eecs.umich.edu } else { 1407639Sgblack@eecs.umich.edu return decodeNeonSThreeUSReg<Base>( 1417639Sgblack@eecs.umich.edu size, machInst, dest, op1, op2); 1427639Sgblack@eecs.umich.edu } 1437639Sgblack@eecs.umich.edu } 1447639Sgblack@eecs.umich.edu 1457639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 1467639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 1477639Sgblack@eecs.umich.edu StaticInstPtr 1487639Sgblack@eecs.umich.edu decodeNeonUThreeSReg(bool q, unsigned size, 1497639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 1507639Sgblack@eecs.umich.edu IntRegIndex op1, IntRegIndex op2) 1517639Sgblack@eecs.umich.edu { 1527639Sgblack@eecs.umich.edu if (q) { 1537639Sgblack@eecs.umich.edu return decodeNeonUThreeUSReg<BaseQ>( 1547639Sgblack@eecs.umich.edu size, machInst, dest, op1, op2); 1557639Sgblack@eecs.umich.edu } else { 1567639Sgblack@eecs.umich.edu return decodeNeonUThreeUSReg<BaseD>( 1577639Sgblack@eecs.umich.edu size, machInst, dest, op1, op2); 1587639Sgblack@eecs.umich.edu } 1597639Sgblack@eecs.umich.edu } 1607639Sgblack@eecs.umich.edu 1617639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 1627639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 1637639Sgblack@eecs.umich.edu StaticInstPtr 1647639Sgblack@eecs.umich.edu decodeNeonSThreeSReg(bool q, unsigned size, 1657639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 1667639Sgblack@eecs.umich.edu IntRegIndex op1, IntRegIndex op2) 1677639Sgblack@eecs.umich.edu { 1687639Sgblack@eecs.umich.edu if (q) { 1697639Sgblack@eecs.umich.edu return decodeNeonSThreeUSReg<BaseQ>( 1707639Sgblack@eecs.umich.edu size, machInst, dest, op1, op2); 1717639Sgblack@eecs.umich.edu } else { 1727639Sgblack@eecs.umich.edu return decodeNeonSThreeUSReg<BaseD>( 1737639Sgblack@eecs.umich.edu size, machInst, dest, op1, op2); 1747639Sgblack@eecs.umich.edu } 1757639Sgblack@eecs.umich.edu } 1767639Sgblack@eecs.umich.edu 1777639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 1787639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 1797639Sgblack@eecs.umich.edu StaticInstPtr 1807639Sgblack@eecs.umich.edu decodeNeonUSThreeSReg(bool q, bool notSigned, unsigned size, 1817639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 1827639Sgblack@eecs.umich.edu IntRegIndex op1, IntRegIndex op2) 1837639Sgblack@eecs.umich.edu { 1847639Sgblack@eecs.umich.edu if (notSigned) { 1857639Sgblack@eecs.umich.edu return decodeNeonUThreeSReg<BaseD, BaseQ>( 1867639Sgblack@eecs.umich.edu q, size, machInst, dest, op1, op2); 1877639Sgblack@eecs.umich.edu } else { 1887639Sgblack@eecs.umich.edu return decodeNeonSThreeSReg<BaseD, BaseQ>( 1897639Sgblack@eecs.umich.edu q, size, machInst, dest, op1, op2); 1907639Sgblack@eecs.umich.edu } 1917639Sgblack@eecs.umich.edu } 1927639Sgblack@eecs.umich.edu 1937639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 1947639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 1957639Sgblack@eecs.umich.edu StaticInstPtr 1967639Sgblack@eecs.umich.edu decodeNeonUThreeReg(bool q, unsigned size, 1977639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 1987639Sgblack@eecs.umich.edu IntRegIndex op1, IntRegIndex op2) 1997639Sgblack@eecs.umich.edu { 2007639Sgblack@eecs.umich.edu if (q) { 2017639Sgblack@eecs.umich.edu return decodeNeonUThreeUReg<BaseQ>( 2027639Sgblack@eecs.umich.edu size, machInst, dest, op1, op2); 2037639Sgblack@eecs.umich.edu } else { 2047639Sgblack@eecs.umich.edu return decodeNeonUThreeUReg<BaseD>( 2057639Sgblack@eecs.umich.edu size, machInst, dest, op1, op2); 2067639Sgblack@eecs.umich.edu } 2077639Sgblack@eecs.umich.edu } 2087639Sgblack@eecs.umich.edu 2097639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 2107639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 2117639Sgblack@eecs.umich.edu StaticInstPtr 2127639Sgblack@eecs.umich.edu decodeNeonSThreeReg(bool q, unsigned size, 2137639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 2147639Sgblack@eecs.umich.edu IntRegIndex op1, IntRegIndex op2) 2157639Sgblack@eecs.umich.edu { 2167639Sgblack@eecs.umich.edu if (q) { 2177639Sgblack@eecs.umich.edu return decodeNeonSThreeUReg<BaseQ>( 2187639Sgblack@eecs.umich.edu size, machInst, dest, op1, op2); 2197639Sgblack@eecs.umich.edu } else { 2207639Sgblack@eecs.umich.edu return decodeNeonSThreeUReg<BaseD>( 2217639Sgblack@eecs.umich.edu size, machInst, dest, op1, op2); 2227639Sgblack@eecs.umich.edu } 2237639Sgblack@eecs.umich.edu } 2247639Sgblack@eecs.umich.edu 2257639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 2267639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 2277639Sgblack@eecs.umich.edu StaticInstPtr 2287639Sgblack@eecs.umich.edu decodeNeonUSThreeReg(bool q, bool notSigned, unsigned size, 2297639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 2307639Sgblack@eecs.umich.edu IntRegIndex op1, IntRegIndex op2) 2317639Sgblack@eecs.umich.edu { 2327639Sgblack@eecs.umich.edu if (notSigned) { 2337639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<BaseD, BaseQ>( 2347639Sgblack@eecs.umich.edu q, size, machInst, dest, op1, op2); 2357639Sgblack@eecs.umich.edu } else { 2367639Sgblack@eecs.umich.edu return decodeNeonSThreeReg<BaseD, BaseQ>( 2377639Sgblack@eecs.umich.edu q, size, machInst, dest, op1, op2); 2387639Sgblack@eecs.umich.edu } 2397639Sgblack@eecs.umich.edu } 2407639Sgblack@eecs.umich.edu 2417639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 2427639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 2437639Sgblack@eecs.umich.edu StaticInstPtr 2447639Sgblack@eecs.umich.edu decodeNeonUTwoShiftReg(bool q, unsigned size, 2457639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 2467639Sgblack@eecs.umich.edu IntRegIndex op1, uint64_t imm) 2477639Sgblack@eecs.umich.edu { 2487639Sgblack@eecs.umich.edu if (q) { 2497639Sgblack@eecs.umich.edu switch (size) { 2507639Sgblack@eecs.umich.edu case 0: 2517639Sgblack@eecs.umich.edu return new BaseQ<uint8_t>(machInst, dest, op1, imm); 2527639Sgblack@eecs.umich.edu case 1: 2537639Sgblack@eecs.umich.edu return new BaseQ<uint16_t>(machInst, dest, op1, imm); 2547639Sgblack@eecs.umich.edu case 2: 2557639Sgblack@eecs.umich.edu return new BaseQ<uint32_t>(machInst, dest, op1, imm); 2567639Sgblack@eecs.umich.edu case 3: 2577639Sgblack@eecs.umich.edu return new BaseQ<uint64_t>(machInst, dest, op1, imm); 2587639Sgblack@eecs.umich.edu default: 2597639Sgblack@eecs.umich.edu return new Unknown(machInst); 2607639Sgblack@eecs.umich.edu } 2617639Sgblack@eecs.umich.edu } else { 2627639Sgblack@eecs.umich.edu switch (size) { 2637639Sgblack@eecs.umich.edu case 0: 2647639Sgblack@eecs.umich.edu return new BaseD<uint8_t>(machInst, dest, op1, imm); 2657639Sgblack@eecs.umich.edu case 1: 2667639Sgblack@eecs.umich.edu return new BaseD<uint16_t>(machInst, dest, op1, imm); 2677639Sgblack@eecs.umich.edu case 2: 2687639Sgblack@eecs.umich.edu return new BaseD<uint32_t>(machInst, dest, op1, imm); 2697639Sgblack@eecs.umich.edu case 3: 2707639Sgblack@eecs.umich.edu return new BaseD<uint64_t>(machInst, dest, op1, imm); 2717639Sgblack@eecs.umich.edu default: 2727639Sgblack@eecs.umich.edu return new Unknown(machInst); 2737639Sgblack@eecs.umich.edu } 2747639Sgblack@eecs.umich.edu } 2757639Sgblack@eecs.umich.edu } 2767639Sgblack@eecs.umich.edu 2777639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 2787639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 2797639Sgblack@eecs.umich.edu StaticInstPtr 2807639Sgblack@eecs.umich.edu decodeNeonSTwoShiftReg(bool q, unsigned size, 2817639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 2827639Sgblack@eecs.umich.edu IntRegIndex op1, uint64_t imm) 2837639Sgblack@eecs.umich.edu { 2847639Sgblack@eecs.umich.edu if (q) { 2857639Sgblack@eecs.umich.edu switch (size) { 2867639Sgblack@eecs.umich.edu case 0: 2877639Sgblack@eecs.umich.edu return new BaseQ<int8_t>(machInst, dest, op1, imm); 2887639Sgblack@eecs.umich.edu case 1: 2897639Sgblack@eecs.umich.edu return new BaseQ<int16_t>(machInst, dest, op1, imm); 2907639Sgblack@eecs.umich.edu case 2: 2917639Sgblack@eecs.umich.edu return new BaseQ<int32_t>(machInst, dest, op1, imm); 2927639Sgblack@eecs.umich.edu case 3: 2937639Sgblack@eecs.umich.edu return new BaseQ<int64_t>(machInst, dest, op1, imm); 2947639Sgblack@eecs.umich.edu default: 2957639Sgblack@eecs.umich.edu return new Unknown(machInst); 2967639Sgblack@eecs.umich.edu } 2977639Sgblack@eecs.umich.edu } else { 2987639Sgblack@eecs.umich.edu switch (size) { 2997639Sgblack@eecs.umich.edu case 0: 3007639Sgblack@eecs.umich.edu return new BaseD<int8_t>(machInst, dest, op1, imm); 3017639Sgblack@eecs.umich.edu case 1: 3027639Sgblack@eecs.umich.edu return new BaseD<int16_t>(machInst, dest, op1, imm); 3037639Sgblack@eecs.umich.edu case 2: 3047639Sgblack@eecs.umich.edu return new BaseD<int32_t>(machInst, dest, op1, imm); 3057639Sgblack@eecs.umich.edu case 3: 3067639Sgblack@eecs.umich.edu return new BaseD<int64_t>(machInst, dest, op1, imm); 3077639Sgblack@eecs.umich.edu default: 3087639Sgblack@eecs.umich.edu return new Unknown(machInst); 3097639Sgblack@eecs.umich.edu } 3107639Sgblack@eecs.umich.edu } 3117639Sgblack@eecs.umich.edu } 3127639Sgblack@eecs.umich.edu 3137639Sgblack@eecs.umich.edu 3147639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 3157639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 3167639Sgblack@eecs.umich.edu StaticInstPtr 3177639Sgblack@eecs.umich.edu decodeNeonUSTwoShiftReg(bool q, bool notSigned, unsigned size, 3187639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 3197639Sgblack@eecs.umich.edu IntRegIndex op1, uint64_t imm) 3207639Sgblack@eecs.umich.edu { 3217639Sgblack@eecs.umich.edu if (notSigned) { 3227639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftReg<BaseD, BaseQ>( 3237639Sgblack@eecs.umich.edu q, size, machInst, dest, op1, imm); 3247639Sgblack@eecs.umich.edu } else { 3257639Sgblack@eecs.umich.edu return decodeNeonSTwoShiftReg<BaseD, BaseQ>( 3267639Sgblack@eecs.umich.edu q, size, machInst, dest, op1, imm); 3277639Sgblack@eecs.umich.edu } 3287639Sgblack@eecs.umich.edu } 3297639Sgblack@eecs.umich.edu 3307639Sgblack@eecs.umich.edu template <template <typename T> class Base> 3317639Sgblack@eecs.umich.edu StaticInstPtr 3327639Sgblack@eecs.umich.edu decodeNeonUTwoShiftUSReg(unsigned size, 3337639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 3347639Sgblack@eecs.umich.edu IntRegIndex op1, uint64_t imm) 3357639Sgblack@eecs.umich.edu { 3367639Sgblack@eecs.umich.edu switch (size) { 3377639Sgblack@eecs.umich.edu case 0: 3387639Sgblack@eecs.umich.edu return new Base<uint8_t>(machInst, dest, op1, imm); 3397639Sgblack@eecs.umich.edu case 1: 3407639Sgblack@eecs.umich.edu return new Base<uint16_t>(machInst, dest, op1, imm); 3417639Sgblack@eecs.umich.edu case 2: 3427639Sgblack@eecs.umich.edu return new Base<uint32_t>(machInst, dest, op1, imm); 3437639Sgblack@eecs.umich.edu default: 3447639Sgblack@eecs.umich.edu return new Unknown(machInst); 3457639Sgblack@eecs.umich.edu } 3467639Sgblack@eecs.umich.edu } 3477639Sgblack@eecs.umich.edu 3487639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 3497639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 3507639Sgblack@eecs.umich.edu StaticInstPtr 3517639Sgblack@eecs.umich.edu decodeNeonUTwoShiftSReg(bool q, unsigned size, 3527639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 3537639Sgblack@eecs.umich.edu IntRegIndex op1, uint64_t imm) 3547639Sgblack@eecs.umich.edu { 3557639Sgblack@eecs.umich.edu if (q) { 3567639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftUSReg<BaseQ>( 3577639Sgblack@eecs.umich.edu size, machInst, dest, op1, imm); 3587639Sgblack@eecs.umich.edu } else { 3597639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftUSReg<BaseD>( 3607639Sgblack@eecs.umich.edu size, machInst, dest, op1, imm); 3617639Sgblack@eecs.umich.edu } 3627639Sgblack@eecs.umich.edu } 3637639Sgblack@eecs.umich.edu 3647639Sgblack@eecs.umich.edu template <template <typename T> class Base> 3657639Sgblack@eecs.umich.edu StaticInstPtr 3667639Sgblack@eecs.umich.edu decodeNeonSTwoShiftUSReg(unsigned size, 3677639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 3687639Sgblack@eecs.umich.edu IntRegIndex op1, uint64_t imm) 3697639Sgblack@eecs.umich.edu { 3707639Sgblack@eecs.umich.edu switch (size) { 3717639Sgblack@eecs.umich.edu case 0: 3727639Sgblack@eecs.umich.edu return new Base<int8_t>(machInst, dest, op1, imm); 3737639Sgblack@eecs.umich.edu case 1: 3747639Sgblack@eecs.umich.edu return new Base<int16_t>(machInst, dest, op1, imm); 3757639Sgblack@eecs.umich.edu case 2: 3767639Sgblack@eecs.umich.edu return new Base<int32_t>(machInst, dest, op1, imm); 3777639Sgblack@eecs.umich.edu default: 3787639Sgblack@eecs.umich.edu return new Unknown(machInst); 3797639Sgblack@eecs.umich.edu } 3807639Sgblack@eecs.umich.edu } 3817639Sgblack@eecs.umich.edu 3827639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 3837639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 3847639Sgblack@eecs.umich.edu StaticInstPtr 3857639Sgblack@eecs.umich.edu decodeNeonSTwoShiftSReg(bool q, unsigned size, 3867639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 3877639Sgblack@eecs.umich.edu IntRegIndex op1, uint64_t imm) 3887639Sgblack@eecs.umich.edu { 3897639Sgblack@eecs.umich.edu if (q) { 3907639Sgblack@eecs.umich.edu return decodeNeonSTwoShiftUSReg<BaseQ>( 3917639Sgblack@eecs.umich.edu size, machInst, dest, op1, imm); 3927639Sgblack@eecs.umich.edu } else { 3937639Sgblack@eecs.umich.edu return decodeNeonSTwoShiftUSReg<BaseD>( 3947639Sgblack@eecs.umich.edu size, machInst, dest, op1, imm); 3957639Sgblack@eecs.umich.edu } 3967639Sgblack@eecs.umich.edu } 3977639Sgblack@eecs.umich.edu 3987639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 3997639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 4007639Sgblack@eecs.umich.edu StaticInstPtr 4017639Sgblack@eecs.umich.edu decodeNeonUSTwoShiftSReg(bool q, bool notSigned, unsigned size, 4027639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 4037639Sgblack@eecs.umich.edu IntRegIndex op1, uint64_t imm) 4047639Sgblack@eecs.umich.edu { 4057639Sgblack@eecs.umich.edu if (notSigned) { 4067639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftSReg<BaseD, BaseQ>( 4077639Sgblack@eecs.umich.edu q, size, machInst, dest, op1, imm); 4087639Sgblack@eecs.umich.edu } else { 4097639Sgblack@eecs.umich.edu return decodeNeonSTwoShiftSReg<BaseD, BaseQ>( 4107639Sgblack@eecs.umich.edu q, size, machInst, dest, op1, imm); 4117639Sgblack@eecs.umich.edu } 4127639Sgblack@eecs.umich.edu } 4137639Sgblack@eecs.umich.edu 4147639Sgblack@eecs.umich.edu template <template <typename T> class Base> 4157639Sgblack@eecs.umich.edu StaticInstPtr 4167639Sgblack@eecs.umich.edu decodeNeonUTwoMiscUSReg(unsigned size, 4177639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 4187639Sgblack@eecs.umich.edu IntRegIndex op1) 4197639Sgblack@eecs.umich.edu { 4207639Sgblack@eecs.umich.edu switch (size) { 4217639Sgblack@eecs.umich.edu case 0: 4227639Sgblack@eecs.umich.edu return new Base<uint8_t>(machInst, dest, op1); 4237639Sgblack@eecs.umich.edu case 1: 4247639Sgblack@eecs.umich.edu return new Base<uint16_t>(machInst, dest, op1); 4257639Sgblack@eecs.umich.edu case 2: 4267639Sgblack@eecs.umich.edu return new Base<uint32_t>(machInst, dest, op1); 4277639Sgblack@eecs.umich.edu default: 4287639Sgblack@eecs.umich.edu return new Unknown(machInst); 4297639Sgblack@eecs.umich.edu } 4307639Sgblack@eecs.umich.edu } 4317639Sgblack@eecs.umich.edu 4327639Sgblack@eecs.umich.edu template <template <typename T> class Base> 4337639Sgblack@eecs.umich.edu StaticInstPtr 4347639Sgblack@eecs.umich.edu decodeNeonSTwoMiscUSReg(unsigned size, 4357639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 4367639Sgblack@eecs.umich.edu IntRegIndex op1) 4377639Sgblack@eecs.umich.edu { 4387639Sgblack@eecs.umich.edu switch (size) { 4397639Sgblack@eecs.umich.edu case 0: 4407639Sgblack@eecs.umich.edu return new Base<int8_t>(machInst, dest, op1); 4417639Sgblack@eecs.umich.edu case 1: 4427639Sgblack@eecs.umich.edu return new Base<int16_t>(machInst, dest, op1); 4437639Sgblack@eecs.umich.edu case 2: 4447639Sgblack@eecs.umich.edu return new Base<int32_t>(machInst, dest, op1); 4457639Sgblack@eecs.umich.edu default: 4467639Sgblack@eecs.umich.edu return new Unknown(machInst); 4477639Sgblack@eecs.umich.edu } 4487639Sgblack@eecs.umich.edu } 4497639Sgblack@eecs.umich.edu 4507639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 4517639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 4527639Sgblack@eecs.umich.edu StaticInstPtr 4537639Sgblack@eecs.umich.edu decodeNeonUTwoMiscSReg(bool q, unsigned size, 4547639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 4557639Sgblack@eecs.umich.edu IntRegIndex op1) 4567639Sgblack@eecs.umich.edu { 4577639Sgblack@eecs.umich.edu if (q) { 4587639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscUSReg<BaseQ>(size, machInst, dest, op1); 4597639Sgblack@eecs.umich.edu } else { 4607639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscUSReg<BaseD>(size, machInst, dest, op1); 4617639Sgblack@eecs.umich.edu } 4627639Sgblack@eecs.umich.edu } 4637639Sgblack@eecs.umich.edu 4647639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 4657639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 4667639Sgblack@eecs.umich.edu StaticInstPtr 4677639Sgblack@eecs.umich.edu decodeNeonSTwoMiscSReg(bool q, unsigned size, 4687639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 4697639Sgblack@eecs.umich.edu IntRegIndex op1) 4707639Sgblack@eecs.umich.edu { 4717639Sgblack@eecs.umich.edu if (q) { 4727639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscUSReg<BaseQ>(size, machInst, dest, op1); 4737639Sgblack@eecs.umich.edu } else { 4747639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscUSReg<BaseD>(size, machInst, dest, op1); 4757639Sgblack@eecs.umich.edu } 4767639Sgblack@eecs.umich.edu } 4777639Sgblack@eecs.umich.edu 4787639Sgblack@eecs.umich.edu template <template <typename T> class Base> 4797639Sgblack@eecs.umich.edu StaticInstPtr 4807639Sgblack@eecs.umich.edu decodeNeonUTwoMiscUReg(unsigned size, 4817639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 4827639Sgblack@eecs.umich.edu IntRegIndex op1) 4837639Sgblack@eecs.umich.edu { 4847639Sgblack@eecs.umich.edu switch (size) { 4857639Sgblack@eecs.umich.edu case 0: 4867639Sgblack@eecs.umich.edu return new Base<uint8_t>(machInst, dest, op1); 4877639Sgblack@eecs.umich.edu case 1: 4887639Sgblack@eecs.umich.edu return new Base<uint16_t>(machInst, dest, op1); 4897639Sgblack@eecs.umich.edu case 2: 4907639Sgblack@eecs.umich.edu return new Base<uint32_t>(machInst, dest, op1); 4917639Sgblack@eecs.umich.edu case 3: 4927639Sgblack@eecs.umich.edu return new Base<uint64_t>(machInst, dest, op1); 4937639Sgblack@eecs.umich.edu default: 4947639Sgblack@eecs.umich.edu return new Unknown(machInst); 4957639Sgblack@eecs.umich.edu } 4967639Sgblack@eecs.umich.edu } 4977639Sgblack@eecs.umich.edu 4987639Sgblack@eecs.umich.edu template <template <typename T> class Base> 4997639Sgblack@eecs.umich.edu StaticInstPtr 5007639Sgblack@eecs.umich.edu decodeNeonSTwoMiscUReg(unsigned size, 5017639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 5027639Sgblack@eecs.umich.edu IntRegIndex op1) 5037639Sgblack@eecs.umich.edu { 5047639Sgblack@eecs.umich.edu switch (size) { 5057639Sgblack@eecs.umich.edu case 0: 5067639Sgblack@eecs.umich.edu return new Base<int8_t>(machInst, dest, op1); 5077639Sgblack@eecs.umich.edu case 1: 5087639Sgblack@eecs.umich.edu return new Base<int16_t>(machInst, dest, op1); 5097639Sgblack@eecs.umich.edu case 2: 5107639Sgblack@eecs.umich.edu return new Base<int32_t>(machInst, dest, op1); 5117639Sgblack@eecs.umich.edu case 3: 5127639Sgblack@eecs.umich.edu return new Base<int64_t>(machInst, dest, op1); 5137639Sgblack@eecs.umich.edu default: 5147639Sgblack@eecs.umich.edu return new Unknown(machInst); 5157639Sgblack@eecs.umich.edu } 5167639Sgblack@eecs.umich.edu } 5177639Sgblack@eecs.umich.edu 5187639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 5197639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 5207639Sgblack@eecs.umich.edu StaticInstPtr 5217639Sgblack@eecs.umich.edu decodeNeonSTwoMiscReg(bool q, unsigned size, 5227639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 5237639Sgblack@eecs.umich.edu IntRegIndex op1) 5247639Sgblack@eecs.umich.edu { 5257639Sgblack@eecs.umich.edu if (q) { 5267639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscUReg<BaseQ>(size, machInst, dest, op1); 5277639Sgblack@eecs.umich.edu } else { 5287639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscUReg<BaseD>(size, machInst, dest, op1); 5297639Sgblack@eecs.umich.edu } 5307639Sgblack@eecs.umich.edu } 5317639Sgblack@eecs.umich.edu 5327639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 5337639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 5347639Sgblack@eecs.umich.edu StaticInstPtr 5357639Sgblack@eecs.umich.edu decodeNeonUTwoMiscReg(bool q, unsigned size, 5367639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 5377639Sgblack@eecs.umich.edu IntRegIndex op1) 5387639Sgblack@eecs.umich.edu { 5397639Sgblack@eecs.umich.edu if (q) { 5407639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscUReg<BaseQ>(size, machInst, dest, op1); 5417639Sgblack@eecs.umich.edu } else { 5427639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscUReg<BaseD>(size, machInst, dest, op1); 5437639Sgblack@eecs.umich.edu } 5447639Sgblack@eecs.umich.edu } 5457639Sgblack@eecs.umich.edu 5467639Sgblack@eecs.umich.edu template <template <typename T> class BaseD, 5477639Sgblack@eecs.umich.edu template <typename T> class BaseQ> 5487639Sgblack@eecs.umich.edu StaticInstPtr 5497639Sgblack@eecs.umich.edu decodeNeonUSTwoMiscSReg(bool q, bool notSigned, unsigned size, 5507639Sgblack@eecs.umich.edu ExtMachInst machInst, IntRegIndex dest, 5517639Sgblack@eecs.umich.edu IntRegIndex op1) 5527639Sgblack@eecs.umich.edu { 5537639Sgblack@eecs.umich.edu if (notSigned) { 5547639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftSReg<BaseD, BaseQ>( 5557639Sgblack@eecs.umich.edu q, size, machInst, dest, op1); 5567639Sgblack@eecs.umich.edu } else { 5577639Sgblack@eecs.umich.edu return decodeNeonSTwoShiftSReg<BaseD, BaseQ>( 5587639Sgblack@eecs.umich.edu q, size, machInst, dest, op1); 5597639Sgblack@eecs.umich.edu } 5607639Sgblack@eecs.umich.edu } 5617639Sgblack@eecs.umich.edu 5627639Sgblack@eecs.umich.edu}}; 5637639Sgblack@eecs.umich.edu 5647639Sgblack@eecs.umich.eduoutput exec {{ 5657639Sgblack@eecs.umich.edu static float 5667639Sgblack@eecs.umich.edu vcgtFunc(float op1, float op2) 5677639Sgblack@eecs.umich.edu { 5687639Sgblack@eecs.umich.edu if (isSnan(op1) || isSnan(op2)) 5697639Sgblack@eecs.umich.edu return 2.0; 5707639Sgblack@eecs.umich.edu return (op1 > op2) ? 0.0 : 1.0; 5717639Sgblack@eecs.umich.edu } 5727639Sgblack@eecs.umich.edu 5737639Sgblack@eecs.umich.edu static float 5747639Sgblack@eecs.umich.edu vcgeFunc(float op1, float op2) 5757639Sgblack@eecs.umich.edu { 5767639Sgblack@eecs.umich.edu if (isSnan(op1) || isSnan(op2)) 5777639Sgblack@eecs.umich.edu return 2.0; 5787639Sgblack@eecs.umich.edu return (op1 >= op2) ? 0.0 : 1.0; 5797639Sgblack@eecs.umich.edu } 5807639Sgblack@eecs.umich.edu 5817639Sgblack@eecs.umich.edu static float 5827639Sgblack@eecs.umich.edu vceqFunc(float op1, float op2) 5837639Sgblack@eecs.umich.edu { 5847639Sgblack@eecs.umich.edu if (isSnan(op1) || isSnan(op2)) 5857639Sgblack@eecs.umich.edu return 2.0; 5867639Sgblack@eecs.umich.edu return (op1 == op2) ? 0.0 : 1.0; 5877639Sgblack@eecs.umich.edu } 5887639Sgblack@eecs.umich.edu 5897639Sgblack@eecs.umich.edu static float 5907639Sgblack@eecs.umich.edu vcleFunc(float op1, float op2) 5917639Sgblack@eecs.umich.edu { 5927639Sgblack@eecs.umich.edu if (isSnan(op1) || isSnan(op2)) 5937639Sgblack@eecs.umich.edu return 2.0; 5947639Sgblack@eecs.umich.edu return (op1 <= op2) ? 0.0 : 1.0; 5957639Sgblack@eecs.umich.edu } 5967639Sgblack@eecs.umich.edu 5977639Sgblack@eecs.umich.edu static float 5987639Sgblack@eecs.umich.edu vcltFunc(float op1, float op2) 5997639Sgblack@eecs.umich.edu { 6007639Sgblack@eecs.umich.edu if (isSnan(op1) || isSnan(op2)) 6017639Sgblack@eecs.umich.edu return 2.0; 6027639Sgblack@eecs.umich.edu return (op1 < op2) ? 0.0 : 1.0; 6037639Sgblack@eecs.umich.edu } 6047639Sgblack@eecs.umich.edu 6057639Sgblack@eecs.umich.edu static float 6067639Sgblack@eecs.umich.edu vacgtFunc(float op1, float op2) 6077639Sgblack@eecs.umich.edu { 6087639Sgblack@eecs.umich.edu if (isSnan(op1) || isSnan(op2)) 6097639Sgblack@eecs.umich.edu return 2.0; 6107639Sgblack@eecs.umich.edu return (fabsf(op1) > fabsf(op2)) ? 0.0 : 1.0; 6117639Sgblack@eecs.umich.edu } 6127639Sgblack@eecs.umich.edu 6137639Sgblack@eecs.umich.edu static float 6147639Sgblack@eecs.umich.edu vacgeFunc(float op1, float op2) 6157639Sgblack@eecs.umich.edu { 6167639Sgblack@eecs.umich.edu if (isSnan(op1) || isSnan(op2)) 6177639Sgblack@eecs.umich.edu return 2.0; 6187639Sgblack@eecs.umich.edu return (fabsf(op1) >= fabsf(op2)) ? 0.0 : 1.0; 6197639Sgblack@eecs.umich.edu } 6207639Sgblack@eecs.umich.edu}}; 6217639Sgblack@eecs.umich.edu 6227639Sgblack@eecs.umich.edulet {{ 6237640Sgblack@eecs.umich.edu simdEnabledCheckCode = ''' 6247640Sgblack@eecs.umich.edu if (!neonEnabled(Cpacr, Cpsr, Fpexc)) 6257640Sgblack@eecs.umich.edu return disabledFault(); 6267640Sgblack@eecs.umich.edu ''' 6277640Sgblack@eecs.umich.edu}}; 6287640Sgblack@eecs.umich.edu 6297640Sgblack@eecs.umich.edulet {{ 6307639Sgblack@eecs.umich.edu 6317639Sgblack@eecs.umich.edu header_output = "" 6327639Sgblack@eecs.umich.edu exec_output = "" 6337639Sgblack@eecs.umich.edu 6347639Sgblack@eecs.umich.edu smallUnsignedTypes = ("uint8_t", "uint16_t", "uint32_t") 6357639Sgblack@eecs.umich.edu unsignedTypes = smallUnsignedTypes + ("uint64_t",) 6367639Sgblack@eecs.umich.edu smallSignedTypes = ("int8_t", "int16_t", "int32_t") 6377639Sgblack@eecs.umich.edu signedTypes = smallSignedTypes + ("int64_t",) 6387639Sgblack@eecs.umich.edu smallTypes = smallUnsignedTypes + smallSignedTypes 6397639Sgblack@eecs.umich.edu allTypes = unsignedTypes + signedTypes 6407639Sgblack@eecs.umich.edu 6417639Sgblack@eecs.umich.edu def threeEqualRegInst(name, Name, types, rCount, op, 6427639Sgblack@eecs.umich.edu readDest=False, pairwise=False): 6437639Sgblack@eecs.umich.edu global header_output, exec_output 6447640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 6457639Sgblack@eecs.umich.edu RegVect srcReg1, srcReg2, destReg; 6467639Sgblack@eecs.umich.edu ''' 6477639Sgblack@eecs.umich.edu for reg in range(rCount): 6487639Sgblack@eecs.umich.edu eWalkCode += ''' 6497639Sgblack@eecs.umich.edu srcReg1.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw); 6507639Sgblack@eecs.umich.edu srcReg2.regs[%(reg)d] = htog(FpOp2P%(reg)d.uw); 6517639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 6527639Sgblack@eecs.umich.edu if readDest: 6537639Sgblack@eecs.umich.edu eWalkCode += ''' 6547639Sgblack@eecs.umich.edu destReg.regs[%(reg)d] = htog(FpDestP%(reg)d.uw); 6557639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 6567639Sgblack@eecs.umich.edu readDestCode = '' 6577639Sgblack@eecs.umich.edu if readDest: 6587639Sgblack@eecs.umich.edu readDestCode = 'destElem = gtoh(destReg.elements[i]);' 6597639Sgblack@eecs.umich.edu if pairwise: 6607639Sgblack@eecs.umich.edu eWalkCode += ''' 6617639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i++) { 6627639Sgblack@eecs.umich.edu Element srcElem1 = gtoh(2 * i < eCount ? 6637639Sgblack@eecs.umich.edu srcReg1.elements[2 * i] : 6647639Sgblack@eecs.umich.edu srcReg2.elements[2 * i - eCount]); 6657639Sgblack@eecs.umich.edu Element srcElem2 = gtoh(2 * i < eCount ? 6667639Sgblack@eecs.umich.edu srcReg1.elements[2 * i + 1] : 6677639Sgblack@eecs.umich.edu srcReg2.elements[2 * i + 1 - eCount]); 6687639Sgblack@eecs.umich.edu Element destElem; 6697639Sgblack@eecs.umich.edu %(readDest)s 6707639Sgblack@eecs.umich.edu %(op)s 6717639Sgblack@eecs.umich.edu destReg.elements[i] = htog(destElem); 6727639Sgblack@eecs.umich.edu } 6737639Sgblack@eecs.umich.edu ''' % { "op" : op, "readDest" : readDestCode } 6747639Sgblack@eecs.umich.edu else: 6757639Sgblack@eecs.umich.edu eWalkCode += ''' 6767639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i++) { 6777639Sgblack@eecs.umich.edu Element srcElem1 = gtoh(srcReg1.elements[i]); 6787639Sgblack@eecs.umich.edu Element srcElem2 = gtoh(srcReg2.elements[i]); 6797639Sgblack@eecs.umich.edu Element destElem; 6807639Sgblack@eecs.umich.edu %(readDest)s 6817639Sgblack@eecs.umich.edu %(op)s 6827639Sgblack@eecs.umich.edu destReg.elements[i] = htog(destElem); 6837639Sgblack@eecs.umich.edu } 6847639Sgblack@eecs.umich.edu ''' % { "op" : op, "readDest" : readDestCode } 6857639Sgblack@eecs.umich.edu for reg in range(rCount): 6867639Sgblack@eecs.umich.edu eWalkCode += ''' 6877639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destReg.regs[%(reg)d]); 6887639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 6897639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 6907639Sgblack@eecs.umich.edu "RegRegRegOp", 6917639Sgblack@eecs.umich.edu { "code": eWalkCode, 6927639Sgblack@eecs.umich.edu "r_count": rCount, 6937639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 6947639Sgblack@eecs.umich.edu header_output += NeonRegRegRegOpDeclare.subst(iop) 6957639Sgblack@eecs.umich.edu exec_output += NeonEqualRegExecute.subst(iop) 6967639Sgblack@eecs.umich.edu for type in types: 6977639Sgblack@eecs.umich.edu substDict = { "targs" : type, 6987639Sgblack@eecs.umich.edu "class_name" : Name } 6997639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 7007639Sgblack@eecs.umich.edu 7017639Sgblack@eecs.umich.edu def threeEqualRegInstFp(name, Name, types, rCount, op, 7027639Sgblack@eecs.umich.edu readDest=False, pairwise=False, toInt=False): 7037639Sgblack@eecs.umich.edu global header_output, exec_output 7047640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 7057639Sgblack@eecs.umich.edu typedef FloatReg FloatVect[rCount]; 7067639Sgblack@eecs.umich.edu FloatVect srcRegs1, srcRegs2; 7077639Sgblack@eecs.umich.edu ''' 7087639Sgblack@eecs.umich.edu if toInt: 7097639Sgblack@eecs.umich.edu eWalkCode += 'RegVect destRegs;\n' 7107639Sgblack@eecs.umich.edu else: 7117639Sgblack@eecs.umich.edu eWalkCode += 'FloatVect destRegs;\n' 7127639Sgblack@eecs.umich.edu for reg in range(rCount): 7137639Sgblack@eecs.umich.edu eWalkCode += ''' 7147639Sgblack@eecs.umich.edu srcRegs1[%(reg)d] = FpOp1P%(reg)d; 7157639Sgblack@eecs.umich.edu srcRegs2[%(reg)d] = FpOp2P%(reg)d; 7167639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 7177639Sgblack@eecs.umich.edu if readDest: 7187639Sgblack@eecs.umich.edu if toInt: 7197639Sgblack@eecs.umich.edu eWalkCode += ''' 7207639Sgblack@eecs.umich.edu destRegs.regs[%(reg)d] = FpDestP%(reg)d.bits; 7217639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 7227639Sgblack@eecs.umich.edu else: 7237639Sgblack@eecs.umich.edu eWalkCode += ''' 7247639Sgblack@eecs.umich.edu destRegs[%(reg)d] = FpDestP%(reg)d; 7257639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 7267639Sgblack@eecs.umich.edu readDestCode = '' 7277639Sgblack@eecs.umich.edu if readDest: 7287639Sgblack@eecs.umich.edu readDestCode = 'destReg = destRegs[r];' 7297639Sgblack@eecs.umich.edu destType = 'FloatReg' 7307639Sgblack@eecs.umich.edu writeDest = 'destRegs[r] = destReg;' 7317639Sgblack@eecs.umich.edu if toInt: 7327639Sgblack@eecs.umich.edu destType = 'FloatRegBits' 7337639Sgblack@eecs.umich.edu writeDest = 'destRegs.regs[r] = destReg;' 7347639Sgblack@eecs.umich.edu if pairwise: 7357639Sgblack@eecs.umich.edu eWalkCode += ''' 7367639Sgblack@eecs.umich.edu for (unsigned r = 0; r < rCount; r++) { 7377639Sgblack@eecs.umich.edu FloatReg srcReg1 = (2 * r < rCount) ? 7387639Sgblack@eecs.umich.edu srcRegs1[2 * r] : srcRegs2[2 * r - rCount]; 7397639Sgblack@eecs.umich.edu FloatReg srcReg2 = (2 * r < rCount) ? 7407639Sgblack@eecs.umich.edu srcRegs1[2 * r + 1] : srcRegs2[2 * r + 1 - rCount]; 7417639Sgblack@eecs.umich.edu %(destType)s destReg; 7427639Sgblack@eecs.umich.edu %(readDest)s 7437639Sgblack@eecs.umich.edu %(op)s 7447639Sgblack@eecs.umich.edu %(writeDest)s 7457639Sgblack@eecs.umich.edu } 7467639Sgblack@eecs.umich.edu ''' % { "op" : op, 7477639Sgblack@eecs.umich.edu "readDest" : readDestCode, 7487639Sgblack@eecs.umich.edu "destType" : destType, 7497639Sgblack@eecs.umich.edu "writeDest" : writeDest } 7507639Sgblack@eecs.umich.edu else: 7517639Sgblack@eecs.umich.edu eWalkCode += ''' 7527639Sgblack@eecs.umich.edu for (unsigned r = 0; r < rCount; r++) { 7537639Sgblack@eecs.umich.edu FloatReg srcReg1 = srcRegs1[r]; 7547639Sgblack@eecs.umich.edu FloatReg srcReg2 = srcRegs2[r]; 7557639Sgblack@eecs.umich.edu %(destType)s destReg; 7567639Sgblack@eecs.umich.edu %(readDest)s 7577639Sgblack@eecs.umich.edu %(op)s 7587639Sgblack@eecs.umich.edu %(writeDest)s 7597639Sgblack@eecs.umich.edu } 7607639Sgblack@eecs.umich.edu ''' % { "op" : op, 7617639Sgblack@eecs.umich.edu "readDest" : readDestCode, 7627639Sgblack@eecs.umich.edu "destType" : destType, 7637639Sgblack@eecs.umich.edu "writeDest" : writeDest } 7647639Sgblack@eecs.umich.edu for reg in range(rCount): 7657639Sgblack@eecs.umich.edu if toInt: 7667639Sgblack@eecs.umich.edu eWalkCode += ''' 7677639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = destRegs.regs[%(reg)d]; 7687639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 7697639Sgblack@eecs.umich.edu else: 7707639Sgblack@eecs.umich.edu eWalkCode += ''' 7717639Sgblack@eecs.umich.edu FpDestP%(reg)d = destRegs[%(reg)d]; 7727639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 7737639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 7747639Sgblack@eecs.umich.edu "FpRegRegRegOp", 7757639Sgblack@eecs.umich.edu { "code": eWalkCode, 7767639Sgblack@eecs.umich.edu "r_count": rCount, 7777639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 7787639Sgblack@eecs.umich.edu header_output += NeonRegRegRegOpDeclare.subst(iop) 7797639Sgblack@eecs.umich.edu exec_output += NeonEqualRegExecute.subst(iop) 7807639Sgblack@eecs.umich.edu for type in types: 7817639Sgblack@eecs.umich.edu substDict = { "targs" : type, 7827639Sgblack@eecs.umich.edu "class_name" : Name } 7837639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 7847639Sgblack@eecs.umich.edu 7857639Sgblack@eecs.umich.edu def threeUnequalRegInst(name, Name, types, op, 7867639Sgblack@eecs.umich.edu bigSrc1, bigSrc2, bigDest, readDest): 7877639Sgblack@eecs.umich.edu global header_output, exec_output 7887639Sgblack@eecs.umich.edu src1Cnt = src2Cnt = destCnt = 2 7897639Sgblack@eecs.umich.edu src1Prefix = src2Prefix = destPrefix = '' 7907639Sgblack@eecs.umich.edu if bigSrc1: 7917639Sgblack@eecs.umich.edu src1Cnt = 4 7927639Sgblack@eecs.umich.edu src1Prefix = 'Big' 7937639Sgblack@eecs.umich.edu if bigSrc2: 7947639Sgblack@eecs.umich.edu src2Cnt = 4 7957639Sgblack@eecs.umich.edu src2Prefix = 'Big' 7967639Sgblack@eecs.umich.edu if bigDest: 7977639Sgblack@eecs.umich.edu destCnt = 4 7987639Sgblack@eecs.umich.edu destPrefix = 'Big' 7997640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 8007639Sgblack@eecs.umich.edu %sRegVect srcReg1; 8017639Sgblack@eecs.umich.edu %sRegVect srcReg2; 8027639Sgblack@eecs.umich.edu %sRegVect destReg; 8037639Sgblack@eecs.umich.edu ''' % (src1Prefix, src2Prefix, destPrefix) 8047639Sgblack@eecs.umich.edu for reg in range(src1Cnt): 8057639Sgblack@eecs.umich.edu eWalkCode += ''' 8067639Sgblack@eecs.umich.edu srcReg1.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw); 8077639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 8087639Sgblack@eecs.umich.edu for reg in range(src2Cnt): 8097639Sgblack@eecs.umich.edu eWalkCode += ''' 8107639Sgblack@eecs.umich.edu srcReg2.regs[%(reg)d] = htog(FpOp2P%(reg)d.uw); 8117639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 8127639Sgblack@eecs.umich.edu if readDest: 8137639Sgblack@eecs.umich.edu for reg in range(destCnt): 8147639Sgblack@eecs.umich.edu eWalkCode += ''' 8157639Sgblack@eecs.umich.edu destReg.regs[%(reg)d] = htog(FpDestP%(reg)d.uw); 8167639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 8177639Sgblack@eecs.umich.edu readDestCode = '' 8187639Sgblack@eecs.umich.edu if readDest: 8197639Sgblack@eecs.umich.edu readDestCode = 'destElem = gtoh(destReg.elements[i]);' 8207639Sgblack@eecs.umich.edu eWalkCode += ''' 8217639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i++) { 8227639Sgblack@eecs.umich.edu %(src1Prefix)sElement srcElem1 = gtoh(srcReg1.elements[i]); 8237639Sgblack@eecs.umich.edu %(src1Prefix)sElement srcElem2 = gtoh(srcReg2.elements[i]); 8247639Sgblack@eecs.umich.edu %(destPrefix)sElement destElem; 8257639Sgblack@eecs.umich.edu %(readDest)s 8267639Sgblack@eecs.umich.edu %(op)s 8277639Sgblack@eecs.umich.edu destReg.elements[i] = htog(destElem); 8287639Sgblack@eecs.umich.edu } 8297639Sgblack@eecs.umich.edu ''' % { "op" : op, "readDest" : readDestCode, 8307639Sgblack@eecs.umich.edu "src1Prefix" : src1Prefix, "src2Prefix" : src2Prefix, 8317639Sgblack@eecs.umich.edu "destPrefix" : destPrefix } 8327639Sgblack@eecs.umich.edu for reg in range(destCnt): 8337639Sgblack@eecs.umich.edu eWalkCode += ''' 8347639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destReg.regs[%(reg)d]); 8357639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 8367639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 8377639Sgblack@eecs.umich.edu "RegRegRegOp", 8387639Sgblack@eecs.umich.edu { "code": eWalkCode, 8397639Sgblack@eecs.umich.edu "r_count": 2, 8407639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 8417639Sgblack@eecs.umich.edu header_output += NeonRegRegRegOpDeclare.subst(iop) 8427639Sgblack@eecs.umich.edu exec_output += NeonUnequalRegExecute.subst(iop) 8437639Sgblack@eecs.umich.edu for type in types: 8447639Sgblack@eecs.umich.edu substDict = { "targs" : type, 8457639Sgblack@eecs.umich.edu "class_name" : Name } 8467639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 8477639Sgblack@eecs.umich.edu 8487639Sgblack@eecs.umich.edu def threeRegNarrowInst(name, Name, types, op, readDest=False): 8497639Sgblack@eecs.umich.edu threeUnequalRegInst(name, Name, types, op, 8507639Sgblack@eecs.umich.edu True, True, False, readDest) 8517639Sgblack@eecs.umich.edu 8527639Sgblack@eecs.umich.edu def threeRegLongInst(name, Name, types, op, readDest=False): 8537639Sgblack@eecs.umich.edu threeUnequalRegInst(name, Name, types, op, 8547639Sgblack@eecs.umich.edu False, False, True, readDest) 8557639Sgblack@eecs.umich.edu 8567639Sgblack@eecs.umich.edu def threeRegWideInst(name, Name, types, op, readDest=False): 8577639Sgblack@eecs.umich.edu threeUnequalRegInst(name, Name, types, op, 8587639Sgblack@eecs.umich.edu True, False, True, readDest) 8597639Sgblack@eecs.umich.edu 8607639Sgblack@eecs.umich.edu def twoEqualRegInst(name, Name, types, rCount, op, readDest=False): 8617639Sgblack@eecs.umich.edu global header_output, exec_output 8627640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 8637639Sgblack@eecs.umich.edu RegVect srcReg1, srcReg2, destReg; 8647639Sgblack@eecs.umich.edu ''' 8657639Sgblack@eecs.umich.edu for reg in range(rCount): 8667639Sgblack@eecs.umich.edu eWalkCode += ''' 8677639Sgblack@eecs.umich.edu srcReg1.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw); 8687639Sgblack@eecs.umich.edu srcReg2.regs[%(reg)d] = htog(FpOp2P%(reg)d.uw); 8697639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 8707639Sgblack@eecs.umich.edu if readDest: 8717639Sgblack@eecs.umich.edu eWalkCode += ''' 8727639Sgblack@eecs.umich.edu destReg.regs[%(reg)d] = htog(FpDestP%(reg)d.uw); 8737639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 8747639Sgblack@eecs.umich.edu readDestCode = '' 8757639Sgblack@eecs.umich.edu if readDest: 8767639Sgblack@eecs.umich.edu readDestCode = 'destElem = gtoh(destReg.elements[i]);' 8777639Sgblack@eecs.umich.edu eWalkCode += ''' 8787639Sgblack@eecs.umich.edu assert(imm >= 0 && imm < eCount); 8797639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i++) { 8807639Sgblack@eecs.umich.edu Element srcElem1 = gtoh(srcReg1.elements[i]); 8817639Sgblack@eecs.umich.edu Element srcElem2 = gtoh(srcReg2.elements[imm]); 8827639Sgblack@eecs.umich.edu Element destElem; 8837639Sgblack@eecs.umich.edu %(readDest)s 8847639Sgblack@eecs.umich.edu %(op)s 8857639Sgblack@eecs.umich.edu destReg.elements[i] = htog(destElem); 8867639Sgblack@eecs.umich.edu } 8877639Sgblack@eecs.umich.edu ''' % { "op" : op, "readDest" : readDestCode } 8887639Sgblack@eecs.umich.edu for reg in range(rCount): 8897639Sgblack@eecs.umich.edu eWalkCode += ''' 8907639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destReg.regs[%(reg)d]); 8917639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 8927639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 8937639Sgblack@eecs.umich.edu "RegRegRegImmOp", 8947639Sgblack@eecs.umich.edu { "code": eWalkCode, 8957639Sgblack@eecs.umich.edu "r_count": rCount, 8967639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 8977639Sgblack@eecs.umich.edu header_output += NeonRegRegRegImmOpDeclare.subst(iop) 8987639Sgblack@eecs.umich.edu exec_output += NeonEqualRegExecute.subst(iop) 8997639Sgblack@eecs.umich.edu for type in types: 9007639Sgblack@eecs.umich.edu substDict = { "targs" : type, 9017639Sgblack@eecs.umich.edu "class_name" : Name } 9027639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 9037639Sgblack@eecs.umich.edu 9047639Sgblack@eecs.umich.edu def twoRegLongInst(name, Name, types, op, readDest=False): 9057639Sgblack@eecs.umich.edu global header_output, exec_output 9067639Sgblack@eecs.umich.edu rCount = 2 9077640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 9087639Sgblack@eecs.umich.edu RegVect srcReg1, srcReg2; 9097639Sgblack@eecs.umich.edu BigRegVect destReg; 9107639Sgblack@eecs.umich.edu ''' 9117639Sgblack@eecs.umich.edu for reg in range(rCount): 9127639Sgblack@eecs.umich.edu eWalkCode += ''' 9137639Sgblack@eecs.umich.edu srcReg1.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw); 9147639Sgblack@eecs.umich.edu srcReg2.regs[%(reg)d] = htog(FpOp2P%(reg)d.uw);; 9157639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 9167639Sgblack@eecs.umich.edu if readDest: 9177639Sgblack@eecs.umich.edu for reg in range(2 * rCount): 9187639Sgblack@eecs.umich.edu eWalkCode += ''' 9197639Sgblack@eecs.umich.edu destReg.regs[%(reg)d] = htog(FpDestP%(reg)d.uw); 9207639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 9217639Sgblack@eecs.umich.edu readDestCode = '' 9227639Sgblack@eecs.umich.edu if readDest: 9237639Sgblack@eecs.umich.edu readDestCode = 'destElem = gtoh(destReg.elements[i]);' 9247639Sgblack@eecs.umich.edu eWalkCode += ''' 9257639Sgblack@eecs.umich.edu assert(imm >= 0 && imm < eCount); 9267639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i++) { 9277639Sgblack@eecs.umich.edu Element srcElem1 = gtoh(srcReg1.elements[i]); 9287639Sgblack@eecs.umich.edu Element srcElem2 = gtoh(srcReg2.elements[imm]); 9297639Sgblack@eecs.umich.edu BigElement destElem; 9307639Sgblack@eecs.umich.edu %(readDest)s 9317639Sgblack@eecs.umich.edu %(op)s 9327639Sgblack@eecs.umich.edu destReg.elements[i] = htog(destElem); 9337639Sgblack@eecs.umich.edu } 9347639Sgblack@eecs.umich.edu ''' % { "op" : op, "readDest" : readDestCode } 9357639Sgblack@eecs.umich.edu for reg in range(2 * rCount): 9367639Sgblack@eecs.umich.edu eWalkCode += ''' 9377639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destReg.regs[%(reg)d]); 9387639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 9397639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 9407639Sgblack@eecs.umich.edu "RegRegRegImmOp", 9417639Sgblack@eecs.umich.edu { "code": eWalkCode, 9427639Sgblack@eecs.umich.edu "r_count": rCount, 9437639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 9447639Sgblack@eecs.umich.edu header_output += NeonRegRegRegImmOpDeclare.subst(iop) 9457639Sgblack@eecs.umich.edu exec_output += NeonUnequalRegExecute.subst(iop) 9467639Sgblack@eecs.umich.edu for type in types: 9477639Sgblack@eecs.umich.edu substDict = { "targs" : type, 9487639Sgblack@eecs.umich.edu "class_name" : Name } 9497639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 9507639Sgblack@eecs.umich.edu 9517639Sgblack@eecs.umich.edu def twoEqualRegInstFp(name, Name, types, rCount, op, readDest=False): 9527639Sgblack@eecs.umich.edu global header_output, exec_output 9537640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 9547639Sgblack@eecs.umich.edu typedef FloatReg FloatVect[rCount]; 9557639Sgblack@eecs.umich.edu FloatVect srcRegs1, srcRegs2, destRegs; 9567639Sgblack@eecs.umich.edu ''' 9577639Sgblack@eecs.umich.edu for reg in range(rCount): 9587639Sgblack@eecs.umich.edu eWalkCode += ''' 9597639Sgblack@eecs.umich.edu srcRegs1[%(reg)d] = FpOp1P%(reg)d; 9607639Sgblack@eecs.umich.edu srcRegs2[%(reg)d] = FpOp2P%(reg)d; 9617639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 9627639Sgblack@eecs.umich.edu if readDest: 9637639Sgblack@eecs.umich.edu eWalkCode += ''' 9647639Sgblack@eecs.umich.edu destRegs[%(reg)d] = FpDestP%(reg)d; 9657639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 9667639Sgblack@eecs.umich.edu readDestCode = '' 9677639Sgblack@eecs.umich.edu if readDest: 9687639Sgblack@eecs.umich.edu readDestCode = 'destReg = destRegs[i];' 9697639Sgblack@eecs.umich.edu eWalkCode += ''' 9707639Sgblack@eecs.umich.edu assert(imm >= 0 && imm < rCount); 9717639Sgblack@eecs.umich.edu for (unsigned i = 0; i < rCount; i++) { 9727639Sgblack@eecs.umich.edu FloatReg srcReg1 = srcRegs1[i]; 9737639Sgblack@eecs.umich.edu FloatReg srcReg2 = srcRegs2[imm]; 9747639Sgblack@eecs.umich.edu FloatReg destReg; 9757639Sgblack@eecs.umich.edu %(readDest)s 9767639Sgblack@eecs.umich.edu %(op)s 9777639Sgblack@eecs.umich.edu destRegs[i] = destReg; 9787639Sgblack@eecs.umich.edu } 9797639Sgblack@eecs.umich.edu ''' % { "op" : op, "readDest" : readDestCode } 9807639Sgblack@eecs.umich.edu for reg in range(rCount): 9817639Sgblack@eecs.umich.edu eWalkCode += ''' 9827639Sgblack@eecs.umich.edu FpDestP%(reg)d = destRegs[%(reg)d]; 9837639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 9847639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 9857639Sgblack@eecs.umich.edu "FpRegRegRegImmOp", 9867639Sgblack@eecs.umich.edu { "code": eWalkCode, 9877639Sgblack@eecs.umich.edu "r_count": rCount, 9887639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 9897639Sgblack@eecs.umich.edu header_output += NeonRegRegRegImmOpDeclare.subst(iop) 9907639Sgblack@eecs.umich.edu exec_output += NeonEqualRegExecute.subst(iop) 9917639Sgblack@eecs.umich.edu for type in types: 9927639Sgblack@eecs.umich.edu substDict = { "targs" : type, 9937639Sgblack@eecs.umich.edu "class_name" : Name } 9947639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 9957639Sgblack@eecs.umich.edu 9967639Sgblack@eecs.umich.edu def twoRegShiftInst(name, Name, types, rCount, op, 9977639Sgblack@eecs.umich.edu readDest=False, toInt=False, fromInt=False): 9987639Sgblack@eecs.umich.edu global header_output, exec_output 9997640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 10007639Sgblack@eecs.umich.edu RegVect srcRegs1, destRegs; 10017639Sgblack@eecs.umich.edu ''' 10027639Sgblack@eecs.umich.edu for reg in range(rCount): 10037639Sgblack@eecs.umich.edu eWalkCode += ''' 10047639Sgblack@eecs.umich.edu srcRegs1.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw); 10057639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 10067639Sgblack@eecs.umich.edu if readDest: 10077639Sgblack@eecs.umich.edu eWalkCode += ''' 10087639Sgblack@eecs.umich.edu destRegs.regs[%(reg)d] = htog(FpDestP%(reg)d.uw); 10097639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 10107639Sgblack@eecs.umich.edu readDestCode = '' 10117639Sgblack@eecs.umich.edu if readDest: 10127639Sgblack@eecs.umich.edu readDestCode = 'destElem = gtoh(destRegs.elements[i]);' 10137639Sgblack@eecs.umich.edu if toInt: 10147639Sgblack@eecs.umich.edu readDestCode = 'destReg = gtoh(destRegs.regs[i]);' 10157639Sgblack@eecs.umich.edu readOpCode = 'Element srcElem1 = gtoh(srcRegs1.elements[i]);' 10167639Sgblack@eecs.umich.edu if fromInt: 10177639Sgblack@eecs.umich.edu readOpCode = 'FloatRegBits srcReg1 = gtoh(srcRegs1.regs[i]);' 10187639Sgblack@eecs.umich.edu declDest = 'Element destElem;' 10197639Sgblack@eecs.umich.edu writeDestCode = 'destRegs.elements[i] = htog(destElem);' 10207639Sgblack@eecs.umich.edu if toInt: 10217639Sgblack@eecs.umich.edu declDest = 'FloatRegBits destReg;' 10227639Sgblack@eecs.umich.edu writeDestCode = 'destRegs.regs[i] = htog(destReg);' 10237639Sgblack@eecs.umich.edu eWalkCode += ''' 10247639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i++) { 10257639Sgblack@eecs.umich.edu %(readOp)s 10267639Sgblack@eecs.umich.edu %(declDest)s 10277639Sgblack@eecs.umich.edu %(readDest)s 10287639Sgblack@eecs.umich.edu %(op)s 10297639Sgblack@eecs.umich.edu %(writeDest)s 10307639Sgblack@eecs.umich.edu } 10317639Sgblack@eecs.umich.edu ''' % { "readOp" : readOpCode, 10327639Sgblack@eecs.umich.edu "declDest" : declDest, 10337639Sgblack@eecs.umich.edu "readDest" : readDestCode, 10347639Sgblack@eecs.umich.edu "op" : op, 10357639Sgblack@eecs.umich.edu "writeDest" : writeDestCode } 10367639Sgblack@eecs.umich.edu for reg in range(rCount): 10377639Sgblack@eecs.umich.edu eWalkCode += ''' 10387639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destRegs.regs[%(reg)d]); 10397639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 10407639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 10417639Sgblack@eecs.umich.edu "RegRegImmOp", 10427639Sgblack@eecs.umich.edu { "code": eWalkCode, 10437639Sgblack@eecs.umich.edu "r_count": rCount, 10447639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 10457639Sgblack@eecs.umich.edu header_output += NeonRegRegImmOpDeclare.subst(iop) 10467639Sgblack@eecs.umich.edu exec_output += NeonEqualRegExecute.subst(iop) 10477639Sgblack@eecs.umich.edu for type in types: 10487639Sgblack@eecs.umich.edu substDict = { "targs" : type, 10497639Sgblack@eecs.umich.edu "class_name" : Name } 10507639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 10517639Sgblack@eecs.umich.edu 10527639Sgblack@eecs.umich.edu def twoRegNarrowShiftInst(name, Name, types, op, readDest=False): 10537639Sgblack@eecs.umich.edu global header_output, exec_output 10547640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 10557639Sgblack@eecs.umich.edu BigRegVect srcReg1; 10567639Sgblack@eecs.umich.edu RegVect destReg; 10577639Sgblack@eecs.umich.edu ''' 10587639Sgblack@eecs.umich.edu for reg in range(4): 10597639Sgblack@eecs.umich.edu eWalkCode += ''' 10607639Sgblack@eecs.umich.edu srcReg1.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw); 10617639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 10627639Sgblack@eecs.umich.edu if readDest: 10637639Sgblack@eecs.umich.edu for reg in range(2): 10647639Sgblack@eecs.umich.edu eWalkCode += ''' 10657639Sgblack@eecs.umich.edu destReg.regs[%(reg)d] = htog(FpDestP%(reg)d.uw); 10667639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 10677639Sgblack@eecs.umich.edu readDestCode = '' 10687639Sgblack@eecs.umich.edu if readDest: 10697639Sgblack@eecs.umich.edu readDestCode = 'destElem = gtoh(destReg.elements[i]);' 10707639Sgblack@eecs.umich.edu eWalkCode += ''' 10717639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i++) { 10727639Sgblack@eecs.umich.edu BigElement srcElem1 = gtoh(srcReg1.elements[i]); 10737639Sgblack@eecs.umich.edu Element destElem; 10747639Sgblack@eecs.umich.edu %(readDest)s 10757639Sgblack@eecs.umich.edu %(op)s 10767639Sgblack@eecs.umich.edu destReg.elements[i] = htog(destElem); 10777639Sgblack@eecs.umich.edu } 10787639Sgblack@eecs.umich.edu ''' % { "op" : op, "readDest" : readDestCode } 10797639Sgblack@eecs.umich.edu for reg in range(2): 10807639Sgblack@eecs.umich.edu eWalkCode += ''' 10817639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destReg.regs[%(reg)d]); 10827639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 10837639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 10847639Sgblack@eecs.umich.edu "RegRegImmOp", 10857639Sgblack@eecs.umich.edu { "code": eWalkCode, 10867639Sgblack@eecs.umich.edu "r_count": 2, 10877639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 10887639Sgblack@eecs.umich.edu header_output += NeonRegRegImmOpDeclare.subst(iop) 10897639Sgblack@eecs.umich.edu exec_output += NeonUnequalRegExecute.subst(iop) 10907639Sgblack@eecs.umich.edu for type in types: 10917639Sgblack@eecs.umich.edu substDict = { "targs" : type, 10927639Sgblack@eecs.umich.edu "class_name" : Name } 10937639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 10947639Sgblack@eecs.umich.edu 10957639Sgblack@eecs.umich.edu def twoRegLongShiftInst(name, Name, types, op, readDest=False): 10967639Sgblack@eecs.umich.edu global header_output, exec_output 10977640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 10987639Sgblack@eecs.umich.edu RegVect srcReg1; 10997639Sgblack@eecs.umich.edu BigRegVect destReg; 11007639Sgblack@eecs.umich.edu ''' 11017639Sgblack@eecs.umich.edu for reg in range(2): 11027639Sgblack@eecs.umich.edu eWalkCode += ''' 11037639Sgblack@eecs.umich.edu srcReg1.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw); 11047639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 11057639Sgblack@eecs.umich.edu if readDest: 11067639Sgblack@eecs.umich.edu for reg in range(4): 11077639Sgblack@eecs.umich.edu eWalkCode += ''' 11087639Sgblack@eecs.umich.edu destReg.regs[%(reg)d] = htog(FpDestP%(reg)d.uw); 11097639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 11107639Sgblack@eecs.umich.edu readDestCode = '' 11117639Sgblack@eecs.umich.edu if readDest: 11127639Sgblack@eecs.umich.edu readDestCode = 'destReg = gtoh(destReg.elements[i]);' 11137639Sgblack@eecs.umich.edu eWalkCode += ''' 11147639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i++) { 11157639Sgblack@eecs.umich.edu Element srcElem1 = gtoh(srcReg1.elements[i]); 11167639Sgblack@eecs.umich.edu BigElement destElem; 11177639Sgblack@eecs.umich.edu %(readDest)s 11187639Sgblack@eecs.umich.edu %(op)s 11197639Sgblack@eecs.umich.edu destReg.elements[i] = htog(destElem); 11207639Sgblack@eecs.umich.edu } 11217639Sgblack@eecs.umich.edu ''' % { "op" : op, "readDest" : readDestCode } 11227639Sgblack@eecs.umich.edu for reg in range(4): 11237639Sgblack@eecs.umich.edu eWalkCode += ''' 11247639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destReg.regs[%(reg)d]); 11257639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 11267639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 11277639Sgblack@eecs.umich.edu "RegRegImmOp", 11287639Sgblack@eecs.umich.edu { "code": eWalkCode, 11297639Sgblack@eecs.umich.edu "r_count": 2, 11307639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 11317639Sgblack@eecs.umich.edu header_output += NeonRegRegImmOpDeclare.subst(iop) 11327639Sgblack@eecs.umich.edu exec_output += NeonUnequalRegExecute.subst(iop) 11337639Sgblack@eecs.umich.edu for type in types: 11347639Sgblack@eecs.umich.edu substDict = { "targs" : type, 11357639Sgblack@eecs.umich.edu "class_name" : Name } 11367639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 11377639Sgblack@eecs.umich.edu 11387639Sgblack@eecs.umich.edu def twoRegMiscInst(name, Name, types, rCount, op, readDest=False): 11397639Sgblack@eecs.umich.edu global header_output, exec_output 11407640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 11417639Sgblack@eecs.umich.edu RegVect srcReg1, destReg; 11427639Sgblack@eecs.umich.edu ''' 11437639Sgblack@eecs.umich.edu for reg in range(rCount): 11447639Sgblack@eecs.umich.edu eWalkCode += ''' 11457639Sgblack@eecs.umich.edu srcReg1.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw); 11467639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 11477639Sgblack@eecs.umich.edu if readDest: 11487639Sgblack@eecs.umich.edu eWalkCode += ''' 11497639Sgblack@eecs.umich.edu destReg.regs[%(reg)d] = htog(FpDestP%(reg)d.uw); 11507639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 11517639Sgblack@eecs.umich.edu readDestCode = '' 11527639Sgblack@eecs.umich.edu if readDest: 11537639Sgblack@eecs.umich.edu readDestCode = 'destElem = gtoh(destReg.elements[i]);' 11547639Sgblack@eecs.umich.edu eWalkCode += ''' 11557639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i++) { 11567639Sgblack@eecs.umich.edu unsigned j = i; 11577639Sgblack@eecs.umich.edu Element srcElem1 = gtoh(srcReg1.elements[i]); 11587639Sgblack@eecs.umich.edu Element destElem; 11597639Sgblack@eecs.umich.edu %(readDest)s 11607639Sgblack@eecs.umich.edu %(op)s 11617639Sgblack@eecs.umich.edu destReg.elements[j] = htog(destElem); 11627639Sgblack@eecs.umich.edu } 11637639Sgblack@eecs.umich.edu ''' % { "op" : op, "readDest" : readDestCode } 11647639Sgblack@eecs.umich.edu for reg in range(rCount): 11657639Sgblack@eecs.umich.edu eWalkCode += ''' 11667639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destReg.regs[%(reg)d]); 11677639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 11687639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 11697639Sgblack@eecs.umich.edu "RegRegOp", 11707639Sgblack@eecs.umich.edu { "code": eWalkCode, 11717639Sgblack@eecs.umich.edu "r_count": rCount, 11727639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 11737639Sgblack@eecs.umich.edu header_output += NeonRegRegOpDeclare.subst(iop) 11747639Sgblack@eecs.umich.edu exec_output += NeonEqualRegExecute.subst(iop) 11757639Sgblack@eecs.umich.edu for type in types: 11767639Sgblack@eecs.umich.edu substDict = { "targs" : type, 11777639Sgblack@eecs.umich.edu "class_name" : Name } 11787639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 11797639Sgblack@eecs.umich.edu 11807639Sgblack@eecs.umich.edu def twoRegMiscScInst(name, Name, types, rCount, op, readDest=False): 11817639Sgblack@eecs.umich.edu global header_output, exec_output 11827640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 11837639Sgblack@eecs.umich.edu RegVect srcReg1, destReg; 11847639Sgblack@eecs.umich.edu ''' 11857639Sgblack@eecs.umich.edu for reg in range(rCount): 11867639Sgblack@eecs.umich.edu eWalkCode += ''' 11877639Sgblack@eecs.umich.edu srcReg1.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw); 11887639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 11897639Sgblack@eecs.umich.edu if readDest: 11907639Sgblack@eecs.umich.edu eWalkCode += ''' 11917639Sgblack@eecs.umich.edu destReg.regs[%(reg)d] = htog(FpDestP%(reg)d.uw); 11927639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 11937639Sgblack@eecs.umich.edu readDestCode = '' 11947639Sgblack@eecs.umich.edu if readDest: 11957639Sgblack@eecs.umich.edu readDestCode = 'destElem = gtoh(destReg.elements[i]);' 11967639Sgblack@eecs.umich.edu eWalkCode += ''' 11977639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i++) { 11987639Sgblack@eecs.umich.edu Element srcElem1 = gtoh(srcReg1.elements[imm]); 11997639Sgblack@eecs.umich.edu Element destElem; 12007639Sgblack@eecs.umich.edu %(readDest)s 12017639Sgblack@eecs.umich.edu %(op)s 12027639Sgblack@eecs.umich.edu destReg.elements[i] = htog(destElem); 12037639Sgblack@eecs.umich.edu } 12047639Sgblack@eecs.umich.edu ''' % { "op" : op, "readDest" : readDestCode } 12057639Sgblack@eecs.umich.edu for reg in range(rCount): 12067639Sgblack@eecs.umich.edu eWalkCode += ''' 12077639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destReg.regs[%(reg)d]); 12087639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 12097639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 12107639Sgblack@eecs.umich.edu "RegRegImmOp", 12117639Sgblack@eecs.umich.edu { "code": eWalkCode, 12127639Sgblack@eecs.umich.edu "r_count": rCount, 12137639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 12147639Sgblack@eecs.umich.edu header_output += NeonRegRegImmOpDeclare.subst(iop) 12157639Sgblack@eecs.umich.edu exec_output += NeonEqualRegExecute.subst(iop) 12167639Sgblack@eecs.umich.edu for type in types: 12177639Sgblack@eecs.umich.edu substDict = { "targs" : type, 12187639Sgblack@eecs.umich.edu "class_name" : Name } 12197639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 12207639Sgblack@eecs.umich.edu 12217639Sgblack@eecs.umich.edu def twoRegMiscScramble(name, Name, types, rCount, op, readDest=False): 12227639Sgblack@eecs.umich.edu global header_output, exec_output 12237640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 12247639Sgblack@eecs.umich.edu RegVect srcReg1, destReg; 12257639Sgblack@eecs.umich.edu ''' 12267639Sgblack@eecs.umich.edu for reg in range(rCount): 12277639Sgblack@eecs.umich.edu eWalkCode += ''' 12287639Sgblack@eecs.umich.edu srcReg1.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw); 12297639Sgblack@eecs.umich.edu destReg.regs[%(reg)d] = htog(FpDestP%(reg)d.uw); 12307639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 12317639Sgblack@eecs.umich.edu if readDest: 12327639Sgblack@eecs.umich.edu eWalkCode += ''' 12337639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 12347639Sgblack@eecs.umich.edu readDestCode = '' 12357639Sgblack@eecs.umich.edu if readDest: 12367639Sgblack@eecs.umich.edu readDestCode = 'destElem = gtoh(destReg.elements[i]);' 12377639Sgblack@eecs.umich.edu eWalkCode += op 12387639Sgblack@eecs.umich.edu for reg in range(rCount): 12397639Sgblack@eecs.umich.edu eWalkCode += ''' 12407639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destReg.regs[%(reg)d]); 12417639Sgblack@eecs.umich.edu FpOp1P%(reg)d.uw = gtoh(srcReg1.regs[%(reg)d]); 12427639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 12437639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 12447639Sgblack@eecs.umich.edu "RegRegOp", 12457639Sgblack@eecs.umich.edu { "code": eWalkCode, 12467639Sgblack@eecs.umich.edu "r_count": rCount, 12477639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 12487639Sgblack@eecs.umich.edu header_output += NeonRegRegOpDeclare.subst(iop) 12497639Sgblack@eecs.umich.edu exec_output += NeonEqualRegExecute.subst(iop) 12507639Sgblack@eecs.umich.edu for type in types: 12517639Sgblack@eecs.umich.edu substDict = { "targs" : type, 12527639Sgblack@eecs.umich.edu "class_name" : Name } 12537639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 12547639Sgblack@eecs.umich.edu 12557639Sgblack@eecs.umich.edu def twoRegMiscInstFp(name, Name, types, rCount, op, 12567639Sgblack@eecs.umich.edu readDest=False, toInt=False): 12577639Sgblack@eecs.umich.edu global header_output, exec_output 12587640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 12597639Sgblack@eecs.umich.edu typedef FloatReg FloatVect[rCount]; 12607639Sgblack@eecs.umich.edu FloatVect srcRegs1; 12617639Sgblack@eecs.umich.edu ''' 12627639Sgblack@eecs.umich.edu if toInt: 12637639Sgblack@eecs.umich.edu eWalkCode += 'RegVect destRegs;\n' 12647639Sgblack@eecs.umich.edu else: 12657639Sgblack@eecs.umich.edu eWalkCode += 'FloatVect destRegs;\n' 12667639Sgblack@eecs.umich.edu for reg in range(rCount): 12677639Sgblack@eecs.umich.edu eWalkCode += ''' 12687639Sgblack@eecs.umich.edu srcRegs1[%(reg)d] = FpOp1P%(reg)d; 12697639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 12707639Sgblack@eecs.umich.edu if readDest: 12717639Sgblack@eecs.umich.edu if toInt: 12727639Sgblack@eecs.umich.edu eWalkCode += ''' 12737639Sgblack@eecs.umich.edu destRegs.regs[%(reg)d] = FpDestP%(reg)d.bits; 12747639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 12757639Sgblack@eecs.umich.edu else: 12767639Sgblack@eecs.umich.edu eWalkCode += ''' 12777639Sgblack@eecs.umich.edu destRegs[%(reg)d] = FpDestP%(reg)d; 12787639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 12797639Sgblack@eecs.umich.edu readDestCode = '' 12807639Sgblack@eecs.umich.edu if readDest: 12817639Sgblack@eecs.umich.edu readDestCode = 'destReg = destRegs[i];' 12827639Sgblack@eecs.umich.edu destType = 'FloatReg' 12837639Sgblack@eecs.umich.edu writeDest = 'destRegs[r] = destReg;' 12847639Sgblack@eecs.umich.edu if toInt: 12857639Sgblack@eecs.umich.edu destType = 'FloatRegBits' 12867639Sgblack@eecs.umich.edu writeDest = 'destRegs.regs[r] = destReg;' 12877639Sgblack@eecs.umich.edu eWalkCode += ''' 12887639Sgblack@eecs.umich.edu for (unsigned r = 0; r < rCount; r++) { 12897639Sgblack@eecs.umich.edu FloatReg srcReg1 = srcRegs1[r]; 12907639Sgblack@eecs.umich.edu %(destType)s destReg; 12917639Sgblack@eecs.umich.edu %(readDest)s 12927639Sgblack@eecs.umich.edu %(op)s 12937639Sgblack@eecs.umich.edu %(writeDest)s 12947639Sgblack@eecs.umich.edu } 12957639Sgblack@eecs.umich.edu ''' % { "op" : op, 12967639Sgblack@eecs.umich.edu "readDest" : readDestCode, 12977639Sgblack@eecs.umich.edu "destType" : destType, 12987639Sgblack@eecs.umich.edu "writeDest" : writeDest } 12997639Sgblack@eecs.umich.edu for reg in range(rCount): 13007639Sgblack@eecs.umich.edu if toInt: 13017639Sgblack@eecs.umich.edu eWalkCode += ''' 13027639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = destRegs.regs[%(reg)d]; 13037639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 13047639Sgblack@eecs.umich.edu else: 13057639Sgblack@eecs.umich.edu eWalkCode += ''' 13067639Sgblack@eecs.umich.edu FpDestP%(reg)d = destRegs[%(reg)d]; 13077639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 13087639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 13097639Sgblack@eecs.umich.edu "FpRegRegOp", 13107639Sgblack@eecs.umich.edu { "code": eWalkCode, 13117639Sgblack@eecs.umich.edu "r_count": rCount, 13127639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 13137639Sgblack@eecs.umich.edu header_output += NeonRegRegOpDeclare.subst(iop) 13147639Sgblack@eecs.umich.edu exec_output += NeonEqualRegExecute.subst(iop) 13157639Sgblack@eecs.umich.edu for type in types: 13167639Sgblack@eecs.umich.edu substDict = { "targs" : type, 13177639Sgblack@eecs.umich.edu "class_name" : Name } 13187639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 13197639Sgblack@eecs.umich.edu 13207639Sgblack@eecs.umich.edu def twoRegCondenseInst(name, Name, types, rCount, op, readDest=False): 13217639Sgblack@eecs.umich.edu global header_output, exec_output 13227640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 13237639Sgblack@eecs.umich.edu RegVect srcRegs; 13247639Sgblack@eecs.umich.edu BigRegVect destReg; 13257639Sgblack@eecs.umich.edu ''' 13267639Sgblack@eecs.umich.edu for reg in range(rCount): 13277639Sgblack@eecs.umich.edu eWalkCode += ''' 13287639Sgblack@eecs.umich.edu srcRegs.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw); 13297639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 13307639Sgblack@eecs.umich.edu if readDest: 13317639Sgblack@eecs.umich.edu eWalkCode += ''' 13327639Sgblack@eecs.umich.edu destReg.regs[%(reg)d] = htog(FpDestP%(reg)d.uw); 13337639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 13347639Sgblack@eecs.umich.edu readDestCode = '' 13357639Sgblack@eecs.umich.edu if readDest: 13367639Sgblack@eecs.umich.edu readDestCode = 'destElem = gtoh(destReg.elements[i]);' 13377639Sgblack@eecs.umich.edu eWalkCode += ''' 13387639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount / 2; i++) { 13397639Sgblack@eecs.umich.edu Element srcElem1 = gtoh(srcRegs.elements[2 * i]); 13407639Sgblack@eecs.umich.edu Element srcElem2 = gtoh(srcRegs.elements[2 * i + 1]); 13417639Sgblack@eecs.umich.edu BigElement destElem; 13427639Sgblack@eecs.umich.edu %(readDest)s 13437639Sgblack@eecs.umich.edu %(op)s 13447639Sgblack@eecs.umich.edu destReg.elements[i] = htog(destElem); 13457639Sgblack@eecs.umich.edu } 13467639Sgblack@eecs.umich.edu ''' % { "op" : op, "readDest" : readDestCode } 13477639Sgblack@eecs.umich.edu for reg in range(rCount): 13487639Sgblack@eecs.umich.edu eWalkCode += ''' 13497639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destReg.regs[%(reg)d]); 13507639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 13517639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 13527639Sgblack@eecs.umich.edu "RegRegOp", 13537639Sgblack@eecs.umich.edu { "code": eWalkCode, 13547639Sgblack@eecs.umich.edu "r_count": rCount, 13557639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 13567639Sgblack@eecs.umich.edu header_output += NeonRegRegOpDeclare.subst(iop) 13577639Sgblack@eecs.umich.edu exec_output += NeonUnequalRegExecute.subst(iop) 13587639Sgblack@eecs.umich.edu for type in types: 13597639Sgblack@eecs.umich.edu substDict = { "targs" : type, 13607639Sgblack@eecs.umich.edu "class_name" : Name } 13617639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 13627639Sgblack@eecs.umich.edu 13637639Sgblack@eecs.umich.edu def twoRegNarrowMiscInst(name, Name, types, op, readDest=False): 13647639Sgblack@eecs.umich.edu global header_output, exec_output 13657640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 13667639Sgblack@eecs.umich.edu BigRegVect srcReg1; 13677639Sgblack@eecs.umich.edu RegVect destReg; 13687639Sgblack@eecs.umich.edu ''' 13697639Sgblack@eecs.umich.edu for reg in range(4): 13707639Sgblack@eecs.umich.edu eWalkCode += ''' 13717639Sgblack@eecs.umich.edu srcReg1.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw); 13727639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 13737639Sgblack@eecs.umich.edu if readDest: 13747639Sgblack@eecs.umich.edu for reg in range(2): 13757639Sgblack@eecs.umich.edu eWalkCode += ''' 13767639Sgblack@eecs.umich.edu destReg.regs[%(reg)d] = htog(FpDestP%(reg)d.uw); 13777639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 13787639Sgblack@eecs.umich.edu readDestCode = '' 13797639Sgblack@eecs.umich.edu if readDest: 13807639Sgblack@eecs.umich.edu readDestCode = 'destElem = gtoh(destReg.elements[i]);' 13817639Sgblack@eecs.umich.edu eWalkCode += ''' 13827639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i++) { 13837639Sgblack@eecs.umich.edu BigElement srcElem1 = gtoh(srcReg1.elements[i]); 13847639Sgblack@eecs.umich.edu Element destElem; 13857639Sgblack@eecs.umich.edu %(readDest)s 13867639Sgblack@eecs.umich.edu %(op)s 13877639Sgblack@eecs.umich.edu destReg.elements[i] = htog(destElem); 13887639Sgblack@eecs.umich.edu } 13897639Sgblack@eecs.umich.edu ''' % { "op" : op, "readDest" : readDestCode } 13907639Sgblack@eecs.umich.edu for reg in range(2): 13917639Sgblack@eecs.umich.edu eWalkCode += ''' 13927639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destReg.regs[%(reg)d]); 13937639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 13947639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 13957639Sgblack@eecs.umich.edu "RegRegOp", 13967639Sgblack@eecs.umich.edu { "code": eWalkCode, 13977639Sgblack@eecs.umich.edu "r_count": 2, 13987639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 13997639Sgblack@eecs.umich.edu header_output += NeonRegRegOpDeclare.subst(iop) 14007639Sgblack@eecs.umich.edu exec_output += NeonUnequalRegExecute.subst(iop) 14017639Sgblack@eecs.umich.edu for type in types: 14027639Sgblack@eecs.umich.edu substDict = { "targs" : type, 14037639Sgblack@eecs.umich.edu "class_name" : Name } 14047639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 14057639Sgblack@eecs.umich.edu 14067639Sgblack@eecs.umich.edu def oneRegImmInst(name, Name, types, rCount, op, readDest=False): 14077639Sgblack@eecs.umich.edu global header_output, exec_output 14087640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 14097639Sgblack@eecs.umich.edu RegVect destReg; 14107639Sgblack@eecs.umich.edu ''' 14117639Sgblack@eecs.umich.edu if readDest: 14127639Sgblack@eecs.umich.edu for reg in range(rCount): 14137639Sgblack@eecs.umich.edu eWalkCode += ''' 14147639Sgblack@eecs.umich.edu destReg.regs[%(reg)d] = htog(FpDestP%(reg)d.uw); 14157639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 14167639Sgblack@eecs.umich.edu readDestCode = '' 14177639Sgblack@eecs.umich.edu if readDest: 14187639Sgblack@eecs.umich.edu readDestCode = 'destElem = gtoh(destReg.elements[i]);' 14197639Sgblack@eecs.umich.edu eWalkCode += ''' 14207639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i++) { 14217639Sgblack@eecs.umich.edu Element destElem; 14227639Sgblack@eecs.umich.edu %(readDest)s 14237639Sgblack@eecs.umich.edu %(op)s 14247639Sgblack@eecs.umich.edu destReg.elements[i] = htog(destElem); 14257639Sgblack@eecs.umich.edu } 14267639Sgblack@eecs.umich.edu ''' % { "op" : op, "readDest" : readDestCode } 14277639Sgblack@eecs.umich.edu for reg in range(rCount): 14287639Sgblack@eecs.umich.edu eWalkCode += ''' 14297639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destReg.regs[%(reg)d]); 14307639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 14317639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 14327639Sgblack@eecs.umich.edu "RegImmOp", 14337639Sgblack@eecs.umich.edu { "code": eWalkCode, 14347639Sgblack@eecs.umich.edu "r_count": rCount, 14357639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 14367639Sgblack@eecs.umich.edu header_output += NeonRegImmOpDeclare.subst(iop) 14377639Sgblack@eecs.umich.edu exec_output += NeonEqualRegExecute.subst(iop) 14387639Sgblack@eecs.umich.edu for type in types: 14397639Sgblack@eecs.umich.edu substDict = { "targs" : type, 14407639Sgblack@eecs.umich.edu "class_name" : Name } 14417639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 14427639Sgblack@eecs.umich.edu 14437639Sgblack@eecs.umich.edu def twoRegLongMiscInst(name, Name, types, op, readDest=False): 14447639Sgblack@eecs.umich.edu global header_output, exec_output 14457640Sgblack@eecs.umich.edu eWalkCode = simdEnabledCheckCode + ''' 14467639Sgblack@eecs.umich.edu RegVect srcReg1; 14477639Sgblack@eecs.umich.edu BigRegVect destReg; 14487639Sgblack@eecs.umich.edu ''' 14497639Sgblack@eecs.umich.edu for reg in range(2): 14507639Sgblack@eecs.umich.edu eWalkCode += ''' 14517639Sgblack@eecs.umich.edu srcReg1.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw); 14527639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 14537639Sgblack@eecs.umich.edu if readDest: 14547639Sgblack@eecs.umich.edu for reg in range(4): 14557639Sgblack@eecs.umich.edu eWalkCode += ''' 14567639Sgblack@eecs.umich.edu destReg.regs[%(reg)d] = htog(FpDestP%(reg)d.uw); 14577639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 14587639Sgblack@eecs.umich.edu readDestCode = '' 14597639Sgblack@eecs.umich.edu if readDest: 14607639Sgblack@eecs.umich.edu readDestCode = 'destReg = gtoh(destReg.elements[i]);' 14617639Sgblack@eecs.umich.edu eWalkCode += ''' 14627639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i++) { 14637639Sgblack@eecs.umich.edu Element srcElem1 = gtoh(srcReg1.elements[i]); 14647639Sgblack@eecs.umich.edu BigElement destElem; 14657639Sgblack@eecs.umich.edu %(readDest)s 14667639Sgblack@eecs.umich.edu %(op)s 14677639Sgblack@eecs.umich.edu destReg.elements[i] = htog(destElem); 14687639Sgblack@eecs.umich.edu } 14697639Sgblack@eecs.umich.edu ''' % { "op" : op, "readDest" : readDestCode } 14707639Sgblack@eecs.umich.edu for reg in range(4): 14717639Sgblack@eecs.umich.edu eWalkCode += ''' 14727639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destReg.regs[%(reg)d]); 14737639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 14747639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 14757639Sgblack@eecs.umich.edu "RegRegOp", 14767639Sgblack@eecs.umich.edu { "code": eWalkCode, 14777639Sgblack@eecs.umich.edu "r_count": 2, 14787639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 14797639Sgblack@eecs.umich.edu header_output += NeonRegRegOpDeclare.subst(iop) 14807639Sgblack@eecs.umich.edu exec_output += NeonUnequalRegExecute.subst(iop) 14817639Sgblack@eecs.umich.edu for type in types: 14827639Sgblack@eecs.umich.edu substDict = { "targs" : type, 14837639Sgblack@eecs.umich.edu "class_name" : Name } 14847639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 14857639Sgblack@eecs.umich.edu 14867639Sgblack@eecs.umich.edu vhaddCode = ''' 14877639Sgblack@eecs.umich.edu Element carryBit = 14887639Sgblack@eecs.umich.edu (((unsigned)srcElem1 & 0x1) + 14897639Sgblack@eecs.umich.edu ((unsigned)srcElem2 & 0x1)) >> 1; 14907639Sgblack@eecs.umich.edu // Use division instead of a shift to ensure the sign extension works 14917639Sgblack@eecs.umich.edu // right. The compiler will figure out if it can be a shift. Mask the 14927639Sgblack@eecs.umich.edu // inputs so they get truncated correctly. 14937639Sgblack@eecs.umich.edu destElem = (((srcElem1 & ~(Element)1) / 2) + 14947639Sgblack@eecs.umich.edu ((srcElem2 & ~(Element)1) / 2)) + carryBit; 14957639Sgblack@eecs.umich.edu ''' 14967639Sgblack@eecs.umich.edu threeEqualRegInst("vhadd", "VhaddD", allTypes, 2, vhaddCode) 14977639Sgblack@eecs.umich.edu threeEqualRegInst("vhadd", "VhaddQ", allTypes, 4, vhaddCode) 14987639Sgblack@eecs.umich.edu 14997639Sgblack@eecs.umich.edu vrhaddCode = ''' 15007639Sgblack@eecs.umich.edu Element carryBit = 15017639Sgblack@eecs.umich.edu (((unsigned)srcElem1 & 0x1) + 15027639Sgblack@eecs.umich.edu ((unsigned)srcElem2 & 0x1) + 1) >> 1; 15037639Sgblack@eecs.umich.edu // Use division instead of a shift to ensure the sign extension works 15047639Sgblack@eecs.umich.edu // right. The compiler will figure out if it can be a shift. Mask the 15057639Sgblack@eecs.umich.edu // inputs so they get truncated correctly. 15067639Sgblack@eecs.umich.edu destElem = (((srcElem1 & ~(Element)1) / 2) + 15077639Sgblack@eecs.umich.edu ((srcElem2 & ~(Element)1) / 2)) + carryBit; 15087639Sgblack@eecs.umich.edu ''' 15097639Sgblack@eecs.umich.edu threeEqualRegInst("vrhadd", "VrhaddD", allTypes, 2, vrhaddCode) 15107639Sgblack@eecs.umich.edu threeEqualRegInst("vrhadd", "VrhaddQ", allTypes, 4, vrhaddCode) 15117639Sgblack@eecs.umich.edu 15127639Sgblack@eecs.umich.edu vhsubCode = ''' 15137639Sgblack@eecs.umich.edu Element barrowBit = 15147639Sgblack@eecs.umich.edu (((srcElem1 & 0x1) - (srcElem2 & 0x1)) >> 1) & 0x1; 15157639Sgblack@eecs.umich.edu // Use division instead of a shift to ensure the sign extension works 15167639Sgblack@eecs.umich.edu // right. The compiler will figure out if it can be a shift. Mask the 15177639Sgblack@eecs.umich.edu // inputs so they get truncated correctly. 15187639Sgblack@eecs.umich.edu destElem = (((srcElem1 & ~(Element)1) / 2) - 15197639Sgblack@eecs.umich.edu ((srcElem2 & ~(Element)1) / 2)) - barrowBit; 15207639Sgblack@eecs.umich.edu ''' 15217639Sgblack@eecs.umich.edu threeEqualRegInst("vhsub", "VhsubD", allTypes, 2, vhsubCode) 15227639Sgblack@eecs.umich.edu threeEqualRegInst("vhsub", "VhsubQ", allTypes, 4, vhsubCode) 15237639Sgblack@eecs.umich.edu 15247639Sgblack@eecs.umich.edu vandCode = ''' 15257639Sgblack@eecs.umich.edu destElem = srcElem1 & srcElem2; 15267639Sgblack@eecs.umich.edu ''' 15277639Sgblack@eecs.umich.edu threeEqualRegInst("vand", "VandD", unsignedTypes, 2, vandCode) 15287639Sgblack@eecs.umich.edu threeEqualRegInst("vand", "VandQ", unsignedTypes, 4, vandCode) 15297639Sgblack@eecs.umich.edu 15307639Sgblack@eecs.umich.edu vbicCode = ''' 15317639Sgblack@eecs.umich.edu destElem = srcElem1 & ~srcElem2; 15327639Sgblack@eecs.umich.edu ''' 15337639Sgblack@eecs.umich.edu threeEqualRegInst("vbic", "VbicD", unsignedTypes, 2, vbicCode) 15347639Sgblack@eecs.umich.edu threeEqualRegInst("vbic", "VbicQ", unsignedTypes, 4, vbicCode) 15357639Sgblack@eecs.umich.edu 15367639Sgblack@eecs.umich.edu vorrCode = ''' 15377639Sgblack@eecs.umich.edu destElem = srcElem1 | srcElem2; 15387639Sgblack@eecs.umich.edu ''' 15397639Sgblack@eecs.umich.edu threeEqualRegInst("vorr", "VorrD", unsignedTypes, 2, vorrCode) 15407639Sgblack@eecs.umich.edu threeEqualRegInst("vorr", "VorrQ", unsignedTypes, 4, vorrCode) 15417639Sgblack@eecs.umich.edu 15427639Sgblack@eecs.umich.edu threeEqualRegInst("vmov", "VmovD", unsignedTypes, 2, vorrCode) 15437639Sgblack@eecs.umich.edu threeEqualRegInst("vmov", "VmovQ", unsignedTypes, 4, vorrCode) 15447639Sgblack@eecs.umich.edu 15457639Sgblack@eecs.umich.edu vornCode = ''' 15467639Sgblack@eecs.umich.edu destElem = srcElem1 | ~srcElem2; 15477639Sgblack@eecs.umich.edu ''' 15487639Sgblack@eecs.umich.edu threeEqualRegInst("vorn", "VornD", unsignedTypes, 2, vornCode) 15497639Sgblack@eecs.umich.edu threeEqualRegInst("vorn", "VornQ", unsignedTypes, 4, vornCode) 15507639Sgblack@eecs.umich.edu 15517639Sgblack@eecs.umich.edu veorCode = ''' 15527639Sgblack@eecs.umich.edu destElem = srcElem1 ^ srcElem2; 15537639Sgblack@eecs.umich.edu ''' 15547639Sgblack@eecs.umich.edu threeEqualRegInst("veor", "VeorD", unsignedTypes, 2, veorCode) 15557639Sgblack@eecs.umich.edu threeEqualRegInst("veor", "VeorQ", unsignedTypes, 4, veorCode) 15567639Sgblack@eecs.umich.edu 15577639Sgblack@eecs.umich.edu vbifCode = ''' 15587639Sgblack@eecs.umich.edu destElem = (destElem & srcElem2) | (srcElem1 & ~srcElem2); 15597639Sgblack@eecs.umich.edu ''' 15607639Sgblack@eecs.umich.edu threeEqualRegInst("vbif", "VbifD", unsignedTypes, 2, vbifCode, True) 15617639Sgblack@eecs.umich.edu threeEqualRegInst("vbif", "VbifQ", unsignedTypes, 4, vbifCode, True) 15627639Sgblack@eecs.umich.edu vbitCode = ''' 15637639Sgblack@eecs.umich.edu destElem = (srcElem1 & srcElem2) | (destElem & ~srcElem2); 15647639Sgblack@eecs.umich.edu ''' 15657639Sgblack@eecs.umich.edu threeEqualRegInst("vbit", "VbitD", unsignedTypes, 2, vbitCode, True) 15667639Sgblack@eecs.umich.edu threeEqualRegInst("vbit", "VbitQ", unsignedTypes, 4, vbitCode, True) 15677639Sgblack@eecs.umich.edu vbslCode = ''' 15687639Sgblack@eecs.umich.edu destElem = (srcElem1 & destElem) | (srcElem2 & ~destElem); 15697639Sgblack@eecs.umich.edu ''' 15707639Sgblack@eecs.umich.edu threeEqualRegInst("vbsl", "VbslD", unsignedTypes, 2, vbslCode, True) 15717639Sgblack@eecs.umich.edu threeEqualRegInst("vbsl", "VbslQ", unsignedTypes, 4, vbslCode, True) 15727639Sgblack@eecs.umich.edu 15737639Sgblack@eecs.umich.edu vmaxCode = ''' 15747639Sgblack@eecs.umich.edu destElem = (srcElem1 > srcElem2) ? srcElem1 : srcElem2; 15757639Sgblack@eecs.umich.edu ''' 15767639Sgblack@eecs.umich.edu threeEqualRegInst("vmax", "VmaxD", allTypes, 2, vmaxCode) 15777639Sgblack@eecs.umich.edu threeEqualRegInst("vmax", "VmaxQ", allTypes, 4, vmaxCode) 15787639Sgblack@eecs.umich.edu 15797639Sgblack@eecs.umich.edu vminCode = ''' 15807639Sgblack@eecs.umich.edu destElem = (srcElem1 < srcElem2) ? srcElem1 : srcElem2; 15817639Sgblack@eecs.umich.edu ''' 15827639Sgblack@eecs.umich.edu threeEqualRegInst("vmin", "VminD", allTypes, 2, vminCode) 15837639Sgblack@eecs.umich.edu threeEqualRegInst("vmin", "VminQ", allTypes, 4, vminCode) 15847639Sgblack@eecs.umich.edu 15857639Sgblack@eecs.umich.edu vaddCode = ''' 15867639Sgblack@eecs.umich.edu destElem = srcElem1 + srcElem2; 15877639Sgblack@eecs.umich.edu ''' 15887639Sgblack@eecs.umich.edu threeEqualRegInst("vadd", "NVaddD", unsignedTypes, 2, vaddCode) 15897639Sgblack@eecs.umich.edu threeEqualRegInst("vadd", "NVaddQ", unsignedTypes, 4, vaddCode) 15907639Sgblack@eecs.umich.edu 15917639Sgblack@eecs.umich.edu threeEqualRegInst("vpadd", "NVpaddD", unsignedTypes, 15927639Sgblack@eecs.umich.edu 2, vaddCode, pairwise=True) 15937639Sgblack@eecs.umich.edu threeEqualRegInst("vpadd", "NVpaddQ", unsignedTypes, 15947639Sgblack@eecs.umich.edu 4, vaddCode, pairwise=True) 15957639Sgblack@eecs.umich.edu vaddlwCode = ''' 15967639Sgblack@eecs.umich.edu destElem = (BigElement)srcElem1 + (BigElement)srcElem2; 15977639Sgblack@eecs.umich.edu ''' 15987639Sgblack@eecs.umich.edu threeRegLongInst("vaddl", "Vaddl", smallTypes, vaddlwCode) 15997639Sgblack@eecs.umich.edu threeRegWideInst("vaddw", "Vaddw", smallTypes, vaddlwCode) 16007639Sgblack@eecs.umich.edu vaddhnCode = ''' 16017639Sgblack@eecs.umich.edu destElem = ((BigElement)srcElem1 + (BigElement)srcElem2) >> 16027639Sgblack@eecs.umich.edu (sizeof(Element) * 8); 16037639Sgblack@eecs.umich.edu ''' 16047639Sgblack@eecs.umich.edu threeRegNarrowInst("vaddhn", "Vaddhn", smallTypes, vaddhnCode) 16057639Sgblack@eecs.umich.edu vraddhnCode = ''' 16067639Sgblack@eecs.umich.edu destElem = ((BigElement)srcElem1 + (BigElement)srcElem2 + 16077639Sgblack@eecs.umich.edu ((BigElement)1 << (sizeof(Element) * 8 - 1))) >> 16087639Sgblack@eecs.umich.edu (sizeof(Element) * 8); 16097639Sgblack@eecs.umich.edu ''' 16107639Sgblack@eecs.umich.edu threeRegNarrowInst("vraddhn", "Vraddhn", smallTypes, vraddhnCode) 16117639Sgblack@eecs.umich.edu 16127639Sgblack@eecs.umich.edu vsubCode = ''' 16137639Sgblack@eecs.umich.edu destElem = srcElem1 - srcElem2; 16147639Sgblack@eecs.umich.edu ''' 16157639Sgblack@eecs.umich.edu threeEqualRegInst("vsub", "NVsubD", unsignedTypes, 2, vsubCode) 16167639Sgblack@eecs.umich.edu threeEqualRegInst("vsub", "NVsubQ", unsignedTypes, 4, vsubCode) 16177639Sgblack@eecs.umich.edu vsublwCode = ''' 16187639Sgblack@eecs.umich.edu destElem = (BigElement)srcElem1 - (BigElement)srcElem2; 16197639Sgblack@eecs.umich.edu ''' 16207639Sgblack@eecs.umich.edu threeRegLongInst("vsubl", "Vsubl", smallTypes, vsublwCode) 16217639Sgblack@eecs.umich.edu threeRegWideInst("vsubw", "Vsubw", smallTypes, vsublwCode) 16227639Sgblack@eecs.umich.edu 16237639Sgblack@eecs.umich.edu vqaddUCode = ''' 16247639Sgblack@eecs.umich.edu destElem = srcElem1 + srcElem2; 16257639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 16267639Sgblack@eecs.umich.edu if (destElem < srcElem1 || destElem < srcElem2) { 16277639Sgblack@eecs.umich.edu destElem = (Element)(-1); 16287639Sgblack@eecs.umich.edu fpscr.qc = 1; 16297639Sgblack@eecs.umich.edu } 16307639Sgblack@eecs.umich.edu Fpscr = fpscr; 16317639Sgblack@eecs.umich.edu ''' 16327639Sgblack@eecs.umich.edu threeEqualRegInst("vqadd", "VqaddUD", unsignedTypes, 2, vqaddUCode) 16337639Sgblack@eecs.umich.edu threeEqualRegInst("vqadd", "VqaddUQ", unsignedTypes, 4, vqaddUCode) 16347639Sgblack@eecs.umich.edu vsubhnCode = ''' 16357639Sgblack@eecs.umich.edu destElem = ((BigElement)srcElem1 - (BigElement)srcElem2) >> 16367639Sgblack@eecs.umich.edu (sizeof(Element) * 8); 16377639Sgblack@eecs.umich.edu ''' 16387639Sgblack@eecs.umich.edu threeRegNarrowInst("vsubhn", "Vsubhn", smallTypes, vsubhnCode) 16397639Sgblack@eecs.umich.edu vrsubhnCode = ''' 16407639Sgblack@eecs.umich.edu destElem = ((BigElement)srcElem1 - (BigElement)srcElem2 + 16417639Sgblack@eecs.umich.edu ((BigElement)1 << (sizeof(Element) * 8 - 1))) >> 16427639Sgblack@eecs.umich.edu (sizeof(Element) * 8); 16437639Sgblack@eecs.umich.edu ''' 16447639Sgblack@eecs.umich.edu threeRegNarrowInst("vrsubhn", "Vrsubhn", smallTypes, vrsubhnCode) 16457639Sgblack@eecs.umich.edu 16467639Sgblack@eecs.umich.edu vqaddSCode = ''' 16477639Sgblack@eecs.umich.edu destElem = srcElem1 + srcElem2; 16487639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 16497639Sgblack@eecs.umich.edu bool negDest = (destElem < 0); 16507639Sgblack@eecs.umich.edu bool negSrc1 = (srcElem1 < 0); 16517639Sgblack@eecs.umich.edu bool negSrc2 = (srcElem2 < 0); 16527639Sgblack@eecs.umich.edu if ((negDest != negSrc1) && (negSrc1 == negSrc2)) { 16537639Sgblack@eecs.umich.edu destElem = (Element)1 << (sizeof(Element) * 8 - 1); 16547639Sgblack@eecs.umich.edu if (negDest) 16557639Sgblack@eecs.umich.edu destElem -= 1; 16567639Sgblack@eecs.umich.edu fpscr.qc = 1; 16577639Sgblack@eecs.umich.edu } 16587639Sgblack@eecs.umich.edu Fpscr = fpscr; 16597639Sgblack@eecs.umich.edu ''' 16607639Sgblack@eecs.umich.edu threeEqualRegInst("vqadd", "VqaddSD", signedTypes, 2, vqaddSCode) 16617639Sgblack@eecs.umich.edu threeEqualRegInst("vqadd", "VqaddSQ", signedTypes, 4, vqaddSCode) 16627639Sgblack@eecs.umich.edu 16637639Sgblack@eecs.umich.edu vqsubUCode = ''' 16647639Sgblack@eecs.umich.edu destElem = srcElem1 - srcElem2; 16657639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 16667639Sgblack@eecs.umich.edu if (destElem > srcElem1) { 16677639Sgblack@eecs.umich.edu destElem = 0; 16687639Sgblack@eecs.umich.edu fpscr.qc = 1; 16697639Sgblack@eecs.umich.edu } 16707639Sgblack@eecs.umich.edu Fpscr = fpscr; 16717639Sgblack@eecs.umich.edu ''' 16727639Sgblack@eecs.umich.edu threeEqualRegInst("vqsub", "VqsubUD", unsignedTypes, 2, vqsubUCode) 16737639Sgblack@eecs.umich.edu threeEqualRegInst("vqsub", "VqsubUQ", unsignedTypes, 4, vqsubUCode) 16747639Sgblack@eecs.umich.edu 16757639Sgblack@eecs.umich.edu vqsubSCode = ''' 16767639Sgblack@eecs.umich.edu destElem = srcElem1 - srcElem2; 16777639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 16787639Sgblack@eecs.umich.edu bool negDest = (destElem < 0); 16797639Sgblack@eecs.umich.edu bool negSrc1 = (srcElem1 < 0); 16807639Sgblack@eecs.umich.edu bool posSrc2 = (srcElem2 >= 0); 16817639Sgblack@eecs.umich.edu if ((negDest != negSrc1) && (negSrc1 == posSrc2)) { 16827639Sgblack@eecs.umich.edu destElem = (Element)1 << (sizeof(Element) * 8 - 1); 16837639Sgblack@eecs.umich.edu if (negDest) 16847639Sgblack@eecs.umich.edu destElem -= 1; 16857639Sgblack@eecs.umich.edu fpscr.qc = 1; 16867639Sgblack@eecs.umich.edu } 16877639Sgblack@eecs.umich.edu Fpscr = fpscr; 16887639Sgblack@eecs.umich.edu ''' 16897639Sgblack@eecs.umich.edu threeEqualRegInst("vqsub", "VqsubSD", signedTypes, 2, vqsubSCode) 16907639Sgblack@eecs.umich.edu threeEqualRegInst("vqsub", "VqsubSQ", signedTypes, 4, vqsubSCode) 16917639Sgblack@eecs.umich.edu 16927639Sgblack@eecs.umich.edu vcgtCode = ''' 16937639Sgblack@eecs.umich.edu destElem = (srcElem1 > srcElem2) ? (Element)(-1) : 0; 16947639Sgblack@eecs.umich.edu ''' 16957639Sgblack@eecs.umich.edu threeEqualRegInst("vcgt", "VcgtD", allTypes, 2, vcgtCode) 16967639Sgblack@eecs.umich.edu threeEqualRegInst("vcgt", "VcgtQ", allTypes, 4, vcgtCode) 16977639Sgblack@eecs.umich.edu 16987639Sgblack@eecs.umich.edu vcgeCode = ''' 16997639Sgblack@eecs.umich.edu destElem = (srcElem1 >= srcElem2) ? (Element)(-1) : 0; 17007639Sgblack@eecs.umich.edu ''' 17017639Sgblack@eecs.umich.edu threeEqualRegInst("vcge", "VcgeD", allTypes, 2, vcgeCode) 17027639Sgblack@eecs.umich.edu threeEqualRegInst("vcge", "VcgeQ", allTypes, 4, vcgeCode) 17037639Sgblack@eecs.umich.edu 17047639Sgblack@eecs.umich.edu vceqCode = ''' 17057639Sgblack@eecs.umich.edu destElem = (srcElem1 == srcElem2) ? (Element)(-1) : 0; 17067639Sgblack@eecs.umich.edu ''' 17077639Sgblack@eecs.umich.edu threeEqualRegInst("vceq", "VceqD", unsignedTypes, 2, vceqCode) 17087639Sgblack@eecs.umich.edu threeEqualRegInst("vceq", "VceqQ", unsignedTypes, 4, vceqCode) 17097639Sgblack@eecs.umich.edu 17107639Sgblack@eecs.umich.edu vshlCode = ''' 17117639Sgblack@eecs.umich.edu int16_t shiftAmt = (int8_t)srcElem2; 17127639Sgblack@eecs.umich.edu if (shiftAmt < 0) { 17137639Sgblack@eecs.umich.edu shiftAmt = -shiftAmt; 17147639Sgblack@eecs.umich.edu if (shiftAmt >= sizeof(Element) * 8) { 17157639Sgblack@eecs.umich.edu shiftAmt = sizeof(Element) * 8 - 1; 17167639Sgblack@eecs.umich.edu destElem = 0; 17177639Sgblack@eecs.umich.edu } else { 17187639Sgblack@eecs.umich.edu destElem = (srcElem1 >> shiftAmt); 17197639Sgblack@eecs.umich.edu } 17207639Sgblack@eecs.umich.edu // Make sure the right shift sign extended when it should. 17217639Sgblack@eecs.umich.edu if (srcElem1 < 0 && destElem >= 0) { 17227639Sgblack@eecs.umich.edu destElem |= -((Element)1 << (sizeof(Element) * 8 - 17237639Sgblack@eecs.umich.edu 1 - shiftAmt)); 17247639Sgblack@eecs.umich.edu } 17257639Sgblack@eecs.umich.edu } else { 17267639Sgblack@eecs.umich.edu if (shiftAmt >= sizeof(Element) * 8) { 17277639Sgblack@eecs.umich.edu destElem = 0; 17287639Sgblack@eecs.umich.edu } else { 17297639Sgblack@eecs.umich.edu destElem = srcElem1 << shiftAmt; 17307639Sgblack@eecs.umich.edu } 17317639Sgblack@eecs.umich.edu } 17327639Sgblack@eecs.umich.edu ''' 17337639Sgblack@eecs.umich.edu threeEqualRegInst("vshl", "VshlD", allTypes, 2, vshlCode) 17347639Sgblack@eecs.umich.edu threeEqualRegInst("vshl", "VshlQ", allTypes, 4, vshlCode) 17357639Sgblack@eecs.umich.edu 17367639Sgblack@eecs.umich.edu vrshlCode = ''' 17377639Sgblack@eecs.umich.edu int16_t shiftAmt = (int8_t)srcElem2; 17387639Sgblack@eecs.umich.edu if (shiftAmt < 0) { 17397639Sgblack@eecs.umich.edu shiftAmt = -shiftAmt; 17407639Sgblack@eecs.umich.edu Element rBit = 0; 17417639Sgblack@eecs.umich.edu if (shiftAmt <= sizeof(Element) * 8) 17427639Sgblack@eecs.umich.edu rBit = bits(srcElem1, shiftAmt - 1); 17437639Sgblack@eecs.umich.edu if (shiftAmt > sizeof(Element) * 8 && srcElem1 < 0) 17447639Sgblack@eecs.umich.edu rBit = 1; 17457639Sgblack@eecs.umich.edu if (shiftAmt >= sizeof(Element) * 8) { 17467639Sgblack@eecs.umich.edu shiftAmt = sizeof(Element) * 8 - 1; 17477639Sgblack@eecs.umich.edu destElem = 0; 17487639Sgblack@eecs.umich.edu } else { 17497639Sgblack@eecs.umich.edu destElem = (srcElem1 >> shiftAmt); 17507639Sgblack@eecs.umich.edu } 17517639Sgblack@eecs.umich.edu // Make sure the right shift sign extended when it should. 17527639Sgblack@eecs.umich.edu if (srcElem1 < 0 && destElem >= 0) { 17537639Sgblack@eecs.umich.edu destElem |= -((Element)1 << (sizeof(Element) * 8 - 17547639Sgblack@eecs.umich.edu 1 - shiftAmt)); 17557639Sgblack@eecs.umich.edu } 17567639Sgblack@eecs.umich.edu destElem += rBit; 17577639Sgblack@eecs.umich.edu } else if (shiftAmt > 0) { 17587639Sgblack@eecs.umich.edu if (shiftAmt >= sizeof(Element) * 8) { 17597639Sgblack@eecs.umich.edu destElem = 0; 17607639Sgblack@eecs.umich.edu } else { 17617639Sgblack@eecs.umich.edu destElem = srcElem1 << shiftAmt; 17627639Sgblack@eecs.umich.edu } 17637639Sgblack@eecs.umich.edu } else { 17647639Sgblack@eecs.umich.edu destElem = srcElem1; 17657639Sgblack@eecs.umich.edu } 17667639Sgblack@eecs.umich.edu ''' 17677639Sgblack@eecs.umich.edu threeEqualRegInst("vrshl", "VrshlD", allTypes, 2, vrshlCode) 17687639Sgblack@eecs.umich.edu threeEqualRegInst("vrshl", "VrshlQ", allTypes, 4, vrshlCode) 17697639Sgblack@eecs.umich.edu 17707639Sgblack@eecs.umich.edu vqshlUCode = ''' 17717639Sgblack@eecs.umich.edu int16_t shiftAmt = (int8_t)srcElem2; 17727639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 17737639Sgblack@eecs.umich.edu if (shiftAmt < 0) { 17747639Sgblack@eecs.umich.edu shiftAmt = -shiftAmt; 17757639Sgblack@eecs.umich.edu if (shiftAmt >= sizeof(Element) * 8) { 17767639Sgblack@eecs.umich.edu shiftAmt = sizeof(Element) * 8 - 1; 17777639Sgblack@eecs.umich.edu destElem = 0; 17787639Sgblack@eecs.umich.edu } else { 17797639Sgblack@eecs.umich.edu destElem = (srcElem1 >> shiftAmt); 17807639Sgblack@eecs.umich.edu } 17817639Sgblack@eecs.umich.edu // Make sure the right shift sign extended when it should. 17827639Sgblack@eecs.umich.edu if (srcElem1 < 0 && destElem >= 0) { 17837639Sgblack@eecs.umich.edu destElem |= -((Element)1 << (sizeof(Element) * 8 - 17847639Sgblack@eecs.umich.edu 1 - shiftAmt)); 17857639Sgblack@eecs.umich.edu } 17867639Sgblack@eecs.umich.edu } else if (shiftAmt > 0) { 17877639Sgblack@eecs.umich.edu if (shiftAmt >= sizeof(Element) * 8) { 17887639Sgblack@eecs.umich.edu if (srcElem1 != 0) { 17897639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8); 17907639Sgblack@eecs.umich.edu fpscr.qc = 1; 17917639Sgblack@eecs.umich.edu } else { 17927639Sgblack@eecs.umich.edu destElem = 0; 17937639Sgblack@eecs.umich.edu } 17947639Sgblack@eecs.umich.edu } else { 17957639Sgblack@eecs.umich.edu if (bits(srcElem1, sizeof(Element) * 8 - 1, 17967639Sgblack@eecs.umich.edu sizeof(Element) * 8 - shiftAmt)) { 17977639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8); 17987639Sgblack@eecs.umich.edu fpscr.qc = 1; 17997639Sgblack@eecs.umich.edu } else { 18007639Sgblack@eecs.umich.edu destElem = srcElem1 << shiftAmt; 18017639Sgblack@eecs.umich.edu } 18027639Sgblack@eecs.umich.edu } 18037639Sgblack@eecs.umich.edu } else { 18047639Sgblack@eecs.umich.edu destElem = srcElem1; 18057639Sgblack@eecs.umich.edu } 18067639Sgblack@eecs.umich.edu Fpscr = fpscr; 18077639Sgblack@eecs.umich.edu ''' 18087639Sgblack@eecs.umich.edu threeEqualRegInst("vqshl", "VqshlUD", unsignedTypes, 2, vqshlUCode) 18097639Sgblack@eecs.umich.edu threeEqualRegInst("vqshl", "VqshlUQ", unsignedTypes, 4, vqshlUCode) 18107639Sgblack@eecs.umich.edu 18117639Sgblack@eecs.umich.edu vqshlSCode = ''' 18127639Sgblack@eecs.umich.edu int16_t shiftAmt = (int8_t)srcElem2; 18137639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 18147639Sgblack@eecs.umich.edu if (shiftAmt < 0) { 18157639Sgblack@eecs.umich.edu shiftAmt = -shiftAmt; 18167639Sgblack@eecs.umich.edu if (shiftAmt >= sizeof(Element) * 8) { 18177639Sgblack@eecs.umich.edu shiftAmt = sizeof(Element) * 8 - 1; 18187639Sgblack@eecs.umich.edu destElem = 0; 18197639Sgblack@eecs.umich.edu } else { 18207639Sgblack@eecs.umich.edu destElem = (srcElem1 >> shiftAmt); 18217639Sgblack@eecs.umich.edu } 18227639Sgblack@eecs.umich.edu // Make sure the right shift sign extended when it should. 18237639Sgblack@eecs.umich.edu if (srcElem1 < 0 && destElem >= 0) { 18247639Sgblack@eecs.umich.edu destElem |= -((Element)1 << (sizeof(Element) * 8 - 18257639Sgblack@eecs.umich.edu 1 - shiftAmt)); 18267639Sgblack@eecs.umich.edu } 18277639Sgblack@eecs.umich.edu } else if (shiftAmt > 0) { 18287639Sgblack@eecs.umich.edu bool sat = false; 18297639Sgblack@eecs.umich.edu if (shiftAmt >= sizeof(Element) * 8) { 18307639Sgblack@eecs.umich.edu if (srcElem1 != 0) 18317639Sgblack@eecs.umich.edu sat = true; 18327639Sgblack@eecs.umich.edu else 18337639Sgblack@eecs.umich.edu destElem = 0; 18347639Sgblack@eecs.umich.edu } else { 18357639Sgblack@eecs.umich.edu if (bits(srcElem1, sizeof(Element) * 8 - 1, 18367639Sgblack@eecs.umich.edu sizeof(Element) * 8 - 1 - shiftAmt) != 18377639Sgblack@eecs.umich.edu ((srcElem1 < 0) ? mask(shiftAmt + 1) : 0)) { 18387639Sgblack@eecs.umich.edu sat = true; 18397639Sgblack@eecs.umich.edu } else { 18407639Sgblack@eecs.umich.edu destElem = srcElem1 << shiftAmt; 18417639Sgblack@eecs.umich.edu } 18427639Sgblack@eecs.umich.edu } 18437639Sgblack@eecs.umich.edu if (sat) { 18447639Sgblack@eecs.umich.edu fpscr.qc = 1; 18457639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8 - 1); 18467639Sgblack@eecs.umich.edu if (srcElem1 < 0) 18477639Sgblack@eecs.umich.edu destElem = ~destElem; 18487639Sgblack@eecs.umich.edu } 18497639Sgblack@eecs.umich.edu } else { 18507639Sgblack@eecs.umich.edu destElem = srcElem1; 18517639Sgblack@eecs.umich.edu } 18527639Sgblack@eecs.umich.edu Fpscr = fpscr; 18537639Sgblack@eecs.umich.edu ''' 18547639Sgblack@eecs.umich.edu threeEqualRegInst("vqshl", "VqshlSD", signedTypes, 2, vqshlSCode) 18557639Sgblack@eecs.umich.edu threeEqualRegInst("vqshl", "VqshlSQ", signedTypes, 4, vqshlSCode) 18567639Sgblack@eecs.umich.edu 18577639Sgblack@eecs.umich.edu vqrshlUCode = ''' 18587639Sgblack@eecs.umich.edu int16_t shiftAmt = (int8_t)srcElem2; 18597639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 18607639Sgblack@eecs.umich.edu if (shiftAmt < 0) { 18617639Sgblack@eecs.umich.edu shiftAmt = -shiftAmt; 18627639Sgblack@eecs.umich.edu Element rBit = 0; 18637639Sgblack@eecs.umich.edu if (shiftAmt <= sizeof(Element) * 8) 18647639Sgblack@eecs.umich.edu rBit = bits(srcElem1, shiftAmt - 1); 18657639Sgblack@eecs.umich.edu if (shiftAmt > sizeof(Element) * 8 && srcElem1 < 0) 18667639Sgblack@eecs.umich.edu rBit = 1; 18677639Sgblack@eecs.umich.edu if (shiftAmt >= sizeof(Element) * 8) { 18687639Sgblack@eecs.umich.edu shiftAmt = sizeof(Element) * 8 - 1; 18697639Sgblack@eecs.umich.edu destElem = 0; 18707639Sgblack@eecs.umich.edu } else { 18717639Sgblack@eecs.umich.edu destElem = (srcElem1 >> shiftAmt); 18727639Sgblack@eecs.umich.edu } 18737639Sgblack@eecs.umich.edu // Make sure the right shift sign extended when it should. 18747639Sgblack@eecs.umich.edu if (srcElem1 < 0 && destElem >= 0) { 18757639Sgblack@eecs.umich.edu destElem |= -((Element)1 << (sizeof(Element) * 8 - 18767639Sgblack@eecs.umich.edu 1 - shiftAmt)); 18777639Sgblack@eecs.umich.edu } 18787639Sgblack@eecs.umich.edu destElem += rBit; 18797639Sgblack@eecs.umich.edu } else { 18807639Sgblack@eecs.umich.edu if (shiftAmt >= sizeof(Element) * 8) { 18817639Sgblack@eecs.umich.edu if (srcElem1 != 0) { 18827639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8); 18837639Sgblack@eecs.umich.edu fpscr.qc = 1; 18847639Sgblack@eecs.umich.edu } else { 18857639Sgblack@eecs.umich.edu destElem = 0; 18867639Sgblack@eecs.umich.edu } 18877639Sgblack@eecs.umich.edu } else { 18887639Sgblack@eecs.umich.edu if (bits(srcElem1, sizeof(Element) * 8 - 1, 18897639Sgblack@eecs.umich.edu sizeof(Element) * 8 - shiftAmt)) { 18907639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8); 18917639Sgblack@eecs.umich.edu fpscr.qc = 1; 18927639Sgblack@eecs.umich.edu } else { 18937639Sgblack@eecs.umich.edu destElem = srcElem1 << shiftAmt; 18947639Sgblack@eecs.umich.edu } 18957639Sgblack@eecs.umich.edu } 18967639Sgblack@eecs.umich.edu } 18977639Sgblack@eecs.umich.edu Fpscr = fpscr; 18987639Sgblack@eecs.umich.edu ''' 18997639Sgblack@eecs.umich.edu threeEqualRegInst("vqrshl", "VqrshlUD", unsignedTypes, 2, vqrshlUCode) 19007639Sgblack@eecs.umich.edu threeEqualRegInst("vqrshl", "VqrshlUQ", unsignedTypes, 4, vqrshlUCode) 19017639Sgblack@eecs.umich.edu 19027639Sgblack@eecs.umich.edu vqrshlSCode = ''' 19037639Sgblack@eecs.umich.edu int16_t shiftAmt = (int8_t)srcElem2; 19047639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 19057639Sgblack@eecs.umich.edu if (shiftAmt < 0) { 19067639Sgblack@eecs.umich.edu shiftAmt = -shiftAmt; 19077639Sgblack@eecs.umich.edu Element rBit = 0; 19087639Sgblack@eecs.umich.edu if (shiftAmt <= sizeof(Element) * 8) 19097639Sgblack@eecs.umich.edu rBit = bits(srcElem1, shiftAmt - 1); 19107639Sgblack@eecs.umich.edu if (shiftAmt > sizeof(Element) * 8 && srcElem1 < 0) 19117639Sgblack@eecs.umich.edu rBit = 1; 19127639Sgblack@eecs.umich.edu if (shiftAmt >= sizeof(Element) * 8) { 19137639Sgblack@eecs.umich.edu shiftAmt = sizeof(Element) * 8 - 1; 19147639Sgblack@eecs.umich.edu destElem = 0; 19157639Sgblack@eecs.umich.edu } else { 19167639Sgblack@eecs.umich.edu destElem = (srcElem1 >> shiftAmt); 19177639Sgblack@eecs.umich.edu } 19187639Sgblack@eecs.umich.edu // Make sure the right shift sign extended when it should. 19197639Sgblack@eecs.umich.edu if (srcElem1 < 0 && destElem >= 0) { 19207639Sgblack@eecs.umich.edu destElem |= -((Element)1 << (sizeof(Element) * 8 - 19217639Sgblack@eecs.umich.edu 1 - shiftAmt)); 19227639Sgblack@eecs.umich.edu } 19237639Sgblack@eecs.umich.edu destElem += rBit; 19247639Sgblack@eecs.umich.edu } else if (shiftAmt > 0) { 19257639Sgblack@eecs.umich.edu bool sat = false; 19267639Sgblack@eecs.umich.edu if (shiftAmt >= sizeof(Element) * 8) { 19277639Sgblack@eecs.umich.edu if (srcElem1 != 0) 19287639Sgblack@eecs.umich.edu sat = true; 19297639Sgblack@eecs.umich.edu else 19307639Sgblack@eecs.umich.edu destElem = 0; 19317639Sgblack@eecs.umich.edu } else { 19327639Sgblack@eecs.umich.edu if (bits(srcElem1, sizeof(Element) * 8 - 1, 19337639Sgblack@eecs.umich.edu sizeof(Element) * 8 - 1 - shiftAmt) != 19347639Sgblack@eecs.umich.edu ((srcElem1 < 0) ? mask(shiftAmt + 1) : 0)) { 19357639Sgblack@eecs.umich.edu sat = true; 19367639Sgblack@eecs.umich.edu } else { 19377639Sgblack@eecs.umich.edu destElem = srcElem1 << shiftAmt; 19387639Sgblack@eecs.umich.edu } 19397639Sgblack@eecs.umich.edu } 19407639Sgblack@eecs.umich.edu if (sat) { 19417639Sgblack@eecs.umich.edu fpscr.qc = 1; 19427639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8 - 1); 19437639Sgblack@eecs.umich.edu if (srcElem1 < 0) 19447639Sgblack@eecs.umich.edu destElem = ~destElem; 19457639Sgblack@eecs.umich.edu } 19467639Sgblack@eecs.umich.edu } else { 19477639Sgblack@eecs.umich.edu destElem = srcElem1; 19487639Sgblack@eecs.umich.edu } 19497639Sgblack@eecs.umich.edu Fpscr = fpscr; 19507639Sgblack@eecs.umich.edu ''' 19517639Sgblack@eecs.umich.edu threeEqualRegInst("vqrshl", "VqrshlSD", signedTypes, 2, vqrshlSCode) 19527639Sgblack@eecs.umich.edu threeEqualRegInst("vqrshl", "VqrshlSQ", signedTypes, 4, vqrshlSCode) 19537639Sgblack@eecs.umich.edu 19547639Sgblack@eecs.umich.edu vabaCode = ''' 19557639Sgblack@eecs.umich.edu destElem += (srcElem1 > srcElem2) ? (srcElem1 - srcElem2) : 19567639Sgblack@eecs.umich.edu (srcElem2 - srcElem1); 19577639Sgblack@eecs.umich.edu ''' 19587639Sgblack@eecs.umich.edu threeEqualRegInst("vaba", "VabaD", allTypes, 2, vabaCode, True) 19597639Sgblack@eecs.umich.edu threeEqualRegInst("vaba", "VabaQ", allTypes, 4, vabaCode, True) 19607639Sgblack@eecs.umich.edu vabalCode = ''' 19617639Sgblack@eecs.umich.edu destElem += (srcElem1 > srcElem2) ? 19627639Sgblack@eecs.umich.edu ((BigElement)srcElem1 - (BigElement)srcElem2) : 19637639Sgblack@eecs.umich.edu ((BigElement)srcElem2 - (BigElement)srcElem1); 19647639Sgblack@eecs.umich.edu ''' 19657639Sgblack@eecs.umich.edu threeRegLongInst("vabal", "Vabal", smallTypes, vabalCode, True) 19667639Sgblack@eecs.umich.edu 19677639Sgblack@eecs.umich.edu vabdCode = ''' 19687639Sgblack@eecs.umich.edu destElem = (srcElem1 > srcElem2) ? (srcElem1 - srcElem2) : 19697639Sgblack@eecs.umich.edu (srcElem2 - srcElem1); 19707639Sgblack@eecs.umich.edu ''' 19717639Sgblack@eecs.umich.edu threeEqualRegInst("vabd", "VabdD", allTypes, 2, vabdCode) 19727639Sgblack@eecs.umich.edu threeEqualRegInst("vabd", "VabdQ", allTypes, 4, vabdCode) 19737639Sgblack@eecs.umich.edu vabdlCode = ''' 19747639Sgblack@eecs.umich.edu destElem = (srcElem1 > srcElem2) ? 19757639Sgblack@eecs.umich.edu ((BigElement)srcElem1 - (BigElement)srcElem2) : 19767639Sgblack@eecs.umich.edu ((BigElement)srcElem2 - (BigElement)srcElem1); 19777639Sgblack@eecs.umich.edu ''' 19787639Sgblack@eecs.umich.edu threeRegLongInst("vabdl", "Vabdl", smallTypes, vabdlCode) 19797639Sgblack@eecs.umich.edu 19807639Sgblack@eecs.umich.edu vtstCode = ''' 19817639Sgblack@eecs.umich.edu destElem = (srcElem1 & srcElem2) ? (Element)(-1) : 0; 19827639Sgblack@eecs.umich.edu ''' 19837639Sgblack@eecs.umich.edu threeEqualRegInst("vtst", "VtstD", unsignedTypes, 2, vtstCode) 19847639Sgblack@eecs.umich.edu threeEqualRegInst("vtst", "VtstQ", unsignedTypes, 4, vtstCode) 19857639Sgblack@eecs.umich.edu 19867639Sgblack@eecs.umich.edu vmulCode = ''' 19877639Sgblack@eecs.umich.edu destElem = srcElem1 * srcElem2; 19887639Sgblack@eecs.umich.edu ''' 19897639Sgblack@eecs.umich.edu threeEqualRegInst("vmul", "NVmulD", allTypes, 2, vmulCode) 19907639Sgblack@eecs.umich.edu threeEqualRegInst("vmul", "NVmulQ", allTypes, 4, vmulCode) 19917639Sgblack@eecs.umich.edu vmullCode = ''' 19927639Sgblack@eecs.umich.edu destElem = (BigElement)srcElem1 * (BigElement)srcElem2; 19937639Sgblack@eecs.umich.edu ''' 19947639Sgblack@eecs.umich.edu threeRegLongInst("vmull", "Vmull", smallTypes, vmullCode) 19957639Sgblack@eecs.umich.edu 19967639Sgblack@eecs.umich.edu vmlaCode = ''' 19977639Sgblack@eecs.umich.edu destElem = destElem + srcElem1 * srcElem2; 19987639Sgblack@eecs.umich.edu ''' 19997639Sgblack@eecs.umich.edu threeEqualRegInst("vmla", "NVmlaD", allTypes, 2, vmlaCode, True) 20007639Sgblack@eecs.umich.edu threeEqualRegInst("vmla", "NVmlaQ", allTypes, 4, vmlaCode, True) 20017639Sgblack@eecs.umich.edu vmlalCode = ''' 20027639Sgblack@eecs.umich.edu destElem = destElem + (BigElement)srcElem1 * (BigElement)srcElem2; 20037639Sgblack@eecs.umich.edu ''' 20047639Sgblack@eecs.umich.edu threeRegLongInst("vmlal", "Vmlal", smallTypes, vmlalCode, True) 20057639Sgblack@eecs.umich.edu 20067639Sgblack@eecs.umich.edu vqdmlalCode = ''' 20077639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 20087639Sgblack@eecs.umich.edu BigElement midElem = (2 * (int64_t)srcElem1 * (int64_t)srcElem2); 20097639Sgblack@eecs.umich.edu Element maxNeg = (Element)1 << (sizeof(Element) * 8 - 1); 20107639Sgblack@eecs.umich.edu Element halfNeg = maxNeg / 2; 20117639Sgblack@eecs.umich.edu if ((srcElem1 == maxNeg && srcElem2 == maxNeg) || 20127639Sgblack@eecs.umich.edu (srcElem1 == halfNeg && srcElem2 == maxNeg) || 20137639Sgblack@eecs.umich.edu (srcElem1 == maxNeg && srcElem2 == halfNeg)) { 20147639Sgblack@eecs.umich.edu midElem = ~((BigElement)maxNeg << (sizeof(Element) * 8)); 20157639Sgblack@eecs.umich.edu fpscr.qc = 1; 20167639Sgblack@eecs.umich.edu } 20177639Sgblack@eecs.umich.edu bool negPreDest = (destElem < 0); 20187639Sgblack@eecs.umich.edu destElem += midElem; 20197639Sgblack@eecs.umich.edu bool negDest = (destElem < 0); 20207639Sgblack@eecs.umich.edu bool negMid = (midElem < 0); 20217639Sgblack@eecs.umich.edu if (negPreDest == negMid && negMid != negDest) { 20227639Sgblack@eecs.umich.edu destElem = mask(sizeof(BigElement) * 8 - 1); 20237639Sgblack@eecs.umich.edu if (negPreDest) 20247639Sgblack@eecs.umich.edu destElem = ~destElem; 20257639Sgblack@eecs.umich.edu fpscr.qc = 1; 20267639Sgblack@eecs.umich.edu } 20277639Sgblack@eecs.umich.edu Fpscr = fpscr; 20287639Sgblack@eecs.umich.edu ''' 20297639Sgblack@eecs.umich.edu threeRegLongInst("vqdmlal", "Vqdmlal", smallTypes, vqdmlalCode, True) 20307639Sgblack@eecs.umich.edu 20317639Sgblack@eecs.umich.edu vqdmlslCode = ''' 20327639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 20337639Sgblack@eecs.umich.edu BigElement midElem = (2 * (int64_t)srcElem1 * (int64_t)srcElem2); 20347639Sgblack@eecs.umich.edu Element maxNeg = (Element)1 << (sizeof(Element) * 8 - 1); 20357639Sgblack@eecs.umich.edu Element halfNeg = maxNeg / 2; 20367639Sgblack@eecs.umich.edu if ((srcElem1 == maxNeg && srcElem2 == maxNeg) || 20377639Sgblack@eecs.umich.edu (srcElem1 == halfNeg && srcElem2 == maxNeg) || 20387639Sgblack@eecs.umich.edu (srcElem1 == maxNeg && srcElem2 == halfNeg)) { 20397639Sgblack@eecs.umich.edu midElem = ~((BigElement)maxNeg << (sizeof(Element) * 8)); 20407639Sgblack@eecs.umich.edu fpscr.qc = 1; 20417639Sgblack@eecs.umich.edu } 20427639Sgblack@eecs.umich.edu bool negPreDest = (destElem < 0); 20437639Sgblack@eecs.umich.edu destElem -= midElem; 20447639Sgblack@eecs.umich.edu bool negDest = (destElem < 0); 20457639Sgblack@eecs.umich.edu bool posMid = (midElem > 0); 20467639Sgblack@eecs.umich.edu if (negPreDest == posMid && posMid != negDest) { 20477639Sgblack@eecs.umich.edu destElem = mask(sizeof(BigElement) * 8 - 1); 20487639Sgblack@eecs.umich.edu if (negPreDest) 20497639Sgblack@eecs.umich.edu destElem = ~destElem; 20507639Sgblack@eecs.umich.edu fpscr.qc = 1; 20517639Sgblack@eecs.umich.edu } 20527639Sgblack@eecs.umich.edu Fpscr = fpscr; 20537639Sgblack@eecs.umich.edu ''' 20547639Sgblack@eecs.umich.edu threeRegLongInst("vqdmlsl", "Vqdmlsl", smallTypes, vqdmlslCode, True) 20557639Sgblack@eecs.umich.edu 20567639Sgblack@eecs.umich.edu vqdmullCode = ''' 20577639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 20587639Sgblack@eecs.umich.edu destElem = (2 * (int64_t)srcElem1 * (int64_t)srcElem2); 20597639Sgblack@eecs.umich.edu if (srcElem1 == srcElem2 && 20607639Sgblack@eecs.umich.edu srcElem1 == (Element)((Element)1 << 20617639Sgblack@eecs.umich.edu (Element)(sizeof(Element) * 8 - 1))) { 20627639Sgblack@eecs.umich.edu destElem = ~((BigElement)srcElem1 << (sizeof(Element) * 8)); 20637639Sgblack@eecs.umich.edu fpscr.qc = 1; 20647639Sgblack@eecs.umich.edu } 20657639Sgblack@eecs.umich.edu Fpscr = fpscr; 20667639Sgblack@eecs.umich.edu ''' 20677639Sgblack@eecs.umich.edu threeRegLongInst("vqdmull", "Vqdmull", smallTypes, vqdmullCode) 20687639Sgblack@eecs.umich.edu 20697639Sgblack@eecs.umich.edu vmlsCode = ''' 20707639Sgblack@eecs.umich.edu destElem = destElem - srcElem1 * srcElem2; 20717639Sgblack@eecs.umich.edu ''' 20727639Sgblack@eecs.umich.edu threeEqualRegInst("vmls", "NVmlsD", allTypes, 2, vmlsCode, True) 20737639Sgblack@eecs.umich.edu threeEqualRegInst("vmls", "NVmlsQ", allTypes, 4, vmlsCode, True) 20747639Sgblack@eecs.umich.edu vmlslCode = ''' 20757639Sgblack@eecs.umich.edu destElem = destElem - (BigElement)srcElem1 * (BigElement)srcElem2; 20767639Sgblack@eecs.umich.edu ''' 20777639Sgblack@eecs.umich.edu threeRegLongInst("vmlsl", "Vmlsl", smallTypes, vmlslCode, True) 20787639Sgblack@eecs.umich.edu 20797639Sgblack@eecs.umich.edu vmulpCode = ''' 20807639Sgblack@eecs.umich.edu destElem = 0; 20817639Sgblack@eecs.umich.edu for (unsigned j = 0; j < sizeof(Element) * 8; j++) { 20827639Sgblack@eecs.umich.edu if (bits(srcElem2, j)) 20837639Sgblack@eecs.umich.edu destElem ^= srcElem1 << j; 20847639Sgblack@eecs.umich.edu } 20857639Sgblack@eecs.umich.edu ''' 20867639Sgblack@eecs.umich.edu threeEqualRegInst("vmul", "NVmulpD", unsignedTypes, 2, vmulpCode) 20877639Sgblack@eecs.umich.edu threeEqualRegInst("vmul", "NVmulpQ", unsignedTypes, 4, vmulpCode) 20887639Sgblack@eecs.umich.edu vmullpCode = ''' 20897639Sgblack@eecs.umich.edu destElem = 0; 20907639Sgblack@eecs.umich.edu for (unsigned j = 0; j < sizeof(Element) * 8; j++) { 20917639Sgblack@eecs.umich.edu if (bits(srcElem2, j)) 20927639Sgblack@eecs.umich.edu destElem ^= (BigElement)srcElem1 << j; 20937639Sgblack@eecs.umich.edu } 20947639Sgblack@eecs.umich.edu ''' 20957639Sgblack@eecs.umich.edu threeRegLongInst("vmull", "Vmullp", smallUnsignedTypes, vmullpCode) 20967639Sgblack@eecs.umich.edu 20977639Sgblack@eecs.umich.edu threeEqualRegInst("vpmax", "VpmaxD", allTypes, 2, vmaxCode, pairwise=True) 20987639Sgblack@eecs.umich.edu threeEqualRegInst("vpmax", "VpmaxQ", allTypes, 4, vmaxCode, pairwise=True) 20997639Sgblack@eecs.umich.edu 21007639Sgblack@eecs.umich.edu threeEqualRegInst("vpmin", "VpminD", allTypes, 2, vminCode, pairwise=True) 21017639Sgblack@eecs.umich.edu threeEqualRegInst("vpmin", "VpminQ", allTypes, 4, vminCode, pairwise=True) 21027639Sgblack@eecs.umich.edu 21037639Sgblack@eecs.umich.edu vqdmulhCode = ''' 21047639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 21057639Sgblack@eecs.umich.edu destElem = (2 * (int64_t)srcElem1 * (int64_t)srcElem2) >> 21067639Sgblack@eecs.umich.edu (sizeof(Element) * 8); 21077639Sgblack@eecs.umich.edu if (srcElem1 == srcElem2 && 21087639Sgblack@eecs.umich.edu srcElem1 == (Element)((Element)1 << 21097639Sgblack@eecs.umich.edu (sizeof(Element) * 8 - 1))) { 21107639Sgblack@eecs.umich.edu destElem = ~srcElem1; 21117639Sgblack@eecs.umich.edu fpscr.qc = 1; 21127639Sgblack@eecs.umich.edu } 21137639Sgblack@eecs.umich.edu Fpscr = fpscr; 21147639Sgblack@eecs.umich.edu ''' 21157639Sgblack@eecs.umich.edu threeEqualRegInst("vqdmulh", "VqdmulhD", smallSignedTypes, 2, vqdmulhCode) 21167639Sgblack@eecs.umich.edu threeEqualRegInst("vqdmulh", "VqdmulhQ", smallSignedTypes, 4, vqdmulhCode) 21177639Sgblack@eecs.umich.edu 21187639Sgblack@eecs.umich.edu vqrdmulhCode = ''' 21197639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 21207639Sgblack@eecs.umich.edu destElem = (2 * (int64_t)srcElem1 * (int64_t)srcElem2 + 21217639Sgblack@eecs.umich.edu ((int64_t)1 << (sizeof(Element) * 8 - 1))) >> 21227639Sgblack@eecs.umich.edu (sizeof(Element) * 8); 21237639Sgblack@eecs.umich.edu Element maxNeg = (Element)1 << (sizeof(Element) * 8 - 1); 21247639Sgblack@eecs.umich.edu Element halfNeg = maxNeg / 2; 21257639Sgblack@eecs.umich.edu if ((srcElem1 == maxNeg && srcElem2 == maxNeg) || 21267639Sgblack@eecs.umich.edu (srcElem1 == halfNeg && srcElem2 == maxNeg) || 21277639Sgblack@eecs.umich.edu (srcElem1 == maxNeg && srcElem2 == halfNeg)) { 21287639Sgblack@eecs.umich.edu if (destElem < 0) { 21297639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8 - 1); 21307639Sgblack@eecs.umich.edu } else { 21317639Sgblack@eecs.umich.edu destElem = (Element)1 << (sizeof(Element) * 8 - 1); 21327639Sgblack@eecs.umich.edu } 21337639Sgblack@eecs.umich.edu fpscr.qc = 1; 21347639Sgblack@eecs.umich.edu } 21357639Sgblack@eecs.umich.edu Fpscr = fpscr; 21367639Sgblack@eecs.umich.edu ''' 21377639Sgblack@eecs.umich.edu threeEqualRegInst("vqrdmulh", "VqrdmulhD", 21387639Sgblack@eecs.umich.edu smallSignedTypes, 2, vqrdmulhCode) 21397639Sgblack@eecs.umich.edu threeEqualRegInst("vqrdmulh", "VqrdmulhQ", 21407639Sgblack@eecs.umich.edu smallSignedTypes, 4, vqrdmulhCode) 21417639Sgblack@eecs.umich.edu 21427639Sgblack@eecs.umich.edu vmaxfpCode = ''' 21437639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 21447639Sgblack@eecs.umich.edu bool done; 21457639Sgblack@eecs.umich.edu destReg = processNans(fpscr, done, true, srcReg1, srcReg2); 21467639Sgblack@eecs.umich.edu if (!done) { 21477639Sgblack@eecs.umich.edu destReg = binaryOp(fpscr, srcReg1, srcReg2, fpMaxS, 21487639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 21497639Sgblack@eecs.umich.edu } else if (flushToZero(srcReg1, srcReg2)) { 21507639Sgblack@eecs.umich.edu fpscr.idc = 1; 21517639Sgblack@eecs.umich.edu } 21527639Sgblack@eecs.umich.edu Fpscr = fpscr; 21537639Sgblack@eecs.umich.edu ''' 21547639Sgblack@eecs.umich.edu threeEqualRegInstFp("vmax", "VmaxDFp", ("float",), 2, vmaxfpCode) 21557639Sgblack@eecs.umich.edu threeEqualRegInstFp("vmax", "VmaxQFp", ("float",), 4, vmaxfpCode) 21567639Sgblack@eecs.umich.edu 21577639Sgblack@eecs.umich.edu vminfpCode = ''' 21587639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 21597639Sgblack@eecs.umich.edu bool done; 21607639Sgblack@eecs.umich.edu destReg = processNans(fpscr, done, true, srcReg1, srcReg2); 21617639Sgblack@eecs.umich.edu if (!done) { 21627639Sgblack@eecs.umich.edu destReg = binaryOp(fpscr, srcReg1, srcReg2, fpMinS, 21637639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 21647639Sgblack@eecs.umich.edu } else if (flushToZero(srcReg1, srcReg2)) { 21657639Sgblack@eecs.umich.edu fpscr.idc = 1; 21667639Sgblack@eecs.umich.edu } 21677639Sgblack@eecs.umich.edu Fpscr = fpscr; 21687639Sgblack@eecs.umich.edu ''' 21697639Sgblack@eecs.umich.edu threeEqualRegInstFp("vmin", "VminDFp", ("float",), 2, vminfpCode) 21707639Sgblack@eecs.umich.edu threeEqualRegInstFp("vmin", "VminQFp", ("float",), 4, vminfpCode) 21717639Sgblack@eecs.umich.edu 21727639Sgblack@eecs.umich.edu threeEqualRegInstFp("vpmax", "VpmaxDFp", ("float",), 21737639Sgblack@eecs.umich.edu 2, vmaxfpCode, pairwise=True) 21747639Sgblack@eecs.umich.edu threeEqualRegInstFp("vpmax", "VpmaxQFp", ("float",), 21757639Sgblack@eecs.umich.edu 4, vmaxfpCode, pairwise=True) 21767639Sgblack@eecs.umich.edu 21777639Sgblack@eecs.umich.edu threeEqualRegInstFp("vpmin", "VpminDFp", ("float",), 21787639Sgblack@eecs.umich.edu 2, vminfpCode, pairwise=True) 21797639Sgblack@eecs.umich.edu threeEqualRegInstFp("vpmin", "VpminQFp", ("float",), 21807639Sgblack@eecs.umich.edu 4, vminfpCode, pairwise=True) 21817639Sgblack@eecs.umich.edu 21827639Sgblack@eecs.umich.edu vaddfpCode = ''' 21837639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 21847639Sgblack@eecs.umich.edu destReg = binaryOp(fpscr, srcReg1, srcReg2, fpAddS, 21857639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 21867639Sgblack@eecs.umich.edu Fpscr = fpscr; 21877639Sgblack@eecs.umich.edu ''' 21887639Sgblack@eecs.umich.edu threeEqualRegInstFp("vadd", "VaddDFp", ("float",), 2, vaddfpCode) 21897639Sgblack@eecs.umich.edu threeEqualRegInstFp("vadd", "VaddQFp", ("float",), 4, vaddfpCode) 21907639Sgblack@eecs.umich.edu 21917639Sgblack@eecs.umich.edu threeEqualRegInstFp("vpadd", "VpaddDFp", ("float",), 21927639Sgblack@eecs.umich.edu 2, vaddfpCode, pairwise=True) 21937639Sgblack@eecs.umich.edu threeEqualRegInstFp("vpadd", "VpaddQFp", ("float",), 21947639Sgblack@eecs.umich.edu 4, vaddfpCode, pairwise=True) 21957639Sgblack@eecs.umich.edu 21967639Sgblack@eecs.umich.edu vsubfpCode = ''' 21977639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 21987639Sgblack@eecs.umich.edu destReg = binaryOp(fpscr, srcReg1, srcReg2, fpSubS, 21997639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 22007639Sgblack@eecs.umich.edu Fpscr = fpscr; 22017639Sgblack@eecs.umich.edu ''' 22027639Sgblack@eecs.umich.edu threeEqualRegInstFp("vsub", "VsubDFp", ("float",), 2, vsubfpCode) 22037639Sgblack@eecs.umich.edu threeEqualRegInstFp("vsub", "VsubQFp", ("float",), 4, vsubfpCode) 22047639Sgblack@eecs.umich.edu 22057639Sgblack@eecs.umich.edu vmulfpCode = ''' 22067639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 22077639Sgblack@eecs.umich.edu destReg = binaryOp(fpscr, srcReg1, srcReg2, fpMulS, 22087639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 22097639Sgblack@eecs.umich.edu Fpscr = fpscr; 22107639Sgblack@eecs.umich.edu ''' 22117639Sgblack@eecs.umich.edu threeEqualRegInstFp("vmul", "NVmulDFp", ("float",), 2, vmulfpCode) 22127639Sgblack@eecs.umich.edu threeEqualRegInstFp("vmul", "NVmulQFp", ("float",), 4, vmulfpCode) 22137639Sgblack@eecs.umich.edu 22147639Sgblack@eecs.umich.edu vmlafpCode = ''' 22157639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 22167639Sgblack@eecs.umich.edu float mid = binaryOp(fpscr, srcReg1, srcReg2, fpMulS, 22177639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 22187639Sgblack@eecs.umich.edu destReg = binaryOp(fpscr, mid, destReg, fpAddS, 22197639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 22207639Sgblack@eecs.umich.edu Fpscr = fpscr; 22217639Sgblack@eecs.umich.edu ''' 22227639Sgblack@eecs.umich.edu threeEqualRegInstFp("vmla", "NVmlaDFp", ("float",), 2, vmlafpCode, True) 22237639Sgblack@eecs.umich.edu threeEqualRegInstFp("vmla", "NVmlaQFp", ("float",), 4, vmlafpCode, True) 22247639Sgblack@eecs.umich.edu 22257639Sgblack@eecs.umich.edu vmlsfpCode = ''' 22267639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 22277639Sgblack@eecs.umich.edu float mid = binaryOp(fpscr, srcReg1, srcReg2, fpMulS, 22287639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 22297639Sgblack@eecs.umich.edu destReg = binaryOp(fpscr, destReg, mid, fpSubS, 22307639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 22317639Sgblack@eecs.umich.edu Fpscr = fpscr; 22327639Sgblack@eecs.umich.edu ''' 22337639Sgblack@eecs.umich.edu threeEqualRegInstFp("vmls", "NVmlsDFp", ("float",), 2, vmlsfpCode, True) 22347639Sgblack@eecs.umich.edu threeEqualRegInstFp("vmls", "NVmlsQFp", ("float",), 4, vmlsfpCode, True) 22357639Sgblack@eecs.umich.edu 22367639Sgblack@eecs.umich.edu vcgtfpCode = ''' 22377639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 22387639Sgblack@eecs.umich.edu float res = binaryOp(fpscr, srcReg1, srcReg2, vcgtFunc, 22397639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 22407639Sgblack@eecs.umich.edu destReg = (res == 0) ? -1 : 0; 22417639Sgblack@eecs.umich.edu if (res == 2.0) 22427639Sgblack@eecs.umich.edu fpscr.ioc = 1; 22437639Sgblack@eecs.umich.edu Fpscr = fpscr; 22447639Sgblack@eecs.umich.edu ''' 22457639Sgblack@eecs.umich.edu threeEqualRegInstFp("vcgt", "VcgtDFp", ("float",), 22467639Sgblack@eecs.umich.edu 2, vcgtfpCode, toInt = True) 22477639Sgblack@eecs.umich.edu threeEqualRegInstFp("vcgt", "VcgtQFp", ("float",), 22487639Sgblack@eecs.umich.edu 4, vcgtfpCode, toInt = True) 22497639Sgblack@eecs.umich.edu 22507639Sgblack@eecs.umich.edu vcgefpCode = ''' 22517639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 22527639Sgblack@eecs.umich.edu float res = binaryOp(fpscr, srcReg1, srcReg2, vcgeFunc, 22537639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 22547639Sgblack@eecs.umich.edu destReg = (res == 0) ? -1 : 0; 22557639Sgblack@eecs.umich.edu if (res == 2.0) 22567639Sgblack@eecs.umich.edu fpscr.ioc = 1; 22577639Sgblack@eecs.umich.edu Fpscr = fpscr; 22587639Sgblack@eecs.umich.edu ''' 22597639Sgblack@eecs.umich.edu threeEqualRegInstFp("vcge", "VcgeDFp", ("float",), 22607639Sgblack@eecs.umich.edu 2, vcgefpCode, toInt = True) 22617639Sgblack@eecs.umich.edu threeEqualRegInstFp("vcge", "VcgeQFp", ("float",), 22627639Sgblack@eecs.umich.edu 4, vcgefpCode, toInt = True) 22637639Sgblack@eecs.umich.edu 22647639Sgblack@eecs.umich.edu vacgtfpCode = ''' 22657639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 22667639Sgblack@eecs.umich.edu float res = binaryOp(fpscr, srcReg1, srcReg2, vacgtFunc, 22677639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 22687639Sgblack@eecs.umich.edu destReg = (res == 0) ? -1 : 0; 22697639Sgblack@eecs.umich.edu if (res == 2.0) 22707639Sgblack@eecs.umich.edu fpscr.ioc = 1; 22717639Sgblack@eecs.umich.edu Fpscr = fpscr; 22727639Sgblack@eecs.umich.edu ''' 22737639Sgblack@eecs.umich.edu threeEqualRegInstFp("vacgt", "VacgtDFp", ("float",), 22747639Sgblack@eecs.umich.edu 2, vacgtfpCode, toInt = True) 22757639Sgblack@eecs.umich.edu threeEqualRegInstFp("vacgt", "VacgtQFp", ("float",), 22767639Sgblack@eecs.umich.edu 4, vacgtfpCode, toInt = True) 22777639Sgblack@eecs.umich.edu 22787639Sgblack@eecs.umich.edu vacgefpCode = ''' 22797639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 22807639Sgblack@eecs.umich.edu float res = binaryOp(fpscr, srcReg1, srcReg2, vacgeFunc, 22817639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 22827639Sgblack@eecs.umich.edu destReg = (res == 0) ? -1 : 0; 22837639Sgblack@eecs.umich.edu if (res == 2.0) 22847639Sgblack@eecs.umich.edu fpscr.ioc = 1; 22857639Sgblack@eecs.umich.edu Fpscr = fpscr; 22867639Sgblack@eecs.umich.edu ''' 22877639Sgblack@eecs.umich.edu threeEqualRegInstFp("vacge", "VacgeDFp", ("float",), 22887639Sgblack@eecs.umich.edu 2, vacgefpCode, toInt = True) 22897639Sgblack@eecs.umich.edu threeEqualRegInstFp("vacge", "VacgeQFp", ("float",), 22907639Sgblack@eecs.umich.edu 4, vacgefpCode, toInt = True) 22917639Sgblack@eecs.umich.edu 22927639Sgblack@eecs.umich.edu vceqfpCode = ''' 22937639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 22947639Sgblack@eecs.umich.edu float res = binaryOp(fpscr, srcReg1, srcReg2, vceqFunc, 22957639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 22967639Sgblack@eecs.umich.edu destReg = (res == 0) ? -1 : 0; 22977639Sgblack@eecs.umich.edu if (res == 2.0) 22987639Sgblack@eecs.umich.edu fpscr.ioc = 1; 22997639Sgblack@eecs.umich.edu Fpscr = fpscr; 23007639Sgblack@eecs.umich.edu ''' 23017639Sgblack@eecs.umich.edu threeEqualRegInstFp("vceq", "VceqDFp", ("float",), 23027639Sgblack@eecs.umich.edu 2, vceqfpCode, toInt = True) 23037639Sgblack@eecs.umich.edu threeEqualRegInstFp("vceq", "VceqQFp", ("float",), 23047639Sgblack@eecs.umich.edu 4, vceqfpCode, toInt = True) 23057639Sgblack@eecs.umich.edu 23067639Sgblack@eecs.umich.edu vrecpsCode = ''' 23077639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 23087639Sgblack@eecs.umich.edu destReg = binaryOp(fpscr, srcReg1, srcReg2, fpRecpsS, 23097639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 23107639Sgblack@eecs.umich.edu Fpscr = fpscr; 23117639Sgblack@eecs.umich.edu ''' 23127639Sgblack@eecs.umich.edu threeEqualRegInstFp("vrecps", "VrecpsDFp", ("float",), 2, vrecpsCode) 23137639Sgblack@eecs.umich.edu threeEqualRegInstFp("vrecps", "VrecpsQFp", ("float",), 4, vrecpsCode) 23147639Sgblack@eecs.umich.edu 23157639Sgblack@eecs.umich.edu vrsqrtsCode = ''' 23167639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 23177639Sgblack@eecs.umich.edu destReg = binaryOp(fpscr, srcReg1, srcReg2, fpRSqrtsS, 23187639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 23197639Sgblack@eecs.umich.edu Fpscr = fpscr; 23207639Sgblack@eecs.umich.edu ''' 23217639Sgblack@eecs.umich.edu threeEqualRegInstFp("vrsqrts", "VrsqrtsDFp", ("float",), 2, vrsqrtsCode) 23227639Sgblack@eecs.umich.edu threeEqualRegInstFp("vrsqrts", "VrsqrtsQFp", ("float",), 4, vrsqrtsCode) 23237639Sgblack@eecs.umich.edu 23247639Sgblack@eecs.umich.edu vabdfpCode = ''' 23257639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 23267639Sgblack@eecs.umich.edu float mid = binaryOp(fpscr, srcReg1, srcReg2, fpSubS, 23277639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 23287639Sgblack@eecs.umich.edu destReg = fabs(mid); 23297639Sgblack@eecs.umich.edu Fpscr = fpscr; 23307639Sgblack@eecs.umich.edu ''' 23317639Sgblack@eecs.umich.edu threeEqualRegInstFp("vabd", "VabdDFp", ("float",), 2, vabdfpCode) 23327639Sgblack@eecs.umich.edu threeEqualRegInstFp("vabd", "VabdQFp", ("float",), 4, vabdfpCode) 23337639Sgblack@eecs.umich.edu 23347639Sgblack@eecs.umich.edu twoEqualRegInst("vmla", "VmlasD", unsignedTypes, 2, vmlaCode, True) 23357639Sgblack@eecs.umich.edu twoEqualRegInst("vmla", "VmlasQ", unsignedTypes, 4, vmlaCode, True) 23367639Sgblack@eecs.umich.edu twoEqualRegInstFp("vmla", "VmlasDFp", ("float",), 2, vmlafpCode, True) 23377639Sgblack@eecs.umich.edu twoEqualRegInstFp("vmla", "VmlasQFp", ("float",), 4, vmlafpCode, True) 23387639Sgblack@eecs.umich.edu twoRegLongInst("vmlal", "Vmlals", smallTypes, vmlalCode, True) 23397639Sgblack@eecs.umich.edu 23407639Sgblack@eecs.umich.edu twoEqualRegInst("vmls", "VmlssD", allTypes, 2, vmlsCode, True) 23417639Sgblack@eecs.umich.edu twoEqualRegInst("vmls", "VmlssQ", allTypes, 4, vmlsCode, True) 23427639Sgblack@eecs.umich.edu twoEqualRegInstFp("vmls", "VmlssDFp", ("float",), 2, vmlsfpCode, True) 23437639Sgblack@eecs.umich.edu twoEqualRegInstFp("vmls", "VmlssQFp", ("float",), 4, vmlsfpCode, True) 23447639Sgblack@eecs.umich.edu twoRegLongInst("vmlsl", "Vmlsls", smallTypes, vmlslCode, True) 23457639Sgblack@eecs.umich.edu 23467639Sgblack@eecs.umich.edu twoEqualRegInst("vmul", "VmulsD", allTypes, 2, vmulCode) 23477639Sgblack@eecs.umich.edu twoEqualRegInst("vmul", "VmulsQ", allTypes, 4, vmulCode) 23487639Sgblack@eecs.umich.edu twoEqualRegInstFp("vmul", "VmulsDFp", ("float",), 2, vmulfpCode) 23497639Sgblack@eecs.umich.edu twoEqualRegInstFp("vmul", "VmulsQFp", ("float",), 4, vmulfpCode) 23507639Sgblack@eecs.umich.edu twoRegLongInst("vmull", "Vmulls", smallTypes, vmullCode) 23517639Sgblack@eecs.umich.edu 23527639Sgblack@eecs.umich.edu twoRegLongInst("vqdmull", "Vqdmulls", smallTypes, vqdmullCode) 23537639Sgblack@eecs.umich.edu twoRegLongInst("vqdmlal", "Vqdmlals", smallTypes, vqdmlalCode, True) 23547639Sgblack@eecs.umich.edu twoRegLongInst("vqdmlsl", "Vqdmlsls", smallTypes, vqdmlslCode, True) 23557639Sgblack@eecs.umich.edu twoEqualRegInst("vqdmulh", "VqdmulhsD", smallSignedTypes, 2, vqdmulhCode) 23567639Sgblack@eecs.umich.edu twoEqualRegInst("vqdmulh", "VqdmulhsQ", smallSignedTypes, 4, vqdmulhCode) 23577639Sgblack@eecs.umich.edu twoEqualRegInst("vqrdmulh", "VqrdmulhsD", 23587639Sgblack@eecs.umich.edu smallSignedTypes, 2, vqrdmulhCode) 23597639Sgblack@eecs.umich.edu twoEqualRegInst("vqrdmulh", "VqrdmulhsQ", 23607639Sgblack@eecs.umich.edu smallSignedTypes, 4, vqrdmulhCode) 23617639Sgblack@eecs.umich.edu 23627639Sgblack@eecs.umich.edu vshrCode = ''' 23637639Sgblack@eecs.umich.edu if (imm >= sizeof(srcElem1) * 8) { 23647639Sgblack@eecs.umich.edu if (srcElem1 < 0) 23657639Sgblack@eecs.umich.edu destElem = -1; 23667639Sgblack@eecs.umich.edu else 23677639Sgblack@eecs.umich.edu destElem = 0; 23687639Sgblack@eecs.umich.edu } else { 23697639Sgblack@eecs.umich.edu destElem = srcElem1 >> imm; 23707639Sgblack@eecs.umich.edu } 23717639Sgblack@eecs.umich.edu ''' 23727639Sgblack@eecs.umich.edu twoRegShiftInst("vshr", "NVshrD", allTypes, 2, vshrCode) 23737639Sgblack@eecs.umich.edu twoRegShiftInst("vshr", "NVshrQ", allTypes, 4, vshrCode) 23747639Sgblack@eecs.umich.edu 23757639Sgblack@eecs.umich.edu vsraCode = ''' 23767639Sgblack@eecs.umich.edu Element mid;; 23777639Sgblack@eecs.umich.edu if (imm >= sizeof(srcElem1) * 8) { 23787639Sgblack@eecs.umich.edu mid = (srcElem1 < 0) ? -1 : 0; 23797639Sgblack@eecs.umich.edu } else { 23807639Sgblack@eecs.umich.edu mid = srcElem1 >> imm; 23817639Sgblack@eecs.umich.edu if (srcElem1 < 0 && mid >= 0) { 23827639Sgblack@eecs.umich.edu mid |= -(mid & ((Element)1 << 23837639Sgblack@eecs.umich.edu (sizeof(Element) * 8 - 1 - imm))); 23847639Sgblack@eecs.umich.edu } 23857639Sgblack@eecs.umich.edu } 23867639Sgblack@eecs.umich.edu destElem += mid; 23877639Sgblack@eecs.umich.edu ''' 23887639Sgblack@eecs.umich.edu twoRegShiftInst("vsra", "NVsraD", allTypes, 2, vsraCode, True) 23897639Sgblack@eecs.umich.edu twoRegShiftInst("vsra", "NVsraQ", allTypes, 4, vsraCode, True) 23907639Sgblack@eecs.umich.edu 23917639Sgblack@eecs.umich.edu vrshrCode = ''' 23927639Sgblack@eecs.umich.edu if (imm > sizeof(srcElem1) * 8) { 23937639Sgblack@eecs.umich.edu destElem = 0; 23947639Sgblack@eecs.umich.edu } else if (imm) { 23957639Sgblack@eecs.umich.edu Element rBit = bits(srcElem1, imm - 1); 23967639Sgblack@eecs.umich.edu destElem = ((srcElem1 >> (imm - 1)) >> 1) + rBit; 23977639Sgblack@eecs.umich.edu } else { 23987639Sgblack@eecs.umich.edu destElem = srcElem1; 23997639Sgblack@eecs.umich.edu } 24007639Sgblack@eecs.umich.edu ''' 24017639Sgblack@eecs.umich.edu twoRegShiftInst("vrshr", "NVrshrD", allTypes, 2, vrshrCode) 24027639Sgblack@eecs.umich.edu twoRegShiftInst("vrshr", "NVrshrQ", allTypes, 4, vrshrCode) 24037639Sgblack@eecs.umich.edu 24047639Sgblack@eecs.umich.edu vrsraCode = ''' 24057639Sgblack@eecs.umich.edu if (imm > sizeof(srcElem1) * 8) { 24067639Sgblack@eecs.umich.edu destElem += 0; 24077639Sgblack@eecs.umich.edu } else if (imm) { 24087639Sgblack@eecs.umich.edu Element rBit = bits(srcElem1, imm - 1); 24097639Sgblack@eecs.umich.edu destElem += ((srcElem1 >> (imm - 1)) >> 1) + rBit; 24107639Sgblack@eecs.umich.edu } else { 24117639Sgblack@eecs.umich.edu destElem += srcElem1; 24127639Sgblack@eecs.umich.edu } 24137639Sgblack@eecs.umich.edu ''' 24147639Sgblack@eecs.umich.edu twoRegShiftInst("vrsra", "NVrsraD", allTypes, 2, vrsraCode, True) 24157639Sgblack@eecs.umich.edu twoRegShiftInst("vrsra", "NVrsraQ", allTypes, 4, vrsraCode, True) 24167639Sgblack@eecs.umich.edu 24177639Sgblack@eecs.umich.edu vsriCode = ''' 24187639Sgblack@eecs.umich.edu if (imm >= sizeof(Element) * 8) 24197639Sgblack@eecs.umich.edu destElem = destElem; 24207639Sgblack@eecs.umich.edu else 24217639Sgblack@eecs.umich.edu destElem = (srcElem1 >> imm) | 24227639Sgblack@eecs.umich.edu (destElem & ~mask(sizeof(Element) * 8 - imm)); 24237639Sgblack@eecs.umich.edu ''' 24247639Sgblack@eecs.umich.edu twoRegShiftInst("vsri", "NVsriD", unsignedTypes, 2, vsriCode, True) 24257639Sgblack@eecs.umich.edu twoRegShiftInst("vsri", "NVsriQ", unsignedTypes, 4, vsriCode, True) 24267639Sgblack@eecs.umich.edu 24277639Sgblack@eecs.umich.edu vshlCode = ''' 24287639Sgblack@eecs.umich.edu if (imm >= sizeof(Element) * 8) 24297639Sgblack@eecs.umich.edu destElem = (srcElem1 << (sizeof(Element) * 8 - 1)) << 1; 24307639Sgblack@eecs.umich.edu else 24317639Sgblack@eecs.umich.edu destElem = srcElem1 << imm; 24327639Sgblack@eecs.umich.edu ''' 24337639Sgblack@eecs.umich.edu twoRegShiftInst("vshl", "NVshlD", unsignedTypes, 2, vshlCode) 24347639Sgblack@eecs.umich.edu twoRegShiftInst("vshl", "NVshlQ", unsignedTypes, 4, vshlCode) 24357639Sgblack@eecs.umich.edu 24367639Sgblack@eecs.umich.edu vsliCode = ''' 24377639Sgblack@eecs.umich.edu if (imm >= sizeof(Element) * 8) 24387639Sgblack@eecs.umich.edu destElem = destElem; 24397639Sgblack@eecs.umich.edu else 24407639Sgblack@eecs.umich.edu destElem = (srcElem1 << imm) | (destElem & mask(imm)); 24417639Sgblack@eecs.umich.edu ''' 24427639Sgblack@eecs.umich.edu twoRegShiftInst("vsli", "NVsliD", unsignedTypes, 2, vsliCode, True) 24437639Sgblack@eecs.umich.edu twoRegShiftInst("vsli", "NVsliQ", unsignedTypes, 4, vsliCode, True) 24447639Sgblack@eecs.umich.edu 24457639Sgblack@eecs.umich.edu vqshlCode = ''' 24467639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 24477639Sgblack@eecs.umich.edu if (imm >= sizeof(Element) * 8) { 24487639Sgblack@eecs.umich.edu if (srcElem1 != 0) { 24497639Sgblack@eecs.umich.edu destElem = (Element)1 << (sizeof(Element) * 8 - 1); 24507639Sgblack@eecs.umich.edu if (srcElem1 > 0) 24517639Sgblack@eecs.umich.edu destElem = ~destElem; 24527639Sgblack@eecs.umich.edu fpscr.qc = 1; 24537639Sgblack@eecs.umich.edu } else { 24547639Sgblack@eecs.umich.edu destElem = 0; 24557639Sgblack@eecs.umich.edu } 24567639Sgblack@eecs.umich.edu } else if (imm) { 24577639Sgblack@eecs.umich.edu destElem = (srcElem1 << imm); 24587639Sgblack@eecs.umich.edu uint64_t topBits = bits((uint64_t)srcElem1, 24597639Sgblack@eecs.umich.edu sizeof(Element) * 8 - 1, 24607639Sgblack@eecs.umich.edu sizeof(Element) * 8 - 1 - imm); 24617639Sgblack@eecs.umich.edu if (topBits != 0 && topBits != mask(imm + 1)) { 24627639Sgblack@eecs.umich.edu destElem = (Element)1 << (sizeof(Element) * 8 - 1); 24637639Sgblack@eecs.umich.edu if (srcElem1 > 0) 24647639Sgblack@eecs.umich.edu destElem = ~destElem; 24657639Sgblack@eecs.umich.edu fpscr.qc = 1; 24667639Sgblack@eecs.umich.edu } 24677639Sgblack@eecs.umich.edu } else { 24687639Sgblack@eecs.umich.edu destElem = srcElem1; 24697639Sgblack@eecs.umich.edu } 24707639Sgblack@eecs.umich.edu Fpscr = fpscr; 24717639Sgblack@eecs.umich.edu ''' 24727639Sgblack@eecs.umich.edu twoRegShiftInst("vqshl", "NVqshlD", signedTypes, 2, vqshlCode) 24737639Sgblack@eecs.umich.edu twoRegShiftInst("vqshl", "NVqshlQ", signedTypes, 4, vqshlCode) 24747639Sgblack@eecs.umich.edu 24757639Sgblack@eecs.umich.edu vqshluCode = ''' 24767639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 24777639Sgblack@eecs.umich.edu if (imm >= sizeof(Element) * 8) { 24787639Sgblack@eecs.umich.edu if (srcElem1 != 0) { 24797639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8); 24807639Sgblack@eecs.umich.edu fpscr.qc = 1; 24817639Sgblack@eecs.umich.edu } else { 24827639Sgblack@eecs.umich.edu destElem = 0; 24837639Sgblack@eecs.umich.edu } 24847639Sgblack@eecs.umich.edu } else if (imm) { 24857639Sgblack@eecs.umich.edu destElem = (srcElem1 << imm); 24867639Sgblack@eecs.umich.edu uint64_t topBits = bits((uint64_t)srcElem1, 24877639Sgblack@eecs.umich.edu sizeof(Element) * 8 - 1, 24887639Sgblack@eecs.umich.edu sizeof(Element) * 8 - imm); 24897639Sgblack@eecs.umich.edu if (topBits != 0) { 24907639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8); 24917639Sgblack@eecs.umich.edu fpscr.qc = 1; 24927639Sgblack@eecs.umich.edu } 24937639Sgblack@eecs.umich.edu } else { 24947639Sgblack@eecs.umich.edu destElem = srcElem1; 24957639Sgblack@eecs.umich.edu } 24967639Sgblack@eecs.umich.edu Fpscr = fpscr; 24977639Sgblack@eecs.umich.edu ''' 24987639Sgblack@eecs.umich.edu twoRegShiftInst("vqshlu", "NVqshluD", unsignedTypes, 2, vqshluCode) 24997639Sgblack@eecs.umich.edu twoRegShiftInst("vqshlu", "NVqshluQ", unsignedTypes, 4, vqshluCode) 25007639Sgblack@eecs.umich.edu 25017639Sgblack@eecs.umich.edu vqshlusCode = ''' 25027639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 25037639Sgblack@eecs.umich.edu if (imm >= sizeof(Element) * 8) { 25047639Sgblack@eecs.umich.edu if (srcElem1 < 0) { 25057639Sgblack@eecs.umich.edu destElem = 0; 25067639Sgblack@eecs.umich.edu fpscr.qc = 1; 25077639Sgblack@eecs.umich.edu } else if (srcElem1 > 0) { 25087639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8); 25097639Sgblack@eecs.umich.edu fpscr.qc = 1; 25107639Sgblack@eecs.umich.edu } else { 25117639Sgblack@eecs.umich.edu destElem = 0; 25127639Sgblack@eecs.umich.edu } 25137639Sgblack@eecs.umich.edu } else if (imm) { 25147639Sgblack@eecs.umich.edu destElem = (srcElem1 << imm); 25157639Sgblack@eecs.umich.edu uint64_t topBits = bits((uint64_t)srcElem1, 25167639Sgblack@eecs.umich.edu sizeof(Element) * 8 - 1, 25177639Sgblack@eecs.umich.edu sizeof(Element) * 8 - imm); 25187639Sgblack@eecs.umich.edu if (srcElem1 < 0) { 25197639Sgblack@eecs.umich.edu destElem = 0; 25207639Sgblack@eecs.umich.edu fpscr.qc = 1; 25217639Sgblack@eecs.umich.edu } else if (topBits != 0) { 25227639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8); 25237639Sgblack@eecs.umich.edu fpscr.qc = 1; 25247639Sgblack@eecs.umich.edu } 25257639Sgblack@eecs.umich.edu } else { 25267639Sgblack@eecs.umich.edu if (srcElem1 < 0) { 25277639Sgblack@eecs.umich.edu fpscr.qc = 1; 25287639Sgblack@eecs.umich.edu destElem = 0; 25297639Sgblack@eecs.umich.edu } else { 25307639Sgblack@eecs.umich.edu destElem = srcElem1; 25317639Sgblack@eecs.umich.edu } 25327639Sgblack@eecs.umich.edu } 25337639Sgblack@eecs.umich.edu Fpscr = fpscr; 25347639Sgblack@eecs.umich.edu ''' 25357639Sgblack@eecs.umich.edu twoRegShiftInst("vqshlus", "NVqshlusD", signedTypes, 2, vqshlusCode) 25367639Sgblack@eecs.umich.edu twoRegShiftInst("vqshlus", "NVqshlusQ", signedTypes, 4, vqshlusCode) 25377639Sgblack@eecs.umich.edu 25387639Sgblack@eecs.umich.edu vshrnCode = ''' 25397639Sgblack@eecs.umich.edu if (imm >= sizeof(srcElem1) * 8) { 25407639Sgblack@eecs.umich.edu destElem = 0; 25417639Sgblack@eecs.umich.edu } else { 25427639Sgblack@eecs.umich.edu destElem = srcElem1 >> imm; 25437639Sgblack@eecs.umich.edu } 25447639Sgblack@eecs.umich.edu ''' 25457639Sgblack@eecs.umich.edu twoRegNarrowShiftInst("vshrn", "NVshrn", smallUnsignedTypes, vshrnCode) 25467639Sgblack@eecs.umich.edu 25477639Sgblack@eecs.umich.edu vrshrnCode = ''' 25487639Sgblack@eecs.umich.edu if (imm > sizeof(srcElem1) * 8) { 25497639Sgblack@eecs.umich.edu destElem = 0; 25507639Sgblack@eecs.umich.edu } else if (imm) { 25517639Sgblack@eecs.umich.edu Element rBit = bits(srcElem1, imm - 1); 25527639Sgblack@eecs.umich.edu destElem = ((srcElem1 >> (imm - 1)) >> 1) + rBit; 25537639Sgblack@eecs.umich.edu } else { 25547639Sgblack@eecs.umich.edu destElem = srcElem1; 25557639Sgblack@eecs.umich.edu } 25567639Sgblack@eecs.umich.edu ''' 25577639Sgblack@eecs.umich.edu twoRegNarrowShiftInst("vrshrn", "NVrshrn", smallUnsignedTypes, vrshrnCode) 25587639Sgblack@eecs.umich.edu 25597639Sgblack@eecs.umich.edu vqshrnCode = ''' 25607639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 25617639Sgblack@eecs.umich.edu if (imm > sizeof(srcElem1) * 8) { 25627639Sgblack@eecs.umich.edu if (srcElem1 != 0 && srcElem1 != -1) 25637639Sgblack@eecs.umich.edu fpscr.qc = 1; 25647639Sgblack@eecs.umich.edu destElem = 0; 25657639Sgblack@eecs.umich.edu } else if (imm) { 25667639Sgblack@eecs.umich.edu BigElement mid = ((srcElem1 >> (imm - 1)) >> 1); 25677639Sgblack@eecs.umich.edu mid |= -(mid & ((BigElement)1 << 25687639Sgblack@eecs.umich.edu (sizeof(BigElement) * 8 - 1 - imm))); 25697639Sgblack@eecs.umich.edu if (mid != (Element)mid) { 25707639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8 - 1); 25717639Sgblack@eecs.umich.edu if (srcElem1 < 0) 25727639Sgblack@eecs.umich.edu destElem = ~destElem; 25737639Sgblack@eecs.umich.edu fpscr.qc = 1; 25747639Sgblack@eecs.umich.edu } else { 25757639Sgblack@eecs.umich.edu destElem = mid; 25767639Sgblack@eecs.umich.edu } 25777639Sgblack@eecs.umich.edu } else { 25787639Sgblack@eecs.umich.edu destElem = srcElem1; 25797639Sgblack@eecs.umich.edu } 25807639Sgblack@eecs.umich.edu Fpscr = fpscr; 25817639Sgblack@eecs.umich.edu ''' 25827639Sgblack@eecs.umich.edu twoRegNarrowShiftInst("vqshrn", "NVqshrn", smallSignedTypes, vqshrnCode) 25837639Sgblack@eecs.umich.edu 25847639Sgblack@eecs.umich.edu vqshrunCode = ''' 25857639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 25867639Sgblack@eecs.umich.edu if (imm > sizeof(srcElem1) * 8) { 25877639Sgblack@eecs.umich.edu if (srcElem1 != 0) 25887639Sgblack@eecs.umich.edu fpscr.qc = 1; 25897639Sgblack@eecs.umich.edu destElem = 0; 25907639Sgblack@eecs.umich.edu } else if (imm) { 25917639Sgblack@eecs.umich.edu BigElement mid = ((srcElem1 >> (imm - 1)) >> 1); 25927639Sgblack@eecs.umich.edu if (mid != (Element)mid) { 25937639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8); 25947639Sgblack@eecs.umich.edu fpscr.qc = 1; 25957639Sgblack@eecs.umich.edu } else { 25967639Sgblack@eecs.umich.edu destElem = mid; 25977639Sgblack@eecs.umich.edu } 25987639Sgblack@eecs.umich.edu } else { 25997639Sgblack@eecs.umich.edu destElem = srcElem1; 26007639Sgblack@eecs.umich.edu } 26017639Sgblack@eecs.umich.edu Fpscr = fpscr; 26027639Sgblack@eecs.umich.edu ''' 26037639Sgblack@eecs.umich.edu twoRegNarrowShiftInst("vqshrun", "NVqshrun", 26047639Sgblack@eecs.umich.edu smallUnsignedTypes, vqshrunCode) 26057639Sgblack@eecs.umich.edu 26067639Sgblack@eecs.umich.edu vqshrunsCode = ''' 26077639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 26087639Sgblack@eecs.umich.edu if (imm > sizeof(srcElem1) * 8) { 26097639Sgblack@eecs.umich.edu if (srcElem1 != 0) 26107639Sgblack@eecs.umich.edu fpscr.qc = 1; 26117639Sgblack@eecs.umich.edu destElem = 0; 26127639Sgblack@eecs.umich.edu } else if (imm) { 26137639Sgblack@eecs.umich.edu BigElement mid = ((srcElem1 >> (imm - 1)) >> 1); 26147639Sgblack@eecs.umich.edu if (bits(mid, sizeof(BigElement) * 8 - 1, 26157639Sgblack@eecs.umich.edu sizeof(Element) * 8) != 0) { 26167639Sgblack@eecs.umich.edu if (srcElem1 < 0) { 26177639Sgblack@eecs.umich.edu destElem = 0; 26187639Sgblack@eecs.umich.edu } else { 26197639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8); 26207639Sgblack@eecs.umich.edu } 26217639Sgblack@eecs.umich.edu fpscr.qc = 1; 26227639Sgblack@eecs.umich.edu } else { 26237639Sgblack@eecs.umich.edu destElem = mid; 26247639Sgblack@eecs.umich.edu } 26257639Sgblack@eecs.umich.edu } else { 26267639Sgblack@eecs.umich.edu destElem = srcElem1; 26277639Sgblack@eecs.umich.edu } 26287639Sgblack@eecs.umich.edu Fpscr = fpscr; 26297639Sgblack@eecs.umich.edu ''' 26307639Sgblack@eecs.umich.edu twoRegNarrowShiftInst("vqshrun", "NVqshruns", 26317639Sgblack@eecs.umich.edu smallSignedTypes, vqshrunsCode) 26327639Sgblack@eecs.umich.edu 26337639Sgblack@eecs.umich.edu vqrshrnCode = ''' 26347639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 26357639Sgblack@eecs.umich.edu if (imm > sizeof(srcElem1) * 8) { 26367639Sgblack@eecs.umich.edu if (srcElem1 != 0 && srcElem1 != -1) 26377639Sgblack@eecs.umich.edu fpscr.qc = 1; 26387639Sgblack@eecs.umich.edu destElem = 0; 26397639Sgblack@eecs.umich.edu } else if (imm) { 26407639Sgblack@eecs.umich.edu BigElement mid = (srcElem1 >> (imm - 1)); 26417639Sgblack@eecs.umich.edu uint64_t rBit = mid & 0x1; 26427639Sgblack@eecs.umich.edu mid >>= 1; 26437639Sgblack@eecs.umich.edu mid |= -(mid & ((BigElement)1 << 26447639Sgblack@eecs.umich.edu (sizeof(BigElement) * 8 - 1 - imm))); 26457639Sgblack@eecs.umich.edu mid += rBit; 26467639Sgblack@eecs.umich.edu if (mid != (Element)mid) { 26477639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8 - 1); 26487639Sgblack@eecs.umich.edu if (srcElem1 < 0) 26497639Sgblack@eecs.umich.edu destElem = ~destElem; 26507639Sgblack@eecs.umich.edu fpscr.qc = 1; 26517639Sgblack@eecs.umich.edu } else { 26527639Sgblack@eecs.umich.edu destElem = mid; 26537639Sgblack@eecs.umich.edu } 26547639Sgblack@eecs.umich.edu } else { 26557639Sgblack@eecs.umich.edu if (srcElem1 != (Element)srcElem1) { 26567639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8 - 1); 26577639Sgblack@eecs.umich.edu if (srcElem1 < 0) 26587639Sgblack@eecs.umich.edu destElem = ~destElem; 26597639Sgblack@eecs.umich.edu fpscr.qc = 1; 26607639Sgblack@eecs.umich.edu } else { 26617639Sgblack@eecs.umich.edu destElem = srcElem1; 26627639Sgblack@eecs.umich.edu } 26637639Sgblack@eecs.umich.edu } 26647639Sgblack@eecs.umich.edu Fpscr = fpscr; 26657639Sgblack@eecs.umich.edu ''' 26667639Sgblack@eecs.umich.edu twoRegNarrowShiftInst("vqrshrn", "NVqrshrn", 26677639Sgblack@eecs.umich.edu smallSignedTypes, vqrshrnCode) 26687639Sgblack@eecs.umich.edu 26697639Sgblack@eecs.umich.edu vqrshrunCode = ''' 26707639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 26717639Sgblack@eecs.umich.edu if (imm > sizeof(srcElem1) * 8) { 26727639Sgblack@eecs.umich.edu if (srcElem1 != 0) 26737639Sgblack@eecs.umich.edu fpscr.qc = 1; 26747639Sgblack@eecs.umich.edu destElem = 0; 26757639Sgblack@eecs.umich.edu } else if (imm) { 26767639Sgblack@eecs.umich.edu BigElement mid = (srcElem1 >> (imm - 1)); 26777639Sgblack@eecs.umich.edu uint64_t rBit = mid & 0x1; 26787639Sgblack@eecs.umich.edu mid >>= 1; 26797639Sgblack@eecs.umich.edu mid += rBit; 26807639Sgblack@eecs.umich.edu if (mid != (Element)mid) { 26817639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8); 26827639Sgblack@eecs.umich.edu fpscr.qc = 1; 26837639Sgblack@eecs.umich.edu } else { 26847639Sgblack@eecs.umich.edu destElem = mid; 26857639Sgblack@eecs.umich.edu } 26867639Sgblack@eecs.umich.edu } else { 26877639Sgblack@eecs.umich.edu if (srcElem1 != (Element)srcElem1) { 26887639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8 - 1); 26897639Sgblack@eecs.umich.edu if (srcElem1 < 0) 26907639Sgblack@eecs.umich.edu destElem = ~destElem; 26917639Sgblack@eecs.umich.edu fpscr.qc = 1; 26927639Sgblack@eecs.umich.edu } else { 26937639Sgblack@eecs.umich.edu destElem = srcElem1; 26947639Sgblack@eecs.umich.edu } 26957639Sgblack@eecs.umich.edu } 26967639Sgblack@eecs.umich.edu Fpscr = fpscr; 26977639Sgblack@eecs.umich.edu ''' 26987639Sgblack@eecs.umich.edu twoRegNarrowShiftInst("vqrshrun", "NVqrshrun", 26997639Sgblack@eecs.umich.edu smallUnsignedTypes, vqrshrunCode) 27007639Sgblack@eecs.umich.edu 27017639Sgblack@eecs.umich.edu vqrshrunsCode = ''' 27027639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 27037639Sgblack@eecs.umich.edu if (imm > sizeof(srcElem1) * 8) { 27047639Sgblack@eecs.umich.edu if (srcElem1 != 0) 27057639Sgblack@eecs.umich.edu fpscr.qc = 1; 27067639Sgblack@eecs.umich.edu destElem = 0; 27077639Sgblack@eecs.umich.edu } else if (imm) { 27087639Sgblack@eecs.umich.edu BigElement mid = (srcElem1 >> (imm - 1)); 27097639Sgblack@eecs.umich.edu uint64_t rBit = mid & 0x1; 27107639Sgblack@eecs.umich.edu mid >>= 1; 27117639Sgblack@eecs.umich.edu mid |= -(mid & ((BigElement)1 << 27127639Sgblack@eecs.umich.edu (sizeof(BigElement) * 8 - 1 - imm))); 27137639Sgblack@eecs.umich.edu mid += rBit; 27147639Sgblack@eecs.umich.edu if (bits(mid, sizeof(BigElement) * 8 - 1, 27157639Sgblack@eecs.umich.edu sizeof(Element) * 8) != 0) { 27167639Sgblack@eecs.umich.edu if (srcElem1 < 0) { 27177639Sgblack@eecs.umich.edu destElem = 0; 27187639Sgblack@eecs.umich.edu } else { 27197639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8); 27207639Sgblack@eecs.umich.edu } 27217639Sgblack@eecs.umich.edu fpscr.qc = 1; 27227639Sgblack@eecs.umich.edu } else { 27237639Sgblack@eecs.umich.edu destElem = mid; 27247639Sgblack@eecs.umich.edu } 27257639Sgblack@eecs.umich.edu } else { 27267639Sgblack@eecs.umich.edu if (srcElem1 < 0) { 27277639Sgblack@eecs.umich.edu fpscr.qc = 1; 27287639Sgblack@eecs.umich.edu destElem = 0; 27297639Sgblack@eecs.umich.edu } else { 27307639Sgblack@eecs.umich.edu destElem = srcElem1; 27317639Sgblack@eecs.umich.edu } 27327639Sgblack@eecs.umich.edu } 27337639Sgblack@eecs.umich.edu Fpscr = fpscr; 27347639Sgblack@eecs.umich.edu ''' 27357639Sgblack@eecs.umich.edu twoRegNarrowShiftInst("vqrshrun", "NVqrshruns", 27367639Sgblack@eecs.umich.edu smallSignedTypes, vqrshrunsCode) 27377639Sgblack@eecs.umich.edu 27387639Sgblack@eecs.umich.edu vshllCode = ''' 27397639Sgblack@eecs.umich.edu if (imm >= sizeof(destElem) * 8) { 27407639Sgblack@eecs.umich.edu destElem = 0; 27417639Sgblack@eecs.umich.edu } else { 27427639Sgblack@eecs.umich.edu destElem = (BigElement)srcElem1 << imm; 27437639Sgblack@eecs.umich.edu } 27447639Sgblack@eecs.umich.edu ''' 27457639Sgblack@eecs.umich.edu twoRegLongShiftInst("vshll", "NVshll", smallTypes, vshllCode) 27467639Sgblack@eecs.umich.edu 27477639Sgblack@eecs.umich.edu vmovlCode = ''' 27487639Sgblack@eecs.umich.edu destElem = srcElem1; 27497639Sgblack@eecs.umich.edu ''' 27507639Sgblack@eecs.umich.edu twoRegLongShiftInst("vmovl", "NVmovl", smallTypes, vmovlCode) 27517639Sgblack@eecs.umich.edu 27527639Sgblack@eecs.umich.edu vcvt2ufxCode = ''' 27537639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 27547639Sgblack@eecs.umich.edu if (flushToZero(srcElem1)) 27557639Sgblack@eecs.umich.edu fpscr.idc = 1; 27567639Sgblack@eecs.umich.edu VfpSavedState state = prepFpState(VfpRoundNearest); 27577639Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (srcElem1) : "m" (srcElem1)); 27587639Sgblack@eecs.umich.edu destReg = vfpFpSToFixed(srcElem1, false, false, imm); 27597639Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (destReg)); 27607639Sgblack@eecs.umich.edu finishVfp(fpscr, state, true); 27617639Sgblack@eecs.umich.edu Fpscr = fpscr; 27627639Sgblack@eecs.umich.edu ''' 27637639Sgblack@eecs.umich.edu twoRegShiftInst("vcvt", "NVcvt2ufxD", ("float",), 27647639Sgblack@eecs.umich.edu 2, vcvt2ufxCode, toInt = True) 27657639Sgblack@eecs.umich.edu twoRegShiftInst("vcvt", "NVcvt2ufxQ", ("float",), 27667639Sgblack@eecs.umich.edu 4, vcvt2ufxCode, toInt = True) 27677639Sgblack@eecs.umich.edu 27687639Sgblack@eecs.umich.edu vcvt2sfxCode = ''' 27697639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 27707639Sgblack@eecs.umich.edu if (flushToZero(srcElem1)) 27717639Sgblack@eecs.umich.edu fpscr.idc = 1; 27727639Sgblack@eecs.umich.edu VfpSavedState state = prepFpState(VfpRoundNearest); 27737639Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (srcElem1) : "m" (srcElem1)); 27747639Sgblack@eecs.umich.edu destReg = vfpFpSToFixed(srcElem1, true, false, imm); 27757639Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (destReg)); 27767639Sgblack@eecs.umich.edu finishVfp(fpscr, state, true); 27777639Sgblack@eecs.umich.edu Fpscr = fpscr; 27787639Sgblack@eecs.umich.edu ''' 27797639Sgblack@eecs.umich.edu twoRegShiftInst("vcvt", "NVcvt2sfxD", ("float",), 27807639Sgblack@eecs.umich.edu 2, vcvt2sfxCode, toInt = True) 27817639Sgblack@eecs.umich.edu twoRegShiftInst("vcvt", "NVcvt2sfxQ", ("float",), 27827639Sgblack@eecs.umich.edu 4, vcvt2sfxCode, toInt = True) 27837639Sgblack@eecs.umich.edu 27847639Sgblack@eecs.umich.edu vcvtu2fpCode = ''' 27857639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 27867639Sgblack@eecs.umich.edu VfpSavedState state = prepFpState(VfpRoundNearest); 27877639Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (srcReg1) : "m" (srcReg1)); 27887639Sgblack@eecs.umich.edu destElem = vfpUFixedToFpS(true, true, srcReg1, false, imm); 27897639Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (destElem)); 27907639Sgblack@eecs.umich.edu finishVfp(fpscr, state, true); 27917639Sgblack@eecs.umich.edu Fpscr = fpscr; 27927639Sgblack@eecs.umich.edu ''' 27937639Sgblack@eecs.umich.edu twoRegShiftInst("vcvt", "NVcvtu2fpD", ("float",), 27947639Sgblack@eecs.umich.edu 2, vcvtu2fpCode, fromInt = True) 27957639Sgblack@eecs.umich.edu twoRegShiftInst("vcvt", "NVcvtu2fpQ", ("float",), 27967639Sgblack@eecs.umich.edu 4, vcvtu2fpCode, fromInt = True) 27977639Sgblack@eecs.umich.edu 27987639Sgblack@eecs.umich.edu vcvts2fpCode = ''' 27997639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 28007639Sgblack@eecs.umich.edu VfpSavedState state = prepFpState(VfpRoundNearest); 28017639Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (srcReg1) : "m" (srcReg1)); 28027639Sgblack@eecs.umich.edu destElem = vfpSFixedToFpS(true, true, srcReg1, false, imm); 28037639Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (destElem)); 28047639Sgblack@eecs.umich.edu finishVfp(fpscr, state, true); 28057639Sgblack@eecs.umich.edu Fpscr = fpscr; 28067639Sgblack@eecs.umich.edu ''' 28077639Sgblack@eecs.umich.edu twoRegShiftInst("vcvt", "NVcvts2fpD", ("float",), 28087639Sgblack@eecs.umich.edu 2, vcvts2fpCode, fromInt = True) 28097639Sgblack@eecs.umich.edu twoRegShiftInst("vcvt", "NVcvts2fpQ", ("float",), 28107639Sgblack@eecs.umich.edu 4, vcvts2fpCode, fromInt = True) 28117639Sgblack@eecs.umich.edu 28127639Sgblack@eecs.umich.edu vcvts2hCode = ''' 28137639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 28147639Sgblack@eecs.umich.edu float srcFp1 = bitsToFp(srcElem1, (float)0.0); 28157639Sgblack@eecs.umich.edu if (flushToZero(srcFp1)) 28167639Sgblack@eecs.umich.edu fpscr.idc = 1; 28177639Sgblack@eecs.umich.edu VfpSavedState state = prepFpState(VfpRoundNearest); 28187639Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (srcFp1), "=m" (destElem) 28197639Sgblack@eecs.umich.edu : "m" (srcFp1), "m" (destElem)); 28207639Sgblack@eecs.umich.edu destElem = vcvtFpSFpH(fpscr, true, true, VfpRoundNearest, 28217639Sgblack@eecs.umich.edu fpscr.ahp, srcFp1); 28227639Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (destElem)); 28237639Sgblack@eecs.umich.edu finishVfp(fpscr, state, true); 28247639Sgblack@eecs.umich.edu Fpscr = fpscr; 28257639Sgblack@eecs.umich.edu ''' 28267639Sgblack@eecs.umich.edu twoRegNarrowMiscInst("vcvt", "NVcvts2h", ("uint16_t",), vcvts2hCode) 28277639Sgblack@eecs.umich.edu 28287639Sgblack@eecs.umich.edu vcvth2sCode = ''' 28297639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 28307639Sgblack@eecs.umich.edu VfpSavedState state = prepFpState(VfpRoundNearest); 28317639Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (srcElem1), "=m" (destElem) 28327639Sgblack@eecs.umich.edu : "m" (srcElem1), "m" (destElem)); 28337639Sgblack@eecs.umich.edu destElem = fpToBits(vcvtFpHFpS(fpscr, true, fpscr.ahp, srcElem1)); 28347639Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (destElem)); 28357639Sgblack@eecs.umich.edu finishVfp(fpscr, state, true); 28367639Sgblack@eecs.umich.edu Fpscr = fpscr; 28377639Sgblack@eecs.umich.edu ''' 28387639Sgblack@eecs.umich.edu twoRegLongMiscInst("vcvt", "NVcvth2s", ("uint16_t",), vcvth2sCode) 28397639Sgblack@eecs.umich.edu 28407639Sgblack@eecs.umich.edu vrsqrteCode = ''' 28417639Sgblack@eecs.umich.edu destElem = unsignedRSqrtEstimate(srcElem1); 28427639Sgblack@eecs.umich.edu ''' 28437639Sgblack@eecs.umich.edu twoRegMiscInst("vrsqrte", "NVrsqrteD", ("uint32_t",), 2, vrsqrteCode) 28447639Sgblack@eecs.umich.edu twoRegMiscInst("vrsqrte", "NVrsqrteQ", ("uint32_t",), 4, vrsqrteCode) 28457639Sgblack@eecs.umich.edu 28467639Sgblack@eecs.umich.edu vrsqrtefpCode = ''' 28477639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 28487639Sgblack@eecs.umich.edu if (flushToZero(srcReg1)) 28497639Sgblack@eecs.umich.edu fpscr.idc = 1; 28507639Sgblack@eecs.umich.edu destReg = fprSqrtEstimate(fpscr, srcReg1); 28517639Sgblack@eecs.umich.edu Fpscr = fpscr; 28527639Sgblack@eecs.umich.edu ''' 28537639Sgblack@eecs.umich.edu twoRegMiscInstFp("vrsqrte", "NVrsqrteDFp", ("float",), 2, vrsqrtefpCode) 28547639Sgblack@eecs.umich.edu twoRegMiscInstFp("vrsqrte", "NVrsqrteQFp", ("float",), 4, vrsqrtefpCode) 28557639Sgblack@eecs.umich.edu 28567639Sgblack@eecs.umich.edu vrecpeCode = ''' 28577639Sgblack@eecs.umich.edu destElem = unsignedRecipEstimate(srcElem1); 28587639Sgblack@eecs.umich.edu ''' 28597639Sgblack@eecs.umich.edu twoRegMiscInst("vrecpe", "NVrecpeD", ("uint32_t",), 2, vrecpeCode) 28607639Sgblack@eecs.umich.edu twoRegMiscInst("vrecpe", "NVrecpeQ", ("uint32_t",), 4, vrecpeCode) 28617639Sgblack@eecs.umich.edu 28627639Sgblack@eecs.umich.edu vrecpefpCode = ''' 28637639Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 28647639Sgblack@eecs.umich.edu if (flushToZero(srcReg1)) 28657639Sgblack@eecs.umich.edu fpscr.idc = 1; 28667639Sgblack@eecs.umich.edu destReg = fpRecipEstimate(fpscr, srcReg1); 28677639Sgblack@eecs.umich.edu Fpscr = fpscr; 28687639Sgblack@eecs.umich.edu ''' 28697639Sgblack@eecs.umich.edu twoRegMiscInstFp("vrecpe", "NVrecpeDFp", ("float",), 2, vrecpefpCode) 28707639Sgblack@eecs.umich.edu twoRegMiscInstFp("vrecpe", "NVrecpeQFp", ("float",), 4, vrecpefpCode) 28717639Sgblack@eecs.umich.edu 28727639Sgblack@eecs.umich.edu vrev16Code = ''' 28737639Sgblack@eecs.umich.edu destElem = srcElem1; 28747639Sgblack@eecs.umich.edu unsigned groupSize = ((1 << 1) / sizeof(Element)); 28757639Sgblack@eecs.umich.edu unsigned reverseMask = (groupSize - 1); 28767639Sgblack@eecs.umich.edu j = i ^ reverseMask; 28777639Sgblack@eecs.umich.edu ''' 28787639Sgblack@eecs.umich.edu twoRegMiscInst("vrev16", "NVrev16D", ("uint8_t",), 2, vrev16Code) 28797639Sgblack@eecs.umich.edu twoRegMiscInst("vrev16", "NVrev16Q", ("uint8_t",), 4, vrev16Code) 28807639Sgblack@eecs.umich.edu vrev32Code = ''' 28817639Sgblack@eecs.umich.edu destElem = srcElem1; 28827639Sgblack@eecs.umich.edu unsigned groupSize = ((1 << 2) / sizeof(Element)); 28837639Sgblack@eecs.umich.edu unsigned reverseMask = (groupSize - 1); 28847639Sgblack@eecs.umich.edu j = i ^ reverseMask; 28857639Sgblack@eecs.umich.edu ''' 28867639Sgblack@eecs.umich.edu twoRegMiscInst("vrev32", "NVrev32D", 28877639Sgblack@eecs.umich.edu ("uint8_t", "uint16_t"), 2, vrev32Code) 28887639Sgblack@eecs.umich.edu twoRegMiscInst("vrev32", "NVrev32Q", 28897639Sgblack@eecs.umich.edu ("uint8_t", "uint16_t"), 4, vrev32Code) 28907639Sgblack@eecs.umich.edu vrev64Code = ''' 28917639Sgblack@eecs.umich.edu destElem = srcElem1; 28927639Sgblack@eecs.umich.edu unsigned groupSize = ((1 << 3) / sizeof(Element)); 28937639Sgblack@eecs.umich.edu unsigned reverseMask = (groupSize - 1); 28947639Sgblack@eecs.umich.edu j = i ^ reverseMask; 28957639Sgblack@eecs.umich.edu ''' 28967639Sgblack@eecs.umich.edu twoRegMiscInst("vrev64", "NVrev64D", smallUnsignedTypes, 2, vrev64Code) 28977639Sgblack@eecs.umich.edu twoRegMiscInst("vrev64", "NVrev64Q", smallUnsignedTypes, 4, vrev64Code) 28987639Sgblack@eecs.umich.edu 28997639Sgblack@eecs.umich.edu vpaddlCode = ''' 29007639Sgblack@eecs.umich.edu destElem = (BigElement)srcElem1 + (BigElement)srcElem2; 29017639Sgblack@eecs.umich.edu ''' 29027639Sgblack@eecs.umich.edu twoRegCondenseInst("vpaddl", "NVpaddlD", smallTypes, 2, vpaddlCode) 29037639Sgblack@eecs.umich.edu twoRegCondenseInst("vpaddl", "NVpaddlQ", smallTypes, 4, vpaddlCode) 29047639Sgblack@eecs.umich.edu 29057639Sgblack@eecs.umich.edu vpadalCode = ''' 29067639Sgblack@eecs.umich.edu destElem += (BigElement)srcElem1 + (BigElement)srcElem2; 29077639Sgblack@eecs.umich.edu ''' 29087639Sgblack@eecs.umich.edu twoRegCondenseInst("vpadal", "NVpadalD", smallTypes, 2, vpadalCode, True) 29097639Sgblack@eecs.umich.edu twoRegCondenseInst("vpadal", "NVpadalQ", smallTypes, 4, vpadalCode, True) 29107639Sgblack@eecs.umich.edu 29117639Sgblack@eecs.umich.edu vclsCode = ''' 29127639Sgblack@eecs.umich.edu unsigned count = 0; 29137639Sgblack@eecs.umich.edu if (srcElem1 < 0) { 29147639Sgblack@eecs.umich.edu srcElem1 <<= 1; 29157639Sgblack@eecs.umich.edu while (srcElem1 < 0 && count < sizeof(Element) * 8 - 1) { 29167639Sgblack@eecs.umich.edu count++; 29177639Sgblack@eecs.umich.edu srcElem1 <<= 1; 29187639Sgblack@eecs.umich.edu } 29197639Sgblack@eecs.umich.edu } else { 29207639Sgblack@eecs.umich.edu srcElem1 <<= 1; 29217639Sgblack@eecs.umich.edu while (srcElem1 >= 0 && count < sizeof(Element) * 8 - 1) { 29227639Sgblack@eecs.umich.edu count++; 29237639Sgblack@eecs.umich.edu srcElem1 <<= 1; 29247639Sgblack@eecs.umich.edu } 29257639Sgblack@eecs.umich.edu } 29267639Sgblack@eecs.umich.edu destElem = count; 29277639Sgblack@eecs.umich.edu ''' 29287639Sgblack@eecs.umich.edu twoRegMiscInst("vcls", "NVclsD", signedTypes, 2, vclsCode) 29297639Sgblack@eecs.umich.edu twoRegMiscInst("vcls", "NVclsQ", signedTypes, 4, vclsCode) 29307639Sgblack@eecs.umich.edu 29317639Sgblack@eecs.umich.edu vclzCode = ''' 29327639Sgblack@eecs.umich.edu unsigned count = 0; 29337639Sgblack@eecs.umich.edu while (srcElem1 >= 0 && count < sizeof(Element) * 8) { 29347639Sgblack@eecs.umich.edu count++; 29357639Sgblack@eecs.umich.edu srcElem1 <<= 1; 29367639Sgblack@eecs.umich.edu } 29377639Sgblack@eecs.umich.edu destElem = count; 29387639Sgblack@eecs.umich.edu ''' 29397639Sgblack@eecs.umich.edu twoRegMiscInst("vclz", "NVclzD", signedTypes, 2, vclzCode) 29407639Sgblack@eecs.umich.edu twoRegMiscInst("vclz", "NVclzQ", signedTypes, 4, vclzCode) 29417639Sgblack@eecs.umich.edu 29427639Sgblack@eecs.umich.edu vcntCode = ''' 29437639Sgblack@eecs.umich.edu unsigned count = 0; 29447639Sgblack@eecs.umich.edu while (srcElem1 && count < sizeof(Element) * 8) { 29457639Sgblack@eecs.umich.edu count += srcElem1 & 0x1; 29467639Sgblack@eecs.umich.edu srcElem1 >>= 1; 29477639Sgblack@eecs.umich.edu } 29487639Sgblack@eecs.umich.edu destElem = count; 29497639Sgblack@eecs.umich.edu ''' 29507639Sgblack@eecs.umich.edu twoRegMiscInst("vcnt", "NVcntD", unsignedTypes, 2, vcntCode) 29517639Sgblack@eecs.umich.edu twoRegMiscInst("vcnt", "NVcntQ", unsignedTypes, 4, vcntCode) 29527639Sgblack@eecs.umich.edu 29537639Sgblack@eecs.umich.edu vmvnCode = ''' 29547639Sgblack@eecs.umich.edu destElem = ~srcElem1; 29557639Sgblack@eecs.umich.edu ''' 29567639Sgblack@eecs.umich.edu twoRegMiscInst("vmvn", "NVmvnD", ("uint64_t",), 2, vmvnCode) 29577639Sgblack@eecs.umich.edu twoRegMiscInst("vmvn", "NVmvnQ", ("uint64_t",), 4, vmvnCode) 29587639Sgblack@eecs.umich.edu 29597639Sgblack@eecs.umich.edu vqabsCode = ''' 29607639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 29617639Sgblack@eecs.umich.edu if (srcElem1 == (Element)((Element)1 << (sizeof(Element) * 8 - 1))) { 29627639Sgblack@eecs.umich.edu fpscr.qc = 1; 29637639Sgblack@eecs.umich.edu destElem = ~srcElem1; 29647639Sgblack@eecs.umich.edu } else if (srcElem1 < 0) { 29657639Sgblack@eecs.umich.edu destElem = -srcElem1; 29667639Sgblack@eecs.umich.edu } else { 29677639Sgblack@eecs.umich.edu destElem = srcElem1; 29687639Sgblack@eecs.umich.edu } 29697639Sgblack@eecs.umich.edu Fpscr = fpscr; 29707639Sgblack@eecs.umich.edu ''' 29717639Sgblack@eecs.umich.edu twoRegMiscInst("vqabs", "NVqabsD", signedTypes, 2, vqabsCode) 29727639Sgblack@eecs.umich.edu twoRegMiscInst("vqabs", "NVqabsQ", signedTypes, 4, vqabsCode) 29737639Sgblack@eecs.umich.edu 29747639Sgblack@eecs.umich.edu vqnegCode = ''' 29757639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 29767639Sgblack@eecs.umich.edu if (srcElem1 == (Element)((Element)1 << (sizeof(Element) * 8 - 1))) { 29777639Sgblack@eecs.umich.edu fpscr.qc = 1; 29787639Sgblack@eecs.umich.edu destElem = ~srcElem1; 29797639Sgblack@eecs.umich.edu } else { 29807639Sgblack@eecs.umich.edu destElem = -srcElem1; 29817639Sgblack@eecs.umich.edu } 29827639Sgblack@eecs.umich.edu Fpscr = fpscr; 29837639Sgblack@eecs.umich.edu ''' 29847639Sgblack@eecs.umich.edu twoRegMiscInst("vqneg", "NVqnegD", signedTypes, 2, vqnegCode) 29857639Sgblack@eecs.umich.edu twoRegMiscInst("vqneg", "NVqnegQ", signedTypes, 4, vqnegCode) 29867639Sgblack@eecs.umich.edu 29877639Sgblack@eecs.umich.edu vabsCode = ''' 29887639Sgblack@eecs.umich.edu if (srcElem1 < 0) { 29897639Sgblack@eecs.umich.edu destElem = -srcElem1; 29907639Sgblack@eecs.umich.edu } else { 29917639Sgblack@eecs.umich.edu destElem = srcElem1; 29927639Sgblack@eecs.umich.edu } 29937639Sgblack@eecs.umich.edu ''' 29947639Sgblack@eecs.umich.edu twoRegMiscInst("vabs", "NVabsD", signedTypes, 2, vabsCode) 29957639Sgblack@eecs.umich.edu twoRegMiscInst("vabs", "NVabsQ", signedTypes, 4, vabsCode) 29967639Sgblack@eecs.umich.edu vabsfpCode = ''' 29977639Sgblack@eecs.umich.edu union 29987639Sgblack@eecs.umich.edu { 29997639Sgblack@eecs.umich.edu uint32_t i; 30007639Sgblack@eecs.umich.edu float f; 30017639Sgblack@eecs.umich.edu } cStruct; 30027639Sgblack@eecs.umich.edu cStruct.f = srcReg1; 30037639Sgblack@eecs.umich.edu cStruct.i &= mask(sizeof(Element) * 8 - 1); 30047639Sgblack@eecs.umich.edu destReg = cStruct.f; 30057639Sgblack@eecs.umich.edu ''' 30067639Sgblack@eecs.umich.edu twoRegMiscInstFp("vabs", "NVabsDFp", ("float",), 2, vabsfpCode) 30077639Sgblack@eecs.umich.edu twoRegMiscInstFp("vabs", "NVabsQFp", ("float",), 4, vabsfpCode) 30087639Sgblack@eecs.umich.edu 30097639Sgblack@eecs.umich.edu vnegCode = ''' 30107639Sgblack@eecs.umich.edu destElem = -srcElem1; 30117639Sgblack@eecs.umich.edu ''' 30127639Sgblack@eecs.umich.edu twoRegMiscInst("vneg", "NVnegD", signedTypes, 2, vnegCode) 30137639Sgblack@eecs.umich.edu twoRegMiscInst("vneg", "NVnegQ", signedTypes, 4, vnegCode) 30147639Sgblack@eecs.umich.edu vnegfpCode = ''' 30157639Sgblack@eecs.umich.edu destReg = -srcReg1; 30167639Sgblack@eecs.umich.edu ''' 30177639Sgblack@eecs.umich.edu twoRegMiscInstFp("vneg", "NVnegDFp", ("float",), 2, vnegfpCode) 30187639Sgblack@eecs.umich.edu twoRegMiscInstFp("vneg", "NVnegQFp", ("float",), 4, vnegfpCode) 30197639Sgblack@eecs.umich.edu 30207639Sgblack@eecs.umich.edu vcgtCode = 'destElem = (srcElem1 > 0) ? mask(sizeof(Element) * 8) : 0;' 30217639Sgblack@eecs.umich.edu twoRegMiscInst("vcgt", "NVcgtD", signedTypes, 2, vcgtCode) 30227639Sgblack@eecs.umich.edu twoRegMiscInst("vcgt", "NVcgtQ", signedTypes, 4, vcgtCode) 30237639Sgblack@eecs.umich.edu vcgtfpCode = ''' 30247639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 30257639Sgblack@eecs.umich.edu float res = binaryOp(fpscr, srcReg1, (FloatReg)0.0, vcgtFunc, 30267639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 30277639Sgblack@eecs.umich.edu destReg = (res == 0) ? -1 : 0; 30287639Sgblack@eecs.umich.edu if (res == 2.0) 30297639Sgblack@eecs.umich.edu fpscr.ioc = 1; 30307639Sgblack@eecs.umich.edu Fpscr = fpscr; 30317639Sgblack@eecs.umich.edu ''' 30327639Sgblack@eecs.umich.edu twoRegMiscInstFp("vcgt", "NVcgtDFp", ("float",), 30337639Sgblack@eecs.umich.edu 2, vcgtfpCode, toInt = True) 30347639Sgblack@eecs.umich.edu twoRegMiscInstFp("vcgt", "NVcgtQFp", ("float",), 30357639Sgblack@eecs.umich.edu 4, vcgtfpCode, toInt = True) 30367639Sgblack@eecs.umich.edu 30377639Sgblack@eecs.umich.edu vcgeCode = 'destElem = (srcElem1 >= 0) ? mask(sizeof(Element) * 8) : 0;' 30387639Sgblack@eecs.umich.edu twoRegMiscInst("vcge", "NVcgeD", signedTypes, 2, vcgeCode) 30397639Sgblack@eecs.umich.edu twoRegMiscInst("vcge", "NVcgeQ", signedTypes, 4, vcgeCode) 30407639Sgblack@eecs.umich.edu vcgefpCode = ''' 30417639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 30427639Sgblack@eecs.umich.edu float res = binaryOp(fpscr, srcReg1, (FloatReg)0.0, vcgeFunc, 30437639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 30447639Sgblack@eecs.umich.edu destReg = (res == 0) ? -1 : 0; 30457639Sgblack@eecs.umich.edu if (res == 2.0) 30467639Sgblack@eecs.umich.edu fpscr.ioc = 1; 30477639Sgblack@eecs.umich.edu Fpscr = fpscr; 30487639Sgblack@eecs.umich.edu ''' 30497639Sgblack@eecs.umich.edu twoRegMiscInstFp("vcge", "NVcgeDFp", ("float",), 30507639Sgblack@eecs.umich.edu 2, vcgefpCode, toInt = True) 30517639Sgblack@eecs.umich.edu twoRegMiscInstFp("vcge", "NVcgeQFp", ("float",), 30527639Sgblack@eecs.umich.edu 4, vcgefpCode, toInt = True) 30537639Sgblack@eecs.umich.edu 30547639Sgblack@eecs.umich.edu vceqCode = 'destElem = (srcElem1 == 0) ? mask(sizeof(Element) * 8) : 0;' 30557639Sgblack@eecs.umich.edu twoRegMiscInst("vceq", "NVceqD", signedTypes, 2, vceqCode) 30567639Sgblack@eecs.umich.edu twoRegMiscInst("vceq", "NVceqQ", signedTypes, 4, vceqCode) 30577639Sgblack@eecs.umich.edu vceqfpCode = ''' 30587639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 30597639Sgblack@eecs.umich.edu float res = binaryOp(fpscr, srcReg1, (FloatReg)0.0, vceqFunc, 30607639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 30617639Sgblack@eecs.umich.edu destReg = (res == 0) ? -1 : 0; 30627639Sgblack@eecs.umich.edu if (res == 2.0) 30637639Sgblack@eecs.umich.edu fpscr.ioc = 1; 30647639Sgblack@eecs.umich.edu Fpscr = fpscr; 30657639Sgblack@eecs.umich.edu ''' 30667639Sgblack@eecs.umich.edu twoRegMiscInstFp("vceq", "NVceqDFp", ("float",), 30677639Sgblack@eecs.umich.edu 2, vceqfpCode, toInt = True) 30687639Sgblack@eecs.umich.edu twoRegMiscInstFp("vceq", "NVceqQFp", ("float",), 30697639Sgblack@eecs.umich.edu 4, vceqfpCode, toInt = True) 30707639Sgblack@eecs.umich.edu 30717639Sgblack@eecs.umich.edu vcleCode = 'destElem = (srcElem1 <= 0) ? mask(sizeof(Element) * 8) : 0;' 30727639Sgblack@eecs.umich.edu twoRegMiscInst("vcle", "NVcleD", signedTypes, 2, vcleCode) 30737639Sgblack@eecs.umich.edu twoRegMiscInst("vcle", "NVcleQ", signedTypes, 4, vcleCode) 30747639Sgblack@eecs.umich.edu vclefpCode = ''' 30757639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 30767639Sgblack@eecs.umich.edu float res = binaryOp(fpscr, srcReg1, (FloatReg)0.0, vcleFunc, 30777639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 30787639Sgblack@eecs.umich.edu destReg = (res == 0) ? -1 : 0; 30797639Sgblack@eecs.umich.edu if (res == 2.0) 30807639Sgblack@eecs.umich.edu fpscr.ioc = 1; 30817639Sgblack@eecs.umich.edu Fpscr = fpscr; 30827639Sgblack@eecs.umich.edu ''' 30837639Sgblack@eecs.umich.edu twoRegMiscInstFp("vcle", "NVcleDFp", ("float",), 30847639Sgblack@eecs.umich.edu 2, vclefpCode, toInt = True) 30857639Sgblack@eecs.umich.edu twoRegMiscInstFp("vcle", "NVcleQFp", ("float",), 30867639Sgblack@eecs.umich.edu 4, vclefpCode, toInt = True) 30877639Sgblack@eecs.umich.edu 30887639Sgblack@eecs.umich.edu vcltCode = 'destElem = (srcElem1 < 0) ? mask(sizeof(Element) * 8) : 0;' 30897639Sgblack@eecs.umich.edu twoRegMiscInst("vclt", "NVcltD", signedTypes, 2, vcltCode) 30907639Sgblack@eecs.umich.edu twoRegMiscInst("vclt", "NVcltQ", signedTypes, 4, vcltCode) 30917639Sgblack@eecs.umich.edu vcltfpCode = ''' 30927639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 30937639Sgblack@eecs.umich.edu float res = binaryOp(fpscr, srcReg1, (FloatReg)0.0, vcltFunc, 30947639Sgblack@eecs.umich.edu true, true, VfpRoundNearest); 30957639Sgblack@eecs.umich.edu destReg = (res == 0) ? -1 : 0; 30967639Sgblack@eecs.umich.edu if (res == 2.0) 30977639Sgblack@eecs.umich.edu fpscr.ioc = 1; 30987639Sgblack@eecs.umich.edu Fpscr = fpscr; 30997639Sgblack@eecs.umich.edu ''' 31007639Sgblack@eecs.umich.edu twoRegMiscInstFp("vclt", "NVcltDFp", ("float",), 31017639Sgblack@eecs.umich.edu 2, vcltfpCode, toInt = True) 31027639Sgblack@eecs.umich.edu twoRegMiscInstFp("vclt", "NVcltQFp", ("float",), 31037639Sgblack@eecs.umich.edu 4, vcltfpCode, toInt = True) 31047639Sgblack@eecs.umich.edu 31057639Sgblack@eecs.umich.edu vswpCode = ''' 31067639Sgblack@eecs.umich.edu FloatRegBits mid; 31077639Sgblack@eecs.umich.edu for (unsigned r = 0; r < rCount; r++) { 31087639Sgblack@eecs.umich.edu mid = srcReg1.regs[r]; 31097639Sgblack@eecs.umich.edu srcReg1.regs[r] = destReg.regs[r]; 31107639Sgblack@eecs.umich.edu destReg.regs[r] = mid; 31117639Sgblack@eecs.umich.edu } 31127639Sgblack@eecs.umich.edu ''' 31137639Sgblack@eecs.umich.edu twoRegMiscScramble("vswp", "NVswpD", ("uint64_t",), 2, vswpCode) 31147639Sgblack@eecs.umich.edu twoRegMiscScramble("vswp", "NVswpQ", ("uint64_t",), 4, vswpCode) 31157639Sgblack@eecs.umich.edu 31167639Sgblack@eecs.umich.edu vtrnCode = ''' 31177639Sgblack@eecs.umich.edu Element mid; 31187639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i += 2) { 31197639Sgblack@eecs.umich.edu mid = srcReg1.elements[i]; 31207639Sgblack@eecs.umich.edu srcReg1.elements[i] = destReg.elements[i + 1]; 31217639Sgblack@eecs.umich.edu destReg.elements[i + 1] = mid; 31227639Sgblack@eecs.umich.edu } 31237639Sgblack@eecs.umich.edu ''' 31247639Sgblack@eecs.umich.edu twoRegMiscScramble("vtrn", "NVtrnD", unsignedTypes, 2, vtrnCode) 31257639Sgblack@eecs.umich.edu twoRegMiscScramble("vtrn", "NVtrnQ", unsignedTypes, 4, vtrnCode) 31267639Sgblack@eecs.umich.edu 31277639Sgblack@eecs.umich.edu vuzpCode = ''' 31287639Sgblack@eecs.umich.edu Element mid[eCount]; 31297639Sgblack@eecs.umich.edu memcpy(&mid, &srcReg1, sizeof(srcReg1)); 31307639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount / 2; i++) { 31317639Sgblack@eecs.umich.edu srcReg1.elements[i] = destReg.elements[2 * i + 1]; 31327639Sgblack@eecs.umich.edu srcReg1.elements[eCount / 2 + i] = mid[2 * i + 1]; 31337639Sgblack@eecs.umich.edu destReg.elements[i] = destReg.elements[2 * i]; 31347639Sgblack@eecs.umich.edu } 31357639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount / 2; i++) { 31367639Sgblack@eecs.umich.edu destReg.elements[eCount / 2 + i] = mid[2 * i]; 31377639Sgblack@eecs.umich.edu } 31387639Sgblack@eecs.umich.edu ''' 31397639Sgblack@eecs.umich.edu twoRegMiscScramble("vuzp", "NVuzpD", unsignedTypes, 2, vuzpCode) 31407639Sgblack@eecs.umich.edu twoRegMiscScramble("vuzp", "NVuzpQ", unsignedTypes, 4, vuzpCode) 31417639Sgblack@eecs.umich.edu 31427639Sgblack@eecs.umich.edu vzipCode = ''' 31437639Sgblack@eecs.umich.edu Element mid[eCount]; 31447639Sgblack@eecs.umich.edu memcpy(&mid, &destReg, sizeof(destReg)); 31457639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount / 2; i++) { 31467639Sgblack@eecs.umich.edu destReg.elements[2 * i] = mid[i]; 31477639Sgblack@eecs.umich.edu destReg.elements[2 * i + 1] = srcReg1.elements[i]; 31487639Sgblack@eecs.umich.edu } 31497639Sgblack@eecs.umich.edu for (int i = 0; i < eCount / 2; i++) { 31507639Sgblack@eecs.umich.edu srcReg1.elements[2 * i] = mid[eCount / 2 + i]; 31517639Sgblack@eecs.umich.edu srcReg1.elements[2 * i + 1] = srcReg1.elements[eCount / 2 + i]; 31527639Sgblack@eecs.umich.edu } 31537639Sgblack@eecs.umich.edu ''' 31547639Sgblack@eecs.umich.edu twoRegMiscScramble("vzip", "NVzipD", unsignedTypes, 2, vzipCode) 31557639Sgblack@eecs.umich.edu twoRegMiscScramble("vzip", "NVzipQ", unsignedTypes, 4, vzipCode) 31567639Sgblack@eecs.umich.edu 31577639Sgblack@eecs.umich.edu vmovnCode = 'destElem = srcElem1;' 31587639Sgblack@eecs.umich.edu twoRegNarrowMiscInst("vmovn", "NVmovn", smallUnsignedTypes, vmovnCode) 31597639Sgblack@eecs.umich.edu 31607639Sgblack@eecs.umich.edu vdupCode = 'destElem = srcElem1;' 31617639Sgblack@eecs.umich.edu twoRegMiscScInst("vdup", "NVdupD", smallUnsignedTypes, 2, vdupCode) 31627639Sgblack@eecs.umich.edu twoRegMiscScInst("vdup", "NVdupQ", smallUnsignedTypes, 4, vdupCode) 31637639Sgblack@eecs.umich.edu 31647639Sgblack@eecs.umich.edu def vdupGprInst(name, Name, types, rCount): 31657639Sgblack@eecs.umich.edu global header_output, exec_output 31667639Sgblack@eecs.umich.edu eWalkCode = ''' 31677639Sgblack@eecs.umich.edu RegVect destReg; 31687639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i++) { 31697639Sgblack@eecs.umich.edu destReg.elements[i] = htog((Element)Op1); 31707639Sgblack@eecs.umich.edu } 31717639Sgblack@eecs.umich.edu ''' 31727639Sgblack@eecs.umich.edu for reg in range(rCount): 31737639Sgblack@eecs.umich.edu eWalkCode += ''' 31747639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destReg.regs[%(reg)d]); 31757639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 31767639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 31777639Sgblack@eecs.umich.edu "RegRegOp", 31787639Sgblack@eecs.umich.edu { "code": eWalkCode, 31797639Sgblack@eecs.umich.edu "r_count": rCount, 31807639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 31817639Sgblack@eecs.umich.edu header_output += NeonRegRegOpDeclare.subst(iop) 31827639Sgblack@eecs.umich.edu exec_output += NeonEqualRegExecute.subst(iop) 31837639Sgblack@eecs.umich.edu for type in types: 31847639Sgblack@eecs.umich.edu substDict = { "targs" : type, 31857639Sgblack@eecs.umich.edu "class_name" : Name } 31867639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 31877639Sgblack@eecs.umich.edu vdupGprInst("vdup", "NVdupDGpr", smallUnsignedTypes, 2) 31887639Sgblack@eecs.umich.edu vdupGprInst("vdup", "NVdupQGpr", smallUnsignedTypes, 4) 31897639Sgblack@eecs.umich.edu 31907639Sgblack@eecs.umich.edu vmovCode = 'destElem = imm;' 31917639Sgblack@eecs.umich.edu oneRegImmInst("vmov", "NVmoviD", ("uint64_t",), 2, vmovCode) 31927639Sgblack@eecs.umich.edu oneRegImmInst("vmov", "NVmoviQ", ("uint64_t",), 4, vmovCode) 31937639Sgblack@eecs.umich.edu 31947639Sgblack@eecs.umich.edu vorrCode = 'destElem |= imm;' 31957639Sgblack@eecs.umich.edu oneRegImmInst("vorr", "NVorriD", ("uint64_t",), 2, vorrCode, True) 31967639Sgblack@eecs.umich.edu oneRegImmInst("vorr", "NVorriQ", ("uint64_t",), 4, vorrCode, True) 31977639Sgblack@eecs.umich.edu 31987639Sgblack@eecs.umich.edu vmvnCode = 'destElem = ~imm;' 31997639Sgblack@eecs.umich.edu oneRegImmInst("vmvn", "NVmvniD", ("uint64_t",), 2, vmvnCode) 32007639Sgblack@eecs.umich.edu oneRegImmInst("vmvn", "NVmvniQ", ("uint64_t",), 4, vmvnCode) 32017639Sgblack@eecs.umich.edu 32027639Sgblack@eecs.umich.edu vbicCode = 'destElem &= ~imm;' 32037639Sgblack@eecs.umich.edu oneRegImmInst("vbic", "NVbiciD", ("uint64_t",), 2, vbicCode, True) 32047639Sgblack@eecs.umich.edu oneRegImmInst("vbic", "NVbiciQ", ("uint64_t",), 4, vbicCode, True) 32057639Sgblack@eecs.umich.edu 32067639Sgblack@eecs.umich.edu vqmovnCode = ''' 32077639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 32087639Sgblack@eecs.umich.edu destElem = srcElem1; 32097639Sgblack@eecs.umich.edu if ((BigElement)destElem != srcElem1) { 32107639Sgblack@eecs.umich.edu fpscr.qc = 1; 32117639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8 - 1); 32127639Sgblack@eecs.umich.edu if (srcElem1 < 0) 32137639Sgblack@eecs.umich.edu destElem = ~destElem; 32147639Sgblack@eecs.umich.edu } 32157639Sgblack@eecs.umich.edu Fpscr = fpscr; 32167639Sgblack@eecs.umich.edu ''' 32177639Sgblack@eecs.umich.edu twoRegNarrowMiscInst("vqmovn", "NVqmovn", smallSignedTypes, vqmovnCode) 32187639Sgblack@eecs.umich.edu 32197639Sgblack@eecs.umich.edu vqmovunCode = ''' 32207639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 32217639Sgblack@eecs.umich.edu destElem = srcElem1; 32227639Sgblack@eecs.umich.edu if ((BigElement)destElem != srcElem1) { 32237639Sgblack@eecs.umich.edu fpscr.qc = 1; 32247639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8); 32257639Sgblack@eecs.umich.edu } 32267639Sgblack@eecs.umich.edu Fpscr = fpscr; 32277639Sgblack@eecs.umich.edu ''' 32287639Sgblack@eecs.umich.edu twoRegNarrowMiscInst("vqmovun", "NVqmovun", 32297639Sgblack@eecs.umich.edu smallUnsignedTypes, vqmovunCode) 32307639Sgblack@eecs.umich.edu 32317639Sgblack@eecs.umich.edu vqmovunsCode = ''' 32327639Sgblack@eecs.umich.edu FPSCR fpscr = (FPSCR)Fpscr; 32337639Sgblack@eecs.umich.edu destElem = srcElem1; 32347639Sgblack@eecs.umich.edu if (srcElem1 < 0 || 32357639Sgblack@eecs.umich.edu ((BigElement)destElem & mask(sizeof(Element) * 8)) != srcElem1) { 32367639Sgblack@eecs.umich.edu fpscr.qc = 1; 32377639Sgblack@eecs.umich.edu destElem = mask(sizeof(Element) * 8); 32387639Sgblack@eecs.umich.edu if (srcElem1 < 0) 32397639Sgblack@eecs.umich.edu destElem = ~destElem; 32407639Sgblack@eecs.umich.edu } 32417639Sgblack@eecs.umich.edu Fpscr = fpscr; 32427639Sgblack@eecs.umich.edu ''' 32437639Sgblack@eecs.umich.edu twoRegNarrowMiscInst("vqmovun", "NVqmovuns", 32447639Sgblack@eecs.umich.edu smallSignedTypes, vqmovunsCode) 32457639Sgblack@eecs.umich.edu 32467639Sgblack@eecs.umich.edu def buildVext(name, Name, types, rCount, op): 32477639Sgblack@eecs.umich.edu global header_output, exec_output 32487639Sgblack@eecs.umich.edu eWalkCode = ''' 32497639Sgblack@eecs.umich.edu RegVect srcReg1, srcReg2, destReg; 32507639Sgblack@eecs.umich.edu ''' 32517639Sgblack@eecs.umich.edu for reg in range(rCount): 32527639Sgblack@eecs.umich.edu eWalkCode += ''' 32537639Sgblack@eecs.umich.edu srcReg1.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw); 32547639Sgblack@eecs.umich.edu srcReg2.regs[%(reg)d] = htog(FpOp2P%(reg)d.uw); 32557639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 32567639Sgblack@eecs.umich.edu eWalkCode += op 32577639Sgblack@eecs.umich.edu for reg in range(rCount): 32587639Sgblack@eecs.umich.edu eWalkCode += ''' 32597639Sgblack@eecs.umich.edu FpDestP%(reg)d.uw = gtoh(destReg.regs[%(reg)d]); 32607639Sgblack@eecs.umich.edu ''' % { "reg" : reg } 32617639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 32627639Sgblack@eecs.umich.edu "RegRegRegImmOp", 32637639Sgblack@eecs.umich.edu { "code": eWalkCode, 32647639Sgblack@eecs.umich.edu "r_count": rCount, 32657639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 32667639Sgblack@eecs.umich.edu header_output += NeonRegRegRegImmOpDeclare.subst(iop) 32677639Sgblack@eecs.umich.edu exec_output += NeonEqualRegExecute.subst(iop) 32687639Sgblack@eecs.umich.edu for type in types: 32697639Sgblack@eecs.umich.edu substDict = { "targs" : type, 32707639Sgblack@eecs.umich.edu "class_name" : Name } 32717639Sgblack@eecs.umich.edu exec_output += NeonExecDeclare.subst(substDict) 32727639Sgblack@eecs.umich.edu 32737639Sgblack@eecs.umich.edu vextCode = ''' 32747639Sgblack@eecs.umich.edu for (unsigned i = 0; i < eCount; i++) { 32757639Sgblack@eecs.umich.edu unsigned index = i + imm; 32767639Sgblack@eecs.umich.edu if (index < eCount) { 32777639Sgblack@eecs.umich.edu destReg.elements[i] = srcReg1.elements[index]; 32787639Sgblack@eecs.umich.edu } else { 32797639Sgblack@eecs.umich.edu index -= eCount; 32807639Sgblack@eecs.umich.edu assert(index < eCount); 32817639Sgblack@eecs.umich.edu destReg.elements[i] = srcReg2.elements[index]; 32827639Sgblack@eecs.umich.edu } 32837639Sgblack@eecs.umich.edu } 32847639Sgblack@eecs.umich.edu ''' 32857639Sgblack@eecs.umich.edu buildVext("vext", "NVextD", ("uint8_t",), 2, vextCode) 32867639Sgblack@eecs.umich.edu buildVext("vext", "NVextQ", ("uint8_t",), 4, vextCode) 32877639Sgblack@eecs.umich.edu 32887639Sgblack@eecs.umich.edu def buildVtbxl(name, Name, length, isVtbl): 32897639Sgblack@eecs.umich.edu global header_output, decoder_output, exec_output 32907639Sgblack@eecs.umich.edu code = ''' 32917639Sgblack@eecs.umich.edu union 32927639Sgblack@eecs.umich.edu { 32937639Sgblack@eecs.umich.edu uint8_t bytes[32]; 32947639Sgblack@eecs.umich.edu FloatRegBits regs[8]; 32957639Sgblack@eecs.umich.edu } table; 32967639Sgblack@eecs.umich.edu 32977639Sgblack@eecs.umich.edu union 32987639Sgblack@eecs.umich.edu { 32997639Sgblack@eecs.umich.edu uint8_t bytes[8]; 33007639Sgblack@eecs.umich.edu FloatRegBits regs[2]; 33017639Sgblack@eecs.umich.edu } destReg, srcReg2; 33027639Sgblack@eecs.umich.edu 33037639Sgblack@eecs.umich.edu const unsigned length = %(length)d; 33047639Sgblack@eecs.umich.edu const bool isVtbl = %(isVtbl)s; 33057639Sgblack@eecs.umich.edu 33067639Sgblack@eecs.umich.edu srcReg2.regs[0] = htog(FpOp2P0.uw); 33077639Sgblack@eecs.umich.edu srcReg2.regs[1] = htog(FpOp2P1.uw); 33087639Sgblack@eecs.umich.edu 33097639Sgblack@eecs.umich.edu destReg.regs[0] = htog(FpDestP0.uw); 33107639Sgblack@eecs.umich.edu destReg.regs[1] = htog(FpDestP1.uw); 33117639Sgblack@eecs.umich.edu ''' % { "length" : length, "isVtbl" : isVtbl } 33127639Sgblack@eecs.umich.edu for reg in range(8): 33137639Sgblack@eecs.umich.edu if reg < length * 2: 33147639Sgblack@eecs.umich.edu code += 'table.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw);\n' % \ 33157639Sgblack@eecs.umich.edu { "reg" : reg } 33167639Sgblack@eecs.umich.edu else: 33177639Sgblack@eecs.umich.edu code += 'table.regs[%(reg)d] = 0;\n' % { "reg" : reg } 33187639Sgblack@eecs.umich.edu code += ''' 33197639Sgblack@eecs.umich.edu for (unsigned i = 0; i < sizeof(destReg); i++) { 33207639Sgblack@eecs.umich.edu uint8_t index = srcReg2.bytes[i]; 33217639Sgblack@eecs.umich.edu if (index < 8 * length) { 33227639Sgblack@eecs.umich.edu destReg.bytes[i] = table.bytes[index]; 33237639Sgblack@eecs.umich.edu } else { 33247639Sgblack@eecs.umich.edu if (isVtbl) 33257639Sgblack@eecs.umich.edu destReg.bytes[i] = 0; 33267639Sgblack@eecs.umich.edu // else destReg.bytes[i] unchanged 33277639Sgblack@eecs.umich.edu } 33287639Sgblack@eecs.umich.edu } 33297639Sgblack@eecs.umich.edu 33307639Sgblack@eecs.umich.edu FpDestP0.uw = gtoh(destReg.regs[0]); 33317639Sgblack@eecs.umich.edu FpDestP1.uw = gtoh(destReg.regs[1]); 33327639Sgblack@eecs.umich.edu ''' 33337639Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 33347639Sgblack@eecs.umich.edu "RegRegRegOp", 33357639Sgblack@eecs.umich.edu { "code": code, 33367639Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 33377639Sgblack@eecs.umich.edu header_output += RegRegRegOpDeclare.subst(iop) 33387639Sgblack@eecs.umich.edu decoder_output += RegRegRegOpConstructor.subst(iop) 33397639Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(iop) 33407639Sgblack@eecs.umich.edu 33417639Sgblack@eecs.umich.edu buildVtbxl("vtbl", "NVtbl1", 1, "true") 33427639Sgblack@eecs.umich.edu buildVtbxl("vtbl", "NVtbl2", 2, "true") 33437639Sgblack@eecs.umich.edu buildVtbxl("vtbl", "NVtbl3", 3, "true") 33447639Sgblack@eecs.umich.edu buildVtbxl("vtbl", "NVtbl4", 4, "true") 33457639Sgblack@eecs.umich.edu 33467639Sgblack@eecs.umich.edu buildVtbxl("vtbx", "NVtbx1", 1, "false") 33477639Sgblack@eecs.umich.edu buildVtbxl("vtbx", "NVtbx2", 2, "false") 33487639Sgblack@eecs.umich.edu buildVtbxl("vtbx", "NVtbx3", 3, "false") 33497639Sgblack@eecs.umich.edu buildVtbxl("vtbx", "NVtbx4", 4, "false") 33507639Sgblack@eecs.umich.edu}}; 3351