mult.isa revision 7162
17160Sgblack@eecs.umich.edu// -*- mode:c++ -*- 27160Sgblack@eecs.umich.edu 37160Sgblack@eecs.umich.edu// Copyright (c) 2010 ARM Limited 47160Sgblack@eecs.umich.edu// All rights reserved 57160Sgblack@eecs.umich.edu// 67160Sgblack@eecs.umich.edu// The license below extends only to copyright in the software and shall 77160Sgblack@eecs.umich.edu// not be construed as granting a license to any other intellectual 87160Sgblack@eecs.umich.edu// property including but not limited to intellectual property relating 97160Sgblack@eecs.umich.edu// to a hardware implementation of the functionality of the software 107160Sgblack@eecs.umich.edu// licensed hereunder. You may use the software subject to the license 117160Sgblack@eecs.umich.edu// terms below provided that you ensure that this notice is replicated 127160Sgblack@eecs.umich.edu// unmodified and in its entirety in all distributions of the software, 137160Sgblack@eecs.umich.edu// modified or unmodified, in source code or in binary form. 147160Sgblack@eecs.umich.edu// 157160Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 167160Sgblack@eecs.umich.edu// modification, are permitted provided that the following conditions are 177160Sgblack@eecs.umich.edu// met: redistributions of source code must retain the above copyright 187160Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 197160Sgblack@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 207160Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 217160Sgblack@eecs.umich.edu// documentation and/or other materials provided with the distribution; 227160Sgblack@eecs.umich.edu// neither the name of the copyright holders nor the names of its 237160Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 247160Sgblack@eecs.umich.edu// this software without specific prior written permission. 257160Sgblack@eecs.umich.edu// 267160Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 277160Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 287160Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 297160Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 307160Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 317160Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 327160Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 337160Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 347160Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 357160Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 367160Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 377160Sgblack@eecs.umich.edu// 387160Sgblack@eecs.umich.edu// Authors: Gabe Black 397160Sgblack@eecs.umich.edu 407160Sgblack@eecs.umich.edulet {{ 417160Sgblack@eecs.umich.edu 427160Sgblack@eecs.umich.edu header_output = "" 437160Sgblack@eecs.umich.edu decoder_output = "" 447160Sgblack@eecs.umich.edu exec_output = "" 457160Sgblack@eecs.umich.edu 467160Sgblack@eecs.umich.edu calcQCode = ''' 477160Sgblack@eecs.umich.edu cprintf("canOverflow: %%d\\n", Reg0 < resTemp); 487160Sgblack@eecs.umich.edu replaceBits(CondCodes, 27, Reg0 < resTemp); 497160Sgblack@eecs.umich.edu ''' 507160Sgblack@eecs.umich.edu 517160Sgblack@eecs.umich.edu calcCcCode = ''' 527160Sgblack@eecs.umich.edu uint16_t _iz, _in; 537160Sgblack@eecs.umich.edu _in = (resTemp >> %(negBit)d) & 1; 547160Sgblack@eecs.umich.edu _iz = ((%(zType)s)resTemp == 0); 557160Sgblack@eecs.umich.edu 567160Sgblack@eecs.umich.edu CondCodes = _in << 31 | _iz << 30 | (CondCodes & 0x3FFFFFFF); 577160Sgblack@eecs.umich.edu 587160Sgblack@eecs.umich.edu DPRINTF(Arm, "(in, iz) = (%%d, %%d)\\n", _in, _iz); 597160Sgblack@eecs.umich.edu ''' 607160Sgblack@eecs.umich.edu 617160Sgblack@eecs.umich.edu def buildMultInst(mnem, doCc, unCc, regs, code, flagType): 627160Sgblack@eecs.umich.edu global header_output, decoder_output, exec_output 637160Sgblack@eecs.umich.edu cCode = carryCode[flagType] 647160Sgblack@eecs.umich.edu vCode = overflowCode[flagType] 657160Sgblack@eecs.umich.edu zType = "uint32_t" 667160Sgblack@eecs.umich.edu negBit = 31 677160Sgblack@eecs.umich.edu if flagType == "llbit": 687160Sgblack@eecs.umich.edu zType = "uint64_t" 697160Sgblack@eecs.umich.edu negBit = 63 707160Sgblack@eecs.umich.edu if flagType == "overflow": 717160Sgblack@eecs.umich.edu ccCode = calcQCode 727160Sgblack@eecs.umich.edu else: 737160Sgblack@eecs.umich.edu ccCode = calcCcCode % { 747160Sgblack@eecs.umich.edu "negBit": negBit, 757160Sgblack@eecs.umich.edu "zType": zType 767160Sgblack@eecs.umich.edu } 777160Sgblack@eecs.umich.edu 787160Sgblack@eecs.umich.edu if not regs in (3, 4): 797160Sgblack@eecs.umich.edu raise Exception, "Multiplication instructions with %d " + \ 807160Sgblack@eecs.umich.edu "registers are not implemented" 817160Sgblack@eecs.umich.edu 827160Sgblack@eecs.umich.edu if regs == 3: 837160Sgblack@eecs.umich.edu base = 'Mult3' 847160Sgblack@eecs.umich.edu else: 857160Sgblack@eecs.umich.edu base = 'Mult4' 867160Sgblack@eecs.umich.edu 877162Sgblack@eecs.umich.edu Name = mnem.capitalize() 887160Sgblack@eecs.umich.edu 897160Sgblack@eecs.umich.edu if unCc: 907160Sgblack@eecs.umich.edu iop = InstObjParams(mnem, Name, base, 917160Sgblack@eecs.umich.edu {"code" : code, 927160Sgblack@eecs.umich.edu "predicate_test": predicateTest}) 937160Sgblack@eecs.umich.edu if doCc: 947160Sgblack@eecs.umich.edu iopCc = InstObjParams(mnem + "s", Name + "Cc", base, 957160Sgblack@eecs.umich.edu {"code" : code + ccCode, 967160Sgblack@eecs.umich.edu "predicate_test": predicateTest}) 977160Sgblack@eecs.umich.edu 987160Sgblack@eecs.umich.edu if regs == 3: 997160Sgblack@eecs.umich.edu declare = Mult3Declare 1007160Sgblack@eecs.umich.edu constructor = Mult3Constructor 1017160Sgblack@eecs.umich.edu else: 1027160Sgblack@eecs.umich.edu declare = Mult4Declare 1037160Sgblack@eecs.umich.edu constructor = Mult4Constructor 1047160Sgblack@eecs.umich.edu 1057160Sgblack@eecs.umich.edu if unCc: 1067160Sgblack@eecs.umich.edu header_output += declare.subst(iop) 1077160Sgblack@eecs.umich.edu decoder_output += constructor.subst(iop) 1087160Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(iop) 1097160Sgblack@eecs.umich.edu if doCc: 1107160Sgblack@eecs.umich.edu header_output += declare.subst(iopCc) 1117160Sgblack@eecs.umich.edu decoder_output += constructor.subst(iopCc) 1127160Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(iopCc) 1137160Sgblack@eecs.umich.edu 1147160Sgblack@eecs.umich.edu def buildMult3Inst(mnem, code, flagType = "logic"): 1157160Sgblack@eecs.umich.edu buildMultInst(mnem, True, True, 3, code, flagType) 1167160Sgblack@eecs.umich.edu 1177160Sgblack@eecs.umich.edu def buildMult3InstCc(mnem, code, flagType = "logic"): 1187160Sgblack@eecs.umich.edu buildMultInst(mnem, True, False, 3, code, flagType) 1197160Sgblack@eecs.umich.edu 1207160Sgblack@eecs.umich.edu def buildMult3InstUnCc(mnem, code, flagType = "logic"): 1217160Sgblack@eecs.umich.edu buildMultInst(mnem, False, True, 3, code, flagType) 1227160Sgblack@eecs.umich.edu 1237160Sgblack@eecs.umich.edu def buildMult4Inst(mnem, code, flagType = "logic"): 1247160Sgblack@eecs.umich.edu buildMultInst(mnem, True, True, 4, code, flagType) 1257160Sgblack@eecs.umich.edu 1267160Sgblack@eecs.umich.edu def buildMult4InstCc(mnem, code, flagType = "logic"): 1277160Sgblack@eecs.umich.edu buildMultInst(mnem, True, False, 4, code, flagType) 1287160Sgblack@eecs.umich.edu 1297160Sgblack@eecs.umich.edu def buildMult4InstUnCc(mnem, code, flagType = "logic"): 1307160Sgblack@eecs.umich.edu buildMultInst(mnem, False, True, 4, code, flagType) 1317160Sgblack@eecs.umich.edu 1327160Sgblack@eecs.umich.edu buildMult4Inst ("mla", "Reg0 = resTemp = Reg1 * Reg2 + Reg3;") 1337160Sgblack@eecs.umich.edu buildMult4InstUnCc("mls", "Reg0 = resTemp = Reg3 - Reg1 * Reg2;") 1347160Sgblack@eecs.umich.edu buildMult3Inst ("mul", "Reg0 = resTemp = Reg1 * Reg2;") 1357160Sgblack@eecs.umich.edu buildMult4InstCc ("smlabb", '''Reg0 = resTemp = 1367160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 15, 0)) * 1377160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)) + 1387160Sgblack@eecs.umich.edu Reg3.sw; 1397160Sgblack@eecs.umich.edu ''', "overflow") 1407160Sgblack@eecs.umich.edu buildMult4InstCc ("smlabt", '''Reg0 = resTemp = 1417160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 15, 0)) * 1427160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)) + 1437160Sgblack@eecs.umich.edu Reg3.sw; 1447160Sgblack@eecs.umich.edu ''', "overflow") 1457160Sgblack@eecs.umich.edu buildMult4InstCc ("smlatb", '''Reg0 = resTemp = 1467160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 31, 16)) * 1477160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)) + 1487160Sgblack@eecs.umich.edu Reg3.sw; 1497160Sgblack@eecs.umich.edu ''', "overflow") 1507160Sgblack@eecs.umich.edu buildMult4InstCc ("smlatt", '''Reg0 = resTemp = 1517160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 31, 16)) * 1527160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)) + 1537160Sgblack@eecs.umich.edu Reg3.sw; 1547160Sgblack@eecs.umich.edu ''', "overflow") 1557160Sgblack@eecs.umich.edu buildMult4InstCc ("smlad", '''Reg0 = resTemp = 1567160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 31, 16)) * 1577160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)) + 1587160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 15, 0)) * 1597160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)) + 1607160Sgblack@eecs.umich.edu Reg3.sw; 1617160Sgblack@eecs.umich.edu ''', "overflow") 1627160Sgblack@eecs.umich.edu buildMult4InstCc ("smladx", '''Reg0 = resTemp = 1637160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 31, 16)) * 1647160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)) + 1657160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 15, 0)) * 1667160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)) + 1677160Sgblack@eecs.umich.edu Reg3.sw; 1687160Sgblack@eecs.umich.edu ''', "overflow") 1697160Sgblack@eecs.umich.edu buildMult4Inst ("smlal", '''resTemp = sext<32>(Reg2) * sext<32>(Reg3) + 1707160Sgblack@eecs.umich.edu (int64_t)((Reg1.ud << 32) | Reg0.ud); 1717160Sgblack@eecs.umich.edu Reg0.ud = (uint32_t)resTemp; 1727160Sgblack@eecs.umich.edu Reg1.ud = (uint32_t)(resTemp >> 32); 1737160Sgblack@eecs.umich.edu ''', "llbit") 1747160Sgblack@eecs.umich.edu buildMult4InstUnCc("smlalbb", '''resTemp = sext<16>(bits(Reg2, 15, 0)) * 1757160Sgblack@eecs.umich.edu sext<16>(bits(Reg3, 15, 0)) + 1767160Sgblack@eecs.umich.edu (int64_t)((Reg1.ud << 32) | 1777160Sgblack@eecs.umich.edu Reg0.ud); 1787160Sgblack@eecs.umich.edu Reg0.ud = (uint32_t)resTemp; 1797160Sgblack@eecs.umich.edu Reg1.ud = (uint32_t)(resTemp >> 32); 1807160Sgblack@eecs.umich.edu ''') 1817160Sgblack@eecs.umich.edu buildMult4InstUnCc("smlalbt", '''resTemp = sext<16>(bits(Reg2, 15, 0)) * 1827160Sgblack@eecs.umich.edu sext<16>(bits(Reg3, 31, 16)) + 1837160Sgblack@eecs.umich.edu (int64_t)((Reg1.ud << 32) | 1847160Sgblack@eecs.umich.edu Reg0.ud); 1857160Sgblack@eecs.umich.edu Reg0.ud = (uint32_t)resTemp; 1867160Sgblack@eecs.umich.edu Reg1.ud = (uint32_t)(resTemp >> 32); 1877160Sgblack@eecs.umich.edu ''') 1887160Sgblack@eecs.umich.edu buildMult4InstUnCc("smlaltb", '''resTemp = sext<16>(bits(Reg2, 31, 16)) * 1897160Sgblack@eecs.umich.edu sext<16>(bits(Reg3, 15, 0)) + 1907160Sgblack@eecs.umich.edu (int64_t)((Reg1.ud << 32) | 1917160Sgblack@eecs.umich.edu Reg0.ud); 1927160Sgblack@eecs.umich.edu Reg0.ud = (uint32_t)resTemp; 1937160Sgblack@eecs.umich.edu Reg1.ud = (uint32_t)(resTemp >> 32); 1947160Sgblack@eecs.umich.edu ''') 1957160Sgblack@eecs.umich.edu buildMult4InstUnCc("smlaltt", '''resTemp = sext<16>(bits(Reg2, 31, 16)) * 1967160Sgblack@eecs.umich.edu sext<16>(bits(Reg3, 31, 16)) + 1977160Sgblack@eecs.umich.edu (int64_t)((Reg1.ud << 32) | 1987160Sgblack@eecs.umich.edu Reg0.ud); 1997160Sgblack@eecs.umich.edu Reg0.ud = (uint32_t)resTemp; 2007160Sgblack@eecs.umich.edu Reg1.ud = (uint32_t)(resTemp >> 32); 2017160Sgblack@eecs.umich.edu ''') 2027160Sgblack@eecs.umich.edu buildMult4InstUnCc("smlald", '''resTemp = 2037160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)) * 2047160Sgblack@eecs.umich.edu sext<16>(bits(Reg3, 31, 16)) + 2057160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)) * 2067160Sgblack@eecs.umich.edu sext<16>(bits(Reg3, 15, 0)) + 2077160Sgblack@eecs.umich.edu (int64_t)((Reg1.ud << 32) | 2087160Sgblack@eecs.umich.edu Reg0.ud); 2097160Sgblack@eecs.umich.edu Reg0.ud = (uint32_t)resTemp; 2107160Sgblack@eecs.umich.edu Reg1.ud = (uint32_t)(resTemp >> 32); 2117160Sgblack@eecs.umich.edu ''') 2127160Sgblack@eecs.umich.edu buildMult4InstUnCc("smlaldx", '''resTemp = 2137160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)) * 2147160Sgblack@eecs.umich.edu sext<16>(bits(Reg3, 15, 0)) + 2157160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)) * 2167160Sgblack@eecs.umich.edu sext<16>(bits(Reg3, 31, 16)) + 2177160Sgblack@eecs.umich.edu (int64_t)((Reg1.ud << 32) | 2187160Sgblack@eecs.umich.edu Reg0.ud); 2197160Sgblack@eecs.umich.edu Reg0.ud = (uint32_t)resTemp; 2207160Sgblack@eecs.umich.edu Reg1.ud = (uint32_t)(resTemp >> 32); 2217160Sgblack@eecs.umich.edu ''') 2227160Sgblack@eecs.umich.edu buildMult4InstCc ("smlawb", '''Reg0 = resTemp = 2237160Sgblack@eecs.umich.edu (Reg1.sw * 2247160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)) + 2257160Sgblack@eecs.umich.edu (Reg3.sw << 16)) >> 16; 2267160Sgblack@eecs.umich.edu ''', "overflow") 2277160Sgblack@eecs.umich.edu buildMult4InstCc ("smlawt", '''Reg0 = resTemp = 2287160Sgblack@eecs.umich.edu (Reg1.sw * 2297160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)) + 2307160Sgblack@eecs.umich.edu (Reg3.sw << 16)) >> 16; 2317160Sgblack@eecs.umich.edu ''', "overflow") 2327160Sgblack@eecs.umich.edu buildMult4InstCc ("smlsd", '''Reg0 = resTemp = 2337160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 15, 0)) * 2347160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)) - 2357160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 31, 16)) * 2367160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)) + 2377160Sgblack@eecs.umich.edu Reg3.sw; 2387160Sgblack@eecs.umich.edu ''', "overflow") 2397160Sgblack@eecs.umich.edu buildMult4InstCc ("smlsdx", '''Reg0 = resTemp = 2407160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 15, 0)) * 2417160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)) - 2427160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 31, 16)) * 2437160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)) + 2447160Sgblack@eecs.umich.edu Reg3.sw; 2457160Sgblack@eecs.umich.edu ''', "overflow") 2467160Sgblack@eecs.umich.edu buildMult4InstUnCc("smlsld", '''resTemp = 2477160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)) * 2487160Sgblack@eecs.umich.edu sext<16>(bits(Reg3, 15, 0)) - 2497160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)) * 2507160Sgblack@eecs.umich.edu sext<16>(bits(Reg3, 31, 16)) + 2517160Sgblack@eecs.umich.edu (int64_t)((Reg1.ud << 32) | 2527160Sgblack@eecs.umich.edu Reg0.ud); 2537160Sgblack@eecs.umich.edu Reg0.ud = (uint32_t)resTemp; 2547160Sgblack@eecs.umich.edu Reg1.ud = (uint32_t)(resTemp >> 32); 2557160Sgblack@eecs.umich.edu ''') 2567160Sgblack@eecs.umich.edu buildMult4InstUnCc("smlsldx", '''resTemp = 2577160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)) * 2587160Sgblack@eecs.umich.edu sext<16>(bits(Reg3, 31, 16)) - 2597160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)) * 2607160Sgblack@eecs.umich.edu sext<16>(bits(Reg3, 15, 0)) + 2617160Sgblack@eecs.umich.edu (int64_t)((Reg1.ud << 32) | 2627160Sgblack@eecs.umich.edu Reg0.ud); 2637160Sgblack@eecs.umich.edu Reg0.ud = (uint32_t)resTemp; 2647160Sgblack@eecs.umich.edu Reg1.ud = (uint32_t)(resTemp >> 32); 2657160Sgblack@eecs.umich.edu ''') 2667160Sgblack@eecs.umich.edu buildMult4InstUnCc("smmla", '''Reg0 = resTemp = 2677160Sgblack@eecs.umich.edu ((int64_t)(Reg3.ud << 32) + 2687160Sgblack@eecs.umich.edu Reg1.sw * Reg2.sw) >> 32; 2697160Sgblack@eecs.umich.edu ''') 2707160Sgblack@eecs.umich.edu buildMult4InstUnCc("smmlar", '''Reg0 = resTemp = 2717160Sgblack@eecs.umich.edu ((int64_t)(Reg3.ud << 32) + 2727160Sgblack@eecs.umich.edu Reg1.sw * Reg2.sw + 2737160Sgblack@eecs.umich.edu ULL(0x80000000)) >> 32; 2747160Sgblack@eecs.umich.edu ''') 2757160Sgblack@eecs.umich.edu buildMult4InstUnCc("smmls", '''Reg0 = resTemp = 2767160Sgblack@eecs.umich.edu ((int64_t)(Reg3.ud << 32) - 2777160Sgblack@eecs.umich.edu Reg1.sw * Reg2.sw) >> 32; 2787160Sgblack@eecs.umich.edu ''') 2797160Sgblack@eecs.umich.edu buildMult4InstUnCc("smmlsr", '''Reg0 = resTemp = 2807160Sgblack@eecs.umich.edu ((int64_t)(Reg3.ud << 32) - 2817160Sgblack@eecs.umich.edu Reg1.sw * Reg2.sw + 2827160Sgblack@eecs.umich.edu ULL(0x80000000)) >> 32; 2837160Sgblack@eecs.umich.edu ''') 2847160Sgblack@eecs.umich.edu buildMult3InstUnCc("smmul", '''Reg0 = resTemp = 2857160Sgblack@eecs.umich.edu ((int64_t)Reg1 * 2867160Sgblack@eecs.umich.edu (int64_t)Reg2) >> 32; 2877160Sgblack@eecs.umich.edu ''') 2887160Sgblack@eecs.umich.edu buildMult3InstUnCc("smmulr", '''Reg0 = resTemp = 2897160Sgblack@eecs.umich.edu ((int64_t)Reg1 * 2907160Sgblack@eecs.umich.edu (int64_t)Reg2 + 2917160Sgblack@eecs.umich.edu ULL(0x80000000)) >> 32; 2927160Sgblack@eecs.umich.edu ''') 2937160Sgblack@eecs.umich.edu buildMult3InstCc ("smuad", '''Reg0 = resTemp = 2947160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 15, 0)) * 2957160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)) + 2967160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 31, 16)) * 2977160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)); 2987160Sgblack@eecs.umich.edu ''', "overflow") 2997160Sgblack@eecs.umich.edu buildMult3InstCc ("smuadx", '''Reg0 = resTemp = 3007160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 15, 0)) * 3017160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)) + 3027160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 31, 16)) * 3037160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)); 3047160Sgblack@eecs.umich.edu ''', "overflow") 3057160Sgblack@eecs.umich.edu buildMult3InstUnCc("smulbb", '''Reg0 = resTemp = 3067160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 15, 0)) * 3077160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)); 3087160Sgblack@eecs.umich.edu ''') 3097160Sgblack@eecs.umich.edu buildMult3InstUnCc("smulbt", '''Reg0 = resTemp = 3107160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 31, 16)) * 3117160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)); 3127160Sgblack@eecs.umich.edu ''') 3137160Sgblack@eecs.umich.edu buildMult3InstUnCc("smultb", '''Reg0 = resTemp = 3147160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 15, 0)) * 3157160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)); 3167160Sgblack@eecs.umich.edu ''') 3177160Sgblack@eecs.umich.edu buildMult3InstUnCc("smultt", '''Reg0 = resTemp = 3187160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 31, 16)) * 3197160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)); 3207160Sgblack@eecs.umich.edu ''') 3217160Sgblack@eecs.umich.edu buildMult4Inst ("smull", '''resTemp = Reg2.sw * Reg3.sw; 3227160Sgblack@eecs.umich.edu Reg0 = (int32_t)resTemp; 3237160Sgblack@eecs.umich.edu Reg1 = (int32_t)(resTemp >> 32); 3247160Sgblack@eecs.umich.edu ''', "llbit") 3257160Sgblack@eecs.umich.edu buildMult3InstUnCc("smulwb", '''Reg0 = resTemp = 3267160Sgblack@eecs.umich.edu (Reg1.sw * 3277160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0))) >> 16; 3287160Sgblack@eecs.umich.edu ''') 3297160Sgblack@eecs.umich.edu buildMult3InstUnCc("smulwt", '''Reg0 = resTemp = 3307160Sgblack@eecs.umich.edu (Reg1.sw * 3317160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16))) >> 16; 3327160Sgblack@eecs.umich.edu ''') 3337160Sgblack@eecs.umich.edu buildMult3InstUnCc("smusd", '''Reg0 = resTemp = 3347160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 15, 0)) * 3357160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)) - 3367160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 31, 16)) * 3377160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)); 3387160Sgblack@eecs.umich.edu ''') 3397160Sgblack@eecs.umich.edu buildMult3InstUnCc("smusdx", '''Reg0 = resTemp = 3407160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 15, 0)) * 3417160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 31, 16)) - 3427160Sgblack@eecs.umich.edu sext<16>(bits(Reg1, 31, 16)) * 3437160Sgblack@eecs.umich.edu sext<16>(bits(Reg2, 15, 0)); 3447160Sgblack@eecs.umich.edu ''') 3457160Sgblack@eecs.umich.edu buildMult4InstUnCc("umaal", '''resTemp = Reg2.ud * Reg3.ud + 3467160Sgblack@eecs.umich.edu Reg0.ud + Reg1.ud; 3477160Sgblack@eecs.umich.edu Reg0.ud = (uint32_t)resTemp; 3487160Sgblack@eecs.umich.edu Reg1.ud = (uint32_t)(resTemp >> 32); 3497160Sgblack@eecs.umich.edu ''') 3507160Sgblack@eecs.umich.edu buildMult4Inst ("umlal", '''resTemp = Reg2.ud * Reg3.ud + Reg0.ud + 3517160Sgblack@eecs.umich.edu (Reg1.ud << 32); 3527160Sgblack@eecs.umich.edu Reg0.ud = (uint32_t)resTemp; 3537160Sgblack@eecs.umich.edu Reg1.ud = (uint32_t)(resTemp >> 32); 3547160Sgblack@eecs.umich.edu ''', "llbit") 3557160Sgblack@eecs.umich.edu buildMult4Inst ("umull", '''resTemp = Reg2.ud * Reg3.ud; 3567160Sgblack@eecs.umich.edu Reg0 = (uint32_t)resTemp; 3577160Sgblack@eecs.umich.edu Reg1 = (uint32_t)(resTemp >> 32); 3587160Sgblack@eecs.umich.edu ''', "llbit") 3597160Sgblack@eecs.umich.edu}}; 360