misc.isa revision 7692
17199Sgblack@eecs.umich.edu// -*- mode:c++ -*- 27199Sgblack@eecs.umich.edu 37199Sgblack@eecs.umich.edu// Copyright (c) 2010 ARM Limited 47199Sgblack@eecs.umich.edu// All rights reserved 57199Sgblack@eecs.umich.edu// 67199Sgblack@eecs.umich.edu// The license below extends only to copyright in the software and shall 77199Sgblack@eecs.umich.edu// not be construed as granting a license to any other intellectual 87199Sgblack@eecs.umich.edu// property including but not limited to intellectual property relating 97199Sgblack@eecs.umich.edu// to a hardware implementation of the functionality of the software 107199Sgblack@eecs.umich.edu// licensed hereunder. You may use the software subject to the license 117199Sgblack@eecs.umich.edu// terms below provided that you ensure that this notice is replicated 127199Sgblack@eecs.umich.edu// unmodified and in its entirety in all distributions of the software, 137199Sgblack@eecs.umich.edu// modified or unmodified, in source code or in binary form. 147199Sgblack@eecs.umich.edu// 157199Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 167199Sgblack@eecs.umich.edu// modification, are permitted provided that the following conditions are 177199Sgblack@eecs.umich.edu// met: redistributions of source code must retain the above copyright 187199Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 197199Sgblack@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 207199Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 217199Sgblack@eecs.umich.edu// documentation and/or other materials provided with the distribution; 227199Sgblack@eecs.umich.edu// neither the name of the copyright holders nor the names of its 237199Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 247199Sgblack@eecs.umich.edu// this software without specific prior written permission. 257199Sgblack@eecs.umich.edu// 267199Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 277199Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 287199Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 297199Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 307199Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 317199Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 327199Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 337199Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 347199Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 357199Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 367199Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 377199Sgblack@eecs.umich.edu// 387199Sgblack@eecs.umich.edu// Authors: Gabe Black 397199Sgblack@eecs.umich.edu 407199Sgblack@eecs.umich.edulet {{ 417199Sgblack@eecs.umich.edu 427199Sgblack@eecs.umich.edu svcCode = ''' 437199Sgblack@eecs.umich.edu#if FULL_SYSTEM 447199Sgblack@eecs.umich.edu fault = new SupervisorCall; 457199Sgblack@eecs.umich.edu#else 467199Sgblack@eecs.umich.edu fault = new SupervisorCall(machInst); 477199Sgblack@eecs.umich.edu#endif 487199Sgblack@eecs.umich.edu ''' 497199Sgblack@eecs.umich.edu 507199Sgblack@eecs.umich.edu svcIop = InstObjParams("svc", "Svc", "PredOp", 517199Sgblack@eecs.umich.edu { "code": svcCode, 527199Sgblack@eecs.umich.edu "predicate_test": predicateTest }, ["IsSyscall"]) 537199Sgblack@eecs.umich.edu header_output = BasicDeclare.subst(svcIop) 547199Sgblack@eecs.umich.edu decoder_output = BasicConstructor.subst(svcIop) 557199Sgblack@eecs.umich.edu exec_output = PredOpExecute.subst(svcIop) 567199Sgblack@eecs.umich.edu 577199Sgblack@eecs.umich.edu}}; 587202Sgblack@eecs.umich.edu 597202Sgblack@eecs.umich.edulet {{ 607202Sgblack@eecs.umich.edu 617202Sgblack@eecs.umich.edu header_output = decoder_output = exec_output = "" 627202Sgblack@eecs.umich.edu 637202Sgblack@eecs.umich.edu mrsCpsrCode = "Dest = (Cpsr | CondCodes) & 0xF8FF03DF" 647202Sgblack@eecs.umich.edu mrsCpsrIop = InstObjParams("mrs", "MrsCpsr", "MrsOp", 657202Sgblack@eecs.umich.edu { "code": mrsCpsrCode, 667599Sminkyu.jeong@arm.com "predicate_test": condPredicateTest }, 677599Sminkyu.jeong@arm.com ["IsSerializeAfter"]) 687202Sgblack@eecs.umich.edu header_output += MrsDeclare.subst(mrsCpsrIop) 697202Sgblack@eecs.umich.edu decoder_output += MrsConstructor.subst(mrsCpsrIop) 707202Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(mrsCpsrIop) 717202Sgblack@eecs.umich.edu 727202Sgblack@eecs.umich.edu mrsSpsrCode = "Dest = Spsr" 737202Sgblack@eecs.umich.edu mrsSpsrIop = InstObjParams("mrs", "MrsSpsr", "MrsOp", 747202Sgblack@eecs.umich.edu { "code": mrsSpsrCode, 757599Sminkyu.jeong@arm.com "predicate_test": predicateTest }, 767599Sminkyu.jeong@arm.com ["IsSerializeAfter"]) 777202Sgblack@eecs.umich.edu header_output += MrsDeclare.subst(mrsSpsrIop) 787202Sgblack@eecs.umich.edu decoder_output += MrsConstructor.subst(mrsSpsrIop) 797202Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(mrsSpsrIop) 807202Sgblack@eecs.umich.edu 817202Sgblack@eecs.umich.edu msrCpsrRegCode = ''' 827400SAli.Saidi@ARM.com SCTLR sctlr = Sctlr; 837202Sgblack@eecs.umich.edu uint32_t newCpsr = 847400SAli.Saidi@ARM.com cpsrWriteByInstr(Cpsr | CondCodes, Op1, byteMask, false, sctlr.nmfi); 857202Sgblack@eecs.umich.edu Cpsr = ~CondCodesMask & newCpsr; 867202Sgblack@eecs.umich.edu CondCodes = CondCodesMask & newCpsr; 877202Sgblack@eecs.umich.edu ''' 887202Sgblack@eecs.umich.edu msrCpsrRegIop = InstObjParams("msr", "MsrCpsrReg", "MsrRegOp", 897202Sgblack@eecs.umich.edu { "code": msrCpsrRegCode, 907599Sminkyu.jeong@arm.com "predicate_test": condPredicateTest }, 917599Sminkyu.jeong@arm.com ["IsSerializeAfter","IsNonSpeculative"]) 927202Sgblack@eecs.umich.edu header_output += MsrRegDeclare.subst(msrCpsrRegIop) 937202Sgblack@eecs.umich.edu decoder_output += MsrRegConstructor.subst(msrCpsrRegIop) 947202Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(msrCpsrRegIop) 957202Sgblack@eecs.umich.edu 967202Sgblack@eecs.umich.edu msrSpsrRegCode = "Spsr = spsrWriteByInstr(Spsr, Op1, byteMask, false);" 977202Sgblack@eecs.umich.edu msrSpsrRegIop = InstObjParams("msr", "MsrSpsrReg", "MsrRegOp", 987202Sgblack@eecs.umich.edu { "code": msrSpsrRegCode, 997599Sminkyu.jeong@arm.com "predicate_test": predicateTest }, 1007599Sminkyu.jeong@arm.com ["IsSerializeAfter","IsNonSpeculative"]) 1017202Sgblack@eecs.umich.edu header_output += MsrRegDeclare.subst(msrSpsrRegIop) 1027202Sgblack@eecs.umich.edu decoder_output += MsrRegConstructor.subst(msrSpsrRegIop) 1037202Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(msrSpsrRegIop) 1047202Sgblack@eecs.umich.edu 1057202Sgblack@eecs.umich.edu msrCpsrImmCode = ''' 1067400SAli.Saidi@ARM.com SCTLR sctlr = Sctlr; 1077202Sgblack@eecs.umich.edu uint32_t newCpsr = 1087400SAli.Saidi@ARM.com cpsrWriteByInstr(Cpsr | CondCodes, imm, byteMask, false, sctlr.nmfi); 1097202Sgblack@eecs.umich.edu Cpsr = ~CondCodesMask & newCpsr; 1107202Sgblack@eecs.umich.edu CondCodes = CondCodesMask & newCpsr; 1117202Sgblack@eecs.umich.edu ''' 1127202Sgblack@eecs.umich.edu msrCpsrImmIop = InstObjParams("msr", "MsrCpsrImm", "MsrImmOp", 1137202Sgblack@eecs.umich.edu { "code": msrCpsrImmCode, 1147599Sminkyu.jeong@arm.com "predicate_test": condPredicateTest }, 1157599Sminkyu.jeong@arm.com ["IsSerializeAfter","IsNonSpeculative"]) 1167202Sgblack@eecs.umich.edu header_output += MsrImmDeclare.subst(msrCpsrImmIop) 1177202Sgblack@eecs.umich.edu decoder_output += MsrImmConstructor.subst(msrCpsrImmIop) 1187202Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(msrCpsrImmIop) 1197202Sgblack@eecs.umich.edu 1207202Sgblack@eecs.umich.edu msrSpsrImmCode = "Spsr = spsrWriteByInstr(Spsr, imm, byteMask, false);" 1217202Sgblack@eecs.umich.edu msrSpsrImmIop = InstObjParams("msr", "MsrSpsrImm", "MsrImmOp", 1227202Sgblack@eecs.umich.edu { "code": msrSpsrImmCode, 1237599Sminkyu.jeong@arm.com "predicate_test": predicateTest }, 1247599Sminkyu.jeong@arm.com ["IsSerializeAfter","IsNonSpeculative"]) 1257202Sgblack@eecs.umich.edu header_output += MsrImmDeclare.subst(msrSpsrImmIop) 1267202Sgblack@eecs.umich.edu decoder_output += MsrImmConstructor.subst(msrSpsrImmIop) 1277202Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(msrSpsrImmIop) 1287209Sgblack@eecs.umich.edu 1297209Sgblack@eecs.umich.edu revCode = ''' 1307209Sgblack@eecs.umich.edu uint32_t val = Op1; 1317209Sgblack@eecs.umich.edu Dest = swap_byte(val); 1327209Sgblack@eecs.umich.edu ''' 1337261Sgblack@eecs.umich.edu revIop = InstObjParams("rev", "Rev", "RegRegOp", 1347209Sgblack@eecs.umich.edu { "code": revCode, 1357209Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 1367261Sgblack@eecs.umich.edu header_output += RegRegOpDeclare.subst(revIop) 1377261Sgblack@eecs.umich.edu decoder_output += RegRegOpConstructor.subst(revIop) 1387209Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(revIop) 1397209Sgblack@eecs.umich.edu 1407209Sgblack@eecs.umich.edu rev16Code = ''' 1417209Sgblack@eecs.umich.edu uint32_t val = Op1; 1427209Sgblack@eecs.umich.edu Dest = (bits(val, 15, 8) << 0) | 1437209Sgblack@eecs.umich.edu (bits(val, 7, 0) << 8) | 1447209Sgblack@eecs.umich.edu (bits(val, 31, 24) << 16) | 1457209Sgblack@eecs.umich.edu (bits(val, 23, 16) << 24); 1467209Sgblack@eecs.umich.edu ''' 1477261Sgblack@eecs.umich.edu rev16Iop = InstObjParams("rev16", "Rev16", "RegRegOp", 1487209Sgblack@eecs.umich.edu { "code": rev16Code, 1497209Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 1507261Sgblack@eecs.umich.edu header_output += RegRegOpDeclare.subst(rev16Iop) 1517261Sgblack@eecs.umich.edu decoder_output += RegRegOpConstructor.subst(rev16Iop) 1527209Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(rev16Iop) 1537209Sgblack@eecs.umich.edu 1547209Sgblack@eecs.umich.edu revshCode = ''' 1557209Sgblack@eecs.umich.edu uint16_t val = Op1; 1567209Sgblack@eecs.umich.edu Dest = sext<16>(swap_byte(val)); 1577209Sgblack@eecs.umich.edu ''' 1587261Sgblack@eecs.umich.edu revshIop = InstObjParams("revsh", "Revsh", "RegRegOp", 1597209Sgblack@eecs.umich.edu { "code": revshCode, 1607209Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 1617261Sgblack@eecs.umich.edu header_output += RegRegOpDeclare.subst(revshIop) 1627261Sgblack@eecs.umich.edu decoder_output += RegRegOpConstructor.subst(revshIop) 1637209Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(revshIop) 1647226Sgblack@eecs.umich.edu 1657249Sgblack@eecs.umich.edu rbitCode = ''' 1667249Sgblack@eecs.umich.edu uint8_t *opBytes = (uint8_t *)&Op1; 1677249Sgblack@eecs.umich.edu uint32_t resTemp; 1687249Sgblack@eecs.umich.edu uint8_t *destBytes = (uint8_t *)&resTemp; 1697249Sgblack@eecs.umich.edu // This reverses the bytes and bits of the input, or so says the 1707249Sgblack@eecs.umich.edu // internet. 1717249Sgblack@eecs.umich.edu for (int i = 0; i < 4; i++) { 1727249Sgblack@eecs.umich.edu uint32_t temp = opBytes[i]; 1737249Sgblack@eecs.umich.edu temp = (temp * 0x0802 & 0x22110) | (temp * 0x8020 & 0x88440); 1747249Sgblack@eecs.umich.edu destBytes[3 - i] = (temp * 0x10101) >> 16; 1757249Sgblack@eecs.umich.edu } 1767249Sgblack@eecs.umich.edu Dest = resTemp; 1777249Sgblack@eecs.umich.edu ''' 1787261Sgblack@eecs.umich.edu rbitIop = InstObjParams("rbit", "Rbit", "RegRegOp", 1797249Sgblack@eecs.umich.edu { "code": rbitCode, 1807249Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 1817261Sgblack@eecs.umich.edu header_output += RegRegOpDeclare.subst(rbitIop) 1827261Sgblack@eecs.umich.edu decoder_output += RegRegOpConstructor.subst(rbitIop) 1837249Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(rbitIop) 1847249Sgblack@eecs.umich.edu 1857251Sgblack@eecs.umich.edu clzCode = ''' 1867251Sgblack@eecs.umich.edu Dest = (Op1 == 0) ? 32 : (31 - findMsbSet(Op1)); 1877251Sgblack@eecs.umich.edu ''' 1887261Sgblack@eecs.umich.edu clzIop = InstObjParams("clz", "Clz", "RegRegOp", 1897251Sgblack@eecs.umich.edu { "code": clzCode, 1907251Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 1917261Sgblack@eecs.umich.edu header_output += RegRegOpDeclare.subst(clzIop) 1927261Sgblack@eecs.umich.edu decoder_output += RegRegOpConstructor.subst(clzIop) 1937251Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(clzIop) 1947251Sgblack@eecs.umich.edu 1957226Sgblack@eecs.umich.edu ssatCode = ''' 1967226Sgblack@eecs.umich.edu int32_t operand = shift_rm_imm(Op1, shiftAmt, shiftType, 0); 1977226Sgblack@eecs.umich.edu int32_t res; 1987232Sgblack@eecs.umich.edu if (satInt(res, operand, imm)) 1997226Sgblack@eecs.umich.edu CondCodes = CondCodes | (1 << 27); 2007226Sgblack@eecs.umich.edu else 2017226Sgblack@eecs.umich.edu CondCodes = CondCodes; 2027226Sgblack@eecs.umich.edu Dest = res; 2037226Sgblack@eecs.umich.edu ''' 2047232Sgblack@eecs.umich.edu ssatIop = InstObjParams("ssat", "Ssat", "RegImmRegShiftOp", 2057226Sgblack@eecs.umich.edu { "code": ssatCode, 2067422Sgblack@eecs.umich.edu "predicate_test": condPredicateTest }, []) 2077232Sgblack@eecs.umich.edu header_output += RegImmRegShiftOpDeclare.subst(ssatIop) 2087232Sgblack@eecs.umich.edu decoder_output += RegImmRegShiftOpConstructor.subst(ssatIop) 2097226Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(ssatIop) 2107226Sgblack@eecs.umich.edu 2117226Sgblack@eecs.umich.edu usatCode = ''' 2127226Sgblack@eecs.umich.edu int32_t operand = shift_rm_imm(Op1, shiftAmt, shiftType, 0); 2137226Sgblack@eecs.umich.edu int32_t res; 2147232Sgblack@eecs.umich.edu if (uSatInt(res, operand, imm)) 2157226Sgblack@eecs.umich.edu CondCodes = CondCodes | (1 << 27); 2167226Sgblack@eecs.umich.edu else 2177226Sgblack@eecs.umich.edu CondCodes = CondCodes; 2187226Sgblack@eecs.umich.edu Dest = res; 2197226Sgblack@eecs.umich.edu ''' 2207232Sgblack@eecs.umich.edu usatIop = InstObjParams("usat", "Usat", "RegImmRegShiftOp", 2217226Sgblack@eecs.umich.edu { "code": usatCode, 2227422Sgblack@eecs.umich.edu "predicate_test": condPredicateTest }, []) 2237232Sgblack@eecs.umich.edu header_output += RegImmRegShiftOpDeclare.subst(usatIop) 2247232Sgblack@eecs.umich.edu decoder_output += RegImmRegShiftOpConstructor.subst(usatIop) 2257226Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(usatIop) 2267226Sgblack@eecs.umich.edu 2277226Sgblack@eecs.umich.edu ssat16Code = ''' 2287226Sgblack@eecs.umich.edu int32_t res; 2297226Sgblack@eecs.umich.edu uint32_t resTemp = 0; 2307226Sgblack@eecs.umich.edu CondCodes = CondCodes; 2317226Sgblack@eecs.umich.edu int32_t argLow = sext<16>(bits(Op1, 15, 0)); 2327226Sgblack@eecs.umich.edu int32_t argHigh = sext<16>(bits(Op1, 31, 16)); 2337232Sgblack@eecs.umich.edu if (satInt(res, argLow, imm)) 2347226Sgblack@eecs.umich.edu CondCodes = CondCodes | (1 << 27); 2357226Sgblack@eecs.umich.edu replaceBits(resTemp, 15, 0, res); 2367232Sgblack@eecs.umich.edu if (satInt(res, argHigh, imm)) 2377226Sgblack@eecs.umich.edu CondCodes = CondCodes | (1 << 27); 2387226Sgblack@eecs.umich.edu replaceBits(resTemp, 31, 16, res); 2397226Sgblack@eecs.umich.edu Dest = resTemp; 2407226Sgblack@eecs.umich.edu ''' 2417232Sgblack@eecs.umich.edu ssat16Iop = InstObjParams("ssat16", "Ssat16", "RegImmRegOp", 2427226Sgblack@eecs.umich.edu { "code": ssat16Code, 2437422Sgblack@eecs.umich.edu "predicate_test": condPredicateTest }, []) 2447232Sgblack@eecs.umich.edu header_output += RegImmRegOpDeclare.subst(ssat16Iop) 2457232Sgblack@eecs.umich.edu decoder_output += RegImmRegOpConstructor.subst(ssat16Iop) 2467226Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(ssat16Iop) 2477226Sgblack@eecs.umich.edu 2487226Sgblack@eecs.umich.edu usat16Code = ''' 2497226Sgblack@eecs.umich.edu int32_t res; 2507226Sgblack@eecs.umich.edu uint32_t resTemp = 0; 2517226Sgblack@eecs.umich.edu CondCodes = CondCodes; 2527226Sgblack@eecs.umich.edu int32_t argLow = sext<16>(bits(Op1, 15, 0)); 2537226Sgblack@eecs.umich.edu int32_t argHigh = sext<16>(bits(Op1, 31, 16)); 2547232Sgblack@eecs.umich.edu if (uSatInt(res, argLow, imm)) 2557226Sgblack@eecs.umich.edu CondCodes = CondCodes | (1 << 27); 2567226Sgblack@eecs.umich.edu replaceBits(resTemp, 15, 0, res); 2577232Sgblack@eecs.umich.edu if (uSatInt(res, argHigh, imm)) 2587226Sgblack@eecs.umich.edu CondCodes = CondCodes | (1 << 27); 2597226Sgblack@eecs.umich.edu replaceBits(resTemp, 31, 16, res); 2607226Sgblack@eecs.umich.edu Dest = resTemp; 2617226Sgblack@eecs.umich.edu ''' 2627232Sgblack@eecs.umich.edu usat16Iop = InstObjParams("usat16", "Usat16", "RegImmRegOp", 2637226Sgblack@eecs.umich.edu { "code": usat16Code, 2647422Sgblack@eecs.umich.edu "predicate_test": condPredicateTest }, []) 2657232Sgblack@eecs.umich.edu header_output += RegImmRegOpDeclare.subst(usat16Iop) 2667232Sgblack@eecs.umich.edu decoder_output += RegImmRegOpConstructor.subst(usat16Iop) 2677226Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(usat16Iop) 2687234Sgblack@eecs.umich.edu 2697234Sgblack@eecs.umich.edu sxtbIop = InstObjParams("sxtb", "Sxtb", "RegImmRegOp", 2707234Sgblack@eecs.umich.edu { "code": 2717234Sgblack@eecs.umich.edu "Dest = sext<8>((uint8_t)(Op1.ud >> imm));", 2727234Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 2737234Sgblack@eecs.umich.edu header_output += RegImmRegOpDeclare.subst(sxtbIop) 2747234Sgblack@eecs.umich.edu decoder_output += RegImmRegOpConstructor.subst(sxtbIop) 2757234Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(sxtbIop) 2767234Sgblack@eecs.umich.edu 2777234Sgblack@eecs.umich.edu sxtabIop = InstObjParams("sxtab", "Sxtab", "RegRegRegImmOp", 2787234Sgblack@eecs.umich.edu { "code": 2797234Sgblack@eecs.umich.edu ''' 2807234Sgblack@eecs.umich.edu Dest = sext<8>((uint8_t)(Op2.ud >> imm)) + 2817234Sgblack@eecs.umich.edu Op1; 2827234Sgblack@eecs.umich.edu ''', 2837234Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 2847234Sgblack@eecs.umich.edu header_output += RegRegRegImmOpDeclare.subst(sxtabIop) 2857234Sgblack@eecs.umich.edu decoder_output += RegRegRegImmOpConstructor.subst(sxtabIop) 2867234Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(sxtabIop) 2877234Sgblack@eecs.umich.edu 2887234Sgblack@eecs.umich.edu sxtb16Code = ''' 2897234Sgblack@eecs.umich.edu uint32_t resTemp = 0; 2907234Sgblack@eecs.umich.edu replaceBits(resTemp, 15, 0, sext<8>(bits(Op1, imm + 7, imm))); 2917234Sgblack@eecs.umich.edu replaceBits(resTemp, 31, 16, 2927234Sgblack@eecs.umich.edu sext<8>(bits(Op1, (imm + 23) % 32, (imm + 16) % 32))); 2937234Sgblack@eecs.umich.edu Dest = resTemp; 2947234Sgblack@eecs.umich.edu ''' 2957234Sgblack@eecs.umich.edu sxtb16Iop = InstObjParams("sxtb16", "Sxtb16", "RegImmRegOp", 2967234Sgblack@eecs.umich.edu { "code": sxtb16Code, 2977234Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 2987234Sgblack@eecs.umich.edu header_output += RegImmRegOpDeclare.subst(sxtb16Iop) 2997234Sgblack@eecs.umich.edu decoder_output += RegImmRegOpConstructor.subst(sxtb16Iop) 3007234Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(sxtb16Iop) 3017234Sgblack@eecs.umich.edu 3027234Sgblack@eecs.umich.edu sxtab16Code = ''' 3037234Sgblack@eecs.umich.edu uint32_t resTemp = 0; 3047234Sgblack@eecs.umich.edu replaceBits(resTemp, 15, 0, sext<8>(bits(Op2, imm + 7, imm)) + 3057234Sgblack@eecs.umich.edu bits(Op1, 15, 0)); 3067234Sgblack@eecs.umich.edu replaceBits(resTemp, 31, 16, 3077234Sgblack@eecs.umich.edu sext<8>(bits(Op2, (imm + 23) % 32, (imm + 16) % 32)) + 3087234Sgblack@eecs.umich.edu bits(Op1, 31, 16)); 3097234Sgblack@eecs.umich.edu Dest = resTemp; 3107234Sgblack@eecs.umich.edu ''' 3117234Sgblack@eecs.umich.edu sxtab16Iop = InstObjParams("sxtab16", "Sxtab16", "RegRegRegImmOp", 3127234Sgblack@eecs.umich.edu { "code": sxtab16Code, 3137234Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3147234Sgblack@eecs.umich.edu header_output += RegRegRegImmOpDeclare.subst(sxtab16Iop) 3157234Sgblack@eecs.umich.edu decoder_output += RegRegRegImmOpConstructor.subst(sxtab16Iop) 3167234Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(sxtab16Iop) 3177234Sgblack@eecs.umich.edu 3187234Sgblack@eecs.umich.edu sxthCode = ''' 3197234Sgblack@eecs.umich.edu uint64_t rotated = (uint32_t)Op1; 3207234Sgblack@eecs.umich.edu rotated = (rotated | (rotated << 32)) >> imm; 3217234Sgblack@eecs.umich.edu Dest = sext<16>((uint16_t)rotated); 3227234Sgblack@eecs.umich.edu ''' 3237234Sgblack@eecs.umich.edu sxthIop = InstObjParams("sxth", "Sxth", "RegImmRegOp", 3247234Sgblack@eecs.umich.edu { "code": sxthCode, 3257234Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3267234Sgblack@eecs.umich.edu header_output += RegImmRegOpDeclare.subst(sxthIop) 3277234Sgblack@eecs.umich.edu decoder_output += RegImmRegOpConstructor.subst(sxthIop) 3287234Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(sxthIop) 3297234Sgblack@eecs.umich.edu 3307234Sgblack@eecs.umich.edu sxtahCode = ''' 3317234Sgblack@eecs.umich.edu uint64_t rotated = (uint32_t)Op2; 3327234Sgblack@eecs.umich.edu rotated = (rotated | (rotated << 32)) >> imm; 3337234Sgblack@eecs.umich.edu Dest = sext<16>((uint16_t)rotated) + Op1; 3347234Sgblack@eecs.umich.edu ''' 3357234Sgblack@eecs.umich.edu sxtahIop = InstObjParams("sxtah", "Sxtah", "RegRegRegImmOp", 3367234Sgblack@eecs.umich.edu { "code": sxtahCode, 3377234Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3387234Sgblack@eecs.umich.edu header_output += RegRegRegImmOpDeclare.subst(sxtahIop) 3397234Sgblack@eecs.umich.edu decoder_output += RegRegRegImmOpConstructor.subst(sxtahIop) 3407234Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(sxtahIop) 3417234Sgblack@eecs.umich.edu 3427234Sgblack@eecs.umich.edu uxtbIop = InstObjParams("uxtb", "Uxtb", "RegImmRegOp", 3437234Sgblack@eecs.umich.edu { "code": "Dest = (uint8_t)(Op1.ud >> imm);", 3447234Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3457234Sgblack@eecs.umich.edu header_output += RegImmRegOpDeclare.subst(uxtbIop) 3467234Sgblack@eecs.umich.edu decoder_output += RegImmRegOpConstructor.subst(uxtbIop) 3477234Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(uxtbIop) 3487234Sgblack@eecs.umich.edu 3497234Sgblack@eecs.umich.edu uxtabIop = InstObjParams("uxtab", "Uxtab", "RegRegRegImmOp", 3507234Sgblack@eecs.umich.edu { "code": 3517234Sgblack@eecs.umich.edu "Dest = (uint8_t)(Op2.ud >> imm) + Op1;", 3527234Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3537234Sgblack@eecs.umich.edu header_output += RegRegRegImmOpDeclare.subst(uxtabIop) 3547234Sgblack@eecs.umich.edu decoder_output += RegRegRegImmOpConstructor.subst(uxtabIop) 3557234Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(uxtabIop) 3567234Sgblack@eecs.umich.edu 3577234Sgblack@eecs.umich.edu uxtb16Code = ''' 3587234Sgblack@eecs.umich.edu uint32_t resTemp = 0; 3597234Sgblack@eecs.umich.edu replaceBits(resTemp, 15, 0, (uint8_t)(bits(Op1, imm + 7, imm))); 3607234Sgblack@eecs.umich.edu replaceBits(resTemp, 31, 16, 3617234Sgblack@eecs.umich.edu (uint8_t)(bits(Op1, (imm + 23) % 32, (imm + 16) % 32))); 3627234Sgblack@eecs.umich.edu Dest = resTemp; 3637234Sgblack@eecs.umich.edu ''' 3647234Sgblack@eecs.umich.edu uxtb16Iop = InstObjParams("uxtb16", "Uxtb16", "RegImmRegOp", 3657234Sgblack@eecs.umich.edu { "code": uxtb16Code, 3667234Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3677234Sgblack@eecs.umich.edu header_output += RegImmRegOpDeclare.subst(uxtb16Iop) 3687234Sgblack@eecs.umich.edu decoder_output += RegImmRegOpConstructor.subst(uxtb16Iop) 3697234Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(uxtb16Iop) 3707234Sgblack@eecs.umich.edu 3717234Sgblack@eecs.umich.edu uxtab16Code = ''' 3727234Sgblack@eecs.umich.edu uint32_t resTemp = 0; 3737234Sgblack@eecs.umich.edu replaceBits(resTemp, 15, 0, (uint8_t)(bits(Op2, imm + 7, imm)) + 3747234Sgblack@eecs.umich.edu bits(Op1, 15, 0)); 3757234Sgblack@eecs.umich.edu replaceBits(resTemp, 31, 16, 3767234Sgblack@eecs.umich.edu (uint8_t)(bits(Op2, (imm + 23) % 32, (imm + 16) % 32)) + 3777234Sgblack@eecs.umich.edu bits(Op1, 31, 16)); 3787234Sgblack@eecs.umich.edu Dest = resTemp; 3797234Sgblack@eecs.umich.edu ''' 3807234Sgblack@eecs.umich.edu uxtab16Iop = InstObjParams("uxtab16", "Uxtab16", "RegRegRegImmOp", 3817234Sgblack@eecs.umich.edu { "code": uxtab16Code, 3827234Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3837234Sgblack@eecs.umich.edu header_output += RegRegRegImmOpDeclare.subst(uxtab16Iop) 3847234Sgblack@eecs.umich.edu decoder_output += RegRegRegImmOpConstructor.subst(uxtab16Iop) 3857234Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(uxtab16Iop) 3867234Sgblack@eecs.umich.edu 3877234Sgblack@eecs.umich.edu uxthCode = ''' 3887234Sgblack@eecs.umich.edu uint64_t rotated = (uint32_t)Op1; 3897234Sgblack@eecs.umich.edu rotated = (rotated | (rotated << 32)) >> imm; 3907234Sgblack@eecs.umich.edu Dest = (uint16_t)rotated; 3917234Sgblack@eecs.umich.edu ''' 3927234Sgblack@eecs.umich.edu uxthIop = InstObjParams("uxth", "Uxth", "RegImmRegOp", 3937234Sgblack@eecs.umich.edu { "code": uxthCode, 3947234Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3957234Sgblack@eecs.umich.edu header_output += RegImmRegOpDeclare.subst(uxthIop) 3967234Sgblack@eecs.umich.edu decoder_output += RegImmRegOpConstructor.subst(uxthIop) 3977234Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(uxthIop) 3987234Sgblack@eecs.umich.edu 3997234Sgblack@eecs.umich.edu uxtahCode = ''' 4007234Sgblack@eecs.umich.edu uint64_t rotated = (uint32_t)Op2; 4017234Sgblack@eecs.umich.edu rotated = (rotated | (rotated << 32)) >> imm; 4027234Sgblack@eecs.umich.edu Dest = (uint16_t)rotated + Op1; 4037234Sgblack@eecs.umich.edu ''' 4047234Sgblack@eecs.umich.edu uxtahIop = InstObjParams("uxtah", "Uxtah", "RegRegRegImmOp", 4057234Sgblack@eecs.umich.edu { "code": uxtahCode, 4067234Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 4077234Sgblack@eecs.umich.edu header_output += RegRegRegImmOpDeclare.subst(uxtahIop) 4087234Sgblack@eecs.umich.edu decoder_output += RegRegRegImmOpConstructor.subst(uxtahIop) 4097234Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(uxtahIop) 4107239Sgblack@eecs.umich.edu 4117239Sgblack@eecs.umich.edu selCode = ''' 4127239Sgblack@eecs.umich.edu uint32_t resTemp = 0; 4137239Sgblack@eecs.umich.edu for (unsigned i = 0; i < 4; i++) { 4147239Sgblack@eecs.umich.edu int low = i * 8; 4157239Sgblack@eecs.umich.edu int high = low + 7; 4167239Sgblack@eecs.umich.edu replaceBits(resTemp, high, low, 4177239Sgblack@eecs.umich.edu bits(CondCodes, 16 + i) ? 4187239Sgblack@eecs.umich.edu bits(Op1, high, low) : bits(Op2, high, low)); 4197239Sgblack@eecs.umich.edu } 4207239Sgblack@eecs.umich.edu Dest = resTemp; 4217239Sgblack@eecs.umich.edu ''' 4227239Sgblack@eecs.umich.edu selIop = InstObjParams("sel", "Sel", "RegRegRegOp", 4237239Sgblack@eecs.umich.edu { "code": selCode, 4247422Sgblack@eecs.umich.edu "predicate_test": condPredicateTest }, []) 4257239Sgblack@eecs.umich.edu header_output += RegRegRegOpDeclare.subst(selIop) 4267239Sgblack@eecs.umich.edu decoder_output += RegRegRegOpConstructor.subst(selIop) 4277239Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(selIop) 4287242Sgblack@eecs.umich.edu 4297242Sgblack@eecs.umich.edu usad8Code = ''' 4307242Sgblack@eecs.umich.edu uint32_t resTemp = 0; 4317242Sgblack@eecs.umich.edu for (unsigned i = 0; i < 4; i++) { 4327242Sgblack@eecs.umich.edu int low = i * 8; 4337242Sgblack@eecs.umich.edu int high = low + 7; 4347242Sgblack@eecs.umich.edu int32_t diff = bits(Op1, high, low) - 4357242Sgblack@eecs.umich.edu bits(Op2, high, low); 4367242Sgblack@eecs.umich.edu resTemp += ((diff < 0) ? -diff : diff); 4377242Sgblack@eecs.umich.edu } 4387242Sgblack@eecs.umich.edu Dest = resTemp; 4397242Sgblack@eecs.umich.edu ''' 4407242Sgblack@eecs.umich.edu usad8Iop = InstObjParams("usad8", "Usad8", "RegRegRegOp", 4417242Sgblack@eecs.umich.edu { "code": usad8Code, 4427242Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 4437242Sgblack@eecs.umich.edu header_output += RegRegRegOpDeclare.subst(usad8Iop) 4447242Sgblack@eecs.umich.edu decoder_output += RegRegRegOpConstructor.subst(usad8Iop) 4457242Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(usad8Iop) 4467242Sgblack@eecs.umich.edu 4477242Sgblack@eecs.umich.edu usada8Code = ''' 4487242Sgblack@eecs.umich.edu uint32_t resTemp = 0; 4497242Sgblack@eecs.umich.edu for (unsigned i = 0; i < 4; i++) { 4507242Sgblack@eecs.umich.edu int low = i * 8; 4517242Sgblack@eecs.umich.edu int high = low + 7; 4527242Sgblack@eecs.umich.edu int32_t diff = bits(Op1, high, low) - 4537242Sgblack@eecs.umich.edu bits(Op2, high, low); 4547242Sgblack@eecs.umich.edu resTemp += ((diff < 0) ? -diff : diff); 4557242Sgblack@eecs.umich.edu } 4567242Sgblack@eecs.umich.edu Dest = Op3 + resTemp; 4577242Sgblack@eecs.umich.edu ''' 4587242Sgblack@eecs.umich.edu usada8Iop = InstObjParams("usada8", "Usada8", "RegRegRegRegOp", 4597242Sgblack@eecs.umich.edu { "code": usada8Code, 4607242Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 4617242Sgblack@eecs.umich.edu header_output += RegRegRegRegOpDeclare.subst(usada8Iop) 4627242Sgblack@eecs.umich.edu decoder_output += RegRegRegRegOpConstructor.subst(usada8Iop) 4637242Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(usada8Iop) 4647247Sgblack@eecs.umich.edu 4657410Sgblack@eecs.umich.edu bkptIop = InstObjParams("bkpt", "BkptInst", "ArmStaticInst", 4667410Sgblack@eecs.umich.edu "return new PrefetchAbort(PC, ArmFault::DebugEvent);") 4677410Sgblack@eecs.umich.edu header_output += BasicDeclare.subst(bkptIop) 4687410Sgblack@eecs.umich.edu decoder_output += BasicConstructor.subst(bkptIop) 4697410Sgblack@eecs.umich.edu exec_output += BasicExecute.subst(bkptIop) 4707410Sgblack@eecs.umich.edu 4717408Sgblack@eecs.umich.edu nopIop = InstObjParams("nop", "NopInst", "PredOp", \ 4727408Sgblack@eecs.umich.edu { "code" : "", "predicate_test" : predicateTest }) 4737247Sgblack@eecs.umich.edu header_output += BasicDeclare.subst(nopIop) 4747247Sgblack@eecs.umich.edu decoder_output += BasicConstructor.subst(nopIop) 4757408Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(nopIop) 4767408Sgblack@eecs.umich.edu 4777418Sgblack@eecs.umich.edu yieldIop = InstObjParams("yield", "YieldInst", "PredOp", \ 4787418Sgblack@eecs.umich.edu { "code" : "", "predicate_test" : predicateTest }) 4797418Sgblack@eecs.umich.edu header_output += BasicDeclare.subst(yieldIop) 4807418Sgblack@eecs.umich.edu decoder_output += BasicConstructor.subst(yieldIop) 4817418Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(yieldIop) 4827418Sgblack@eecs.umich.edu 4837418Sgblack@eecs.umich.edu wfeCode = ''' 4847418Sgblack@eecs.umich.edu#if FULL_SYSTEM 4857418Sgblack@eecs.umich.edu if (SevMailbox) 4867418Sgblack@eecs.umich.edu SevMailbox = 0; 4877418Sgblack@eecs.umich.edu else 4887418Sgblack@eecs.umich.edu PseudoInst::quiesce(xc->tcBase()); 4897418Sgblack@eecs.umich.edu#endif 4907418Sgblack@eecs.umich.edu ''' 4917418Sgblack@eecs.umich.edu wfeIop = InstObjParams("wfe", "WfeInst", "PredOp", \ 4927418Sgblack@eecs.umich.edu { "code" : wfeCode, "predicate_test" : predicateTest }, 4937648SAli.Saidi@ARM.com ["IsNonSpeculative", "IsQuiesce", "IsSerializeAfter"]) 4947418Sgblack@eecs.umich.edu header_output += BasicDeclare.subst(wfeIop) 4957418Sgblack@eecs.umich.edu decoder_output += BasicConstructor.subst(wfeIop) 4967418Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(wfeIop) 4977418Sgblack@eecs.umich.edu 4987418Sgblack@eecs.umich.edu wfiCode = ''' 4997418Sgblack@eecs.umich.edu#if FULL_SYSTEM 5007418Sgblack@eecs.umich.edu PseudoInst::quiesce(xc->tcBase()); 5017418Sgblack@eecs.umich.edu#endif 5027418Sgblack@eecs.umich.edu ''' 5037418Sgblack@eecs.umich.edu wfiIop = InstObjParams("wfi", "WfiInst", "PredOp", \ 5047418Sgblack@eecs.umich.edu { "code" : wfiCode, "predicate_test" : predicateTest }, 5057418Sgblack@eecs.umich.edu ["IsNonSpeculative", "IsQuiesce"]) 5067418Sgblack@eecs.umich.edu header_output += BasicDeclare.subst(wfiIop) 5077418Sgblack@eecs.umich.edu decoder_output += BasicConstructor.subst(wfiIop) 5087418Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(wfiIop) 5097418Sgblack@eecs.umich.edu 5107418Sgblack@eecs.umich.edu sevCode = ''' 5117418Sgblack@eecs.umich.edu // Need a way for O3 to not scoreboard these accesses as pipe flushes. 5127418Sgblack@eecs.umich.edu System *sys = xc->tcBase()->getSystemPtr(); 5137418Sgblack@eecs.umich.edu for (int x = 0; x < sys->numContexts(); x++) { 5147418Sgblack@eecs.umich.edu ThreadContext *oc = sys->getThreadContext(x); 5157418Sgblack@eecs.umich.edu oc->setMiscReg(MISCREG_SEV_MAILBOX, 1); 5167418Sgblack@eecs.umich.edu } 5177418Sgblack@eecs.umich.edu ''' 5187418Sgblack@eecs.umich.edu sevIop = InstObjParams("sev", "SevInst", "PredOp", \ 5197418Sgblack@eecs.umich.edu { "code" : sevCode, "predicate_test" : predicateTest }, 5207648SAli.Saidi@ARM.com ["IsNonSpeculative", "IsQuiesce", "IsSerializeAfter"]) 5217418Sgblack@eecs.umich.edu header_output += BasicDeclare.subst(sevIop) 5227418Sgblack@eecs.umich.edu decoder_output += BasicConstructor.subst(sevIop) 5237418Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(sevIop) 5247418Sgblack@eecs.umich.edu 5257408Sgblack@eecs.umich.edu itIop = InstObjParams("it", "ItInst", "PredOp", \ 5267408Sgblack@eecs.umich.edu { "code" : "Itstate = machInst.newItstate;", 5277648SAli.Saidi@ARM.com "predicate_test" : predicateTest }, 5287648SAli.Saidi@ARM.com ["IsNonSpeculative", "IsSerializeAfter"]) 5297408Sgblack@eecs.umich.edu header_output += BasicDeclare.subst(itIop) 5307408Sgblack@eecs.umich.edu decoder_output += BasicConstructor.subst(itIop) 5317408Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(itIop) 5327409Sgblack@eecs.umich.edu unknownCode = ''' 5337409Sgblack@eecs.umich.edu#if FULL_SYSTEM 5347409Sgblack@eecs.umich.edu return new UndefinedInstruction; 5357409Sgblack@eecs.umich.edu#else 5367409Sgblack@eecs.umich.edu return new UndefinedInstruction(machInst, true); 5377409Sgblack@eecs.umich.edu#endif 5387409Sgblack@eecs.umich.edu ''' 5397409Sgblack@eecs.umich.edu unknownIop = InstObjParams("unknown", "Unknown", "UnknownOp", \ 5407409Sgblack@eecs.umich.edu { "code": unknownCode, 5417409Sgblack@eecs.umich.edu "predicate_test": predicateTest }) 5427409Sgblack@eecs.umich.edu header_output += BasicDeclare.subst(unknownIop) 5437409Sgblack@eecs.umich.edu decoder_output += BasicConstructor.subst(unknownIop) 5447409Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(unknownIop) 5457254Sgblack@eecs.umich.edu 5467254Sgblack@eecs.umich.edu ubfxCode = ''' 5477254Sgblack@eecs.umich.edu Dest = bits(Op1, imm2, imm1); 5487254Sgblack@eecs.umich.edu ''' 5497254Sgblack@eecs.umich.edu ubfxIop = InstObjParams("ubfx", "Ubfx", "RegRegImmImmOp", 5507254Sgblack@eecs.umich.edu { "code": ubfxCode, 5517254Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 5527254Sgblack@eecs.umich.edu header_output += RegRegImmImmOpDeclare.subst(ubfxIop) 5537254Sgblack@eecs.umich.edu decoder_output += RegRegImmImmOpConstructor.subst(ubfxIop) 5547254Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(ubfxIop) 5557254Sgblack@eecs.umich.edu 5567254Sgblack@eecs.umich.edu sbfxCode = ''' 5577254Sgblack@eecs.umich.edu int32_t resTemp = bits(Op1, imm2, imm1); 5587254Sgblack@eecs.umich.edu Dest = resTemp | -(resTemp & (1 << (imm2 - imm1))); 5597254Sgblack@eecs.umich.edu ''' 5607254Sgblack@eecs.umich.edu sbfxIop = InstObjParams("sbfx", "Sbfx", "RegRegImmImmOp", 5617254Sgblack@eecs.umich.edu { "code": sbfxCode, 5627254Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 5637254Sgblack@eecs.umich.edu header_output += RegRegImmImmOpDeclare.subst(sbfxIop) 5647254Sgblack@eecs.umich.edu decoder_output += RegRegImmImmOpConstructor.subst(sbfxIop) 5657254Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(sbfxIop) 5667257Sgblack@eecs.umich.edu 5677257Sgblack@eecs.umich.edu bfcCode = ''' 5687257Sgblack@eecs.umich.edu Dest = Op1 & ~(mask(imm2 - imm1 + 1) << imm1); 5697257Sgblack@eecs.umich.edu ''' 5707257Sgblack@eecs.umich.edu bfcIop = InstObjParams("bfc", "Bfc", "RegRegImmImmOp", 5717257Sgblack@eecs.umich.edu { "code": bfcCode, 5727257Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 5737257Sgblack@eecs.umich.edu header_output += RegRegImmImmOpDeclare.subst(bfcIop) 5747257Sgblack@eecs.umich.edu decoder_output += RegRegImmImmOpConstructor.subst(bfcIop) 5757257Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(bfcIop) 5767257Sgblack@eecs.umich.edu 5777257Sgblack@eecs.umich.edu bfiCode = ''' 5787257Sgblack@eecs.umich.edu uint32_t bitMask = (mask(imm2 - imm1 + 1) << imm1); 5797257Sgblack@eecs.umich.edu Dest = ((Op1 << imm1) & bitMask) | (Dest & ~bitMask); 5807257Sgblack@eecs.umich.edu ''' 5817257Sgblack@eecs.umich.edu bfiIop = InstObjParams("bfi", "Bfi", "RegRegImmImmOp", 5827257Sgblack@eecs.umich.edu { "code": bfiCode, 5837257Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 5847257Sgblack@eecs.umich.edu header_output += RegRegImmImmOpDeclare.subst(bfiIop) 5857257Sgblack@eecs.umich.edu decoder_output += RegRegImmImmOpConstructor.subst(bfiIop) 5867257Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(bfiIop) 5877262Sgblack@eecs.umich.edu 5887347SAli.Saidi@ARM.com mrc15code = ''' 5897347SAli.Saidi@ARM.com CPSR cpsr = Cpsr; 5907347SAli.Saidi@ARM.com if (cpsr.mode == MODE_USER) 5917347SAli.Saidi@ARM.com#if FULL_SYSTEM 5927347SAli.Saidi@ARM.com return new UndefinedInstruction; 5937347SAli.Saidi@ARM.com#else 5947347SAli.Saidi@ARM.com return new UndefinedInstruction(false, mnemonic); 5957347SAli.Saidi@ARM.com#endif 5967347SAli.Saidi@ARM.com Dest = MiscOp1; 5977347SAli.Saidi@ARM.com ''' 5987347SAli.Saidi@ARM.com 5997262Sgblack@eecs.umich.edu mrc15Iop = InstObjParams("mrc", "Mrc15", "RegRegOp", 6007347SAli.Saidi@ARM.com { "code": mrc15code, 6017262Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 6027262Sgblack@eecs.umich.edu header_output += RegRegOpDeclare.subst(mrc15Iop) 6037262Sgblack@eecs.umich.edu decoder_output += RegRegOpConstructor.subst(mrc15Iop) 6047262Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(mrc15Iop) 6057262Sgblack@eecs.umich.edu 6067347SAli.Saidi@ARM.com 6077347SAli.Saidi@ARM.com mcr15code = ''' 6087347SAli.Saidi@ARM.com CPSR cpsr = Cpsr; 6097347SAli.Saidi@ARM.com if (cpsr.mode == MODE_USER) 6107347SAli.Saidi@ARM.com#if FULL_SYSTEM 6117347SAli.Saidi@ARM.com return new UndefinedInstruction; 6127347SAli.Saidi@ARM.com#else 6137347SAli.Saidi@ARM.com return new UndefinedInstruction(false, mnemonic); 6147347SAli.Saidi@ARM.com#endif 6157347SAli.Saidi@ARM.com MiscDest = Op1; 6167347SAli.Saidi@ARM.com ''' 6177262Sgblack@eecs.umich.edu mcr15Iop = InstObjParams("mcr", "Mcr15", "RegRegOp", 6187347SAli.Saidi@ARM.com { "code": mcr15code, 6197599Sminkyu.jeong@arm.com "predicate_test": predicateTest }, 6207599Sminkyu.jeong@arm.com ["IsSerializeAfter","IsNonSpeculative"]) 6217262Sgblack@eecs.umich.edu header_output += RegRegOpDeclare.subst(mcr15Iop) 6227262Sgblack@eecs.umich.edu decoder_output += RegRegOpConstructor.subst(mcr15Iop) 6237262Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(mcr15Iop) 6247283Sgblack@eecs.umich.edu 6257420Sgblack@eecs.umich.edu mrc15UserIop = InstObjParams("mrc", "Mrc15User", "RegRegOp", 6267420Sgblack@eecs.umich.edu { "code": "Dest = MiscOp1;", 6277420Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 6287420Sgblack@eecs.umich.edu header_output += RegRegOpDeclare.subst(mrc15UserIop) 6297420Sgblack@eecs.umich.edu decoder_output += RegRegOpConstructor.subst(mrc15UserIop) 6307420Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(mrc15UserIop) 6317420Sgblack@eecs.umich.edu 6327420Sgblack@eecs.umich.edu mcr15UserIop = InstObjParams("mcr", "Mcr15User", "RegRegOp", 6337420Sgblack@eecs.umich.edu { "code": "MiscDest = Op1", 6347599Sminkyu.jeong@arm.com "predicate_test": predicateTest }, 6357599Sminkyu.jeong@arm.com ["IsSerializeAfter","IsNonSpeculative"]) 6367420Sgblack@eecs.umich.edu header_output += RegRegOpDeclare.subst(mcr15UserIop) 6377420Sgblack@eecs.umich.edu decoder_output += RegRegOpConstructor.subst(mcr15UserIop) 6387420Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(mcr15UserIop) 6397420Sgblack@eecs.umich.edu 6407283Sgblack@eecs.umich.edu enterxCode = ''' 6417692SAli.Saidi@ARM.com FNPC = NPC | PcJBit | PcTBit; 6427283Sgblack@eecs.umich.edu ''' 6437283Sgblack@eecs.umich.edu enterxIop = InstObjParams("enterx", "Enterx", "PredOp", 6447283Sgblack@eecs.umich.edu { "code": enterxCode, 6457283Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 6467283Sgblack@eecs.umich.edu header_output += BasicDeclare.subst(enterxIop) 6477283Sgblack@eecs.umich.edu decoder_output += BasicConstructor.subst(enterxIop) 6487283Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(enterxIop) 6497283Sgblack@eecs.umich.edu 6507283Sgblack@eecs.umich.edu leavexCode = ''' 6517692SAli.Saidi@ARM.com FNPC = (NPC & ~PcJBit) | PcTBit; 6527283Sgblack@eecs.umich.edu ''' 6537283Sgblack@eecs.umich.edu leavexIop = InstObjParams("leavex", "Leavex", "PredOp", 6547283Sgblack@eecs.umich.edu { "code": leavexCode, 6557283Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 6567283Sgblack@eecs.umich.edu header_output += BasicDeclare.subst(leavexIop) 6577283Sgblack@eecs.umich.edu decoder_output += BasicConstructor.subst(leavexIop) 6587283Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(leavexIop) 6597307Sgblack@eecs.umich.edu 6607307Sgblack@eecs.umich.edu setendCode = ''' 6617307Sgblack@eecs.umich.edu CPSR cpsr = Cpsr; 6627307Sgblack@eecs.umich.edu cpsr.e = imm; 6637307Sgblack@eecs.umich.edu Cpsr = cpsr; 6647307Sgblack@eecs.umich.edu ''' 6657307Sgblack@eecs.umich.edu setendIop = InstObjParams("setend", "Setend", "ImmOp", 6667307Sgblack@eecs.umich.edu { "code": setendCode, 6677648SAli.Saidi@ARM.com "predicate_test": predicateTest }, 6687648SAli.Saidi@ARM.com ["IsSerializeAfter","IsNonSpeculative"]) 6697307Sgblack@eecs.umich.edu header_output += ImmOpDeclare.subst(setendIop) 6707307Sgblack@eecs.umich.edu decoder_output += ImmOpConstructor.subst(setendIop) 6717307Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(setendIop) 6727315Sgblack@eecs.umich.edu 6737603SGene.Wu@arm.com clrexCode = ''' 6747612SGene.Wu@arm.com unsigned memAccessFlags = Request::CLREX|3|Request::LLSC; 6757603SGene.Wu@arm.com fault = xc->read(0, (uint32_t&)Mem, memAccessFlags); 6767603SGene.Wu@arm.com ''' 6777603SGene.Wu@arm.com clrexIop = InstObjParams("clrex", "Clrex","PredOp", 6787603SGene.Wu@arm.com { "code": clrexCode, 6797603SGene.Wu@arm.com "predicate_test": predicateTest },[]) 6807609SGene.Wu@arm.com header_output += ClrexDeclare.subst(clrexIop) 6817603SGene.Wu@arm.com decoder_output += BasicConstructor.subst(clrexIop) 6827603SGene.Wu@arm.com exec_output += PredOpExecute.subst(clrexIop) 6837609SGene.Wu@arm.com exec_output += ClrexInitiateAcc.subst(clrexIop) 6847609SGene.Wu@arm.com exec_output += ClrexCompleteAcc.subst(clrexIop) 6857603SGene.Wu@arm.com 6867605SGene.Wu@arm.com isbCode = ''' 6877605SGene.Wu@arm.com ''' 6887605SGene.Wu@arm.com isbIop = InstObjParams("isb", "Isb", "PredOp", 6897605SGene.Wu@arm.com {"code": isbCode, 6907605SGene.Wu@arm.com "predicate_test": predicateTest}, ['IsSerializing']) 6917605SGene.Wu@arm.com header_output += BasicDeclare.subst(isbIop) 6927605SGene.Wu@arm.com decoder_output += BasicConstructor.subst(isbIop) 6937605SGene.Wu@arm.com exec_output += PredOpExecute.subst(isbIop) 6947605SGene.Wu@arm.com 6957605SGene.Wu@arm.com dsbCode = ''' 6967605SGene.Wu@arm.com ''' 6977605SGene.Wu@arm.com dsbIop = InstObjParams("dsb", "Dsb", "PredOp", 6987605SGene.Wu@arm.com {"code": dsbCode, 6997605SGene.Wu@arm.com "predicate_test": predicateTest},['IsMemBarrier']) 7007605SGene.Wu@arm.com header_output += BasicDeclare.subst(dsbIop) 7017605SGene.Wu@arm.com decoder_output += BasicConstructor.subst(dsbIop) 7027605SGene.Wu@arm.com exec_output += PredOpExecute.subst(dsbIop) 7037605SGene.Wu@arm.com 7047605SGene.Wu@arm.com dmbCode = ''' 7057605SGene.Wu@arm.com ''' 7067605SGene.Wu@arm.com dmbIop = InstObjParams("dmb", "Dmb", "PredOp", 7077605SGene.Wu@arm.com {"code": dmbCode, 7087605SGene.Wu@arm.com "predicate_test": predicateTest},['IsMemBarrier']) 7097605SGene.Wu@arm.com header_output += BasicDeclare.subst(dmbIop) 7107605SGene.Wu@arm.com decoder_output += BasicConstructor.subst(dmbIop) 7117605SGene.Wu@arm.com exec_output += PredOpExecute.subst(dmbIop) 7127605SGene.Wu@arm.com 7137613SGene.Wu@arm.com dbgCode = ''' 7147613SGene.Wu@arm.com ''' 7157613SGene.Wu@arm.com dbgIop = InstObjParams("dbg", "Dbg", "PredOp", 7167613SGene.Wu@arm.com {"code": dbgCode, 7177613SGene.Wu@arm.com "predicate_test": predicateTest}) 7187613SGene.Wu@arm.com header_output += BasicDeclare.subst(dbgIop) 7197613SGene.Wu@arm.com decoder_output += BasicConstructor.subst(dbgIop) 7207613SGene.Wu@arm.com exec_output += PredOpExecute.subst(dbgIop) 7217613SGene.Wu@arm.com 7227315Sgblack@eecs.umich.edu cpsCode = ''' 7237315Sgblack@eecs.umich.edu uint32_t mode = bits(imm, 4, 0); 7247315Sgblack@eecs.umich.edu uint32_t f = bits(imm, 5); 7257315Sgblack@eecs.umich.edu uint32_t i = bits(imm, 6); 7267315Sgblack@eecs.umich.edu uint32_t a = bits(imm, 7); 7277315Sgblack@eecs.umich.edu bool setMode = bits(imm, 8); 7287315Sgblack@eecs.umich.edu bool enable = bits(imm, 9); 7297315Sgblack@eecs.umich.edu CPSR cpsr = Cpsr; 7307400SAli.Saidi@ARM.com SCTLR sctlr = Sctlr; 7317315Sgblack@eecs.umich.edu if (cpsr.mode != MODE_USER) { 7327315Sgblack@eecs.umich.edu if (enable) { 7337315Sgblack@eecs.umich.edu if (f) cpsr.f = 0; 7347315Sgblack@eecs.umich.edu if (i) cpsr.i = 0; 7357315Sgblack@eecs.umich.edu if (a) cpsr.a = 0; 7367315Sgblack@eecs.umich.edu } else { 7377400SAli.Saidi@ARM.com if (f && !sctlr.nmfi) cpsr.f = 1; 7387315Sgblack@eecs.umich.edu if (i) cpsr.i = 1; 7397315Sgblack@eecs.umich.edu if (a) cpsr.a = 1; 7407315Sgblack@eecs.umich.edu } 7417315Sgblack@eecs.umich.edu if (setMode) { 7427315Sgblack@eecs.umich.edu cpsr.mode = mode; 7437315Sgblack@eecs.umich.edu } 7447315Sgblack@eecs.umich.edu } 7457315Sgblack@eecs.umich.edu Cpsr = cpsr; 7467315Sgblack@eecs.umich.edu ''' 7477315Sgblack@eecs.umich.edu cpsIop = InstObjParams("cps", "Cps", "ImmOp", 7487315Sgblack@eecs.umich.edu { "code": cpsCode, 7497599Sminkyu.jeong@arm.com "predicate_test": predicateTest }, 7507599Sminkyu.jeong@arm.com ["IsSerializeAfter","IsNonSpeculative"]) 7517315Sgblack@eecs.umich.edu header_output += ImmOpDeclare.subst(cpsIop) 7527315Sgblack@eecs.umich.edu decoder_output += ImmOpConstructor.subst(cpsIop) 7537315Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(cpsIop) 7547202Sgblack@eecs.umich.edu}}; 755