mem.isa revision 7590:27dbb92bbad5 
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder.  You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated
12// unmodified and in its entirety in all distributions of the software,
13// modified or unmodified, in source code or in binary form.
14//
15// Redistribution and use in source and binary forms, with or without
16// modification, are permitted provided that the following conditions are
17// met: redistributions of source code must retain the above copyright
18// notice, this list of conditions and the following disclaimer;
19// redistributions in binary form must reproduce the above copyright
20// notice, this list of conditions and the following disclaimer in the
21// documentation and/or other materials provided with the distribution;
22// neither the name of the copyright holders nor the names of its
23// contributors may be used to endorse or promote products derived from
24// this software without specific prior written permission.
25//
26// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37//
38// Authors: Gabe Black
39
40let {{
41
42    class LoadStoreInst(object):
43        def __init__(self):
44            self.fullExecTemplate = eval(self.execBase + 'Execute')
45            self.initiateAccTemplate = eval(self.execBase + 'InitiateAcc')
46            self.completeAccTemplate = eval(self.execBase + 'CompleteAcc')
47            self.declareTemplate = eval(self.decConstBase + 'Declare')
48            self.constructTemplate = eval(self.decConstBase + 'Constructor')
49
50        def fillTemplates(self, name, Name, codeBlobs, memFlags, instFlags,
51                          base = 'Memory'):
52            # Make sure flags are in lists (convert to lists if not).
53            memFlags = makeList(memFlags)
54            instFlags = makeList(instFlags)
55
56            eaCode = codeBlobs["ea_code"]
57
58            # This shouldn't be part of the eaCode, but until the exec templates
59            # are converted over it's the easiest place to put it.
60            eaCode += '\n    unsigned memAccessFlags = '
61            eaCode += (string.join(memFlags, '|') + ';')
62
63            codeBlobs["ea_code"] = eaCode
64
65            iop = InstObjParams(name, Name, base, codeBlobs, instFlags)
66
67            # (header_output, decoder_output, decode_block, exec_output)
68            return (self.declareTemplate.subst(iop),
69                    self.constructTemplate.subst(iop),
70                    self.fullExecTemplate.subst(iop)
71                    + self.initiateAccTemplate.subst(iop)
72                    + self.completeAccTemplate.subst(iop))
73
74    def pickPredicate(blobs):
75        for val in blobs.values():
76            if re.search('(?<!Opt)CondCodes', val):
77                return condPredicateTest
78        return predicateTest
79
80    def memClassName(base, post, add, writeback, \
81                     size=4, sign=False, user=False):
82        Name = base
83
84        parts = { "P" : post, "A" : add, "W" : writeback,
85                  "S" : sign, "U" : user }
86
87        for (letter, val) in parts.items():
88            if val:
89                Name += "_%sY" % letter
90            else:
91                Name += "_%sN" % letter
92
93        Name += ('_SZ%d' % size)
94
95        return Name
96
97    def buildMemSuffix(sign, size):
98        if size == 4:
99            memSuffix = ''
100        elif size == 2:
101            if sign:
102                memSuffix = '.sh'
103            else:
104                memSuffix = '.uh'
105        elif size == 1:
106            if sign:
107                memSuffix = '.sb'
108            else:
109                memSuffix = '.ub'
110        else:
111            raise Exception, "Unrecognized size for access %d" % size
112
113        return memSuffix
114
115    def buildMemBase(base, post, writeback):
116        if post and writeback:
117            base = "MemoryPostIndex<%s>" % base
118        elif not post and writeback:
119            base = "MemoryPreIndex<%s>" % base
120        elif not post and not writeback:
121            base = "MemoryOffset<%s>" % base
122        else:
123            raise Exception, "Illegal combination of post and writeback"
124        return base
125}};
126
127