mem.isa revision 7120
1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating 9// to a hardware implementation of the functionality of the software 10// licensed hereunder. You may use the software subject to the license 11// terms below provided that you ensure that this notice is replicated 12// unmodified and in its entirety in all distributions of the software, 13// modified or unmodified, in source code or in binary form. 14// 15// Redistribution and use in source and binary forms, with or without 16// modification, are permitted provided that the following conditions are 17// met: redistributions of source code must retain the above copyright 18// notice, this list of conditions and the following disclaimer; 19// redistributions in binary form must reproduce the above copyright 20// notice, this list of conditions and the following disclaimer in the 21// documentation and/or other materials provided with the distribution; 22// neither the name of the copyright holders nor the names of its 23// contributors may be used to endorse or promote products derived from 24// this software without specific prior written permission. 25// 26// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 29// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 30// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 31// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 32// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 33// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 34// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 37// 38// Authors: Gabe Black 39 40let {{ 41 def newLoadStoreBase(name, Name, imm, eaCode, accCode, memFlags, 42 instFlags, base = 'MemoryNew', execTemplateBase = ''): 43 # Make sure flags are in lists (convert to lists if not). 44 memFlags = makeList(memFlags) 45 instFlags = makeList(instFlags) 46 47 # This shouldn't be part of the eaCode, but until the exec templates 48 # are converted over it's the easiest place to put it. 49 eaCode += '\n unsigned memAccessFlags = ' 50 if memFlags: 51 eaCode += (string.join(memFlags, '|') + ';') 52 else: 53 eaCode += '0;' 54 55 predicateTest = 'testPredicate(CondCodes, condCode)' 56 57 iop = InstObjParams(name, Name, base, 58 {'ea_code': eaCode, 59 'memacc_code': accCode, 60 'predicate_test': predicateTest}, 61 instFlags) 62 63 fullExecTemplate = eval(execTemplateBase + 'Execute') 64 initiateAccTemplate = eval(execTemplateBase + 'InitiateAcc') 65 completeAccTemplate = eval(execTemplateBase + 'CompleteAcc') 66 67 if imm: 68 declareTemplate = LoadStoreImmDeclare 69 constructTemplate = LoadStoreImmConstructor 70 else: 71 declareTemplate = LoadStoreRegDeclare 72 constructTemplate = LoadStoreRegConstructor 73 74 # (header_output, decoder_output, decode_block, exec_output) 75 return (declareTemplate.subst(iop), 76 constructTemplate.subst(iop), 77 fullExecTemplate.subst(iop) 78 + initiateAccTemplate.subst(iop) 79 + completeAccTemplate.subst(iop)) 80 81 def memClassName(base, post, add, writeback, \ 82 size=4, sign=False, user=False): 83 Name = base 84 85 if post: 86 Name += '_PY' 87 else: 88 Name += '_PN' 89 90 if add: 91 Name += '_AY' 92 else: 93 Name += '_AN' 94 95 if writeback: 96 Name += '_WY' 97 else: 98 Name += '_WN' 99 100 Name += ('_SZ%d' % size) 101 102 if sign: 103 Name += '_SY' 104 else: 105 Name += '_SN' 106 107 if user: 108 Name += '_UY' 109 else: 110 Name += '_UN' 111 112 return Name 113 114 def buildMemSuffix(sign, size): 115 if size == 4: 116 memSuffix = '' 117 elif size == 2: 118 if sign: 119 memSuffix = '.sh' 120 else: 121 memSuffix = '.uh' 122 elif size == 1: 123 if sign: 124 memSuffix = '.sb' 125 else: 126 memSuffix = '.ub' 127 else: 128 raise Exception, "Unrecognized size for load %d" % size 129 130 return memSuffix 131 132 def buildMemBase(base, post, writeback): 133 if post and writeback: 134 base = "MemoryNewPostIndex<%s>" % base 135 elif not post and writeback: 136 base = "MemoryNewPreIndex<%s>" % base 137 elif not post and not writeback: 138 base = "MemoryNewOffset<%s>" % base 139 else: 140 raise Exception, "Illegal combination of post and writeback" 141 return base 142}}; 143 144