fp.isa revision 7381
17322Sgblack@eecs.umich.edu// -*- mode:c++ -*- 27322Sgblack@eecs.umich.edu 37322Sgblack@eecs.umich.edu// Copyright (c) 2010 ARM Limited 47322Sgblack@eecs.umich.edu// All rights reserved 57322Sgblack@eecs.umich.edu// 67322Sgblack@eecs.umich.edu// The license below extends only to copyright in the software and shall 77322Sgblack@eecs.umich.edu// not be construed as granting a license to any other intellectual 87322Sgblack@eecs.umich.edu// property including but not limited to intellectual property relating 97322Sgblack@eecs.umich.edu// to a hardware implementation of the functionality of the software 107322Sgblack@eecs.umich.edu// licensed hereunder. You may use the software subject to the license 117322Sgblack@eecs.umich.edu// terms below provided that you ensure that this notice is replicated 127322Sgblack@eecs.umich.edu// unmodified and in its entirety in all distributions of the software, 137322Sgblack@eecs.umich.edu// modified or unmodified, in source code or in binary form. 147322Sgblack@eecs.umich.edu// 157322Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 167322Sgblack@eecs.umich.edu// modification, are permitted provided that the following conditions are 177322Sgblack@eecs.umich.edu// met: redistributions of source code must retain the above copyright 187322Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 197322Sgblack@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 207322Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 217322Sgblack@eecs.umich.edu// documentation and/or other materials provided with the distribution; 227322Sgblack@eecs.umich.edu// neither the name of the copyright holders nor the names of its 237322Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 247322Sgblack@eecs.umich.edu// this software without specific prior written permission. 257322Sgblack@eecs.umich.edu// 267322Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 277322Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 287322Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 297322Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 307322Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 317322Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 327322Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 337322Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 347322Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 357322Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 367322Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 377322Sgblack@eecs.umich.edu// 387322Sgblack@eecs.umich.edu// Authors: Gabe Black 397322Sgblack@eecs.umich.edu 407376Sgblack@eecs.umich.eduoutput header {{ 417376Sgblack@eecs.umich.edu 427376Sgblack@eecs.umich.edutemplate <class Micro> 437376Sgblack@eecs.umich.educlass VfpMacroRegRegOp : public VfpMacroOp 447376Sgblack@eecs.umich.edu{ 457376Sgblack@eecs.umich.edu public: 467376Sgblack@eecs.umich.edu VfpMacroRegRegOp(ExtMachInst _machInst, IntRegIndex _dest, 477376Sgblack@eecs.umich.edu IntRegIndex _op1, bool _wide) : 487376Sgblack@eecs.umich.edu VfpMacroOp("VfpMacroRegRegOp", _machInst, No_OpClass, _wide) 497376Sgblack@eecs.umich.edu { 507376Sgblack@eecs.umich.edu numMicroops = machInst.fpscrLen + 1; 517376Sgblack@eecs.umich.edu assert(numMicroops > 1); 527376Sgblack@eecs.umich.edu microOps = new StaticInstPtr[numMicroops]; 537376Sgblack@eecs.umich.edu for (unsigned i = 0; i < numMicroops; i++) { 547376Sgblack@eecs.umich.edu VfpMicroMode mode = VfpMicroop; 557376Sgblack@eecs.umich.edu if (i == 0) 567376Sgblack@eecs.umich.edu mode = VfpFirstMicroop; 577376Sgblack@eecs.umich.edu else if (i == numMicroops - 1) 587376Sgblack@eecs.umich.edu mode = VfpLastMicroop; 597376Sgblack@eecs.umich.edu microOps[i] = new Micro(_machInst, _dest, _op1, mode); 607376Sgblack@eecs.umich.edu nextIdxs(_dest, _op1); 617376Sgblack@eecs.umich.edu } 627376Sgblack@eecs.umich.edu } 637376Sgblack@eecs.umich.edu 647376Sgblack@eecs.umich.edu %(BasicExecPanic)s 657376Sgblack@eecs.umich.edu}; 667376Sgblack@eecs.umich.edu 677376Sgblack@eecs.umich.edutemplate <class VfpOp> 687376Sgblack@eecs.umich.edustatic StaticInstPtr 697376Sgblack@eecs.umich.edudecodeVfpRegRegOp(ExtMachInst machInst, 707376Sgblack@eecs.umich.edu IntRegIndex dest, IntRegIndex op1, bool wide) 717376Sgblack@eecs.umich.edu{ 727376Sgblack@eecs.umich.edu if (machInst.fpscrLen == 0 || VfpMacroOp::inScalarBank(dest)) { 737376Sgblack@eecs.umich.edu return new VfpOp(machInst, dest, op1); 747376Sgblack@eecs.umich.edu } else { 757376Sgblack@eecs.umich.edu return new VfpMacroRegRegOp<VfpOp>(machInst, dest, op1, wide); 767376Sgblack@eecs.umich.edu } 777376Sgblack@eecs.umich.edu} 787376Sgblack@eecs.umich.edu 797376Sgblack@eecs.umich.edutemplate <class Micro> 807376Sgblack@eecs.umich.educlass VfpMacroRegImmOp : public VfpMacroOp 817376Sgblack@eecs.umich.edu{ 827376Sgblack@eecs.umich.edu public: 837376Sgblack@eecs.umich.edu VfpMacroRegImmOp(ExtMachInst _machInst, IntRegIndex _dest, uint64_t _imm, 847376Sgblack@eecs.umich.edu bool _wide) : 857376Sgblack@eecs.umich.edu VfpMacroOp("VfpMacroRegImmOp", _machInst, No_OpClass, _wide) 867376Sgblack@eecs.umich.edu { 877376Sgblack@eecs.umich.edu numMicroops = machInst.fpscrLen + 1; 887376Sgblack@eecs.umich.edu microOps = new StaticInstPtr[numMicroops]; 897376Sgblack@eecs.umich.edu for (unsigned i = 0; i < numMicroops; i++) { 907376Sgblack@eecs.umich.edu VfpMicroMode mode = VfpMicroop; 917376Sgblack@eecs.umich.edu if (i == 0) 927376Sgblack@eecs.umich.edu mode = VfpFirstMicroop; 937376Sgblack@eecs.umich.edu else if (i == numMicroops - 1) 947376Sgblack@eecs.umich.edu mode = VfpLastMicroop; 957376Sgblack@eecs.umich.edu microOps[i] = new Micro(_machInst, _dest, _imm, mode); 967376Sgblack@eecs.umich.edu nextIdxs(_dest); 977376Sgblack@eecs.umich.edu } 987376Sgblack@eecs.umich.edu } 997376Sgblack@eecs.umich.edu 1007376Sgblack@eecs.umich.edu %(BasicExecPanic)s 1017376Sgblack@eecs.umich.edu}; 1027376Sgblack@eecs.umich.edu 1037376Sgblack@eecs.umich.edutemplate <class VfpOp> 1047376Sgblack@eecs.umich.edustatic StaticInstPtr 1057376Sgblack@eecs.umich.edudecodeVfpRegImmOp(ExtMachInst machInst, 1067376Sgblack@eecs.umich.edu IntRegIndex dest, uint64_t imm, bool wide) 1077376Sgblack@eecs.umich.edu{ 1087376Sgblack@eecs.umich.edu if (machInst.fpscrLen == 0 || VfpMacroOp::inScalarBank(dest)) { 1097376Sgblack@eecs.umich.edu return new VfpOp(machInst, dest, imm); 1107376Sgblack@eecs.umich.edu } else { 1117376Sgblack@eecs.umich.edu return new VfpMacroRegImmOp<VfpOp>(machInst, dest, imm, wide); 1127376Sgblack@eecs.umich.edu } 1137376Sgblack@eecs.umich.edu} 1147376Sgblack@eecs.umich.edu 1157376Sgblack@eecs.umich.edutemplate <class Micro> 1167376Sgblack@eecs.umich.educlass VfpMacroRegRegImmOp : public VfpMacroOp 1177376Sgblack@eecs.umich.edu{ 1187376Sgblack@eecs.umich.edu public: 1197376Sgblack@eecs.umich.edu VfpMacroRegRegImmOp(ExtMachInst _machInst, IntRegIndex _dest, 1207376Sgblack@eecs.umich.edu IntRegIndex _op1, uint64_t _imm, bool _wide) : 1217376Sgblack@eecs.umich.edu VfpMacroOp("VfpMacroRegRegImmOp", _machInst, No_OpClass, _wide) 1227376Sgblack@eecs.umich.edu { 1237376Sgblack@eecs.umich.edu numMicroops = machInst.fpscrLen + 1; 1247376Sgblack@eecs.umich.edu microOps = new StaticInstPtr[numMicroops]; 1257376Sgblack@eecs.umich.edu for (unsigned i = 0; i < numMicroops; i++) { 1267376Sgblack@eecs.umich.edu VfpMicroMode mode = VfpMicroop; 1277376Sgblack@eecs.umich.edu if (i == 0) 1287376Sgblack@eecs.umich.edu mode = VfpFirstMicroop; 1297376Sgblack@eecs.umich.edu else if (i == numMicroops - 1) 1307376Sgblack@eecs.umich.edu mode = VfpLastMicroop; 1317376Sgblack@eecs.umich.edu microOps[i] = new Micro(_machInst, _dest, _op1, _imm, mode); 1327376Sgblack@eecs.umich.edu nextIdxs(_dest, _op1); 1337376Sgblack@eecs.umich.edu } 1347376Sgblack@eecs.umich.edu } 1357376Sgblack@eecs.umich.edu 1367376Sgblack@eecs.umich.edu %(BasicExecPanic)s 1377376Sgblack@eecs.umich.edu}; 1387376Sgblack@eecs.umich.edu 1397376Sgblack@eecs.umich.edutemplate <class VfpOp> 1407376Sgblack@eecs.umich.edustatic StaticInstPtr 1417376Sgblack@eecs.umich.edudecodeVfpRegRegImmOp(ExtMachInst machInst, IntRegIndex dest, 1427376Sgblack@eecs.umich.edu IntRegIndex op1, uint64_t imm, bool wide) 1437376Sgblack@eecs.umich.edu{ 1447376Sgblack@eecs.umich.edu if (machInst.fpscrLen == 0 || VfpMacroOp::inScalarBank(dest)) { 1457376Sgblack@eecs.umich.edu return new VfpOp(machInst, dest, op1, imm); 1467376Sgblack@eecs.umich.edu } else { 1477376Sgblack@eecs.umich.edu return new VfpMacroRegRegImmOp<VfpOp>(machInst, dest, op1, imm, wide); 1487376Sgblack@eecs.umich.edu } 1497376Sgblack@eecs.umich.edu} 1507376Sgblack@eecs.umich.edu 1517376Sgblack@eecs.umich.edutemplate <class Micro> 1527376Sgblack@eecs.umich.educlass VfpMacroRegRegRegOp : public VfpMacroOp 1537376Sgblack@eecs.umich.edu{ 1547376Sgblack@eecs.umich.edu public: 1557376Sgblack@eecs.umich.edu VfpMacroRegRegRegOp(ExtMachInst _machInst, IntRegIndex _dest, 1567376Sgblack@eecs.umich.edu IntRegIndex _op1, IntRegIndex _op2, bool _wide) : 1577376Sgblack@eecs.umich.edu VfpMacroOp("VfpMacroRegRegRegOp", _machInst, No_OpClass, _wide) 1587376Sgblack@eecs.umich.edu { 1597376Sgblack@eecs.umich.edu numMicroops = machInst.fpscrLen + 1; 1607376Sgblack@eecs.umich.edu microOps = new StaticInstPtr[numMicroops]; 1617376Sgblack@eecs.umich.edu for (unsigned i = 0; i < numMicroops; i++) { 1627376Sgblack@eecs.umich.edu VfpMicroMode mode = VfpMicroop; 1637376Sgblack@eecs.umich.edu if (i == 0) 1647376Sgblack@eecs.umich.edu mode = VfpFirstMicroop; 1657376Sgblack@eecs.umich.edu else if (i == numMicroops - 1) 1667376Sgblack@eecs.umich.edu mode = VfpLastMicroop; 1677376Sgblack@eecs.umich.edu microOps[i] = new Micro(_machInst, _dest, _op1, _op2, mode); 1687376Sgblack@eecs.umich.edu nextIdxs(_dest, _op1, _op2); 1697376Sgblack@eecs.umich.edu } 1707376Sgblack@eecs.umich.edu } 1717376Sgblack@eecs.umich.edu 1727376Sgblack@eecs.umich.edu %(BasicExecPanic)s 1737376Sgblack@eecs.umich.edu}; 1747376Sgblack@eecs.umich.edu 1757376Sgblack@eecs.umich.edutemplate <class VfpOp> 1767376Sgblack@eecs.umich.edustatic StaticInstPtr 1777376Sgblack@eecs.umich.edudecodeVfpRegRegRegOp(ExtMachInst machInst, IntRegIndex dest, 1787376Sgblack@eecs.umich.edu IntRegIndex op1, IntRegIndex op2, bool wide) 1797376Sgblack@eecs.umich.edu{ 1807376Sgblack@eecs.umich.edu if (machInst.fpscrLen == 0 || VfpMacroOp::inScalarBank(dest)) { 1817376Sgblack@eecs.umich.edu return new VfpOp(machInst, dest, op1, op2); 1827376Sgblack@eecs.umich.edu } else { 1837376Sgblack@eecs.umich.edu return new VfpMacroRegRegRegOp<VfpOp>(machInst, dest, op1, op2, wide); 1847376Sgblack@eecs.umich.edu } 1857376Sgblack@eecs.umich.edu} 1867376Sgblack@eecs.umich.edu}}; 1877376Sgblack@eecs.umich.edu 1887322Sgblack@eecs.umich.edulet {{ 1897322Sgblack@eecs.umich.edu 1907322Sgblack@eecs.umich.edu header_output = "" 1917322Sgblack@eecs.umich.edu decoder_output = "" 1927322Sgblack@eecs.umich.edu exec_output = "" 1937322Sgblack@eecs.umich.edu 1947375Sgblack@eecs.umich.edu vmsrIop = InstObjParams("vmsr", "Vmsr", "VfpRegRegOp", 1957322Sgblack@eecs.umich.edu { "code": "MiscDest = Op1;", 1967322Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 1977375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vmsrIop); 1987375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vmsrIop); 1997322Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmsrIop); 2007324Sgblack@eecs.umich.edu 2017375Sgblack@eecs.umich.edu vmrsIop = InstObjParams("vmrs", "Vmrs", "VfpRegRegOp", 2027324Sgblack@eecs.umich.edu { "code": "Dest = MiscOp1;", 2037324Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 2047375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vmrsIop); 2057375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vmrsIop); 2067324Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmrsIop); 2077333Sgblack@eecs.umich.edu 2087333Sgblack@eecs.umich.edu vmovImmSCode = ''' 2097333Sgblack@eecs.umich.edu FpDest.uw = bits(imm, 31, 0); 2107333Sgblack@eecs.umich.edu ''' 2117375Sgblack@eecs.umich.edu vmovImmSIop = InstObjParams("vmov", "VmovImmS", "VfpRegImmOp", 2127333Sgblack@eecs.umich.edu { "code": vmovImmSCode, 2137333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 2147375Sgblack@eecs.umich.edu header_output += VfpRegImmOpDeclare.subst(vmovImmSIop); 2157375Sgblack@eecs.umich.edu decoder_output += VfpRegImmOpConstructor.subst(vmovImmSIop); 2167333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmovImmSIop); 2177333Sgblack@eecs.umich.edu 2187333Sgblack@eecs.umich.edu vmovImmDCode = ''' 2197333Sgblack@eecs.umich.edu FpDestP0.uw = bits(imm, 31, 0); 2207333Sgblack@eecs.umich.edu FpDestP1.uw = bits(imm, 63, 32); 2217333Sgblack@eecs.umich.edu ''' 2227375Sgblack@eecs.umich.edu vmovImmDIop = InstObjParams("vmov", "VmovImmD", "VfpRegImmOp", 2237333Sgblack@eecs.umich.edu { "code": vmovImmDCode, 2247333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 2257375Sgblack@eecs.umich.edu header_output += VfpRegImmOpDeclare.subst(vmovImmDIop); 2267375Sgblack@eecs.umich.edu decoder_output += VfpRegImmOpConstructor.subst(vmovImmDIop); 2277333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmovImmDIop); 2287333Sgblack@eecs.umich.edu 2297333Sgblack@eecs.umich.edu vmovImmQCode = ''' 2307333Sgblack@eecs.umich.edu FpDestP0.uw = bits(imm, 31, 0); 2317333Sgblack@eecs.umich.edu FpDestP1.uw = bits(imm, 63, 32); 2327333Sgblack@eecs.umich.edu FpDestP2.uw = bits(imm, 31, 0); 2337333Sgblack@eecs.umich.edu FpDestP3.uw = bits(imm, 63, 32); 2347333Sgblack@eecs.umich.edu ''' 2357375Sgblack@eecs.umich.edu vmovImmQIop = InstObjParams("vmov", "VmovImmQ", "VfpRegImmOp", 2367333Sgblack@eecs.umich.edu { "code": vmovImmQCode, 2377333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 2387375Sgblack@eecs.umich.edu header_output += VfpRegImmOpDeclare.subst(vmovImmQIop); 2397375Sgblack@eecs.umich.edu decoder_output += VfpRegImmOpConstructor.subst(vmovImmQIop); 2407333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmovImmQIop); 2417333Sgblack@eecs.umich.edu 2427333Sgblack@eecs.umich.edu vmovRegSCode = ''' 2437333Sgblack@eecs.umich.edu FpDest.uw = FpOp1.uw; 2447333Sgblack@eecs.umich.edu ''' 2457375Sgblack@eecs.umich.edu vmovRegSIop = InstObjParams("vmov", "VmovRegS", "VfpRegRegOp", 2467333Sgblack@eecs.umich.edu { "code": vmovRegSCode, 2477333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 2487375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vmovRegSIop); 2497375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vmovRegSIop); 2507333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmovRegSIop); 2517333Sgblack@eecs.umich.edu 2527333Sgblack@eecs.umich.edu vmovRegDCode = ''' 2537333Sgblack@eecs.umich.edu FpDestP0.uw = FpOp1P0.uw; 2547333Sgblack@eecs.umich.edu FpDestP1.uw = FpOp1P1.uw; 2557333Sgblack@eecs.umich.edu ''' 2567375Sgblack@eecs.umich.edu vmovRegDIop = InstObjParams("vmov", "VmovRegD", "VfpRegRegOp", 2577333Sgblack@eecs.umich.edu { "code": vmovRegDCode, 2587333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 2597375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vmovRegDIop); 2607375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vmovRegDIop); 2617333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmovRegDIop); 2627333Sgblack@eecs.umich.edu 2637333Sgblack@eecs.umich.edu vmovRegQCode = ''' 2647333Sgblack@eecs.umich.edu FpDestP0.uw = FpOp1P0.uw; 2657333Sgblack@eecs.umich.edu FpDestP1.uw = FpOp1P1.uw; 2667333Sgblack@eecs.umich.edu FpDestP2.uw = FpOp1P2.uw; 2677333Sgblack@eecs.umich.edu FpDestP3.uw = FpOp1P3.uw; 2687333Sgblack@eecs.umich.edu ''' 2697375Sgblack@eecs.umich.edu vmovRegQIop = InstObjParams("vmov", "VmovRegQ", "VfpRegRegOp", 2707333Sgblack@eecs.umich.edu { "code": vmovRegQCode, 2717333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 2727375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vmovRegQIop); 2737375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vmovRegQIop); 2747333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmovRegQIop); 2757333Sgblack@eecs.umich.edu 2767333Sgblack@eecs.umich.edu vmovCoreRegBCode = ''' 2777333Sgblack@eecs.umich.edu FpDest.uw = insertBits(FpDest.uw, imm * 8, imm * 8 + 7, Op1.ub); 2787333Sgblack@eecs.umich.edu ''' 2797375Sgblack@eecs.umich.edu vmovCoreRegBIop = InstObjParams("vmov", "VmovCoreRegB", "VfpRegRegImmOp", 2807333Sgblack@eecs.umich.edu { "code": vmovCoreRegBCode, 2817333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 2827375Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vmovCoreRegBIop); 2837375Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vmovCoreRegBIop); 2847333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmovCoreRegBIop); 2857333Sgblack@eecs.umich.edu 2867333Sgblack@eecs.umich.edu vmovCoreRegHCode = ''' 2877333Sgblack@eecs.umich.edu FpDest.uw = insertBits(FpDest.uw, imm * 16, imm * 16 + 15, Op1.uh); 2887333Sgblack@eecs.umich.edu ''' 2897375Sgblack@eecs.umich.edu vmovCoreRegHIop = InstObjParams("vmov", "VmovCoreRegH", "VfpRegRegImmOp", 2907333Sgblack@eecs.umich.edu { "code": vmovCoreRegHCode, 2917333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 2927375Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vmovCoreRegHIop); 2937375Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vmovCoreRegHIop); 2947333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmovCoreRegHIop); 2957333Sgblack@eecs.umich.edu 2967333Sgblack@eecs.umich.edu vmovCoreRegWCode = ''' 2977333Sgblack@eecs.umich.edu FpDest.uw = Op1.uw; 2987333Sgblack@eecs.umich.edu ''' 2997375Sgblack@eecs.umich.edu vmovCoreRegWIop = InstObjParams("vmov", "VmovCoreRegW", "VfpRegRegOp", 3007333Sgblack@eecs.umich.edu { "code": vmovCoreRegWCode, 3017333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3027375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vmovCoreRegWIop); 3037375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vmovCoreRegWIop); 3047333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmovCoreRegWIop); 3057333Sgblack@eecs.umich.edu 3067333Sgblack@eecs.umich.edu vmovRegCoreUBCode = ''' 3077333Sgblack@eecs.umich.edu Dest = bits(FpOp1.uw, imm * 8, imm * 8 + 7); 3087333Sgblack@eecs.umich.edu ''' 3097375Sgblack@eecs.umich.edu vmovRegCoreUBIop = InstObjParams("vmov", "VmovRegCoreUB", "VfpRegRegImmOp", 3107333Sgblack@eecs.umich.edu { "code": vmovRegCoreUBCode, 3117333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3127375Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vmovRegCoreUBIop); 3137375Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vmovRegCoreUBIop); 3147333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmovRegCoreUBIop); 3157333Sgblack@eecs.umich.edu 3167333Sgblack@eecs.umich.edu vmovRegCoreUHCode = ''' 3177333Sgblack@eecs.umich.edu Dest = bits(FpOp1.uw, imm * 16, imm * 16 + 15); 3187333Sgblack@eecs.umich.edu ''' 3197375Sgblack@eecs.umich.edu vmovRegCoreUHIop = InstObjParams("vmov", "VmovRegCoreUH", "VfpRegRegImmOp", 3207333Sgblack@eecs.umich.edu { "code": vmovRegCoreUHCode, 3217333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3227375Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vmovRegCoreUHIop); 3237375Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vmovRegCoreUHIop); 3247333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmovRegCoreUHIop); 3257333Sgblack@eecs.umich.edu 3267333Sgblack@eecs.umich.edu vmovRegCoreSBCode = ''' 3277333Sgblack@eecs.umich.edu Dest = sext<8>(bits(FpOp1.uw, imm * 8, imm * 8 + 7)); 3287333Sgblack@eecs.umich.edu ''' 3297375Sgblack@eecs.umich.edu vmovRegCoreSBIop = InstObjParams("vmov", "VmovRegCoreSB", "VfpRegRegImmOp", 3307333Sgblack@eecs.umich.edu { "code": vmovRegCoreSBCode, 3317333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3327375Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vmovRegCoreSBIop); 3337375Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vmovRegCoreSBIop); 3347333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmovRegCoreSBIop); 3357333Sgblack@eecs.umich.edu 3367333Sgblack@eecs.umich.edu vmovRegCoreSHCode = ''' 3377333Sgblack@eecs.umich.edu Dest = sext<16>(bits(FpOp1.uw, imm * 16, imm * 16 + 15)); 3387333Sgblack@eecs.umich.edu ''' 3397375Sgblack@eecs.umich.edu vmovRegCoreSHIop = InstObjParams("vmov", "VmovRegCoreSH", "VfpRegRegImmOp", 3407333Sgblack@eecs.umich.edu { "code": vmovRegCoreSHCode, 3417333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3427375Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vmovRegCoreSHIop); 3437375Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vmovRegCoreSHIop); 3447333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmovRegCoreSHIop); 3457333Sgblack@eecs.umich.edu 3467333Sgblack@eecs.umich.edu vmovRegCoreWCode = ''' 3477333Sgblack@eecs.umich.edu Dest = FpOp1.uw; 3487333Sgblack@eecs.umich.edu ''' 3497375Sgblack@eecs.umich.edu vmovRegCoreWIop = InstObjParams("vmov", "VmovRegCoreW", "VfpRegRegOp", 3507333Sgblack@eecs.umich.edu { "code": vmovRegCoreWCode, 3517333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3527375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vmovRegCoreWIop); 3537375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vmovRegCoreWIop); 3547333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmovRegCoreWIop); 3557333Sgblack@eecs.umich.edu 3567333Sgblack@eecs.umich.edu vmov2Reg2CoreCode = ''' 3577333Sgblack@eecs.umich.edu FpDestP0.uw = Op1.uw; 3587333Sgblack@eecs.umich.edu FpDestP1.uw = Op2.uw; 3597333Sgblack@eecs.umich.edu ''' 3607375Sgblack@eecs.umich.edu vmov2Reg2CoreIop = InstObjParams("vmov", "Vmov2Reg2Core", "VfpRegRegRegOp", 3617333Sgblack@eecs.umich.edu { "code": vmov2Reg2CoreCode, 3627333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3637375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vmov2Reg2CoreIop); 3647375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vmov2Reg2CoreIop); 3657333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmov2Reg2CoreIop); 3667333Sgblack@eecs.umich.edu 3677333Sgblack@eecs.umich.edu vmov2Core2RegCode = ''' 3687333Sgblack@eecs.umich.edu Dest.uw = FpOp2P0.uw; 3697333Sgblack@eecs.umich.edu Op1.uw = FpOp2P1.uw; 3707333Sgblack@eecs.umich.edu ''' 3717375Sgblack@eecs.umich.edu vmov2Core2RegIop = InstObjParams("vmov", "Vmov2Core2Reg", "VfpRegRegRegOp", 3727333Sgblack@eecs.umich.edu { "code": vmov2Core2RegCode, 3737333Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3747375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vmov2Core2RegIop); 3757375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vmov2Core2RegIop); 3767333Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmov2Core2RegIop); 3777381Sgblack@eecs.umich.edu}}; 3787381Sgblack@eecs.umich.edu 3797381Sgblack@eecs.umich.edulet {{ 3807381Sgblack@eecs.umich.edu 3817381Sgblack@eecs.umich.edu header_output = "" 3827381Sgblack@eecs.umich.edu decoder_output = "" 3837381Sgblack@eecs.umich.edu exec_output = "" 3847364Sgblack@eecs.umich.edu 3857364Sgblack@eecs.umich.edu vmulSCode = ''' 3867378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 3877381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 3887364Sgblack@eecs.umich.edu FpDest = FpOp1 * FpOp2; 3897381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 3907378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 3917364Sgblack@eecs.umich.edu if ((isinf(FpOp1) && FpOp2 == 0) || (isinf(FpOp2) && FpOp1 == 0)) { 3927364Sgblack@eecs.umich.edu FpDest = NAN; 3937364Sgblack@eecs.umich.edu } 3947364Sgblack@eecs.umich.edu ''' 3957375Sgblack@eecs.umich.edu vmulSIop = InstObjParams("vmuls", "VmulS", "VfpRegRegRegOp", 3967364Sgblack@eecs.umich.edu { "code": vmulSCode, 3977364Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 3987375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vmulSIop); 3997375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vmulSIop); 4007364Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmulSIop); 4017364Sgblack@eecs.umich.edu 4027364Sgblack@eecs.umich.edu vmulDCode = ''' 4037364Sgblack@eecs.umich.edu IntDoubleUnion cOp1, cOp2, cDest; 4047364Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 4057364Sgblack@eecs.umich.edu cOp2.bits = ((uint64_t)FpOp2P0.uw | ((uint64_t)FpOp2P1.uw << 32)); 4067378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 4077381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 4087364Sgblack@eecs.umich.edu cDest.fp = cOp1.fp * cOp2.fp; 4097381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 4107378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 4117364Sgblack@eecs.umich.edu if ((isinf(cOp1.fp) && cOp2.fp == 0) || 4127364Sgblack@eecs.umich.edu (isinf(cOp2.fp) && cOp1.fp == 0)) { 4137364Sgblack@eecs.umich.edu cDest.fp = NAN; 4147364Sgblack@eecs.umich.edu } 4157364Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 4167364Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 4177364Sgblack@eecs.umich.edu ''' 4187375Sgblack@eecs.umich.edu vmulDIop = InstObjParams("vmuld", "VmulD", "VfpRegRegRegOp", 4197364Sgblack@eecs.umich.edu { "code": vmulDCode, 4207364Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 4217375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vmulDIop); 4227375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vmulDIop); 4237364Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmulDIop); 4247365Sgblack@eecs.umich.edu 4257365Sgblack@eecs.umich.edu vnegSCode = ''' 4267365Sgblack@eecs.umich.edu FpDest = -FpOp1; 4277365Sgblack@eecs.umich.edu ''' 4287375Sgblack@eecs.umich.edu vnegSIop = InstObjParams("vnegs", "VnegS", "VfpRegRegOp", 4297365Sgblack@eecs.umich.edu { "code": vnegSCode, 4307365Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 4317375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vnegSIop); 4327375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vnegSIop); 4337365Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vnegSIop); 4347365Sgblack@eecs.umich.edu 4357365Sgblack@eecs.umich.edu vnegDCode = ''' 4367365Sgblack@eecs.umich.edu IntDoubleUnion cOp1, cDest; 4377365Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 4387365Sgblack@eecs.umich.edu cDest.fp = -cOp1.fp; 4397365Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 4407365Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 4417365Sgblack@eecs.umich.edu ''' 4427375Sgblack@eecs.umich.edu vnegDIop = InstObjParams("vnegd", "VnegD", "VfpRegRegOp", 4437365Sgblack@eecs.umich.edu { "code": vnegDCode, 4447365Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 4457375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vnegDIop); 4467375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vnegDIop); 4477365Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vnegDIop); 4487366Sgblack@eecs.umich.edu 4497366Sgblack@eecs.umich.edu vabsSCode = ''' 4507366Sgblack@eecs.umich.edu FpDest = fabsf(FpOp1); 4517366Sgblack@eecs.umich.edu ''' 4527375Sgblack@eecs.umich.edu vabsSIop = InstObjParams("vabss", "VabsS", "VfpRegRegOp", 4537366Sgblack@eecs.umich.edu { "code": vabsSCode, 4547366Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 4557375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vabsSIop); 4567375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vabsSIop); 4577366Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vabsSIop); 4587366Sgblack@eecs.umich.edu 4597366Sgblack@eecs.umich.edu vabsDCode = ''' 4607366Sgblack@eecs.umich.edu IntDoubleUnion cOp1, cDest; 4617366Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 4627366Sgblack@eecs.umich.edu cDest.fp = fabs(cOp1.fp); 4637366Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 4647366Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 4657366Sgblack@eecs.umich.edu ''' 4667375Sgblack@eecs.umich.edu vabsDIop = InstObjParams("vabsd", "VabsD", "VfpRegRegOp", 4677366Sgblack@eecs.umich.edu { "code": vabsDCode, 4687366Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 4697375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vabsDIop); 4707375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vabsDIop); 4717366Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vabsDIop); 4727367Sgblack@eecs.umich.edu 4737367Sgblack@eecs.umich.edu vaddSCode = ''' 4747378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 4757381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 4767367Sgblack@eecs.umich.edu FpDest = FpOp1 + FpOp2; 4777381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 4787378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 4797367Sgblack@eecs.umich.edu ''' 4807375Sgblack@eecs.umich.edu vaddSIop = InstObjParams("vadds", "VaddS", "VfpRegRegRegOp", 4817367Sgblack@eecs.umich.edu { "code": vaddSCode, 4827367Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 4837375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vaddSIop); 4847375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vaddSIop); 4857367Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vaddSIop); 4867367Sgblack@eecs.umich.edu 4877367Sgblack@eecs.umich.edu vaddDCode = ''' 4887367Sgblack@eecs.umich.edu IntDoubleUnion cOp1, cOp2, cDest; 4897367Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 4907367Sgblack@eecs.umich.edu cOp2.bits = ((uint64_t)FpOp2P0.uw | ((uint64_t)FpOp2P1.uw << 32)); 4917378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 4927381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 4937367Sgblack@eecs.umich.edu cDest.fp = cOp1.fp + cOp2.fp; 4947381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 4957378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 4967367Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 4977367Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 4987367Sgblack@eecs.umich.edu ''' 4997375Sgblack@eecs.umich.edu vaddDIop = InstObjParams("vaddd", "VaddD", "VfpRegRegRegOp", 5007367Sgblack@eecs.umich.edu { "code": vaddDCode, 5017367Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 5027375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vaddDIop); 5037375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vaddDIop); 5047367Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vaddDIop); 5057368Sgblack@eecs.umich.edu 5067368Sgblack@eecs.umich.edu vsubSCode = ''' 5077378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 5087381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 5097368Sgblack@eecs.umich.edu FpDest = FpOp1 - FpOp2; 5107381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 5117378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state) 5127368Sgblack@eecs.umich.edu ''' 5137375Sgblack@eecs.umich.edu vsubSIop = InstObjParams("vsubs", "VsubS", "VfpRegRegRegOp", 5147368Sgblack@eecs.umich.edu { "code": vsubSCode, 5157368Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 5167375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vsubSIop); 5177375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vsubSIop); 5187368Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vsubSIop); 5197368Sgblack@eecs.umich.edu 5207368Sgblack@eecs.umich.edu vsubDCode = ''' 5217368Sgblack@eecs.umich.edu IntDoubleUnion cOp1, cOp2, cDest; 5227368Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 5237368Sgblack@eecs.umich.edu cOp2.bits = ((uint64_t)FpOp2P0.uw | ((uint64_t)FpOp2P1.uw << 32)); 5247378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 5257381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 5267368Sgblack@eecs.umich.edu cDest.fp = cOp1.fp - cOp2.fp; 5277381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 5287378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 5297368Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 5307368Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 5317368Sgblack@eecs.umich.edu ''' 5327375Sgblack@eecs.umich.edu vsubDIop = InstObjParams("vsubd", "VsubD", "VfpRegRegRegOp", 5337368Sgblack@eecs.umich.edu { "code": vsubDCode, 5347368Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 5357375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vsubDIop); 5367375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vsubDIop); 5377368Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vsubDIop); 5387369Sgblack@eecs.umich.edu 5397369Sgblack@eecs.umich.edu vdivSCode = ''' 5407378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 5417381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 5427369Sgblack@eecs.umich.edu FpDest = FpOp1 / FpOp2; 5437381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 5447378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 5457369Sgblack@eecs.umich.edu ''' 5467375Sgblack@eecs.umich.edu vdivSIop = InstObjParams("vdivs", "VdivS", "VfpRegRegRegOp", 5477369Sgblack@eecs.umich.edu { "code": vdivSCode, 5487369Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 5497375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vdivSIop); 5507375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vdivSIop); 5517369Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vdivSIop); 5527369Sgblack@eecs.umich.edu 5537369Sgblack@eecs.umich.edu vdivDCode = ''' 5547369Sgblack@eecs.umich.edu IntDoubleUnion cOp1, cOp2, cDest; 5557369Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 5567369Sgblack@eecs.umich.edu cOp2.bits = ((uint64_t)FpOp2P0.uw | ((uint64_t)FpOp2P1.uw << 32)); 5577378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 5587381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cDest.fp)); 5597369Sgblack@eecs.umich.edu cDest.fp = cOp1.fp / cOp2.fp; 5607381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 5617378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 5627369Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 5637369Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 5647369Sgblack@eecs.umich.edu ''' 5657375Sgblack@eecs.umich.edu vdivDIop = InstObjParams("vdivd", "VdivD", "VfpRegRegRegOp", 5667369Sgblack@eecs.umich.edu { "code": vdivDCode, 5677369Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 5687375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vdivDIop); 5697375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vdivDIop); 5707369Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vdivDIop); 5717369Sgblack@eecs.umich.edu 5727369Sgblack@eecs.umich.edu vsqrtSCode = ''' 5737378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 5747381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 5757369Sgblack@eecs.umich.edu FpDest = sqrtf(FpOp1); 5767381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 5777378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 5787369Sgblack@eecs.umich.edu if (FpOp1 < 0) { 5797369Sgblack@eecs.umich.edu FpDest = NAN; 5807369Sgblack@eecs.umich.edu } 5817369Sgblack@eecs.umich.edu ''' 5827375Sgblack@eecs.umich.edu vsqrtSIop = InstObjParams("vsqrts", "VsqrtS", "VfpRegRegOp", 5837369Sgblack@eecs.umich.edu { "code": vsqrtSCode, 5847369Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 5857375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vsqrtSIop); 5867375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vsqrtSIop); 5877369Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vsqrtSIop); 5887369Sgblack@eecs.umich.edu 5897369Sgblack@eecs.umich.edu vsqrtDCode = ''' 5907369Sgblack@eecs.umich.edu IntDoubleUnion cOp1, cDest; 5917369Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 5927378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 5937381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cDest.fp)); 5947369Sgblack@eecs.umich.edu cDest.fp = sqrt(cOp1.fp); 5957381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 5967378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 5977369Sgblack@eecs.umich.edu if (cOp1.fp < 0) { 5987369Sgblack@eecs.umich.edu cDest.fp = NAN; 5997369Sgblack@eecs.umich.edu } 6007369Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 6017369Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 6027369Sgblack@eecs.umich.edu ''' 6037375Sgblack@eecs.umich.edu vsqrtDIop = InstObjParams("vsqrtd", "VsqrtD", "VfpRegRegOp", 6047369Sgblack@eecs.umich.edu { "code": vsqrtDCode, 6057369Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 6067375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vsqrtDIop); 6077375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vsqrtDIop); 6087369Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vsqrtDIop); 6097381Sgblack@eecs.umich.edu}}; 6107381Sgblack@eecs.umich.edu 6117381Sgblack@eecs.umich.edulet {{ 6127381Sgblack@eecs.umich.edu 6137381Sgblack@eecs.umich.edu header_output = "" 6147381Sgblack@eecs.umich.edu decoder_output = "" 6157381Sgblack@eecs.umich.edu exec_output = "" 6167370Sgblack@eecs.umich.edu 6177370Sgblack@eecs.umich.edu vmlaSCode = ''' 6187378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 6197381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 6207370Sgblack@eecs.umich.edu float mid = FpOp1 * FpOp2; 6217370Sgblack@eecs.umich.edu if ((isinf(FpOp1) && FpOp2 == 0) || (isinf(FpOp2) && FpOp1 == 0)) { 6227370Sgblack@eecs.umich.edu mid = NAN; 6237370Sgblack@eecs.umich.edu } 6247370Sgblack@eecs.umich.edu FpDest = FpDest + mid; 6257381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 6267378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 6277370Sgblack@eecs.umich.edu ''' 6287375Sgblack@eecs.umich.edu vmlaSIop = InstObjParams("vmlas", "VmlaS", "VfpRegRegRegOp", 6297370Sgblack@eecs.umich.edu { "code": vmlaSCode, 6307370Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 6317375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vmlaSIop); 6327375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vmlaSIop); 6337370Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmlaSIop); 6347370Sgblack@eecs.umich.edu 6357370Sgblack@eecs.umich.edu vmlaDCode = ''' 6367370Sgblack@eecs.umich.edu IntDoubleUnion cOp1, cOp2, cDest; 6377370Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 6387370Sgblack@eecs.umich.edu cOp2.bits = ((uint64_t)FpOp2P0.uw | ((uint64_t)FpOp2P1.uw << 32)); 6397370Sgblack@eecs.umich.edu cDest.bits = ((uint64_t)FpDestP0.uw | ((uint64_t)FpDestP1.uw << 32)); 6407378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 6417381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 6427370Sgblack@eecs.umich.edu double mid = cOp1.fp * cOp2.fp; 6437370Sgblack@eecs.umich.edu if ((isinf(cOp1.fp) && cOp2.fp == 0) || 6447370Sgblack@eecs.umich.edu (isinf(cOp2.fp) && cOp1.fp == 0)) { 6457370Sgblack@eecs.umich.edu mid = NAN; 6467370Sgblack@eecs.umich.edu } 6477370Sgblack@eecs.umich.edu cDest.fp = cDest.fp + mid; 6487381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 6497378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 6507370Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 6517370Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 6527370Sgblack@eecs.umich.edu ''' 6537375Sgblack@eecs.umich.edu vmlaDIop = InstObjParams("vmlad", "VmlaD", "VfpRegRegRegOp", 6547370Sgblack@eecs.umich.edu { "code": vmlaDCode, 6557370Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 6567375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vmlaDIop); 6577375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vmlaDIop); 6587370Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmlaDIop); 6597370Sgblack@eecs.umich.edu 6607370Sgblack@eecs.umich.edu vmlsSCode = ''' 6617378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 6627381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 6637370Sgblack@eecs.umich.edu float mid = FpOp1 * FpOp2; 6647370Sgblack@eecs.umich.edu if ((isinf(FpOp1) && FpOp2 == 0) || (isinf(FpOp2) && FpOp1 == 0)) { 6657370Sgblack@eecs.umich.edu mid = NAN; 6667370Sgblack@eecs.umich.edu } 6677370Sgblack@eecs.umich.edu FpDest = FpDest - mid; 6687381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 6697378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 6707370Sgblack@eecs.umich.edu ''' 6717375Sgblack@eecs.umich.edu vmlsSIop = InstObjParams("vmlss", "VmlsS", "VfpRegRegRegOp", 6727370Sgblack@eecs.umich.edu { "code": vmlsSCode, 6737370Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 6747375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vmlsSIop); 6757375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vmlsSIop); 6767370Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmlsSIop); 6777370Sgblack@eecs.umich.edu 6787370Sgblack@eecs.umich.edu vmlsDCode = ''' 6797370Sgblack@eecs.umich.edu IntDoubleUnion cOp1, cOp2, cDest; 6807370Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 6817370Sgblack@eecs.umich.edu cOp2.bits = ((uint64_t)FpOp2P0.uw | ((uint64_t)FpOp2P1.uw << 32)); 6827370Sgblack@eecs.umich.edu cDest.bits = ((uint64_t)FpDestP0.uw | ((uint64_t)FpDestP1.uw << 32)); 6837378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 6847381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 6857370Sgblack@eecs.umich.edu double mid = cOp1.fp * cOp2.fp; 6867370Sgblack@eecs.umich.edu if ((isinf(cOp1.fp) && cOp2.fp == 0) || 6877370Sgblack@eecs.umich.edu (isinf(cOp2.fp) && cOp1.fp == 0)) { 6887370Sgblack@eecs.umich.edu mid = NAN; 6897370Sgblack@eecs.umich.edu } 6907370Sgblack@eecs.umich.edu cDest.fp = cDest.fp - mid; 6917381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 6927378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 6937370Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 6947370Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 6957370Sgblack@eecs.umich.edu ''' 6967375Sgblack@eecs.umich.edu vmlsDIop = InstObjParams("vmlsd", "VmlsD", "VfpRegRegRegOp", 6977370Sgblack@eecs.umich.edu { "code": vmlsDCode, 6987370Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 6997375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vmlsDIop); 7007375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vmlsDIop); 7017370Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vmlsDIop); 7027371Sgblack@eecs.umich.edu 7037371Sgblack@eecs.umich.edu vnmlaSCode = ''' 7047378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 7057381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 7067371Sgblack@eecs.umich.edu float mid = FpOp1 * FpOp2; 7077371Sgblack@eecs.umich.edu if ((isinf(FpOp1) && FpOp2 == 0) || (isinf(FpOp2) && FpOp1 == 0)) { 7087371Sgblack@eecs.umich.edu mid = NAN; 7097371Sgblack@eecs.umich.edu } 7107371Sgblack@eecs.umich.edu FpDest = -FpDest - mid; 7117381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 7127378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 7137371Sgblack@eecs.umich.edu ''' 7147375Sgblack@eecs.umich.edu vnmlaSIop = InstObjParams("vnmlas", "VnmlaS", "VfpRegRegRegOp", 7157371Sgblack@eecs.umich.edu { "code": vnmlaSCode, 7167371Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 7177375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vnmlaSIop); 7187375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vnmlaSIop); 7197371Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vnmlaSIop); 7207371Sgblack@eecs.umich.edu 7217371Sgblack@eecs.umich.edu vnmlaDCode = ''' 7227371Sgblack@eecs.umich.edu IntDoubleUnion cOp1, cOp2, cDest; 7237371Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 7247371Sgblack@eecs.umich.edu cOp2.bits = ((uint64_t)FpOp2P0.uw | ((uint64_t)FpOp2P1.uw << 32)); 7257371Sgblack@eecs.umich.edu cDest.bits = ((uint64_t)FpDestP0.uw | ((uint64_t)FpDestP1.uw << 32)); 7267378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 7277381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 7287371Sgblack@eecs.umich.edu double mid = cOp1.fp * cOp2.fp; 7297371Sgblack@eecs.umich.edu if ((isinf(cOp1.fp) && cOp2.fp == 0) || 7307371Sgblack@eecs.umich.edu (isinf(cOp2.fp) && cOp1.fp == 0)) { 7317371Sgblack@eecs.umich.edu mid = NAN; 7327371Sgblack@eecs.umich.edu } 7337371Sgblack@eecs.umich.edu cDest.fp = -cDest.fp - mid; 7347381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 7357378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 7367371Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 7377371Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 7387371Sgblack@eecs.umich.edu ''' 7397375Sgblack@eecs.umich.edu vnmlaDIop = InstObjParams("vnmlad", "VnmlaD", "VfpRegRegRegOp", 7407371Sgblack@eecs.umich.edu { "code": vnmlaDCode, 7417371Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 7427375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vnmlaDIop); 7437375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vnmlaDIop); 7447371Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vnmlaDIop); 7457371Sgblack@eecs.umich.edu 7467371Sgblack@eecs.umich.edu vnmlsSCode = ''' 7477378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 7487381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 7497371Sgblack@eecs.umich.edu float mid = FpOp1 * FpOp2; 7507371Sgblack@eecs.umich.edu if ((isinf(FpOp1) && FpOp2 == 0) || (isinf(FpOp2) && FpOp1 == 0)) { 7517371Sgblack@eecs.umich.edu mid = NAN; 7527371Sgblack@eecs.umich.edu } 7537371Sgblack@eecs.umich.edu FpDest = -FpDest + mid; 7547381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 7557378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 7567371Sgblack@eecs.umich.edu ''' 7577375Sgblack@eecs.umich.edu vnmlsSIop = InstObjParams("vnmlss", "VnmlsS", "VfpRegRegRegOp", 7587371Sgblack@eecs.umich.edu { "code": vnmlsSCode, 7597371Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 7607375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vnmlsSIop); 7617375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vnmlsSIop); 7627371Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vnmlsSIop); 7637371Sgblack@eecs.umich.edu 7647371Sgblack@eecs.umich.edu vnmlsDCode = ''' 7657371Sgblack@eecs.umich.edu IntDoubleUnion cOp1, cOp2, cDest; 7667371Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 7677371Sgblack@eecs.umich.edu cOp2.bits = ((uint64_t)FpOp2P0.uw | ((uint64_t)FpOp2P1.uw << 32)); 7687371Sgblack@eecs.umich.edu cDest.bits = ((uint64_t)FpDestP0.uw | ((uint64_t)FpDestP1.uw << 32)); 7697378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 7707381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 7717371Sgblack@eecs.umich.edu double mid = cOp1.fp * cOp2.fp; 7727371Sgblack@eecs.umich.edu if ((isinf(cOp1.fp) && cOp2.fp == 0) || 7737371Sgblack@eecs.umich.edu (isinf(cOp2.fp) && cOp1.fp == 0)) { 7747371Sgblack@eecs.umich.edu mid = NAN; 7757371Sgblack@eecs.umich.edu } 7767371Sgblack@eecs.umich.edu cDest.fp = -cDest.fp + mid; 7777381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 7787378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 7797371Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 7807371Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 7817371Sgblack@eecs.umich.edu ''' 7827375Sgblack@eecs.umich.edu vnmlsDIop = InstObjParams("vnmlsd", "VnmlsD", "VfpRegRegRegOp", 7837371Sgblack@eecs.umich.edu { "code": vnmlsDCode, 7847371Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 7857375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vnmlsDIop); 7867375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vnmlsDIop); 7877371Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vnmlsDIop); 7887371Sgblack@eecs.umich.edu 7897371Sgblack@eecs.umich.edu vnmulSCode = ''' 7907378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 7917381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 7927371Sgblack@eecs.umich.edu float mid = FpOp1 * FpOp2; 7937371Sgblack@eecs.umich.edu if ((isinf(FpOp1) && FpOp2 == 0) || (isinf(FpOp2) && FpOp1 == 0)) { 7947371Sgblack@eecs.umich.edu mid = NAN; 7957371Sgblack@eecs.umich.edu } 7967371Sgblack@eecs.umich.edu FpDest = -mid; 7977381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 7987378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 7997371Sgblack@eecs.umich.edu ''' 8007375Sgblack@eecs.umich.edu vnmulSIop = InstObjParams("vnmuls", "VnmulS", "VfpRegRegRegOp", 8017371Sgblack@eecs.umich.edu { "code": vnmulSCode, 8027371Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 8037375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vnmulSIop); 8047375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vnmulSIop); 8057371Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vnmulSIop); 8067371Sgblack@eecs.umich.edu 8077371Sgblack@eecs.umich.edu vnmulDCode = ''' 8087371Sgblack@eecs.umich.edu IntDoubleUnion cOp1, cOp2, cDest; 8097371Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 8107371Sgblack@eecs.umich.edu cOp2.bits = ((uint64_t)FpOp2P0.uw | ((uint64_t)FpOp2P1.uw << 32)); 8117371Sgblack@eecs.umich.edu cDest.bits = ((uint64_t)FpDestP0.uw | ((uint64_t)FpDestP1.uw << 32)); 8127378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 8137381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 8147371Sgblack@eecs.umich.edu double mid = cOp1.fp * cOp2.fp; 8157371Sgblack@eecs.umich.edu if ((isinf(cOp1.fp) && cOp2.fp == 0) || 8167371Sgblack@eecs.umich.edu (isinf(cOp2.fp) && cOp1.fp == 0)) { 8177371Sgblack@eecs.umich.edu mid = NAN; 8187371Sgblack@eecs.umich.edu } 8197371Sgblack@eecs.umich.edu cDest.fp = -mid; 8207381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 8217378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 8227371Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 8237371Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 8247371Sgblack@eecs.umich.edu ''' 8257375Sgblack@eecs.umich.edu vnmulDIop = InstObjParams("vnmuld", "VnmulD", "VfpRegRegRegOp", 8267371Sgblack@eecs.umich.edu { "code": vnmulDCode, 8277371Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 8287375Sgblack@eecs.umich.edu header_output += VfpRegRegRegOpDeclare.subst(vnmulDIop); 8297375Sgblack@eecs.umich.edu decoder_output += VfpRegRegRegOpConstructor.subst(vnmulDIop); 8307371Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vnmulDIop); 8317381Sgblack@eecs.umich.edu}}; 8327381Sgblack@eecs.umich.edu 8337381Sgblack@eecs.umich.edulet {{ 8347381Sgblack@eecs.umich.edu 8357381Sgblack@eecs.umich.edu header_output = "" 8367381Sgblack@eecs.umich.edu decoder_output = "" 8377381Sgblack@eecs.umich.edu exec_output = "" 8387373Sgblack@eecs.umich.edu 8397373Sgblack@eecs.umich.edu vcvtUIntFpSCode = ''' 8407378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 8417381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1.uw) : "m" (FpOp1.uw)); 8427373Sgblack@eecs.umich.edu FpDest = FpOp1.uw; 8437381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 8447378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 8457373Sgblack@eecs.umich.edu ''' 8467375Sgblack@eecs.umich.edu vcvtUIntFpSIop = InstObjParams("vcvt", "VcvtUIntFpS", "VfpRegRegOp", 8477373Sgblack@eecs.umich.edu { "code": vcvtUIntFpSCode, 8487373Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 8497375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcvtUIntFpSIop); 8507375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcvtUIntFpSIop); 8517373Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtUIntFpSIop); 8527373Sgblack@eecs.umich.edu 8537373Sgblack@eecs.umich.edu vcvtUIntFpDCode = ''' 8547373Sgblack@eecs.umich.edu IntDoubleUnion cDest; 8557378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 8567381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1P0.uw) : "m" (FpOp1P0.uw)); 8577373Sgblack@eecs.umich.edu cDest.fp = (uint64_t)FpOp1P0.uw; 8587381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 8597378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 8607373Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 8617373Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 8627373Sgblack@eecs.umich.edu ''' 8637375Sgblack@eecs.umich.edu vcvtUIntFpDIop = InstObjParams("vcvt", "VcvtUIntFpD", "VfpRegRegOp", 8647373Sgblack@eecs.umich.edu { "code": vcvtUIntFpDCode, 8657373Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 8667375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcvtUIntFpDIop); 8677375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcvtUIntFpDIop); 8687373Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtUIntFpDIop); 8697373Sgblack@eecs.umich.edu 8707373Sgblack@eecs.umich.edu vcvtSIntFpSCode = ''' 8717378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 8727381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1.sw) : "m" (FpOp1.sw)); 8737373Sgblack@eecs.umich.edu FpDest = FpOp1.sw; 8747381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 8757378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 8767373Sgblack@eecs.umich.edu ''' 8777375Sgblack@eecs.umich.edu vcvtSIntFpSIop = InstObjParams("vcvt", "VcvtSIntFpS", "VfpRegRegOp", 8787373Sgblack@eecs.umich.edu { "code": vcvtSIntFpSCode, 8797373Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 8807375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcvtSIntFpSIop); 8817375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcvtSIntFpSIop); 8827373Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtSIntFpSIop); 8837373Sgblack@eecs.umich.edu 8847373Sgblack@eecs.umich.edu vcvtSIntFpDCode = ''' 8857373Sgblack@eecs.umich.edu IntDoubleUnion cDest; 8867378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 8877381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1P0.sw) : "m" (FpOp1P0.sw)); 8887373Sgblack@eecs.umich.edu cDest.fp = FpOp1P0.sw; 8897381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 8907378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 8917373Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 8927373Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 8937373Sgblack@eecs.umich.edu ''' 8947375Sgblack@eecs.umich.edu vcvtSIntFpDIop = InstObjParams("vcvt", "VcvtSIntFpD", "VfpRegRegOp", 8957373Sgblack@eecs.umich.edu { "code": vcvtSIntFpDCode, 8967373Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 8977375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcvtSIntFpDIop); 8987375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcvtSIntFpDIop); 8997373Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtSIntFpDIop); 9007373Sgblack@eecs.umich.edu 9017380Sgblack@eecs.umich.edu vcvtFpUIntSRCode = ''' 9027380Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 9037381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 9047380Sgblack@eecs.umich.edu FpDest.uw = FpOp1; 9057381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest.uw)); 9067380Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 9077380Sgblack@eecs.umich.edu ''' 9087380Sgblack@eecs.umich.edu vcvtFpUIntSRIop = InstObjParams("vcvt", "VcvtFpUIntSR", "VfpRegRegOp", 9097380Sgblack@eecs.umich.edu { "code": vcvtFpUIntSRCode, 9107380Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 9117380Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcvtFpUIntSRIop); 9127380Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcvtFpUIntSRIop); 9137380Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpUIntSRIop); 9147380Sgblack@eecs.umich.edu 9157380Sgblack@eecs.umich.edu vcvtFpUIntDRCode = ''' 9167380Sgblack@eecs.umich.edu IntDoubleUnion cOp1; 9177380Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 9187380Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 9197381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 9207380Sgblack@eecs.umich.edu uint64_t result = cOp1.fp; 9217381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (result)); 9227380Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 9237380Sgblack@eecs.umich.edu FpDestP0.uw = result; 9247380Sgblack@eecs.umich.edu ''' 9257380Sgblack@eecs.umich.edu vcvtFpUIntDRIop = InstObjParams("vcvtr", "VcvtFpUIntDR", "VfpRegRegOp", 9267380Sgblack@eecs.umich.edu { "code": vcvtFpUIntDRCode, 9277380Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 9287380Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcvtFpUIntDRIop); 9297380Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcvtFpUIntDRIop); 9307380Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpUIntDRIop); 9317380Sgblack@eecs.umich.edu 9327380Sgblack@eecs.umich.edu vcvtFpSIntSRCode = ''' 9337380Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 9347381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 9357380Sgblack@eecs.umich.edu FpDest.sw = FpOp1; 9367381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest.sw)); 9377380Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 9387380Sgblack@eecs.umich.edu ''' 9397380Sgblack@eecs.umich.edu vcvtFpSIntSRIop = InstObjParams("vcvtr", "VcvtFpSIntSR", "VfpRegRegOp", 9407380Sgblack@eecs.umich.edu { "code": vcvtFpSIntSRCode, 9417380Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 9427380Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcvtFpSIntSRIop); 9437380Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcvtFpSIntSRIop); 9447380Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpSIntSRIop); 9457380Sgblack@eecs.umich.edu 9467380Sgblack@eecs.umich.edu vcvtFpSIntDRCode = ''' 9477380Sgblack@eecs.umich.edu IntDoubleUnion cOp1; 9487380Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 9497380Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 9507381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 9517380Sgblack@eecs.umich.edu int64_t result = cOp1.fp; 9527381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (result)); 9537380Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 9547380Sgblack@eecs.umich.edu FpDestP0.uw = result; 9557380Sgblack@eecs.umich.edu ''' 9567380Sgblack@eecs.umich.edu vcvtFpSIntDRIop = InstObjParams("vcvtr", "VcvtFpSIntDR", "VfpRegRegOp", 9577380Sgblack@eecs.umich.edu { "code": vcvtFpSIntDRCode, 9587380Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 9597380Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcvtFpSIntDRIop); 9607380Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcvtFpSIntDRIop); 9617380Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpSIntDRIop); 9627380Sgblack@eecs.umich.edu 9637373Sgblack@eecs.umich.edu vcvtFpUIntSCode = ''' 9647378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 9657380Sgblack@eecs.umich.edu fesetround(FeRoundZero); 9667381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 9677373Sgblack@eecs.umich.edu FpDest.uw = FpOp1; 9687381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest.uw)); 9697378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 9707373Sgblack@eecs.umich.edu ''' 9717375Sgblack@eecs.umich.edu vcvtFpUIntSIop = InstObjParams("vcvt", "VcvtFpUIntS", "VfpRegRegOp", 9727373Sgblack@eecs.umich.edu { "code": vcvtFpUIntSCode, 9737373Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 9747375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcvtFpUIntSIop); 9757375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcvtFpUIntSIop); 9767373Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpUIntSIop); 9777373Sgblack@eecs.umich.edu 9787373Sgblack@eecs.umich.edu vcvtFpUIntDCode = ''' 9797373Sgblack@eecs.umich.edu IntDoubleUnion cOp1; 9807373Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 9817378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 9827380Sgblack@eecs.umich.edu fesetround(FeRoundZero); 9837381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 9847373Sgblack@eecs.umich.edu uint64_t result = cOp1.fp; 9857381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (result)); 9867378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 9877373Sgblack@eecs.umich.edu FpDestP0.uw = result; 9887373Sgblack@eecs.umich.edu ''' 9897375Sgblack@eecs.umich.edu vcvtFpUIntDIop = InstObjParams("vcvt", "VcvtFpUIntD", "VfpRegRegOp", 9907373Sgblack@eecs.umich.edu { "code": vcvtFpUIntDCode, 9917373Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 9927375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcvtFpUIntDIop); 9937375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcvtFpUIntDIop); 9947373Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpUIntDIop); 9957373Sgblack@eecs.umich.edu 9967373Sgblack@eecs.umich.edu vcvtFpSIntSCode = ''' 9977378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 9987380Sgblack@eecs.umich.edu fesetround(FeRoundZero); 9997381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 10007373Sgblack@eecs.umich.edu FpDest.sw = FpOp1; 10017381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest.sw)); 10027378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 10037373Sgblack@eecs.umich.edu ''' 10047375Sgblack@eecs.umich.edu vcvtFpSIntSIop = InstObjParams("vcvt", "VcvtFpSIntS", "VfpRegRegOp", 10057373Sgblack@eecs.umich.edu { "code": vcvtFpSIntSCode, 10067373Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 10077375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcvtFpSIntSIop); 10087375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcvtFpSIntSIop); 10097373Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpSIntSIop); 10107373Sgblack@eecs.umich.edu 10117373Sgblack@eecs.umich.edu vcvtFpSIntDCode = ''' 10127373Sgblack@eecs.umich.edu IntDoubleUnion cOp1; 10137373Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 10147378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 10157380Sgblack@eecs.umich.edu fesetround(FeRoundZero); 10167381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 10177373Sgblack@eecs.umich.edu int64_t result = cOp1.fp; 10187381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (result)); 10197378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 10207373Sgblack@eecs.umich.edu FpDestP0.uw = result; 10217373Sgblack@eecs.umich.edu ''' 10227375Sgblack@eecs.umich.edu vcvtFpSIntDIop = InstObjParams("vcvt", "VcvtFpSIntD", "VfpRegRegOp", 10237373Sgblack@eecs.umich.edu { "code": vcvtFpSIntDCode, 10247373Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 10257375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcvtFpSIntDIop); 10267375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcvtFpSIntDIop); 10277373Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpSIntDIop); 10287374Sgblack@eecs.umich.edu 10297374Sgblack@eecs.umich.edu vcvtFpSFpDCode = ''' 10307374Sgblack@eecs.umich.edu IntDoubleUnion cDest; 10317378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 10327381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 10337374Sgblack@eecs.umich.edu cDest.fp = FpOp1; 10347381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 10357378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 10367374Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 10377374Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 10387374Sgblack@eecs.umich.edu ''' 10397375Sgblack@eecs.umich.edu vcvtFpSFpDIop = InstObjParams("vcvt", "VcvtFpSFpD", "VfpRegRegOp", 10407374Sgblack@eecs.umich.edu { "code": vcvtFpSFpDCode, 10417374Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 10427375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcvtFpSFpDIop); 10437375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcvtFpSFpDIop); 10447374Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpSFpDIop); 10457374Sgblack@eecs.umich.edu 10467374Sgblack@eecs.umich.edu vcvtFpDFpSCode = ''' 10477374Sgblack@eecs.umich.edu IntDoubleUnion cOp1; 10487374Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 10497378Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 10507381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 10517374Sgblack@eecs.umich.edu FpDest = cOp1.fp; 10527381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 10537378Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 10547374Sgblack@eecs.umich.edu ''' 10557375Sgblack@eecs.umich.edu vcvtFpDFpSIop = InstObjParams("vcvt", "VcvtFpDFpS", "VfpRegRegOp", 10567374Sgblack@eecs.umich.edu { "code": vcvtFpDFpSCode, 10577374Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 10587375Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcvtFpDFpSIop); 10597375Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcvtFpDFpSIop); 10607374Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpDFpSIop); 10617377Sgblack@eecs.umich.edu 10627377Sgblack@eecs.umich.edu vcmpSCode = ''' 10637377Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 10647377Sgblack@eecs.umich.edu if (FpDest == FpOp1) { 10657377Sgblack@eecs.umich.edu fpscr.n = 0; fpscr.z = 1; fpscr.c = 1; fpscr.v = 0; 10667377Sgblack@eecs.umich.edu } else if (FpDest < FpOp1) { 10677377Sgblack@eecs.umich.edu fpscr.n = 1; fpscr.z = 0; fpscr.c = 0; fpscr.v = 0; 10687377Sgblack@eecs.umich.edu } else if (FpDest > FpOp1) { 10697377Sgblack@eecs.umich.edu fpscr.n = 0; fpscr.z = 0; fpscr.c = 1; fpscr.v = 0; 10707377Sgblack@eecs.umich.edu } else { 10717377Sgblack@eecs.umich.edu fpscr.n = 0; fpscr.z = 0; fpscr.c = 1; fpscr.v = 1; 10727377Sgblack@eecs.umich.edu } 10737377Sgblack@eecs.umich.edu Fpscr = fpscr; 10747377Sgblack@eecs.umich.edu ''' 10757377Sgblack@eecs.umich.edu vcmpSIop = InstObjParams("vcmps", "VcmpS", "VfpRegRegOp", 10767377Sgblack@eecs.umich.edu { "code": vcmpSCode, 10777377Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 10787377Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcmpSIop); 10797377Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcmpSIop); 10807377Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcmpSIop); 10817377Sgblack@eecs.umich.edu 10827377Sgblack@eecs.umich.edu vcmpDCode = ''' 10837377Sgblack@eecs.umich.edu IntDoubleUnion cOp1, cDest; 10847377Sgblack@eecs.umich.edu cDest.bits = ((uint64_t)FpDestP0.uw | ((uint64_t)FpDestP1.uw << 32)); 10857377Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 10867377Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 10877377Sgblack@eecs.umich.edu if (cDest.fp == cOp1.fp) { 10887377Sgblack@eecs.umich.edu fpscr.n = 0; fpscr.z = 1; fpscr.c = 1; fpscr.v = 0; 10897377Sgblack@eecs.umich.edu } else if (cDest.fp < cOp1.fp) { 10907377Sgblack@eecs.umich.edu fpscr.n = 1; fpscr.z = 0; fpscr.c = 0; fpscr.v = 0; 10917377Sgblack@eecs.umich.edu } else if (cDest.fp > cOp1.fp) { 10927377Sgblack@eecs.umich.edu fpscr.n = 0; fpscr.z = 0; fpscr.c = 1; fpscr.v = 0; 10937377Sgblack@eecs.umich.edu } else { 10947377Sgblack@eecs.umich.edu fpscr.n = 0; fpscr.z = 0; fpscr.c = 1; fpscr.v = 1; 10957377Sgblack@eecs.umich.edu } 10967377Sgblack@eecs.umich.edu Fpscr = fpscr; 10977377Sgblack@eecs.umich.edu ''' 10987377Sgblack@eecs.umich.edu vcmpDIop = InstObjParams("vcmpd", "VcmpD", "VfpRegRegOp", 10997377Sgblack@eecs.umich.edu { "code": vcmpDCode, 11007377Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 11017377Sgblack@eecs.umich.edu header_output += VfpRegRegOpDeclare.subst(vcmpDIop); 11027377Sgblack@eecs.umich.edu decoder_output += VfpRegRegOpConstructor.subst(vcmpDIop); 11037377Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcmpDIop); 11047377Sgblack@eecs.umich.edu 11057377Sgblack@eecs.umich.edu vcmpZeroSCode = ''' 11067377Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 11077377Sgblack@eecs.umich.edu if (FpDest == imm) { 11087377Sgblack@eecs.umich.edu fpscr.n = 0; fpscr.z = 1; fpscr.c = 1; fpscr.v = 0; 11097377Sgblack@eecs.umich.edu } else if (FpDest < imm) { 11107377Sgblack@eecs.umich.edu fpscr.n = 1; fpscr.z = 0; fpscr.c = 0; fpscr.v = 0; 11117377Sgblack@eecs.umich.edu } else if (FpDest > imm) { 11127377Sgblack@eecs.umich.edu fpscr.n = 0; fpscr.z = 0; fpscr.c = 1; fpscr.v = 0; 11137377Sgblack@eecs.umich.edu } else { 11147377Sgblack@eecs.umich.edu fpscr.n = 0; fpscr.z = 0; fpscr.c = 1; fpscr.v = 1; 11157377Sgblack@eecs.umich.edu } 11167377Sgblack@eecs.umich.edu Fpscr = fpscr; 11177377Sgblack@eecs.umich.edu ''' 11187377Sgblack@eecs.umich.edu vcmpZeroSIop = InstObjParams("vcmpZeros", "VcmpZeroS", "VfpRegImmOp", 11197377Sgblack@eecs.umich.edu { "code": vcmpZeroSCode, 11207377Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 11217377Sgblack@eecs.umich.edu header_output += VfpRegImmOpDeclare.subst(vcmpZeroSIop); 11227377Sgblack@eecs.umich.edu decoder_output += VfpRegImmOpConstructor.subst(vcmpZeroSIop); 11237377Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcmpZeroSIop); 11247377Sgblack@eecs.umich.edu 11257377Sgblack@eecs.umich.edu vcmpZeroDCode = ''' 11267377Sgblack@eecs.umich.edu IntDoubleUnion cDest; 11277377Sgblack@eecs.umich.edu cDest.bits = ((uint64_t)FpDestP0.uw | ((uint64_t)FpDestP1.uw << 32)); 11287377Sgblack@eecs.umich.edu FPSCR fpscr = Fpscr; 11297377Sgblack@eecs.umich.edu if (cDest.fp == imm) { 11307377Sgblack@eecs.umich.edu fpscr.n = 0; fpscr.z = 1; fpscr.c = 1; fpscr.v = 0; 11317377Sgblack@eecs.umich.edu } else if (cDest.fp < imm) { 11327377Sgblack@eecs.umich.edu fpscr.n = 1; fpscr.z = 0; fpscr.c = 0; fpscr.v = 0; 11337377Sgblack@eecs.umich.edu } else if (cDest.fp > imm) { 11347377Sgblack@eecs.umich.edu fpscr.n = 0; fpscr.z = 0; fpscr.c = 1; fpscr.v = 0; 11357377Sgblack@eecs.umich.edu } else { 11367377Sgblack@eecs.umich.edu fpscr.n = 0; fpscr.z = 0; fpscr.c = 1; fpscr.v = 1; 11377377Sgblack@eecs.umich.edu } 11387377Sgblack@eecs.umich.edu Fpscr = fpscr; 11397377Sgblack@eecs.umich.edu ''' 11407377Sgblack@eecs.umich.edu vcmpZeroDIop = InstObjParams("vcmpZerod", "VcmpZeroD", "VfpRegImmOp", 11417377Sgblack@eecs.umich.edu { "code": vcmpZeroDCode, 11427377Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 11437377Sgblack@eecs.umich.edu header_output += VfpRegImmOpDeclare.subst(vcmpZeroDIop); 11447377Sgblack@eecs.umich.edu decoder_output += VfpRegImmOpConstructor.subst(vcmpZeroDIop); 11457377Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcmpZeroDIop); 11467322Sgblack@eecs.umich.edu}}; 11477379Sgblack@eecs.umich.edu 11487379Sgblack@eecs.umich.edulet {{ 11497379Sgblack@eecs.umich.edu 11507379Sgblack@eecs.umich.edu header_output = "" 11517379Sgblack@eecs.umich.edu decoder_output = "" 11527379Sgblack@eecs.umich.edu exec_output = "" 11537379Sgblack@eecs.umich.edu 11547379Sgblack@eecs.umich.edu vcvtFpSFixedSCode = ''' 11557379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 11567381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 11577379Sgblack@eecs.umich.edu FpDest.sw = vfpFpSToFixed(FpOp1, true, false, imm); 11587381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest.sw)); 11597379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 11607379Sgblack@eecs.umich.edu ''' 11617379Sgblack@eecs.umich.edu vcvtFpSFixedSIop = InstObjParams("vcvt", "VcvtFpSFixedS", "VfpRegRegImmOp", 11627379Sgblack@eecs.umich.edu { "code": vcvtFpSFixedSCode, 11637379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 11647379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtFpSFixedSIop); 11657379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtFpSFixedSIop); 11667379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpSFixedSIop); 11677379Sgblack@eecs.umich.edu 11687379Sgblack@eecs.umich.edu vcvtFpSFixedDCode = ''' 11697379Sgblack@eecs.umich.edu IntDoubleUnion cOp1; 11707379Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 11717379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 11727381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 11737379Sgblack@eecs.umich.edu uint64_t mid = vfpFpDToFixed(cOp1.fp, true, false, imm); 11747381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (mid)); 11757379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 11767379Sgblack@eecs.umich.edu FpDestP0.uw = mid; 11777379Sgblack@eecs.umich.edu FpDestP1.uw = mid >> 32; 11787379Sgblack@eecs.umich.edu ''' 11797379Sgblack@eecs.umich.edu vcvtFpSFixedDIop = InstObjParams("vcvt", "VcvtFpSFixedD", "VfpRegRegImmOp", 11807379Sgblack@eecs.umich.edu { "code": vcvtFpSFixedDCode, 11817379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 11827379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtFpSFixedDIop); 11837379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtFpSFixedDIop); 11847379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpSFixedDIop); 11857379Sgblack@eecs.umich.edu 11867379Sgblack@eecs.umich.edu vcvtFpUFixedSCode = ''' 11877379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 11887381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 11897379Sgblack@eecs.umich.edu FpDest.uw = vfpFpSToFixed(FpOp1, false, false, imm); 11907381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest.uw)); 11917379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 11927379Sgblack@eecs.umich.edu ''' 11937379Sgblack@eecs.umich.edu vcvtFpUFixedSIop = InstObjParams("vcvt", "VcvtFpUFixedS", "VfpRegRegImmOp", 11947379Sgblack@eecs.umich.edu { "code": vcvtFpUFixedSCode, 11957379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 11967379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtFpUFixedSIop); 11977379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtFpUFixedSIop); 11987379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpUFixedSIop); 11997379Sgblack@eecs.umich.edu 12007379Sgblack@eecs.umich.edu vcvtFpUFixedDCode = ''' 12017379Sgblack@eecs.umich.edu IntDoubleUnion cOp1; 12027379Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 12037379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 12047381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 12057379Sgblack@eecs.umich.edu uint64_t mid = vfpFpDToFixed(cOp1.fp, false, false, imm); 12067381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (mid)); 12077379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 12087379Sgblack@eecs.umich.edu FpDestP0.uw = mid; 12097379Sgblack@eecs.umich.edu FpDestP1.uw = mid >> 32; 12107379Sgblack@eecs.umich.edu ''' 12117379Sgblack@eecs.umich.edu vcvtFpUFixedDIop = InstObjParams("vcvt", "VcvtFpUFixedD", "VfpRegRegImmOp", 12127379Sgblack@eecs.umich.edu { "code": vcvtFpUFixedDCode, 12137379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 12147379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtFpUFixedDIop); 12157379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtFpUFixedDIop); 12167379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpUFixedDIop); 12177379Sgblack@eecs.umich.edu 12187379Sgblack@eecs.umich.edu vcvtSFixedFpSCode = ''' 12197379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 12207381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1.sw) : "m" (FpOp1.sw)); 12217380Sgblack@eecs.umich.edu FpDest = vfpSFixedToFpS(FpOp1.sw, false, imm); 12227381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 12237379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 12247379Sgblack@eecs.umich.edu ''' 12257379Sgblack@eecs.umich.edu vcvtSFixedFpSIop = InstObjParams("vcvt", "VcvtSFixedFpS", "VfpRegRegImmOp", 12267379Sgblack@eecs.umich.edu { "code": vcvtSFixedFpSCode, 12277379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 12287379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtSFixedFpSIop); 12297379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtSFixedFpSIop); 12307379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtSFixedFpSIop); 12317379Sgblack@eecs.umich.edu 12327379Sgblack@eecs.umich.edu vcvtSFixedFpDCode = ''' 12337379Sgblack@eecs.umich.edu IntDoubleUnion cDest; 12347379Sgblack@eecs.umich.edu uint64_t mid = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 12357379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 12367381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (mid) : "m" (mid)); 12377380Sgblack@eecs.umich.edu cDest.fp = vfpSFixedToFpD(mid, false, imm); 12387381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 12397379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 12407379Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 12417379Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 12427379Sgblack@eecs.umich.edu ''' 12437379Sgblack@eecs.umich.edu vcvtSFixedFpDIop = InstObjParams("vcvt", "VcvtSFixedFpD", "VfpRegRegImmOp", 12447379Sgblack@eecs.umich.edu { "code": vcvtSFixedFpDCode, 12457379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 12467379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtSFixedFpDIop); 12477379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtSFixedFpDIop); 12487379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtSFixedFpDIop); 12497379Sgblack@eecs.umich.edu 12507379Sgblack@eecs.umich.edu vcvtUFixedFpSCode = ''' 12517379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 12527381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1.uw) : "m" (FpOp1.uw)); 12537379Sgblack@eecs.umich.edu FpDest = vfpUFixedToFpS(FpOp1.uw, false, imm); 12547381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 12557379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 12567379Sgblack@eecs.umich.edu ''' 12577379Sgblack@eecs.umich.edu vcvtUFixedFpSIop = InstObjParams("vcvt", "VcvtUFixedFpS", "VfpRegRegImmOp", 12587379Sgblack@eecs.umich.edu { "code": vcvtUFixedFpSCode, 12597379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 12607379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtUFixedFpSIop); 12617379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtUFixedFpSIop); 12627379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtUFixedFpSIop); 12637379Sgblack@eecs.umich.edu 12647379Sgblack@eecs.umich.edu vcvtUFixedFpDCode = ''' 12657379Sgblack@eecs.umich.edu IntDoubleUnion cDest; 12667379Sgblack@eecs.umich.edu uint64_t mid = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 12677379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 12687381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (mid) : "m" (mid)); 12697379Sgblack@eecs.umich.edu cDest.fp = vfpUFixedToFpD(mid, false, imm); 12707381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 12717379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 12727379Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 12737379Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 12747379Sgblack@eecs.umich.edu ''' 12757379Sgblack@eecs.umich.edu vcvtUFixedFpDIop = InstObjParams("vcvt", "VcvtUFixedFpD", "VfpRegRegImmOp", 12767379Sgblack@eecs.umich.edu { "code": vcvtUFixedFpDCode, 12777379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 12787379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtUFixedFpDIop); 12797379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtUFixedFpDIop); 12807379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtUFixedFpDIop); 12817379Sgblack@eecs.umich.edu 12827379Sgblack@eecs.umich.edu vcvtFpSHFixedSCode = ''' 12837379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 12847381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 12857379Sgblack@eecs.umich.edu FpDest.sh = vfpFpSToFixed(FpOp1, true, true, imm); 12867381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest.sh)); 12877379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 12887379Sgblack@eecs.umich.edu ''' 12897379Sgblack@eecs.umich.edu vcvtFpSHFixedSIop = InstObjParams("vcvt", "VcvtFpSHFixedS", 12907379Sgblack@eecs.umich.edu "VfpRegRegImmOp", 12917379Sgblack@eecs.umich.edu { "code": vcvtFpSHFixedSCode, 12927379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 12937379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtFpSHFixedSIop); 12947379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtFpSHFixedSIop); 12957379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpSHFixedSIop); 12967379Sgblack@eecs.umich.edu 12977379Sgblack@eecs.umich.edu vcvtFpSHFixedDCode = ''' 12987379Sgblack@eecs.umich.edu IntDoubleUnion cOp1; 12997379Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 13007379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 13017381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 13027379Sgblack@eecs.umich.edu uint64_t result = vfpFpDToFixed(cOp1.fp, true, true, imm); 13037381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (result)); 13047379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 13057379Sgblack@eecs.umich.edu FpDestP0.uw = result; 13067379Sgblack@eecs.umich.edu FpDestP1.uw = result >> 32; 13077379Sgblack@eecs.umich.edu ''' 13087379Sgblack@eecs.umich.edu vcvtFpSHFixedDIop = InstObjParams("vcvt", "VcvtFpSHFixedD", 13097379Sgblack@eecs.umich.edu "VfpRegRegImmOp", 13107379Sgblack@eecs.umich.edu { "code": vcvtFpSHFixedDCode, 13117379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 13127379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtFpSHFixedDIop); 13137379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtFpSHFixedDIop); 13147379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpSHFixedDIop); 13157379Sgblack@eecs.umich.edu 13167379Sgblack@eecs.umich.edu vcvtFpUHFixedSCode = ''' 13177379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 13187381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); 13197379Sgblack@eecs.umich.edu FpDest.uh = vfpFpSToFixed(FpOp1, false, true, imm); 13207381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest.uh)); 13217379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 13227379Sgblack@eecs.umich.edu ''' 13237379Sgblack@eecs.umich.edu vcvtFpUHFixedSIop = InstObjParams("vcvt", "VcvtFpUHFixedS", 13247379Sgblack@eecs.umich.edu "VfpRegRegImmOp", 13257379Sgblack@eecs.umich.edu { "code": vcvtFpUHFixedSCode, 13267379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 13277379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtFpUHFixedSIop); 13287379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtFpUHFixedSIop); 13297379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpUHFixedSIop); 13307379Sgblack@eecs.umich.edu 13317379Sgblack@eecs.umich.edu vcvtFpUHFixedDCode = ''' 13327379Sgblack@eecs.umich.edu IntDoubleUnion cOp1; 13337379Sgblack@eecs.umich.edu cOp1.bits = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 13347379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 13357381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); 13367379Sgblack@eecs.umich.edu uint64_t mid = vfpFpDToFixed(cOp1.fp, false, true, imm); 13377381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (mid)); 13387379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 13397379Sgblack@eecs.umich.edu FpDestP0.uw = mid; 13407379Sgblack@eecs.umich.edu FpDestP1.uw = mid >> 32; 13417379Sgblack@eecs.umich.edu ''' 13427379Sgblack@eecs.umich.edu vcvtFpUHFixedDIop = InstObjParams("vcvt", "VcvtFpUHFixedD", 13437379Sgblack@eecs.umich.edu "VfpRegRegImmOp", 13447379Sgblack@eecs.umich.edu { "code": vcvtFpUHFixedDCode, 13457379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 13467379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtFpUHFixedDIop); 13477379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtFpUHFixedDIop); 13487379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtFpUHFixedDIop); 13497379Sgblack@eecs.umich.edu 13507379Sgblack@eecs.umich.edu vcvtSHFixedFpSCode = ''' 13517379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 13527381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1.sh) : "m" (FpOp1.sh)); 13537379Sgblack@eecs.umich.edu FpDest = vfpSFixedToFpS(FpOp1.sh, true, imm); 13547381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 13557379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 13567379Sgblack@eecs.umich.edu ''' 13577379Sgblack@eecs.umich.edu vcvtSHFixedFpSIop = InstObjParams("vcvt", "VcvtSHFixedFpS", 13587379Sgblack@eecs.umich.edu "VfpRegRegImmOp", 13597379Sgblack@eecs.umich.edu { "code": vcvtSHFixedFpSCode, 13607379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 13617379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtSHFixedFpSIop); 13627379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtSHFixedFpSIop); 13637379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtSHFixedFpSIop); 13647379Sgblack@eecs.umich.edu 13657379Sgblack@eecs.umich.edu vcvtSHFixedFpDCode = ''' 13667379Sgblack@eecs.umich.edu IntDoubleUnion cDest; 13677379Sgblack@eecs.umich.edu uint64_t mid = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 13687379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 13697381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (mid) : "m" (mid)); 13707379Sgblack@eecs.umich.edu cDest.fp = vfpSFixedToFpD(mid, true, imm); 13717381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 13727379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 13737379Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 13747379Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 13757379Sgblack@eecs.umich.edu ''' 13767379Sgblack@eecs.umich.edu vcvtSHFixedFpDIop = InstObjParams("vcvt", "VcvtSHFixedFpD", 13777379Sgblack@eecs.umich.edu "VfpRegRegImmOp", 13787379Sgblack@eecs.umich.edu { "code": vcvtSHFixedFpDCode, 13797379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 13807379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtSHFixedFpDIop); 13817379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtSHFixedFpDIop); 13827379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtSHFixedFpDIop); 13837379Sgblack@eecs.umich.edu 13847379Sgblack@eecs.umich.edu vcvtUHFixedFpSCode = ''' 13857379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 13867381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (FpOp1.uh) : "m" (FpOp1.uh)); 13877379Sgblack@eecs.umich.edu FpDest = vfpUFixedToFpS(FpOp1.uh, true, imm); 13887381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (FpDest)); 13897379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 13907379Sgblack@eecs.umich.edu ''' 13917379Sgblack@eecs.umich.edu vcvtUHFixedFpSIop = InstObjParams("vcvt", "VcvtUHFixedFpS", 13927379Sgblack@eecs.umich.edu "VfpRegRegImmOp", 13937379Sgblack@eecs.umich.edu { "code": vcvtUHFixedFpSCode, 13947379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 13957379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtUHFixedFpSIop); 13967379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtUHFixedFpSIop); 13977379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtUHFixedFpSIop); 13987379Sgblack@eecs.umich.edu 13997379Sgblack@eecs.umich.edu vcvtUHFixedFpDCode = ''' 14007379Sgblack@eecs.umich.edu IntDoubleUnion cDest; 14017379Sgblack@eecs.umich.edu uint64_t mid = ((uint64_t)FpOp1P0.uw | ((uint64_t)FpOp1P1.uw << 32)); 14027379Sgblack@eecs.umich.edu VfpSavedState state = prepVfpFpscr(Fpscr); 14037381Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (mid) : "m" (mid)); 14047379Sgblack@eecs.umich.edu cDest.fp = vfpUFixedToFpD(mid, true, imm); 14057381Sgblack@eecs.umich.edu __asm__ __volatile__("" :: "m" (cDest.fp)); 14067379Sgblack@eecs.umich.edu Fpscr = setVfpFpscr(Fpscr, state); 14077379Sgblack@eecs.umich.edu FpDestP0.uw = cDest.bits; 14087379Sgblack@eecs.umich.edu FpDestP1.uw = cDest.bits >> 32; 14097379Sgblack@eecs.umich.edu ''' 14107379Sgblack@eecs.umich.edu vcvtUHFixedFpDIop = InstObjParams("vcvt", "VcvtUHFixedFpD", 14117379Sgblack@eecs.umich.edu "VfpRegRegImmOp", 14127379Sgblack@eecs.umich.edu { "code": vcvtUHFixedFpDCode, 14137379Sgblack@eecs.umich.edu "predicate_test": predicateTest }, []) 14147379Sgblack@eecs.umich.edu header_output += VfpRegRegImmOpDeclare.subst(vcvtUHFixedFpDIop); 14157379Sgblack@eecs.umich.edu decoder_output += VfpRegRegImmOpConstructor.subst(vcvtUHFixedFpDIop); 14167379Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(vcvtUHFixedFpDIop); 14177379Sgblack@eecs.umich.edu}}; 1418