crypto.isa revision 13168:4965381c122d
12207SN/A// -*- mode:c++ -*- 22207SN/A// 32207SN/A// Copyright (c) 2018 ARM Limited 42207SN/A// All rights reserved 52207SN/A// 62207SN/A// The license below extends only to copyright in the software and shall 72207SN/A// not be construed as granting a license to any other intellectual 82207SN/A// property including but not limited to intellectual property relating 92207SN/A// to a hardware implementation of the functionality of the software 102207SN/A// licensed hereunder. You may use the software subject to the license 112207SN/A// terms below provided that you ensure that this notice is replicated 122207SN/A// unmodified and in its entirety in all distributions of the software, 132207SN/A// modified or unmodified, in source code or in binary form. 142207SN/A// 152207SN/A// Redistribution and use in source and binary forms, with or without 162207SN/A// modification, are permitted provided that the following conditions are 172207SN/A// met: redistributions of source code must retain the above copyright 182207SN/A// notice, this list of conditions and the following disclaimer; 192207SN/A// redistributions in binary form must reproduce the above copyright 202207SN/A// notice, this list of conditions and the following disclaimer in the 212207SN/A// documentation and/or other materials provided with the distribution; 222207SN/A// neither the name of the copyright holders nor the names of its 232207SN/A// contributors may be used to endorse or promote products derived from 242207SN/A// this software without specific prior written permission. 252207SN/A// 262207SN/A// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 272665Ssaidi@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 282665Ssaidi@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 292665Ssaidi@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 302207SN/A// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 312207SN/A// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 323589Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 334111Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 342474SN/A// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 352207SN/A// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 363760Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 372454SN/A// 382976Sgblack@eecs.umich.edu// Authors: Matt Horsnell 392454SN/A// Prakash Ramrakhyani 402680Sktlim@umich.edu 412561SN/Alet {{ 424434Ssaidi@eecs.umich.edu 432561SN/A cryptoEnabledCheckCode = ''' 442474SN/A auto crypto_reg = xc->tcBase()->readMiscReg(MISCREG_ID_ISAR5); 452207SN/A if (!(crypto_reg & %(mask)d)) { 462458SN/A return std::make_shared<UndefinedInstruction>(machInst, true); 472474SN/A } 482458SN/A ''' 492207SN/A 505154Sgblack@eecs.umich.edu header_output = "" 515285Sgblack@eecs.umich.edu decoder_output = "" 525285Sgblack@eecs.umich.edu exec_output = "" 532474SN/A 542474SN/A cryptoRegRegRegPrefix = ''' 552474SN/A Crypto crypto; 562474SN/A RegVect srcReg1, srcReg2, destReg; 572474SN/A // Read source and destination registers. 582474SN/A ''' 592474SN/A for reg in range(4): 602474SN/A cryptoRegRegRegPrefix += ''' 613415Sgblack@eecs.umich.edu srcReg1.regs[%(reg)d] = htog(FpOp1P%(reg)d_uw); 623415Sgblack@eecs.umich.edu srcReg2.regs[%(reg)d] = htog(FpOp2P%(reg)d_uw); 633415Sgblack@eecs.umich.edu destReg.regs[%(reg)d] = htog(FpDestP%(reg)d_uw); 643415Sgblack@eecs.umich.edu ''' % { "reg" : reg } 652474SN/A cryptoRegRegRegPrefix += ''' 662474SN/A unsigned char *output = (unsigned char *)(&destReg.regs[0]); 674111Sgblack@eecs.umich.edu unsigned char *input = (unsigned char *)(&srcReg1.regs[0]); 684111Sgblack@eecs.umich.edu unsigned char *input2 = (unsigned char *)(&srcReg2.regs[0]); 694111Sgblack@eecs.umich.edu ''' 704111Sgblack@eecs.umich.edu 715128Sgblack@eecs.umich.edu cryptoSuffix = "" 725128Sgblack@eecs.umich.edu for reg in range(4): 735128Sgblack@eecs.umich.edu cryptoSuffix += ''' 745128Sgblack@eecs.umich.edu FpDestP%(reg)d_uw = gtoh(destReg.regs[%(reg)d]); 755128Sgblack@eecs.umich.edu ''' % { "reg" : reg } 765128Sgblack@eecs.umich.edu 775128Sgblack@eecs.umich.edu cryptoRegRegPrefix = ''' 784111Sgblack@eecs.umich.edu Crypto crypto; 795128Sgblack@eecs.umich.edu RegVect srcReg1, destReg; 805128Sgblack@eecs.umich.edu // Read source and destination registers. 815128Sgblack@eecs.umich.edu ''' 825128Sgblack@eecs.umich.edu for reg in range(4): 835128Sgblack@eecs.umich.edu cryptoRegRegPrefix += ''' 845128Sgblack@eecs.umich.edu srcReg1.regs[%(reg)d] = htog(FpOp1P%(reg)d_uw); 855128Sgblack@eecs.umich.edu destReg.regs[%(reg)d] = htog(FpDestP%(reg)d_uw); 865128Sgblack@eecs.umich.edu ''' % { "reg" : reg } 875128Sgblack@eecs.umich.edu 885128Sgblack@eecs.umich.edu cryptoRegRegPrefix += ''' 895128Sgblack@eecs.umich.edu // cast into format passed to aes encrypt method. 905128Sgblack@eecs.umich.edu unsigned char *output = (unsigned char *)(&destReg.regs[0]); 915128Sgblack@eecs.umich.edu unsigned char *input = (unsigned char *)(&srcReg1.regs[0]); 925128Sgblack@eecs.umich.edu ''' 935128Sgblack@eecs.umich.edu 945128Sgblack@eecs.umich.edu def cryptoRegRegRegInst(name, Name, opClass, enable_check, crypto_func): 955128Sgblack@eecs.umich.edu global header_output, decoder_output, exec_output 965128Sgblack@eecs.umich.edu 975128Sgblack@eecs.umich.edu crypto_prefix = enable_check + cryptoRegRegRegPrefix 985128Sgblack@eecs.umich.edu cryptocode = crypto_prefix + crypto_func + cryptoSuffix 995128Sgblack@eecs.umich.edu 1005128Sgblack@eecs.umich.edu cryptoiop = InstObjParams(name, Name, "RegRegRegOp", 1015128Sgblack@eecs.umich.edu { "code": cryptocode, 1025128Sgblack@eecs.umich.edu "r_count": 4, 1035128Sgblack@eecs.umich.edu "predicate_test": predicateTest, 1044111Sgblack@eecs.umich.edu "op_class": opClass}, []) 1054111Sgblack@eecs.umich.edu header_output += RegRegRegOpDeclare.subst(cryptoiop) 1064111Sgblack@eecs.umich.edu decoder_output += RegRegRegOpConstructor.subst(cryptoiop) 1074111Sgblack@eecs.umich.edu exec_output += CryptoPredOpExecute.subst(cryptoiop) 1084111Sgblack@eecs.umich.edu 1094111Sgblack@eecs.umich.edu def cryptoRegRegInst(name, Name, opClass, enable_check, crypto_func): 1102474SN/A global header_output, decoder_output, exec_output 1115285Sgblack@eecs.umich.edu 1124111Sgblack@eecs.umich.edu crypto_prefix = enable_check + cryptoRegRegPrefix 1135285Sgblack@eecs.umich.edu cryptocode = crypto_prefix + crypto_func + cryptoSuffix 1144111Sgblack@eecs.umich.edu 1155713Shsul@eecs.umich.edu cryptoiop = InstObjParams(name, Name, "RegRegOp", 1164111Sgblack@eecs.umich.edu { "code": cryptocode, 1174111Sgblack@eecs.umich.edu "r_count": 4, 1182646Ssaidi@eecs.umich.edu "predicate_test": predicateTest, 1195713Shsul@eecs.umich.edu "op_class": opClass}, []) 1202646Ssaidi@eecs.umich.edu header_output += RegRegOpDeclare.subst(cryptoiop) 1215713Shsul@eecs.umich.edu decoder_output += RegRegOpConstructor.subst(cryptoiop) 1224997Sgblack@eecs.umich.edu exec_output += CryptoPredOpExecute.subst(cryptoiop) 1232561SN/A 1242561SN/A def cryptoRegRegImmInst(name, Name, opClass, enable_check, crypto_func): 1252561SN/A global header_output, decoder_output, exec_output 1262561SN/A 1272561SN/A crypto_prefix = enable_check + cryptoRegRegPrefix 1285713Shsul@eecs.umich.edu cryptocode = crypto_prefix + crypto_func + cryptoSuffix 1295713Shsul@eecs.umich.edu 1302561SN/A cryptoiop = InstObjParams(name, Name, "RegRegImmOp", 1315713Shsul@eecs.umich.edu { "code": cryptocode, 1325713Shsul@eecs.umich.edu "r_count": 4, 1332561SN/A "predicate_test": predicateTest, 1345713Shsul@eecs.umich.edu "op_class": opClass}, []) 1355713Shsul@eecs.umich.edu header_output += RegRegImmOpDeclare.subst(cryptoiop) 1362561SN/A decoder_output += RegRegImmOpConstructor.subst(cryptoiop) 1375713Shsul@eecs.umich.edu exec_output += CryptoPredOpExecute.subst(cryptoiop) 1385713Shsul@eecs.umich.edu 1392561SN/A sha1_cCode = "crypto.sha1C(output, input, input2);" 1405713Shsul@eecs.umich.edu sha1_pCode = "crypto.sha1P(output, input, input2);" 1413415Sgblack@eecs.umich.edu sha1_mCode = "crypto.sha1M(output, input, input2);" 1425713Shsul@eecs.umich.edu sha1_hCode = "crypto.sha1H(output, input);" 1435713Shsul@eecs.umich.edu sha1_su0Code = "crypto.sha1Su0(output, input, input2);" 1443415Sgblack@eecs.umich.edu sha1_su1Code = "crypto.sha1Su1(output, input);" 1455713Shsul@eecs.umich.edu 1463589Sgblack@eecs.umich.edu sha256_hCode = "crypto.sha256H(output, input, input2);" 1475713Shsul@eecs.umich.edu sha256_h2Code = "crypto.sha256H2(output, input, input2);" 1484997Sgblack@eecs.umich.edu sha256_su0Code = "crypto.sha256Su0(output, input);" 1494997Sgblack@eecs.umich.edu sha256_su1Code = "crypto.sha256Su1(output, input, input2);" 1504997Sgblack@eecs.umich.edu 1514997Sgblack@eecs.umich.edu sha1_enabled = cryptoEnabledCheckCode % { "mask" : 0xF00 } 1524997Sgblack@eecs.umich.edu cryptoRegRegRegInst("sha1c", "SHA1C", "SimdSha1HashOp", 1535713Shsul@eecs.umich.edu sha1_enabled, sha1_cCode) 1542474SN/A cryptoRegRegRegInst("sha1p", "SHA1P", "SimdSha1HashOp", 1552474SN/A sha1_enabled, sha1_pCode) 1565285Sgblack@eecs.umich.edu cryptoRegRegRegInst("sha1m", "SHA1M", "SimdSha1HashOp", 1575285Sgblack@eecs.umich.edu sha1_enabled, sha1_mCode) 1582585SN/A cryptoRegRegInst("sha1h", "SHA1H", "SimdSha1Hash2Op", 1595285Sgblack@eecs.umich.edu sha1_enabled, sha1_hCode) 1605285Sgblack@eecs.umich.edu cryptoRegRegRegInst("sha1su0", "SHA1SU0", "SimdShaSigma3Op", 1612585SN/A sha1_enabled, sha1_su0Code) 1625285Sgblack@eecs.umich.edu cryptoRegRegInst("sha1su1", "SHA1SU1", "SimdShaSigma2Op", 1635285Sgblack@eecs.umich.edu sha1_enabled, sha1_su1Code) 1645713Shsul@eecs.umich.edu 1655285Sgblack@eecs.umich.edu sha2_enabled = cryptoEnabledCheckCode % { "mask" : 0xF000 } 1665713Shsul@eecs.umich.edu cryptoRegRegRegInst("sha256h", "SHA256H", "SimdSha256HashOp", 1675285Sgblack@eecs.umich.edu sha2_enabled, sha256_hCode) 1685285Sgblack@eecs.umich.edu cryptoRegRegRegInst("sha256h2", "SHA256H2", "SimdSha256Hash2Op", 1694111Sgblack@eecs.umich.edu sha2_enabled, sha256_h2Code) 1703415Sgblack@eecs.umich.edu cryptoRegRegInst("sha256su0", "SHA256SU0", "SimdShaSigma2Op", 1712561SN/A sha2_enabled, sha256_su0Code) 1725285Sgblack@eecs.umich.edu cryptoRegRegRegInst("sha256su1", "SHA256SU1", "SimdShaSigma3Op", 1732561SN/A sha2_enabled, sha256_su1Code) 1745285Sgblack@eecs.umich.edu}}; 1755285Sgblack@eecs.umich.edu