neon64.isa revision 10037
110037SARM gem5 Developers// Copyright (c) 2012-2013 ARM Limited 210037SARM gem5 Developers// All rights reserved 310037SARM gem5 Developers// 410037SARM gem5 Developers// The license below extends only to copyright in the software and shall 510037SARM gem5 Developers// not be construed as granting a license to any other intellectual 610037SARM gem5 Developers// property including but not limited to intellectual property relating 710037SARM gem5 Developers// to a hardware implementation of the functionality of the software 810037SARM gem5 Developers// licensed hereunder. You may use the software subject to the license 910037SARM gem5 Developers// terms below provided that you ensure that this notice is replicated 1010037SARM gem5 Developers// unmodified and in its entirety in all distributions of the software, 1110037SARM gem5 Developers// modified or unmodified, in source code or in binary form. 1210037SARM gem5 Developers// 1310037SARM gem5 Developers// Redistribution and use in source and binary forms, with or without 1410037SARM gem5 Developers// modification, are permitted provided that the following conditions are 1510037SARM gem5 Developers// met: redistributions of source code must retain the above copyright 1610037SARM gem5 Developers// notice, this list of conditions and the following disclaimer; 1710037SARM gem5 Developers// redistributions in binary form must reproduce the above copyright 1810037SARM gem5 Developers// notice, this list of conditions and the following disclaimer in the 1910037SARM gem5 Developers// documentation and/or other materials provided with the distribution; 2010037SARM gem5 Developers// neither the name of the copyright holders nor the names of its 2110037SARM gem5 Developers// contributors may be used to endorse or promote products derived from 2210037SARM gem5 Developers// this software without specific prior written permission. 2310037SARM gem5 Developers// 2410037SARM gem5 Developers// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2510037SARM gem5 Developers// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2610037SARM gem5 Developers// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2710037SARM gem5 Developers// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2810037SARM gem5 Developers// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2910037SARM gem5 Developers// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3010037SARM gem5 Developers// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3110037SARM gem5 Developers// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3210037SARM gem5 Developers// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3310037SARM gem5 Developers// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3410037SARM gem5 Developers// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3510037SARM gem5 Developers// 3610037SARM gem5 Developers// Authors: Giacomo Gabrielli 3710037SARM gem5 Developers// Mbou Eyole 3810037SARM gem5 Developers 3910037SARM gem5 Developersoutput header {{ 4010037SARM gem5 Developersnamespace Aarch64 4110037SARM gem5 Developers{ 4210037SARM gem5 Developers // AdvSIMD three same 4310037SARM gem5 Developers StaticInstPtr decodeNeon3Same(ExtMachInst machInst); 4410037SARM gem5 Developers // AdvSIMD three different 4510037SARM gem5 Developers StaticInstPtr decodeNeon3Diff(ExtMachInst machInst); 4610037SARM gem5 Developers // AdvSIMD two-reg misc 4710037SARM gem5 Developers StaticInstPtr decodeNeon2RegMisc(ExtMachInst machInst); 4810037SARM gem5 Developers // AdvSIMD across lanes 4910037SARM gem5 Developers StaticInstPtr decodeNeonAcrossLanes(ExtMachInst machInst); 5010037SARM gem5 Developers // AdvSIMD copy 5110037SARM gem5 Developers StaticInstPtr decodeNeonCopy(ExtMachInst machInst); 5210037SARM gem5 Developers // AdvSIMD vector x indexed element 5310037SARM gem5 Developers StaticInstPtr decodeNeonIndexedElem(ExtMachInst machInst); 5410037SARM gem5 Developers // AdvSIMD modified immediate 5510037SARM gem5 Developers StaticInstPtr decodeNeonModImm(ExtMachInst machInst); 5610037SARM gem5 Developers // AdvSIMD shift by immediate 5710037SARM gem5 Developers StaticInstPtr decodeNeonShiftByImm(ExtMachInst machInst); 5810037SARM gem5 Developers // AdvSIMD TBL/TBX 5910037SARM gem5 Developers StaticInstPtr decodeNeonTblTbx(ExtMachInst machInst); 6010037SARM gem5 Developers // AdvSIMD ZIP/UZP/TRN 6110037SARM gem5 Developers StaticInstPtr decodeNeonZipUzpTrn(ExtMachInst machInst); 6210037SARM gem5 Developers // AdvSIMD EXT 6310037SARM gem5 Developers StaticInstPtr decodeNeonExt(ExtMachInst machInst); 6410037SARM gem5 Developers 6510037SARM gem5 Developers // AdvSIMD scalar three same 6610037SARM gem5 Developers StaticInstPtr decodeNeonSc3Same(ExtMachInst machInst); 6710037SARM gem5 Developers // AdvSIMD scalar three different 6810037SARM gem5 Developers StaticInstPtr decodeNeonSc3Diff(ExtMachInst machInst); 6910037SARM gem5 Developers // AdvSIMD scalar two-reg misc 7010037SARM gem5 Developers StaticInstPtr decodeNeonSc2RegMisc(ExtMachInst machInst); 7110037SARM gem5 Developers // AdvSIMD scalar pairwise 7210037SARM gem5 Developers StaticInstPtr decodeNeonScPwise(ExtMachInst machInst); 7310037SARM gem5 Developers // AdvSIMD scalar copy 7410037SARM gem5 Developers StaticInstPtr decodeNeonScCopy(ExtMachInst machInst); 7510037SARM gem5 Developers // AdvSIMD scalar x indexed element 7610037SARM gem5 Developers StaticInstPtr decodeNeonScIndexedElem(ExtMachInst machInst); 7710037SARM gem5 Developers // AdvSIMD scalar shift by immediate 7810037SARM gem5 Developers StaticInstPtr decodeNeonScShiftByImm(ExtMachInst machInst); 7910037SARM gem5 Developers 8010037SARM gem5 Developers // AdvSIMD load/store 8110037SARM gem5 Developers StaticInstPtr decodeNeonMem(ExtMachInst machInst); 8210037SARM gem5 Developers} 8310037SARM gem5 Developers}}; 8410037SARM gem5 Developers 8510037SARM gem5 Developersoutput decoder {{ 8610037SARM gem5 Developersnamespace Aarch64 8710037SARM gem5 Developers{ 8810037SARM gem5 Developers StaticInstPtr 8910037SARM gem5 Developers decodeNeon3Same(ExtMachInst machInst) 9010037SARM gem5 Developers { 9110037SARM gem5 Developers uint8_t q = bits(machInst, 30); 9210037SARM gem5 Developers uint8_t u = bits(machInst, 29); 9310037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 9410037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 11); 9510037SARM gem5 Developers 9610037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 9710037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 9810037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 9910037SARM gem5 Developers 10010037SARM gem5 Developers uint8_t size_q = (size << 1) | q; 10110037SARM gem5 Developers uint8_t sz_q = size_q & 0x3; 10210037SARM gem5 Developers 10310037SARM gem5 Developers switch (opcode) { 10410037SARM gem5 Developers case 0x00: 10510037SARM gem5 Developers if (size == 0x3) 10610037SARM gem5 Developers return new Unknown64(machInst); 10710037SARM gem5 Developers if (u) 10810037SARM gem5 Developers return decodeNeonUThreeSReg<UhaddDX, UhaddQX>( 10910037SARM gem5 Developers q, size, machInst, vd, vn, vm); 11010037SARM gem5 Developers else 11110037SARM gem5 Developers return decodeNeonSThreeSReg<ShaddDX, ShaddQX>( 11210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 11310037SARM gem5 Developers case 0x01: 11410037SARM gem5 Developers if (size_q == 0x6) 11510037SARM gem5 Developers return new Unknown64(machInst); 11610037SARM gem5 Developers if (u) 11710037SARM gem5 Developers return decodeNeonUThreeXReg<UqaddDX, UqaddQX>( 11810037SARM gem5 Developers q, size, machInst, vd, vn, vm); 11910037SARM gem5 Developers else 12010037SARM gem5 Developers return decodeNeonSThreeXReg<SqaddDX, SqaddQX>( 12110037SARM gem5 Developers q, size, machInst, vd, vn, vm); 12210037SARM gem5 Developers case 0x02: 12310037SARM gem5 Developers if (size == 0x3) 12410037SARM gem5 Developers return new Unknown64(machInst); 12510037SARM gem5 Developers if (u) 12610037SARM gem5 Developers return decodeNeonUThreeSReg<UrhaddDX, UrhaddQX>( 12710037SARM gem5 Developers q, size, machInst, vd, vn, vm); 12810037SARM gem5 Developers else 12910037SARM gem5 Developers return decodeNeonSThreeSReg<SrhaddDX, SrhaddQX>( 13010037SARM gem5 Developers q, size, machInst, vd, vn, vm); 13110037SARM gem5 Developers case 0x03: 13210037SARM gem5 Developers switch (size) { 13310037SARM gem5 Developers case 0x0: 13410037SARM gem5 Developers if (u) { 13510037SARM gem5 Developers if (q) 13610037SARM gem5 Developers return new EorQX<uint64_t>(machInst, vd, vn, vm); 13710037SARM gem5 Developers else 13810037SARM gem5 Developers return new EorDX<uint64_t>(machInst, vd, vn, vm); 13910037SARM gem5 Developers } else { 14010037SARM gem5 Developers if (q) 14110037SARM gem5 Developers return new AndQX<uint64_t>(machInst, vd, vn, vm); 14210037SARM gem5 Developers else 14310037SARM gem5 Developers return new AndDX<uint64_t>(machInst, vd, vn, vm); 14410037SARM gem5 Developers } 14510037SARM gem5 Developers case 0x1: 14610037SARM gem5 Developers if (u) { 14710037SARM gem5 Developers if (q) 14810037SARM gem5 Developers return new BslQX<uint64_t>(machInst, vd, vn, vm); 14910037SARM gem5 Developers else 15010037SARM gem5 Developers return new BslDX<uint64_t>(machInst, vd, vn, vm); 15110037SARM gem5 Developers } else { 15210037SARM gem5 Developers if (q) 15310037SARM gem5 Developers return new BicQX<uint64_t>(machInst, vd, vn, vm); 15410037SARM gem5 Developers else 15510037SARM gem5 Developers return new BicDX<uint64_t>(machInst, vd, vn, vm); 15610037SARM gem5 Developers } 15710037SARM gem5 Developers case 0x2: 15810037SARM gem5 Developers if (u) { 15910037SARM gem5 Developers if (q) 16010037SARM gem5 Developers return new BitQX<uint64_t>(machInst, vd, vn, vm); 16110037SARM gem5 Developers else 16210037SARM gem5 Developers return new BitDX<uint64_t>(machInst, vd, vn, vm); 16310037SARM gem5 Developers } else { 16410037SARM gem5 Developers if (q) 16510037SARM gem5 Developers return new OrrQX<uint64_t>(machInst, vd, vn, vm); 16610037SARM gem5 Developers else 16710037SARM gem5 Developers return new OrrDX<uint64_t>(machInst, vd, vn, vm); 16810037SARM gem5 Developers } 16910037SARM gem5 Developers case 0x3: 17010037SARM gem5 Developers if (u) { 17110037SARM gem5 Developers if (q) 17210037SARM gem5 Developers return new BifQX<uint64_t>(machInst, vd, vn, vm); 17310037SARM gem5 Developers else 17410037SARM gem5 Developers return new BifDX<uint64_t>(machInst, vd, vn, vm); 17510037SARM gem5 Developers } else { 17610037SARM gem5 Developers if (q) 17710037SARM gem5 Developers return new OrnQX<uint64_t>(machInst, vd, vn, vm); 17810037SARM gem5 Developers else 17910037SARM gem5 Developers return new OrnDX<uint64_t>(machInst, vd, vn, vm); 18010037SARM gem5 Developers } 18110037SARM gem5 Developers } 18210037SARM gem5 Developers case 0x04: 18310037SARM gem5 Developers if (size == 0x3) 18410037SARM gem5 Developers return new Unknown64(machInst); 18510037SARM gem5 Developers if (u) 18610037SARM gem5 Developers return decodeNeonUThreeSReg<UhsubDX, UhsubQX>( 18710037SARM gem5 Developers q, size, machInst, vd, vn, vm); 18810037SARM gem5 Developers else 18910037SARM gem5 Developers return decodeNeonSThreeSReg<ShsubDX, ShsubQX>( 19010037SARM gem5 Developers q, size, machInst, vd, vn, vm); 19110037SARM gem5 Developers case 0x05: 19210037SARM gem5 Developers if (size_q == 0x6) 19310037SARM gem5 Developers return new Unknown64(machInst); 19410037SARM gem5 Developers if (u) 19510037SARM gem5 Developers return decodeNeonUThreeXReg<UqsubDX, UqsubQX>( 19610037SARM gem5 Developers q, size, machInst, vd, vn, vm); 19710037SARM gem5 Developers else 19810037SARM gem5 Developers return decodeNeonSThreeXReg<SqsubDX, SqsubQX>( 19910037SARM gem5 Developers q, size, machInst, vd, vn, vm); 20010037SARM gem5 Developers case 0x06: 20110037SARM gem5 Developers if (size_q == 0x6) 20210037SARM gem5 Developers return new Unknown64(machInst); 20310037SARM gem5 Developers if (u) 20410037SARM gem5 Developers return decodeNeonUThreeXReg<CmhiDX, CmhiQX>( 20510037SARM gem5 Developers q, size, machInst, vd, vn, vm); 20610037SARM gem5 Developers else 20710037SARM gem5 Developers return decodeNeonSThreeXReg<CmgtDX, CmgtQX>( 20810037SARM gem5 Developers q, size, machInst, vd, vn, vm); 20910037SARM gem5 Developers case 0x07: 21010037SARM gem5 Developers if (size_q == 0x6) 21110037SARM gem5 Developers return new Unknown64(machInst); 21210037SARM gem5 Developers if (u) 21310037SARM gem5 Developers return decodeNeonUThreeXReg<CmhsDX, CmhsQX>( 21410037SARM gem5 Developers q, size, machInst, vd, vn, vm); 21510037SARM gem5 Developers else 21610037SARM gem5 Developers return decodeNeonSThreeXReg<CmgeDX, CmgeQX>( 21710037SARM gem5 Developers q, size, machInst, vd, vn, vm); 21810037SARM gem5 Developers case 0x08: 21910037SARM gem5 Developers if (size_q == 0x6) 22010037SARM gem5 Developers return new Unknown64(machInst); 22110037SARM gem5 Developers if (u) 22210037SARM gem5 Developers return decodeNeonUThreeXReg<UshlDX, UshlQX>( 22310037SARM gem5 Developers q, size, machInst, vd, vn, vm); 22410037SARM gem5 Developers else 22510037SARM gem5 Developers return decodeNeonSThreeXReg<SshlDX, SshlQX>( 22610037SARM gem5 Developers q, size, machInst, vd, vn, vm); 22710037SARM gem5 Developers case 0x09: 22810037SARM gem5 Developers if (size_q == 0x6) 22910037SARM gem5 Developers return new Unknown64(machInst); 23010037SARM gem5 Developers if (u) 23110037SARM gem5 Developers return decodeNeonUThreeXReg<UqshlDX, UqshlQX>( 23210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 23310037SARM gem5 Developers else 23410037SARM gem5 Developers return decodeNeonSThreeXReg<SqshlDX, SqshlQX>( 23510037SARM gem5 Developers q, size, machInst, vd, vn, vm); 23610037SARM gem5 Developers case 0x0a: 23710037SARM gem5 Developers if (size_q == 0x6) 23810037SARM gem5 Developers return new Unknown64(machInst); 23910037SARM gem5 Developers if (u) 24010037SARM gem5 Developers return decodeNeonUThreeXReg<UrshlDX, UrshlQX>( 24110037SARM gem5 Developers q, size, machInst, vd, vn, vm); 24210037SARM gem5 Developers else 24310037SARM gem5 Developers return decodeNeonSThreeXReg<SrshlDX, SrshlQX>( 24410037SARM gem5 Developers q, size, machInst, vd, vn, vm); 24510037SARM gem5 Developers case 0x0b: 24610037SARM gem5 Developers if (size_q == 0x6) 24710037SARM gem5 Developers return new Unknown64(machInst); 24810037SARM gem5 Developers if (u) 24910037SARM gem5 Developers return decodeNeonUThreeXReg<UqrshlDX, UqrshlQX>( 25010037SARM gem5 Developers q, size, machInst, vd, vn, vm); 25110037SARM gem5 Developers else 25210037SARM gem5 Developers return decodeNeonSThreeXReg<SqrshlDX, SqrshlQX>( 25310037SARM gem5 Developers q, size, machInst, vd, vn, vm); 25410037SARM gem5 Developers case 0x0c: 25510037SARM gem5 Developers if (size == 0x3) 25610037SARM gem5 Developers return new Unknown64(machInst); 25710037SARM gem5 Developers if (u) 25810037SARM gem5 Developers return decodeNeonUThreeSReg<UmaxDX, UmaxQX>( 25910037SARM gem5 Developers q, size, machInst, vd, vn, vm); 26010037SARM gem5 Developers else 26110037SARM gem5 Developers return decodeNeonSThreeSReg<SmaxDX, SmaxQX>( 26210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 26310037SARM gem5 Developers case 0x0d: 26410037SARM gem5 Developers if (size == 0x3) 26510037SARM gem5 Developers return new Unknown64(machInst); 26610037SARM gem5 Developers if (u) 26710037SARM gem5 Developers return decodeNeonUThreeSReg<UminDX, UminQX>( 26810037SARM gem5 Developers q, size, machInst, vd, vn, vm); 26910037SARM gem5 Developers else 27010037SARM gem5 Developers return decodeNeonSThreeSReg<SminDX, SminQX>( 27110037SARM gem5 Developers q, size, machInst, vd, vn, vm); 27210037SARM gem5 Developers case 0x0e: 27310037SARM gem5 Developers if (size == 0x3) 27410037SARM gem5 Developers return new Unknown64(machInst); 27510037SARM gem5 Developers if (u) 27610037SARM gem5 Developers return decodeNeonUThreeSReg<UabdDX, UabdQX>( 27710037SARM gem5 Developers q, size, machInst, vd, vn, vm); 27810037SARM gem5 Developers else 27910037SARM gem5 Developers return decodeNeonSThreeSReg<SabdDX, SabdQX>( 28010037SARM gem5 Developers q, size, machInst, vd, vn, vm); 28110037SARM gem5 Developers case 0x0f: 28210037SARM gem5 Developers if (size == 0x3) 28310037SARM gem5 Developers return new Unknown64(machInst); 28410037SARM gem5 Developers if (u) 28510037SARM gem5 Developers return decodeNeonUThreeSReg<UabaDX, UabaQX>( 28610037SARM gem5 Developers q, size, machInst, vd, vn, vm); 28710037SARM gem5 Developers else 28810037SARM gem5 Developers return decodeNeonSThreeSReg<SabaDX, SabaQX>( 28910037SARM gem5 Developers q, size, machInst, vd, vn, vm); 29010037SARM gem5 Developers case 0x10: 29110037SARM gem5 Developers if (size_q == 0x6) 29210037SARM gem5 Developers return new Unknown64(machInst); 29310037SARM gem5 Developers if (u) 29410037SARM gem5 Developers return decodeNeonUThreeXReg<SubDX, SubQX>( 29510037SARM gem5 Developers q, size, machInst, vd, vn, vm); 29610037SARM gem5 Developers else 29710037SARM gem5 Developers return decodeNeonUThreeXReg<AddDX, AddQX>( 29810037SARM gem5 Developers q, size, machInst, vd, vn, vm); 29910037SARM gem5 Developers case 0x11: 30010037SARM gem5 Developers if (size_q == 0x6) 30110037SARM gem5 Developers return new Unknown64(machInst); 30210037SARM gem5 Developers if (u) 30310037SARM gem5 Developers return decodeNeonUThreeXReg<CmeqDX, CmeqQX>( 30410037SARM gem5 Developers q, size, machInst, vd, vn, vm); 30510037SARM gem5 Developers else 30610037SARM gem5 Developers return decodeNeonUThreeXReg<CmtstDX, CmtstQX>( 30710037SARM gem5 Developers q, size, machInst, vd, vn, vm); 30810037SARM gem5 Developers case 0x12: 30910037SARM gem5 Developers if (size == 0x3) 31010037SARM gem5 Developers return new Unknown64(machInst); 31110037SARM gem5 Developers if (u) 31210037SARM gem5 Developers return decodeNeonUThreeSReg<MlsDX, MlsQX>( 31310037SARM gem5 Developers q, size, machInst, vd, vn, vm); 31410037SARM gem5 Developers else 31510037SARM gem5 Developers return decodeNeonUThreeSReg<MlaDX, MlaQX>( 31610037SARM gem5 Developers q, size, machInst, vd, vn, vm); 31710037SARM gem5 Developers case 0x13: 31810037SARM gem5 Developers if (size == 0x3 || (size != 0x0 && bits(machInst, 29))) 31910037SARM gem5 Developers return new Unknown64(machInst); 32010037SARM gem5 Developers if (u) { 32110037SARM gem5 Developers if (q) 32210037SARM gem5 Developers return new PmulQX<uint8_t>(machInst, vd, vn, vm); 32310037SARM gem5 Developers else 32410037SARM gem5 Developers return new PmulDX<uint8_t>(machInst, vd, vn, vm); 32510037SARM gem5 Developers } else { 32610037SARM gem5 Developers return decodeNeonUThreeSReg<MulDX, MulQX>( 32710037SARM gem5 Developers q, size, machInst, vd, vn, vm); 32810037SARM gem5 Developers } 32910037SARM gem5 Developers case 0x14: 33010037SARM gem5 Developers if (size == 0x3) 33110037SARM gem5 Developers return new Unknown64(machInst); 33210037SARM gem5 Developers if (u) 33310037SARM gem5 Developers return decodeNeonUThreeSReg<UmaxpDX, UmaxpQX>( 33410037SARM gem5 Developers q, size, machInst, vd, vn, vm); 33510037SARM gem5 Developers else 33610037SARM gem5 Developers return decodeNeonSThreeSReg<SmaxpDX, SmaxpQX>( 33710037SARM gem5 Developers q, size, machInst, vd, vn, vm); 33810037SARM gem5 Developers case 0x15: 33910037SARM gem5 Developers if (size == 0x3) 34010037SARM gem5 Developers return new Unknown64(machInst); 34110037SARM gem5 Developers if (u) 34210037SARM gem5 Developers return decodeNeonUThreeSReg<UminpDX, UminpQX>( 34310037SARM gem5 Developers q, size, machInst, vd, vn, vm); 34410037SARM gem5 Developers else 34510037SARM gem5 Developers return decodeNeonSThreeSReg<SminpDX, SminpQX>( 34610037SARM gem5 Developers q, size, machInst, vd, vn, vm); 34710037SARM gem5 Developers case 0x16: 34810037SARM gem5 Developers if (size == 0x3 || size == 0x0) 34910037SARM gem5 Developers return new Unknown64(machInst); 35010037SARM gem5 Developers if (u) { 35110037SARM gem5 Developers if (q) 35210037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqrdmulhQX>( 35310037SARM gem5 Developers size, machInst, vd, vn, vm); 35410037SARM gem5 Developers else 35510037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqrdmulhDX>( 35610037SARM gem5 Developers size, machInst, vd, vn, vm); 35710037SARM gem5 Developers } else { 35810037SARM gem5 Developers if (q) 35910037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmulhQX>( 36010037SARM gem5 Developers size, machInst, vd, vn, vm); 36110037SARM gem5 Developers else 36210037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmulhDX>( 36310037SARM gem5 Developers size, machInst, vd, vn, vm); 36410037SARM gem5 Developers } 36510037SARM gem5 Developers case 0x17: 36610037SARM gem5 Developers if (u || size_q == 0x6) 36710037SARM gem5 Developers return new Unknown64(machInst); 36810037SARM gem5 Developers else 36910037SARM gem5 Developers return decodeNeonUThreeXReg<AddpDX, AddpQX>( 37010037SARM gem5 Developers q, size, machInst, vd, vn, vm); 37110037SARM gem5 Developers case 0x18: 37210037SARM gem5 Developers if (sz_q == 0x2) 37310037SARM gem5 Developers return new Unknown64(machInst); 37410037SARM gem5 Developers if (size < 0x2) { 37510037SARM gem5 Developers if (u) 37610037SARM gem5 Developers return decodeNeonUThreeFpReg<FmaxnmpDX, FmaxnmpQX>( 37710037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 37810037SARM gem5 Developers else 37910037SARM gem5 Developers return decodeNeonUThreeFpReg<FmaxnmDX, FmaxnmQX>( 38010037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 38110037SARM gem5 Developers } else { 38210037SARM gem5 Developers if (u) 38310037SARM gem5 Developers return decodeNeonUThreeFpReg<FminnmpDX, FminnmpQX>( 38410037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 38510037SARM gem5 Developers else 38610037SARM gem5 Developers return decodeNeonUThreeFpReg<FminnmDX, FminnmQX>( 38710037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 38810037SARM gem5 Developers } 38910037SARM gem5 Developers case 0x19: 39010037SARM gem5 Developers if (size < 0x2) { 39110037SARM gem5 Developers if (u || sz_q == 0x2) 39210037SARM gem5 Developers return new Unknown64(machInst); 39310037SARM gem5 Developers else 39410037SARM gem5 Developers return decodeNeonUThreeFpReg<FmlaDX, FmlaQX>( 39510037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 39610037SARM gem5 Developers } else { 39710037SARM gem5 Developers if (u || sz_q == 0x2) 39810037SARM gem5 Developers return new Unknown64(machInst); 39910037SARM gem5 Developers else 40010037SARM gem5 Developers return decodeNeonUThreeFpReg<FmlsDX, FmlsQX>( 40110037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 40210037SARM gem5 Developers } 40310037SARM gem5 Developers case 0x1a: 40410037SARM gem5 Developers if (sz_q == 0x2) 40510037SARM gem5 Developers return new Unknown64(machInst); 40610037SARM gem5 Developers if (size < 0x2) { 40710037SARM gem5 Developers if (u) 40810037SARM gem5 Developers return decodeNeonUThreeFpReg<FaddpDX, FaddpQX>( 40910037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 41010037SARM gem5 Developers else 41110037SARM gem5 Developers return decodeNeonUThreeFpReg<FaddDX, FaddQX>( 41210037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 41310037SARM gem5 Developers } else { 41410037SARM gem5 Developers if (u) 41510037SARM gem5 Developers return decodeNeonUThreeFpReg<FabdDX, FabdQX>( 41610037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 41710037SARM gem5 Developers else 41810037SARM gem5 Developers return decodeNeonUThreeFpReg<FsubDX, FsubQX>( 41910037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 42010037SARM gem5 Developers } 42110037SARM gem5 Developers case 0x1b: 42210037SARM gem5 Developers if (size < 0x2 && sz_q != 0x2) { 42310037SARM gem5 Developers if (u) 42410037SARM gem5 Developers return decodeNeonUThreeFpReg<FmulDX, FmulQX>( 42510037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 42610037SARM gem5 Developers else 42710037SARM gem5 Developers return decodeNeonUThreeFpReg<FmulxDX, FmulxQX>( 42810037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 42910037SARM gem5 Developers } else { 43010037SARM gem5 Developers return new Unknown64(machInst); 43110037SARM gem5 Developers } 43210037SARM gem5 Developers case 0x1c: 43310037SARM gem5 Developers if (size < 0x2) { 43410037SARM gem5 Developers if (u) 43510037SARM gem5 Developers return decodeNeonUThreeFpReg<FcmgeDX, FcmgeQX>( 43610037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 43710037SARM gem5 Developers else 43810037SARM gem5 Developers return decodeNeonUThreeFpReg<FcmeqDX, FcmeqQX>( 43910037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 44010037SARM gem5 Developers } else { 44110037SARM gem5 Developers if (u) 44210037SARM gem5 Developers return decodeNeonUThreeFpReg<FcmgtDX, FcmgtQX>( 44310037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 44410037SARM gem5 Developers else 44510037SARM gem5 Developers return new Unknown64(machInst); 44610037SARM gem5 Developers } 44710037SARM gem5 Developers case 0x1d: 44810037SARM gem5 Developers if (size < 0x2) { 44910037SARM gem5 Developers if (u) 45010037SARM gem5 Developers return decodeNeonUThreeFpReg<FacgeDX, FacgeQX>( 45110037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 45210037SARM gem5 Developers else 45310037SARM gem5 Developers return new Unknown64(machInst); 45410037SARM gem5 Developers } else { 45510037SARM gem5 Developers if (u) 45610037SARM gem5 Developers return decodeNeonUThreeFpReg<FacgtDX, FacgtQX>( 45710037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 45810037SARM gem5 Developers else 45910037SARM gem5 Developers return new Unknown64(machInst); 46010037SARM gem5 Developers } 46110037SARM gem5 Developers case 0x1e: 46210037SARM gem5 Developers if (sz_q == 0x2) 46310037SARM gem5 Developers return new Unknown64(machInst); 46410037SARM gem5 Developers if (size < 0x2) { 46510037SARM gem5 Developers if (u) 46610037SARM gem5 Developers return decodeNeonUThreeFpReg<FmaxpDX, FmaxpQX>( 46710037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 46810037SARM gem5 Developers else 46910037SARM gem5 Developers return decodeNeonUThreeFpReg<FmaxDX, FmaxQX>( 47010037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 47110037SARM gem5 Developers } else { 47210037SARM gem5 Developers if (u) 47310037SARM gem5 Developers return decodeNeonUThreeFpReg<FminpDX, FminpQX>( 47410037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 47510037SARM gem5 Developers else 47610037SARM gem5 Developers return decodeNeonUThreeFpReg<FminDX, FminQX>( 47710037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 47810037SARM gem5 Developers } 47910037SARM gem5 Developers case 0x1f: 48010037SARM gem5 Developers if (sz_q == 0x2) 48110037SARM gem5 Developers return new Unknown64(machInst); 48210037SARM gem5 Developers if (size < 0x2) { 48310037SARM gem5 Developers if (u) 48410037SARM gem5 Developers return decodeNeonUThreeFpReg<FdivDX, FdivQX>( 48510037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 48610037SARM gem5 Developers else 48710037SARM gem5 Developers return decodeNeonUThreeFpReg<FrecpsDX, FrecpsQX>( 48810037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 48910037SARM gem5 Developers } else { 49010037SARM gem5 Developers if (u) 49110037SARM gem5 Developers return new Unknown64(machInst); 49210037SARM gem5 Developers else 49310037SARM gem5 Developers return decodeNeonUThreeFpReg<FrsqrtsDX, FrsqrtsQX>( 49410037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 49510037SARM gem5 Developers } 49610037SARM gem5 Developers default: 49710037SARM gem5 Developers return new Unknown64(machInst); 49810037SARM gem5 Developers } 49910037SARM gem5 Developers } 50010037SARM gem5 Developers 50110037SARM gem5 Developers StaticInstPtr 50210037SARM gem5 Developers decodeNeon3Diff(ExtMachInst machInst) 50310037SARM gem5 Developers { 50410037SARM gem5 Developers uint8_t q = bits(machInst, 30); 50510037SARM gem5 Developers uint8_t u = bits(machInst, 29); 50610037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 50710037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 12); 50810037SARM gem5 Developers 50910037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 51010037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 51110037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 51210037SARM gem5 Developers 51310037SARM gem5 Developers switch (opcode) { 51410037SARM gem5 Developers case 0x0: 51510037SARM gem5 Developers if (size == 0x3) 51610037SARM gem5 Developers return new Unknown64(machInst); 51710037SARM gem5 Developers if (u) 51810037SARM gem5 Developers return decodeNeonUThreeSReg<UaddlX, Uaddl2X>( 51910037SARM gem5 Developers q, size, machInst, vd, vn, vm); 52010037SARM gem5 Developers else 52110037SARM gem5 Developers return decodeNeonSThreeSReg<SaddlX, Saddl2X>( 52210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 52310037SARM gem5 Developers case 0x1: 52410037SARM gem5 Developers if (size == 0x3) 52510037SARM gem5 Developers return new Unknown64(machInst); 52610037SARM gem5 Developers if (u) 52710037SARM gem5 Developers return decodeNeonUThreeSReg<UaddwX, Uaddw2X>( 52810037SARM gem5 Developers q, size, machInst, vd, vn, vm); 52910037SARM gem5 Developers else 53010037SARM gem5 Developers return decodeNeonSThreeSReg<SaddwX, Saddw2X>( 53110037SARM gem5 Developers q, size, machInst, vd, vn, vm); 53210037SARM gem5 Developers case 0x2: 53310037SARM gem5 Developers if (size == 0x3) 53410037SARM gem5 Developers return new Unknown64(machInst); 53510037SARM gem5 Developers if (u) 53610037SARM gem5 Developers return decodeNeonUThreeSReg<UsublX, Usubl2X>( 53710037SARM gem5 Developers q, size, machInst, vd, vn, vm); 53810037SARM gem5 Developers else 53910037SARM gem5 Developers return decodeNeonSThreeSReg<SsublX, Ssubl2X>( 54010037SARM gem5 Developers q, size, machInst, vd, vn, vm); 54110037SARM gem5 Developers case 0x3: 54210037SARM gem5 Developers if (size == 0x3) 54310037SARM gem5 Developers return new Unknown64(machInst); 54410037SARM gem5 Developers if (u) 54510037SARM gem5 Developers return decodeNeonUThreeSReg<UsubwX, Usubw2X>( 54610037SARM gem5 Developers q, size, machInst, vd, vn, vm); 54710037SARM gem5 Developers else 54810037SARM gem5 Developers return decodeNeonSThreeSReg<SsubwX, Ssubw2X>( 54910037SARM gem5 Developers q, size, machInst, vd, vn, vm); 55010037SARM gem5 Developers case 0x4: 55110037SARM gem5 Developers if (size == 0x3) 55210037SARM gem5 Developers return new Unknown64(machInst); 55310037SARM gem5 Developers if (u) 55410037SARM gem5 Developers return decodeNeonUThreeSReg<RaddhnX, Raddhn2X>( 55510037SARM gem5 Developers q, size, machInst, vd, vn, vm); 55610037SARM gem5 Developers else 55710037SARM gem5 Developers return decodeNeonUThreeSReg<AddhnX, Addhn2X>( 55810037SARM gem5 Developers q, size, machInst, vd, vn, vm); 55910037SARM gem5 Developers case 0x5: 56010037SARM gem5 Developers if (size == 0x3) 56110037SARM gem5 Developers return new Unknown64(machInst); 56210037SARM gem5 Developers if (u) 56310037SARM gem5 Developers return decodeNeonUThreeSReg<UabalX, Uabal2X>( 56410037SARM gem5 Developers q, size, machInst, vd, vn, vm); 56510037SARM gem5 Developers else 56610037SARM gem5 Developers return decodeNeonSThreeSReg<SabalX, Sabal2X>( 56710037SARM gem5 Developers q, size, machInst, vd, vn, vm); 56810037SARM gem5 Developers case 0x6: 56910037SARM gem5 Developers if (size == 0x3) 57010037SARM gem5 Developers return new Unknown64(machInst); 57110037SARM gem5 Developers if (u) 57210037SARM gem5 Developers return decodeNeonUThreeSReg<RsubhnX, Rsubhn2X>( 57310037SARM gem5 Developers q, size, machInst, vd, vn, vm); 57410037SARM gem5 Developers else 57510037SARM gem5 Developers return decodeNeonUThreeSReg<SubhnX, Subhn2X>( 57610037SARM gem5 Developers q, size, machInst, vd, vn, vm); 57710037SARM gem5 Developers case 0x7: 57810037SARM gem5 Developers if (size == 0x3) 57910037SARM gem5 Developers return new Unknown64(machInst); 58010037SARM gem5 Developers if (u) 58110037SARM gem5 Developers return decodeNeonUThreeSReg<UabdlX, Uabdl2X>( 58210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 58310037SARM gem5 Developers else 58410037SARM gem5 Developers return decodeNeonSThreeSReg<SabdlX, Sabdl2X>( 58510037SARM gem5 Developers q, size, machInst, vd, vn, vm); 58610037SARM gem5 Developers case 0x8: 58710037SARM gem5 Developers if (size == 0x3) 58810037SARM gem5 Developers return new Unknown64(machInst); 58910037SARM gem5 Developers if (u) 59010037SARM gem5 Developers return decodeNeonUThreeSReg<UmlalX, Umlal2X>( 59110037SARM gem5 Developers q, size, machInst, vd, vn, vm); 59210037SARM gem5 Developers else 59310037SARM gem5 Developers return decodeNeonSThreeSReg<SmlalX, Smlal2X>( 59410037SARM gem5 Developers q, size, machInst, vd, vn, vm); 59510037SARM gem5 Developers case 0x9: 59610037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) { 59710037SARM gem5 Developers return new Unknown64(machInst); 59810037SARM gem5 Developers } else { 59910037SARM gem5 Developers if (q) { 60010037SARM gem5 Developers return decodeNeonSThreeHAndWReg<Sqdmlal2X>( 60110037SARM gem5 Developers size, machInst, vd, vn, vm); 60210037SARM gem5 Developers } else { 60310037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmlalX>( 60410037SARM gem5 Developers size, machInst, vd, vn, vm); 60510037SARM gem5 Developers } 60610037SARM gem5 Developers } 60710037SARM gem5 Developers case 0xa: 60810037SARM gem5 Developers if (size == 0x3) 60910037SARM gem5 Developers return new Unknown64(machInst); 61010037SARM gem5 Developers if (u) 61110037SARM gem5 Developers return decodeNeonUThreeSReg<UmlslX, Umlsl2X>( 61210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 61310037SARM gem5 Developers else 61410037SARM gem5 Developers return decodeNeonSThreeSReg<SmlslX, Smlsl2X>( 61510037SARM gem5 Developers q, size, machInst, vd, vn, vm); 61610037SARM gem5 Developers case 0xb: 61710037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) { 61810037SARM gem5 Developers return new Unknown64(machInst); 61910037SARM gem5 Developers } else { 62010037SARM gem5 Developers if (q) { 62110037SARM gem5 Developers return decodeNeonSThreeHAndWReg<Sqdmlsl2X>( 62210037SARM gem5 Developers size, machInst, vd, vn, vm); 62310037SARM gem5 Developers } else { 62410037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmlslX>( 62510037SARM gem5 Developers size, machInst, vd, vn, vm); 62610037SARM gem5 Developers } 62710037SARM gem5 Developers } 62810037SARM gem5 Developers case 0xc: 62910037SARM gem5 Developers if (size == 0x3) 63010037SARM gem5 Developers return new Unknown64(machInst); 63110037SARM gem5 Developers if (u) 63210037SARM gem5 Developers return decodeNeonUThreeSReg<UmullX, Umull2X>( 63310037SARM gem5 Developers q, size, machInst, vd, vn, vm); 63410037SARM gem5 Developers else 63510037SARM gem5 Developers return decodeNeonSThreeSReg<SmullX, Smull2X>( 63610037SARM gem5 Developers q, size, machInst, vd, vn, vm); 63710037SARM gem5 Developers case 0xd: 63810037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) { 63910037SARM gem5 Developers return new Unknown64(machInst); 64010037SARM gem5 Developers } else { 64110037SARM gem5 Developers if (q) { 64210037SARM gem5 Developers return decodeNeonSThreeHAndWReg<Sqdmull2X>( 64310037SARM gem5 Developers size, machInst, vd, vn, vm); 64410037SARM gem5 Developers } else { 64510037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmullX>( 64610037SARM gem5 Developers size, machInst, vd, vn, vm); 64710037SARM gem5 Developers } 64810037SARM gem5 Developers } 64910037SARM gem5 Developers case 0xe: 65010037SARM gem5 Developers if (u || size != 0) { 65110037SARM gem5 Developers return new Unknown64(machInst); 65210037SARM gem5 Developers } else { 65310037SARM gem5 Developers if (q) 65410037SARM gem5 Developers return new Pmull2X<uint8_t>(machInst, vd, vn, vm); 65510037SARM gem5 Developers else 65610037SARM gem5 Developers return new PmullX<uint8_t>(machInst, vd, vn, vm); 65710037SARM gem5 Developers } 65810037SARM gem5 Developers default: 65910037SARM gem5 Developers return new Unknown64(machInst); 66010037SARM gem5 Developers } 66110037SARM gem5 Developers } 66210037SARM gem5 Developers 66310037SARM gem5 Developers StaticInstPtr 66410037SARM gem5 Developers decodeNeon2RegMisc(ExtMachInst machInst) 66510037SARM gem5 Developers { 66610037SARM gem5 Developers uint8_t q = bits(machInst, 30); 66710037SARM gem5 Developers uint8_t u = bits(machInst, 29); 66810037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 66910037SARM gem5 Developers uint8_t opcode = bits(machInst, 16, 12); 67010037SARM gem5 Developers 67110037SARM gem5 Developers IntRegIndex vd = (IntRegIndex)(uint8_t)bits(machInst, 4, 0); 67210037SARM gem5 Developers IntRegIndex vn = (IntRegIndex)(uint8_t)bits(machInst, 9, 5); 67310037SARM gem5 Developers 67410037SARM gem5 Developers uint8_t size_q = (size << 1) | q; 67510037SARM gem5 Developers uint8_t sz_q = size_q & 0x3; 67610037SARM gem5 Developers uint8_t op = (uint8_t)((bits(machInst, 12) << 1) | 67710037SARM gem5 Developers bits(machInst, 29)); 67810037SARM gem5 Developers uint8_t switchVal = opcode | ((u ? 1 : 0) << 5); 67910037SARM gem5 Developers 68010037SARM gem5 Developers switch (switchVal) { 68110037SARM gem5 Developers case 0x00: 68210037SARM gem5 Developers if (op + size >= 3) 68310037SARM gem5 Developers return new Unknown64(machInst); 68410037SARM gem5 Developers return decodeNeonUTwoMiscSReg<Rev64DX, Rev64QX>( 68510037SARM gem5 Developers q, size, machInst, vd, vn); 68610037SARM gem5 Developers case 0x01: 68710037SARM gem5 Developers if (op + size >= 3) 68810037SARM gem5 Developers return new Unknown64(machInst); 68910037SARM gem5 Developers if (q) 69010037SARM gem5 Developers return new Rev16QX<uint8_t>(machInst, vd, vn); 69110037SARM gem5 Developers else 69210037SARM gem5 Developers return new Rev16DX<uint8_t>(machInst, vd, vn); 69310037SARM gem5 Developers case 0x02: 69410037SARM gem5 Developers if (size == 0x3) 69510037SARM gem5 Developers return new Unknown64(machInst); 69610037SARM gem5 Developers return decodeNeonSTwoMiscSReg<SaddlpDX, SaddlpQX>( 69710037SARM gem5 Developers q, size, machInst, vd, vn); 69810037SARM gem5 Developers case 0x03: 69910037SARM gem5 Developers if (size_q == 0x6) 70010037SARM gem5 Developers return new Unknown64(machInst); 70110037SARM gem5 Developers return decodeNeonUTwoMiscXReg<SuqaddDX, SuqaddQX>( 70210037SARM gem5 Developers q, size, machInst, vd, vn); 70310037SARM gem5 Developers case 0x04: 70410037SARM gem5 Developers if (size == 0x3) 70510037SARM gem5 Developers return new Unknown64(machInst); 70610037SARM gem5 Developers return decodeNeonSTwoMiscSReg<ClsDX, ClsQX>( 70710037SARM gem5 Developers q, size, machInst, vd, vn); 70810037SARM gem5 Developers case 0x05: 70910037SARM gem5 Developers if (size != 0x0) 71010037SARM gem5 Developers return new Unknown64(machInst); 71110037SARM gem5 Developers if (q) 71210037SARM gem5 Developers return new CntQX<uint8_t>(machInst, vd, vn); 71310037SARM gem5 Developers else 71410037SARM gem5 Developers return new CntDX<uint8_t>(machInst, vd, vn); 71510037SARM gem5 Developers case 0x06: 71610037SARM gem5 Developers if (size == 0x3) 71710037SARM gem5 Developers return new Unknown64(machInst); 71810037SARM gem5 Developers return decodeNeonSTwoMiscSReg<SadalpDX, SadalpQX>( 71910037SARM gem5 Developers q, size, machInst, vd, vn); 72010037SARM gem5 Developers case 0x07: 72110037SARM gem5 Developers if (size_q == 0x6) 72210037SARM gem5 Developers return new Unknown64(machInst); 72310037SARM gem5 Developers return decodeNeonSTwoMiscXReg<SqabsDX, SqabsQX>( 72410037SARM gem5 Developers q, size, machInst, vd, vn); 72510037SARM gem5 Developers case 0x08: 72610037SARM gem5 Developers if (size_q == 0x6) 72710037SARM gem5 Developers return new Unknown64(machInst); 72810037SARM gem5 Developers return decodeNeonSTwoMiscXReg<CmgtZeroDX, CmgtZeroQX>( 72910037SARM gem5 Developers q, size, machInst, vd, vn); 73010037SARM gem5 Developers case 0x09: 73110037SARM gem5 Developers if (size_q == 0x6) 73210037SARM gem5 Developers return new Unknown64(machInst); 73310037SARM gem5 Developers return decodeNeonSTwoMiscXReg<CmeqZeroDX, CmeqZeroQX>( 73410037SARM gem5 Developers q, size, machInst, vd, vn); 73510037SARM gem5 Developers case 0x0a: 73610037SARM gem5 Developers if (size_q == 0x6) 73710037SARM gem5 Developers return new Unknown64(machInst); 73810037SARM gem5 Developers return decodeNeonSTwoMiscXReg<CmltZeroDX, CmltZeroQX>( 73910037SARM gem5 Developers q, size, machInst, vd, vn); 74010037SARM gem5 Developers case 0x0b: 74110037SARM gem5 Developers if (size_q == 0x6) 74210037SARM gem5 Developers return new Unknown64(machInst); 74310037SARM gem5 Developers return decodeNeonSTwoMiscXReg<AbsDX, AbsQX>( 74410037SARM gem5 Developers q, size, machInst, vd, vn); 74510037SARM gem5 Developers case 0x0c: 74610037SARM gem5 Developers if (size < 0x2 || sz_q == 0x2) 74710037SARM gem5 Developers return new Unknown64(machInst); 74810037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcmgtZeroDX, FcmgtZeroQX>( 74910037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 75010037SARM gem5 Developers case 0x0d: 75110037SARM gem5 Developers if (size < 0x2 || sz_q == 0x2) 75210037SARM gem5 Developers return new Unknown64(machInst); 75310037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcmeqZeroDX, FcmeqZeroQX>( 75410037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 75510037SARM gem5 Developers case 0x0e: 75610037SARM gem5 Developers if (size < 0x2 || sz_q == 0x2) 75710037SARM gem5 Developers return new Unknown64(machInst); 75810037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcmltZeroDX, FcmltZeroQX>( 75910037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 76010037SARM gem5 Developers case 0x0f: 76110037SARM gem5 Developers if (size < 0x2 || sz_q == 0x2) 76210037SARM gem5 Developers return new Unknown64(machInst); 76310037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FabsDX, FabsQX>( 76410037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 76510037SARM gem5 Developers case 0x12: 76610037SARM gem5 Developers if (size == 0x3) 76710037SARM gem5 Developers return new Unknown64(machInst); 76810037SARM gem5 Developers return decodeNeonUTwoMiscSReg<XtnX, Xtn2X>( 76910037SARM gem5 Developers q, size, machInst, vd, vn); 77010037SARM gem5 Developers case 0x14: 77110037SARM gem5 Developers if (size == 0x3) 77210037SARM gem5 Developers return new Unknown64(machInst); 77310037SARM gem5 Developers return decodeNeonSTwoMiscSReg<SqxtnX, Sqxtn2X>( 77410037SARM gem5 Developers q, size, machInst, vd, vn); 77510037SARM gem5 Developers case 0x16: 77610037SARM gem5 Developers if (size > 0x1) 77710037SARM gem5 Developers return new Unknown64(machInst); 77810037SARM gem5 Developers if (q) { 77910037SARM gem5 Developers if (size) 78010037SARM gem5 Developers return new Fcvtn2X<uint32_t>(machInst, vd, vn); 78110037SARM gem5 Developers else 78210037SARM gem5 Developers return new Fcvtn2X<uint16_t>(machInst, vd, vn); 78310037SARM gem5 Developers } else { 78410037SARM gem5 Developers if (size) 78510037SARM gem5 Developers return new FcvtnX<uint32_t>(machInst, vd, vn); 78610037SARM gem5 Developers else 78710037SARM gem5 Developers return new FcvtnX<uint16_t>(machInst, vd, vn); 78810037SARM gem5 Developers } 78910037SARM gem5 Developers case 0x17: 79010037SARM gem5 Developers if (size > 0x1) 79110037SARM gem5 Developers return new Unknown64(machInst); 79210037SARM gem5 Developers if (q) { 79310037SARM gem5 Developers if (size) 79410037SARM gem5 Developers return new Fcvtl2X<uint32_t>(machInst, vd, vn); 79510037SARM gem5 Developers else 79610037SARM gem5 Developers return new Fcvtl2X<uint16_t>(machInst, vd, vn); 79710037SARM gem5 Developers } else { 79810037SARM gem5 Developers if (size) 79910037SARM gem5 Developers return new FcvtlX<uint32_t>(machInst, vd, vn); 80010037SARM gem5 Developers else 80110037SARM gem5 Developers return new FcvtlX<uint16_t>(machInst, vd, vn); 80210037SARM gem5 Developers } 80310037SARM gem5 Developers case 0x18: 80410037SARM gem5 Developers if (sz_q == 0x2) 80510037SARM gem5 Developers return new Unknown64(machInst); 80610037SARM gem5 Developers if (size < 0x2) 80710037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrintnDX, FrintnQX>( 80810037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 80910037SARM gem5 Developers else 81010037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrintpDX, FrintpQX>( 81110037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 81210037SARM gem5 Developers case 0x19: 81310037SARM gem5 Developers if (sz_q == 0x2) 81410037SARM gem5 Developers return new Unknown64(machInst); 81510037SARM gem5 Developers if (size < 0x2) 81610037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrintmDX, FrintmQX>( 81710037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 81810037SARM gem5 Developers else 81910037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrintzDX, FrintzQX>( 82010037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 82110037SARM gem5 Developers case 0x1a: 82210037SARM gem5 Developers if (sz_q == 0x2) 82310037SARM gem5 Developers return new Unknown64(machInst); 82410037SARM gem5 Developers if (size < 0x2) 82510037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtnsDX, FcvtnsQX>( 82610037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 82710037SARM gem5 Developers else 82810037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtpsDX, FcvtpsQX>( 82910037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 83010037SARM gem5 Developers case 0x1b: 83110037SARM gem5 Developers if (sz_q == 0x2) 83210037SARM gem5 Developers return new Unknown64(machInst); 83310037SARM gem5 Developers if (size < 0x2) 83410037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtmsDX, FcvtmsQX>( 83510037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 83610037SARM gem5 Developers else 83710037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtzsIntDX, FcvtzsIntQX>( 83810037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 83910037SARM gem5 Developers case 0x1c: 84010037SARM gem5 Developers if (size < 0x2) { 84110037SARM gem5 Developers if (sz_q == 0x2) 84210037SARM gem5 Developers return new Unknown64(machInst); 84310037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtasDX, FcvtasQX>( 84410037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 84510037SARM gem5 Developers } else { 84610037SARM gem5 Developers if (size & 0x1) 84710037SARM gem5 Developers return new Unknown64(machInst); 84810037SARM gem5 Developers if (q) 84910037SARM gem5 Developers return new UrecpeQX<uint32_t>(machInst, vd, vn); 85010037SARM gem5 Developers else 85110037SARM gem5 Developers return new UrecpeDX<uint32_t>(machInst, vd, vn); 85210037SARM gem5 Developers } 85310037SARM gem5 Developers case 0x1d: 85410037SARM gem5 Developers if (sz_q == 0x2) 85510037SARM gem5 Developers return new Unknown64(machInst); 85610037SARM gem5 Developers if (size < 0x2) { 85710037SARM gem5 Developers if (q) { 85810037SARM gem5 Developers if (size & 0x1) 85910037SARM gem5 Developers return new ScvtfIntDQX<uint64_t>(machInst, vd, vn); 86010037SARM gem5 Developers else 86110037SARM gem5 Developers return new ScvtfIntSQX<uint32_t>(machInst, vd, vn); 86210037SARM gem5 Developers } else { 86310037SARM gem5 Developers if (size & 0x1) 86410037SARM gem5 Developers return new Unknown(machInst); 86510037SARM gem5 Developers else 86610037SARM gem5 Developers return new ScvtfIntDX<uint32_t>(machInst, vd, vn); 86710037SARM gem5 Developers } 86810037SARM gem5 Developers } else { 86910037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrecpeDX, FrecpeQX>( 87010037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 87110037SARM gem5 Developers } 87210037SARM gem5 Developers case 0x20: 87310037SARM gem5 Developers if (op + size >= 3) 87410037SARM gem5 Developers return new Unknown64(machInst); 87510037SARM gem5 Developers if (q) { 87610037SARM gem5 Developers if (size & 0x1) 87710037SARM gem5 Developers return new Rev32QX<uint16_t>(machInst, vd, vn); 87810037SARM gem5 Developers else 87910037SARM gem5 Developers return new Rev32QX<uint8_t>(machInst, vd, vn); 88010037SARM gem5 Developers } else { 88110037SARM gem5 Developers if (size & 0x1) 88210037SARM gem5 Developers return new Rev32DX<uint16_t>(machInst, vd, vn); 88310037SARM gem5 Developers else 88410037SARM gem5 Developers return new Rev32DX<uint8_t>(machInst, vd, vn); 88510037SARM gem5 Developers } 88610037SARM gem5 Developers case 0x22: 88710037SARM gem5 Developers if (size == 0x3) 88810037SARM gem5 Developers return new Unknown64(machInst); 88910037SARM gem5 Developers return decodeNeonUTwoMiscSReg<UaddlpDX, UaddlpQX>( 89010037SARM gem5 Developers q, size, machInst, vd, vn); 89110037SARM gem5 Developers case 0x23: 89210037SARM gem5 Developers if (size_q == 0x6) 89310037SARM gem5 Developers return new Unknown64(machInst); 89410037SARM gem5 Developers return decodeNeonUTwoMiscXReg<UsqaddDX, UsqaddQX>( 89510037SARM gem5 Developers q, size, machInst, vd, vn); 89610037SARM gem5 Developers return new Unknown64(machInst); 89710037SARM gem5 Developers case 0x24: 89810037SARM gem5 Developers if (size == 0x3) 89910037SARM gem5 Developers return new Unknown64(machInst); 90010037SARM gem5 Developers return decodeNeonSTwoMiscSReg<ClzDX, ClzQX>( 90110037SARM gem5 Developers q, size, machInst, vd, vn); 90210037SARM gem5 Developers case 0x25: 90310037SARM gem5 Developers if (size == 0x0) { 90410037SARM gem5 Developers if (q) 90510037SARM gem5 Developers return new MvnQX<uint64_t>(machInst, vd, vn); 90610037SARM gem5 Developers else 90710037SARM gem5 Developers return new MvnDX<uint64_t>(machInst, vd, vn); 90810037SARM gem5 Developers } else if (size == 0x1) { 90910037SARM gem5 Developers if (q) 91010037SARM gem5 Developers return new RbitQX<uint8_t>(machInst, vd, vn); 91110037SARM gem5 Developers else 91210037SARM gem5 Developers return new RbitDX<uint8_t>(machInst, vd, vn); 91310037SARM gem5 Developers } else { 91410037SARM gem5 Developers return new Unknown64(machInst); 91510037SARM gem5 Developers } 91610037SARM gem5 Developers case 0x26: 91710037SARM gem5 Developers if (size == 0x3) 91810037SARM gem5 Developers return new Unknown64(machInst); 91910037SARM gem5 Developers return decodeNeonUTwoMiscSReg<UadalpDX, UadalpQX>( 92010037SARM gem5 Developers q, size, machInst, vd, vn); 92110037SARM gem5 Developers case 0x27: 92210037SARM gem5 Developers if (size_q == 0x6) 92310037SARM gem5 Developers return new Unknown64(machInst); 92410037SARM gem5 Developers return decodeNeonSTwoMiscXReg<SqnegDX, SqnegQX>( 92510037SARM gem5 Developers q, size, machInst, vd, vn); 92610037SARM gem5 Developers case 0x28: 92710037SARM gem5 Developers if (size_q == 0x6) 92810037SARM gem5 Developers return new Unknown64(machInst); 92910037SARM gem5 Developers return decodeNeonSTwoMiscXReg<CmgeZeroDX, CmgeZeroQX>( 93010037SARM gem5 Developers q, size, machInst, vd, vn); 93110037SARM gem5 Developers case 0x29: 93210037SARM gem5 Developers if (size_q == 0x6) 93310037SARM gem5 Developers return new Unknown64(machInst); 93410037SARM gem5 Developers return decodeNeonSTwoMiscXReg<CmleZeroDX, CmleZeroQX>( 93510037SARM gem5 Developers q, size, machInst, vd, vn); 93610037SARM gem5 Developers case 0x2b: 93710037SARM gem5 Developers if (size_q == 0x6) 93810037SARM gem5 Developers return new Unknown64(machInst); 93910037SARM gem5 Developers return decodeNeonSTwoMiscXReg<NegDX, NegQX>( 94010037SARM gem5 Developers q, size, machInst, vd, vn); 94110037SARM gem5 Developers case 0x2c: 94210037SARM gem5 Developers if (size < 0x2 || sz_q == 0x2) 94310037SARM gem5 Developers return new Unknown64(machInst); 94410037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcmgeZeroDX, FcmgeZeroQX>( 94510037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 94610037SARM gem5 Developers case 0x2d: 94710037SARM gem5 Developers if (size < 0x2 || sz_q == 0x2) 94810037SARM gem5 Developers return new Unknown64(machInst); 94910037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcmleZeroDX, FcmleZeroQX>( 95010037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 95110037SARM gem5 Developers case 0x2f: 95210037SARM gem5 Developers if (size < 0x2 || size_q == 0x6) 95310037SARM gem5 Developers return new Unknown64(machInst); 95410037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FnegDX, FnegQX>( 95510037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 95610037SARM gem5 Developers case 0x32: 95710037SARM gem5 Developers if (size == 0x3) 95810037SARM gem5 Developers return new Unknown64(machInst); 95910037SARM gem5 Developers return decodeNeonSTwoMiscSReg<SqxtunX, Sqxtun2X>( 96010037SARM gem5 Developers q, size, machInst, vd, vn); 96110037SARM gem5 Developers case 0x33: 96210037SARM gem5 Developers if (size == 0x3) 96310037SARM gem5 Developers return new Unknown64(machInst); 96410037SARM gem5 Developers return decodeNeonUTwoMiscSReg<ShllX, Shll2X>( 96510037SARM gem5 Developers q, size, machInst, vd, vn); 96610037SARM gem5 Developers case 0x34: 96710037SARM gem5 Developers if (size == 0x3) 96810037SARM gem5 Developers return new Unknown64(machInst); 96910037SARM gem5 Developers return decodeNeonUTwoMiscSReg<UqxtnX, Uqxtn2X>( 97010037SARM gem5 Developers q, size, machInst, vd, vn); 97110037SARM gem5 Developers case 0x36: 97210037SARM gem5 Developers if (size != 0x1) 97310037SARM gem5 Developers return new Unknown64(machInst); 97410037SARM gem5 Developers if (q) 97510037SARM gem5 Developers return new Fcvtxn2X<uint32_t>(machInst, vd, vn); 97610037SARM gem5 Developers else 97710037SARM gem5 Developers return new FcvtxnX<uint32_t>(machInst, vd, vn); 97810037SARM gem5 Developers case 0x38: 97910037SARM gem5 Developers if (size > 0x1 || sz_q == 0x2) 98010037SARM gem5 Developers return new Unknown64(machInst); 98110037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrintaDX, FrintaQX>( 98210037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 98310037SARM gem5 Developers case 0x39: 98410037SARM gem5 Developers if (sz_q == 0x2) 98510037SARM gem5 Developers return new Unknown64(machInst); 98610037SARM gem5 Developers if (size < 0x2) 98710037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrintxDX, FrintxQX>( 98810037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 98910037SARM gem5 Developers else 99010037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrintiDX, FrintiQX>( 99110037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 99210037SARM gem5 Developers case 0x3a: 99310037SARM gem5 Developers if (sz_q == 0x2) 99410037SARM gem5 Developers return new Unknown64(machInst); 99510037SARM gem5 Developers if (size < 0x2) 99610037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtnuDX, FcvtnuQX>( 99710037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 99810037SARM gem5 Developers else 99910037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtpuDX, FcvtpuQX>( 100010037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 100110037SARM gem5 Developers case 0x3b: 100210037SARM gem5 Developers if (sz_q == 0x2) 100310037SARM gem5 Developers return new Unknown64(machInst); 100410037SARM gem5 Developers if (size < 0x2) 100510037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtmuDX, FcvtmuQX>( 100610037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 100710037SARM gem5 Developers else 100810037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtzuIntDX, FcvtzuIntQX>( 100910037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 101010037SARM gem5 Developers case 0x3c: 101110037SARM gem5 Developers if (size < 0x2) { 101210037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtauDX, FcvtauQX>( 101310037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 101410037SARM gem5 Developers } else if (size == 0x2) { 101510037SARM gem5 Developers if (q) 101610037SARM gem5 Developers return new UrsqrteQX<uint32_t>(machInst, vd, vn); 101710037SARM gem5 Developers else 101810037SARM gem5 Developers return new UrsqrteDX<uint32_t>(machInst, vd, vn); 101910037SARM gem5 Developers } else { 102010037SARM gem5 Developers return new Unknown64(machInst); 102110037SARM gem5 Developers } 102210037SARM gem5 Developers case 0x3d: 102310037SARM gem5 Developers if (sz_q == 0x2) 102410037SARM gem5 Developers return new Unknown64(machInst); 102510037SARM gem5 Developers if (size < 0x2) 102610037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<UcvtfIntDX, UcvtfIntQX>( 102710037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 102810037SARM gem5 Developers else 102910037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrsqrteDX, FrsqrteQX>( 103010037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 103110037SARM gem5 Developers case 0x3f: 103210037SARM gem5 Developers if (size < 0x2 || sz_q == 0x2) 103310037SARM gem5 Developers return new Unknown64(machInst); 103410037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FsqrtDX, FsqrtQX>( 103510037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 103610037SARM gem5 Developers default: 103710037SARM gem5 Developers return new Unknown64(machInst); 103810037SARM gem5 Developers } 103910037SARM gem5 Developers } 104010037SARM gem5 Developers 104110037SARM gem5 Developers StaticInstPtr 104210037SARM gem5 Developers decodeNeonAcrossLanes(ExtMachInst machInst) 104310037SARM gem5 Developers { 104410037SARM gem5 Developers uint8_t q = bits(machInst, 30); 104510037SARM gem5 Developers uint8_t u = bits(machInst, 29); 104610037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 104710037SARM gem5 Developers uint8_t opcode = bits(machInst, 16, 12); 104810037SARM gem5 Developers 104910037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 105010037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 105110037SARM gem5 Developers 105210037SARM gem5 Developers uint8_t size_q = (size << 1) | q; 105310037SARM gem5 Developers uint8_t sz_q = size_q & 0x3; 105410037SARM gem5 Developers uint8_t switchVal = opcode | ((u ? 1 : 0) << 5); 105510037SARM gem5 Developers 105610037SARM gem5 Developers switch (switchVal) { 105710037SARM gem5 Developers case 0x03: 105810037SARM gem5 Developers if (size_q == 0x4 || size == 0x3) 105910037SARM gem5 Developers return new Unknown64(machInst); 106010037SARM gem5 Developers return decodeNeonSAcrossLanesLongReg<SaddlvDX, SaddlvQX, 106110037SARM gem5 Developers SaddlvBQX>( 106210037SARM gem5 Developers q, size, machInst, vd, vn); 106310037SARM gem5 Developers case 0x0a: 106410037SARM gem5 Developers if (size_q == 0x4 || size == 0x3) 106510037SARM gem5 Developers return new Unknown64(machInst); 106610037SARM gem5 Developers return decodeNeonSAcrossLanesReg<SmaxvDX, SmaxvQX>( 106710037SARM gem5 Developers q, size, machInst, vd, vn); 106810037SARM gem5 Developers case 0x1a: 106910037SARM gem5 Developers if (size_q == 0x4 || size == 0x3) 107010037SARM gem5 Developers return new Unknown64(machInst); 107110037SARM gem5 Developers return decodeNeonSAcrossLanesReg<SminvDX, SminvQX>( 107210037SARM gem5 Developers q, size, machInst, vd, vn); 107310037SARM gem5 Developers case 0x1b: 107410037SARM gem5 Developers if (size_q == 0x4 || size == 0x3) 107510037SARM gem5 Developers return new Unknown64(machInst); 107610037SARM gem5 Developers return decodeNeonUAcrossLanesReg<AddvDX, AddvQX>( 107710037SARM gem5 Developers q, size, machInst, vd, vn); 107810037SARM gem5 Developers case 0x23: 107910037SARM gem5 Developers if (size_q == 0x4 || size == 0x3) 108010037SARM gem5 Developers return new Unknown64(machInst); 108110037SARM gem5 Developers return decodeNeonUAcrossLanesLongReg<UaddlvDX, UaddlvQX, 108210037SARM gem5 Developers UaddlvBQX>( 108310037SARM gem5 Developers q, size, machInst, vd, vn); 108410037SARM gem5 Developers case 0x2a: 108510037SARM gem5 Developers if (size_q == 0x4 || size == 0x3) 108610037SARM gem5 Developers return new Unknown64(machInst); 108710037SARM gem5 Developers return decodeNeonUAcrossLanesReg<UmaxvDX, UmaxvQX>( 108810037SARM gem5 Developers q, size, machInst, vd, vn); 108910037SARM gem5 Developers case 0x2c: 109010037SARM gem5 Developers if (sz_q != 0x1) 109110037SARM gem5 Developers return new Unknown64(machInst); 109210037SARM gem5 Developers if (size < 0x2) { 109310037SARM gem5 Developers if (q) 109410037SARM gem5 Developers return new FmaxnmvQX<uint32_t>(machInst, vd, vn); 109510037SARM gem5 Developers else 109610037SARM gem5 Developers return new Unknown64(machInst); 109710037SARM gem5 Developers } else { 109810037SARM gem5 Developers if (q) 109910037SARM gem5 Developers return new FminnmvQX<uint32_t>(machInst, vd, vn); 110010037SARM gem5 Developers else 110110037SARM gem5 Developers return new Unknown64(machInst); 110210037SARM gem5 Developers } 110310037SARM gem5 Developers case 0x2f: 110410037SARM gem5 Developers if (sz_q != 0x1) 110510037SARM gem5 Developers return new Unknown64(machInst); 110610037SARM gem5 Developers if (size < 0x2) { 110710037SARM gem5 Developers if (q) 110810037SARM gem5 Developers return new FmaxvQX<uint32_t>(machInst, vd, vn); 110910037SARM gem5 Developers else 111010037SARM gem5 Developers return new Unknown64(machInst); 111110037SARM gem5 Developers } else { 111210037SARM gem5 Developers if (q) 111310037SARM gem5 Developers return new FminvQX<uint32_t>(machInst, vd, vn); 111410037SARM gem5 Developers else 111510037SARM gem5 Developers return new Unknown64(machInst); 111610037SARM gem5 Developers } 111710037SARM gem5 Developers case 0x3a: 111810037SARM gem5 Developers if (size_q == 0x4 || size == 0x3) 111910037SARM gem5 Developers return new Unknown64(machInst); 112010037SARM gem5 Developers return decodeNeonUAcrossLanesReg<UminvDX, UminvQX>( 112110037SARM gem5 Developers q, size, machInst, vd, vn); 112210037SARM gem5 Developers default: 112310037SARM gem5 Developers return new Unknown64(machInst); 112410037SARM gem5 Developers } 112510037SARM gem5 Developers } 112610037SARM gem5 Developers 112710037SARM gem5 Developers StaticInstPtr 112810037SARM gem5 Developers decodeNeonCopy(ExtMachInst machInst) 112910037SARM gem5 Developers { 113010037SARM gem5 Developers uint8_t q = bits(machInst, 30); 113110037SARM gem5 Developers uint8_t op = bits(machInst, 29); 113210037SARM gem5 Developers uint8_t imm5 = bits(machInst, 20, 16); 113310037SARM gem5 Developers uint8_t imm4 = bits(machInst, 14, 11); 113410037SARM gem5 Developers 113510037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 113610037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 113710037SARM gem5 Developers 113810037SARM gem5 Developers uint8_t imm5_pos = findLsbSet(imm5); 113910037SARM gem5 Developers uint8_t index1 = 0, index2 = 0; 114010037SARM gem5 Developers 114110037SARM gem5 Developers if (op) { 114210037SARM gem5 Developers if (!q || (imm4 & mask(imm5_pos))) 114310037SARM gem5 Developers return new Unknown64(machInst); 114410037SARM gem5 Developers 114510037SARM gem5 Developers index1 = bits(imm5, 4, imm5_pos + 1); // dst 114610037SARM gem5 Developers index2 = bits(imm4, 3, imm5_pos); // src 114710037SARM gem5 Developers 114810037SARM gem5 Developers switch (imm5_pos) { 114910037SARM gem5 Developers case 0: 115010037SARM gem5 Developers return new InsElemX<uint8_t>(machInst, vd, vn, index1, index2); 115110037SARM gem5 Developers case 1: 115210037SARM gem5 Developers return new InsElemX<uint16_t>(machInst, vd, vn, index1, index2); 115310037SARM gem5 Developers case 2: 115410037SARM gem5 Developers return new InsElemX<uint32_t>(machInst, vd, vn, index1, index2); 115510037SARM gem5 Developers case 3: 115610037SARM gem5 Developers return new InsElemX<uint64_t>(machInst, vd, vn, index1, index2); 115710037SARM gem5 Developers default: 115810037SARM gem5 Developers return new Unknown64(machInst); 115910037SARM gem5 Developers } 116010037SARM gem5 Developers } 116110037SARM gem5 Developers 116210037SARM gem5 Developers switch (imm4) { 116310037SARM gem5 Developers case 0x0: 116410037SARM gem5 Developers index1 = bits(imm5, 4, imm5_pos + 1); 116510037SARM gem5 Developers switch (imm5_pos) { 116610037SARM gem5 Developers case 0: 116710037SARM gem5 Developers if (q) 116810037SARM gem5 Developers return new DupElemQX<uint8_t>(machInst, vd, vn, index1); 116910037SARM gem5 Developers else 117010037SARM gem5 Developers return new DupElemDX<uint8_t>(machInst, vd, vn, index1); 117110037SARM gem5 Developers case 1: 117210037SARM gem5 Developers if (q) 117310037SARM gem5 Developers return new DupElemQX<uint16_t>(machInst, vd, vn, index1); 117410037SARM gem5 Developers else 117510037SARM gem5 Developers return new DupElemDX<uint16_t>(machInst, vd, vn, index1); 117610037SARM gem5 Developers case 2: 117710037SARM gem5 Developers if (q) 117810037SARM gem5 Developers return new DupElemQX<uint32_t>(machInst, vd, vn, index1); 117910037SARM gem5 Developers else 118010037SARM gem5 Developers return new DupElemDX<uint32_t>(machInst, vd, vn, index1); 118110037SARM gem5 Developers case 3: 118210037SARM gem5 Developers if (q) 118310037SARM gem5 Developers return new DupElemQX<uint64_t>(machInst, vd, vn, index1); 118410037SARM gem5 Developers else 118510037SARM gem5 Developers return new Unknown64(machInst); 118610037SARM gem5 Developers default: 118710037SARM gem5 Developers return new Unknown64(machInst); 118810037SARM gem5 Developers } 118910037SARM gem5 Developers case 0x1: 119010037SARM gem5 Developers switch (imm5) { 119110037SARM gem5 Developers case 0x1: 119210037SARM gem5 Developers if (q) 119310037SARM gem5 Developers return new DupGprWQX<uint8_t>(machInst, vd, vn); 119410037SARM gem5 Developers else 119510037SARM gem5 Developers return new DupGprWDX<uint8_t>(machInst, vd, vn); 119610037SARM gem5 Developers case 0x2: 119710037SARM gem5 Developers if (q) 119810037SARM gem5 Developers return new DupGprWQX<uint16_t>(machInst, vd, vn); 119910037SARM gem5 Developers else 120010037SARM gem5 Developers return new DupGprWDX<uint16_t>(machInst, vd, vn); 120110037SARM gem5 Developers case 0x4: 120210037SARM gem5 Developers if (q) 120310037SARM gem5 Developers return new DupGprWQX<uint32_t>(machInst, vd, vn); 120410037SARM gem5 Developers else 120510037SARM gem5 Developers return new DupGprWDX<uint32_t>(machInst, vd, vn); 120610037SARM gem5 Developers case 0x8: 120710037SARM gem5 Developers if (q) 120810037SARM gem5 Developers return new DupGprXQX<uint64_t>(machInst, vd, vn); 120910037SARM gem5 Developers else 121010037SARM gem5 Developers return new Unknown64(machInst); 121110037SARM gem5 Developers } 121210037SARM gem5 Developers case 0x3: 121310037SARM gem5 Developers index1 = imm5 >> (imm5_pos + 1); 121410037SARM gem5 Developers switch (imm5_pos) { 121510037SARM gem5 Developers case 0: 121610037SARM gem5 Developers return new InsGprWX<uint8_t>(machInst, vd, vn, index1); 121710037SARM gem5 Developers case 1: 121810037SARM gem5 Developers return new InsGprWX<uint16_t>(machInst, vd, vn, index1); 121910037SARM gem5 Developers case 2: 122010037SARM gem5 Developers return new InsGprWX<uint32_t>(machInst, vd, vn, index1); 122110037SARM gem5 Developers case 3: 122210037SARM gem5 Developers return new InsGprXX<uint64_t>(machInst, vd, vn, index1); 122310037SARM gem5 Developers default: 122410037SARM gem5 Developers return new Unknown64(machInst); 122510037SARM gem5 Developers } 122610037SARM gem5 Developers case 0x5: 122710037SARM gem5 Developers index1 = bits(imm5, 4, imm5_pos + 1); 122810037SARM gem5 Developers switch (imm5_pos) { 122910037SARM gem5 Developers case 0: 123010037SARM gem5 Developers if (q) 123110037SARM gem5 Developers return new SmovXX<int8_t>(machInst, vd, vn, index1); 123210037SARM gem5 Developers else 123310037SARM gem5 Developers return new SmovWX<int8_t>(machInst, vd, vn, index1); 123410037SARM gem5 Developers case 1: 123510037SARM gem5 Developers if (q) 123610037SARM gem5 Developers return new SmovXX<int16_t>(machInst, vd, vn, index1); 123710037SARM gem5 Developers else 123810037SARM gem5 Developers return new SmovWX<int16_t>(machInst, vd, vn, index1); 123910037SARM gem5 Developers case 2: 124010037SARM gem5 Developers if (q) 124110037SARM gem5 Developers return new SmovXX<int32_t>(machInst, vd, vn, index1); 124210037SARM gem5 Developers else 124310037SARM gem5 Developers return new Unknown64(machInst); 124410037SARM gem5 Developers default: 124510037SARM gem5 Developers return new Unknown64(machInst); 124610037SARM gem5 Developers } 124710037SARM gem5 Developers case 0x7: 124810037SARM gem5 Developers index1 = imm5 >> (imm5_pos + 1); 124910037SARM gem5 Developers 125010037SARM gem5 Developers if ((q && imm5_pos != 3) || (!q && imm5_pos >= 3)) 125110037SARM gem5 Developers return new Unknown64(machInst); 125210037SARM gem5 Developers 125310037SARM gem5 Developers switch (imm5_pos) { 125410037SARM gem5 Developers case 0: 125510037SARM gem5 Developers return new UmovWX<uint8_t>(machInst, vd, vn, index1); 125610037SARM gem5 Developers case 1: 125710037SARM gem5 Developers return new UmovWX<uint16_t>(machInst, vd, vn, index1); 125810037SARM gem5 Developers case 2: 125910037SARM gem5 Developers return new UmovWX<uint32_t>(machInst, vd, vn, index1); 126010037SARM gem5 Developers case 3: 126110037SARM gem5 Developers return new UmovXX<uint64_t>(machInst, vd, vn, index1); 126210037SARM gem5 Developers default: 126310037SARM gem5 Developers return new Unknown64(machInst); 126410037SARM gem5 Developers } 126510037SARM gem5 Developers default: 126610037SARM gem5 Developers return new Unknown64(machInst); 126710037SARM gem5 Developers } 126810037SARM gem5 Developers } 126910037SARM gem5 Developers 127010037SARM gem5 Developers StaticInstPtr 127110037SARM gem5 Developers decodeNeonIndexedElem(ExtMachInst machInst) 127210037SARM gem5 Developers { 127310037SARM gem5 Developers uint8_t q = bits(machInst, 30); 127410037SARM gem5 Developers uint8_t u = bits(machInst, 29); 127510037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 127610037SARM gem5 Developers uint8_t L = bits(machInst, 21); 127710037SARM gem5 Developers uint8_t M = bits(machInst, 20); 127810037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 12); 127910037SARM gem5 Developers uint8_t H = bits(machInst, 11); 128010037SARM gem5 Developers 128110037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 128210037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 128310037SARM gem5 Developers IntRegIndex vm_bf = (IntRegIndex) (uint8_t) bits(machInst, 19, 16); 128410037SARM gem5 Developers 128510037SARM gem5 Developers uint8_t index = 0; 128610037SARM gem5 Developers uint8_t index_fp = 0; 128710037SARM gem5 Developers uint8_t vmh = 0; 128810037SARM gem5 Developers uint8_t sz = size & 0x1; 128910037SARM gem5 Developers uint8_t sz_q = (sz << 1) | bits(machInst, 30); 129010037SARM gem5 Developers uint8_t sz_L = (sz << 1) | L; 129110037SARM gem5 Developers 129210037SARM gem5 Developers // Index and 2nd register operand for integer instructions 129310037SARM gem5 Developers if (size == 0x1) { 129410037SARM gem5 Developers index = (H << 2) | (L << 1) | M; 129510037SARM gem5 Developers // vmh = 0; 129610037SARM gem5 Developers } else if (size == 0x2) { 129710037SARM gem5 Developers index = (H << 1) | L; 129810037SARM gem5 Developers vmh = M; 129910037SARM gem5 Developers } 130010037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) (vmh << 4 | vm_bf); 130110037SARM gem5 Developers 130210037SARM gem5 Developers // Index and 2nd register operand for FP instructions 130310037SARM gem5 Developers vmh = M; 130410037SARM gem5 Developers if ((size & 0x1) == 0) { 130510037SARM gem5 Developers index_fp = (H << 1) | L; 130610037SARM gem5 Developers } else if (L == 0) { 130710037SARM gem5 Developers index_fp = H; 130810037SARM gem5 Developers } 130910037SARM gem5 Developers IntRegIndex vm_fp = (IntRegIndex) (uint8_t) (vmh << 4 | vm_bf); 131010037SARM gem5 Developers 131110037SARM gem5 Developers switch (opcode) { 131210037SARM gem5 Developers case 0x0: 131310037SARM gem5 Developers if (!u || (size == 0x0 || size == 0x3)) 131410037SARM gem5 Developers return new Unknown64(machInst); 131510037SARM gem5 Developers else 131610037SARM gem5 Developers return decodeNeonUThreeImmHAndWReg<MlaElemDX, MlaElemQX>( 131710037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 131810037SARM gem5 Developers case 0x1: 131910037SARM gem5 Developers if (!u && size >= 2 && sz_q != 0x2 && sz_L != 0x3) 132010037SARM gem5 Developers return decodeNeonUThreeImmFpReg<FmlaElemDX, FmlaElemQX>( 132110037SARM gem5 Developers q, sz, machInst, vd, vn, vm_fp, index_fp); 132210037SARM gem5 Developers else 132310037SARM gem5 Developers return new Unknown64(machInst); 132410037SARM gem5 Developers case 0x2: 132510037SARM gem5 Developers if (size == 0x0 || size == 0x3) 132610037SARM gem5 Developers return new Unknown64(machInst); 132710037SARM gem5 Developers if (u) 132810037SARM gem5 Developers return decodeNeonUThreeImmHAndWReg<UmlalElemX, UmlalElem2X>( 132910037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 133010037SARM gem5 Developers else 133110037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SmlalElemX, SmlalElem2X>( 133210037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 133310037SARM gem5 Developers case 0x3: 133410037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) 133510037SARM gem5 Developers return new Unknown64(machInst); 133610037SARM gem5 Developers else 133710037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmlalElemX, 133810037SARM gem5 Developers SqdmlalElem2X>( 133910037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 134010037SARM gem5 Developers case 0x4: 134110037SARM gem5 Developers if (u && !(size == 0x0 || size == 0x3)) 134210037SARM gem5 Developers return decodeNeonUThreeImmHAndWReg<MlsElemDX, MlsElemQX>( 134310037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 134410037SARM gem5 Developers else 134510037SARM gem5 Developers return new Unknown64(machInst); 134610037SARM gem5 Developers case 0x5: 134710037SARM gem5 Developers if (!u && size >= 0x2 && sz_L != 0x3 && sz_q != 0x2) 134810037SARM gem5 Developers return decodeNeonUThreeImmFpReg<FmlsElemDX, FmlsElemQX>( 134910037SARM gem5 Developers q, sz, machInst, vd, vn, vm_fp, index_fp); 135010037SARM gem5 Developers else 135110037SARM gem5 Developers return new Unknown64(machInst); 135210037SARM gem5 Developers case 0x6: 135310037SARM gem5 Developers if (size == 0x0 || size == 0x3) 135410037SARM gem5 Developers return new Unknown64(machInst); 135510037SARM gem5 Developers if (u) 135610037SARM gem5 Developers return decodeNeonUThreeImmHAndWReg<UmlslElemX, UmlslElem2X>( 135710037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 135810037SARM gem5 Developers else 135910037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SmlslElemX, SmlslElem2X>( 136010037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 136110037SARM gem5 Developers case 0x7: 136210037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) 136310037SARM gem5 Developers return new Unknown64(machInst); 136410037SARM gem5 Developers else 136510037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmlslElemX, 136610037SARM gem5 Developers SqdmlslElem2X>( 136710037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 136810037SARM gem5 Developers case 0x8: 136910037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) 137010037SARM gem5 Developers return new Unknown64(machInst); 137110037SARM gem5 Developers else 137210037SARM gem5 Developers return decodeNeonUThreeImmHAndWReg<MulElemDX, MulElemQX>( 137310037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 137410037SARM gem5 Developers case 0x9: 137510037SARM gem5 Developers if (size >= 2 && sz_q != 0x2 && sz_L != 0x3) { 137610037SARM gem5 Developers if (u) 137710037SARM gem5 Developers return decodeNeonUThreeImmFpReg<FmulxElemDX, FmulxElemQX>( 137810037SARM gem5 Developers q, sz, machInst, vd, vn, vm_fp, index_fp); 137910037SARM gem5 Developers else 138010037SARM gem5 Developers return decodeNeonUThreeImmFpReg<FmulElemDX, FmulElemQX>( 138110037SARM gem5 Developers q, sz, machInst, vd, vn, vm_fp, index_fp); 138210037SARM gem5 Developers } else { 138310037SARM gem5 Developers return new Unknown64(machInst); 138410037SARM gem5 Developers } 138510037SARM gem5 Developers case 0xa: 138610037SARM gem5 Developers if (size == 0x0 || size == 0x3) 138710037SARM gem5 Developers return new Unknown64(machInst); 138810037SARM gem5 Developers if (u) 138910037SARM gem5 Developers return decodeNeonUThreeImmHAndWReg<UmullElemX, UmullElem2X>( 139010037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 139110037SARM gem5 Developers else 139210037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SmullElemX, SmullElem2X>( 139310037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 139410037SARM gem5 Developers case 0xb: 139510037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) 139610037SARM gem5 Developers return new Unknown64(machInst); 139710037SARM gem5 Developers else 139810037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmullElemX, SqdmullElem2X>( 139910037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 140010037SARM gem5 Developers case 0xc: 140110037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) 140210037SARM gem5 Developers return new Unknown64(machInst); 140310037SARM gem5 Developers else 140410037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmulhElemDX, SqdmulhElemQX>( 140510037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 140610037SARM gem5 Developers case 0xd: 140710037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) 140810037SARM gem5 Developers return new Unknown64(machInst); 140910037SARM gem5 Developers else 141010037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqrdmulhElemDX, SqrdmulhElemQX>( 141110037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 141210037SARM gem5 Developers default: 141310037SARM gem5 Developers return new Unknown64(machInst); 141410037SARM gem5 Developers } 141510037SARM gem5 Developers } 141610037SARM gem5 Developers 141710037SARM gem5 Developers StaticInstPtr 141810037SARM gem5 Developers decodeNeonModImm(ExtMachInst machInst) 141910037SARM gem5 Developers { 142010037SARM gem5 Developers uint8_t q = bits(machInst, 30); 142110037SARM gem5 Developers uint8_t op = bits(machInst, 29); 142210037SARM gem5 Developers uint8_t abcdefgh = (bits(machInst, 18, 16) << 5) | 142310037SARM gem5 Developers bits(machInst, 9, 5); 142410037SARM gem5 Developers uint8_t cmode = bits(machInst, 15, 12); 142510037SARM gem5 Developers uint8_t o2 = bits(machInst, 11); 142610037SARM gem5 Developers 142710037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 142810037SARM gem5 Developers 142910037SARM gem5 Developers if (o2 == 0x1 || (op == 0x1 && cmode == 0xf && !q)) 143010037SARM gem5 Developers return new Unknown64(machInst); 143110037SARM gem5 Developers 143210037SARM gem5 Developers bool immValid = true; 143310037SARM gem5 Developers const uint64_t bigImm = simd_modified_imm(op, cmode, abcdefgh, 143410037SARM gem5 Developers immValid, 143510037SARM gem5 Developers true /* isAarch64 */); 143610037SARM gem5 Developers if (!immValid) { 143710037SARM gem5 Developers return new Unknown(machInst); 143810037SARM gem5 Developers } 143910037SARM gem5 Developers 144010037SARM gem5 Developers if (op) { 144110037SARM gem5 Developers if (bits(cmode, 3) == 0) { 144210037SARM gem5 Developers if (bits(cmode, 0) == 0) { 144310037SARM gem5 Developers if (q) 144410037SARM gem5 Developers return new MvniQX<uint64_t>(machInst, vd, bigImm); 144510037SARM gem5 Developers else 144610037SARM gem5 Developers return new MvniDX<uint64_t>(machInst, vd, bigImm); 144710037SARM gem5 Developers } else { 144810037SARM gem5 Developers if (q) 144910037SARM gem5 Developers return new BicImmQX<uint64_t>(machInst, vd, bigImm); 145010037SARM gem5 Developers else 145110037SARM gem5 Developers return new BicImmDX<uint64_t>(machInst, vd, bigImm); 145210037SARM gem5 Developers } 145310037SARM gem5 Developers } else { 145410037SARM gem5 Developers if (bits(cmode, 2) == 1) { 145510037SARM gem5 Developers switch (bits(cmode, 1, 0)) { 145610037SARM gem5 Developers case 0: 145710037SARM gem5 Developers case 1: 145810037SARM gem5 Developers if (q) 145910037SARM gem5 Developers return new MvniQX<uint64_t>(machInst, vd, bigImm); 146010037SARM gem5 Developers else 146110037SARM gem5 Developers return new MvniDX<uint64_t>(machInst, vd, bigImm); 146210037SARM gem5 Developers case 2: 146310037SARM gem5 Developers if (q) 146410037SARM gem5 Developers return new MoviQX<uint64_t>(machInst, vd, bigImm); 146510037SARM gem5 Developers else 146610037SARM gem5 Developers return new MoviDX<uint64_t>(machInst, vd, bigImm); 146710037SARM gem5 Developers case 3: 146810037SARM gem5 Developers if (q) 146910037SARM gem5 Developers return new FmovQX<uint64_t>(machInst, vd, bigImm); 147010037SARM gem5 Developers else 147110037SARM gem5 Developers return new MoviDX<uint64_t>(machInst, vd, bigImm); 147210037SARM gem5 Developers } 147310037SARM gem5 Developers } else { 147410037SARM gem5 Developers if (bits(cmode, 0) == 0) { 147510037SARM gem5 Developers if (q) 147610037SARM gem5 Developers return new MvniQX<uint64_t>(machInst, vd, bigImm); 147710037SARM gem5 Developers else 147810037SARM gem5 Developers return new MvniDX<uint64_t>(machInst, vd, bigImm); 147910037SARM gem5 Developers } else { 148010037SARM gem5 Developers if (q) 148110037SARM gem5 Developers return new BicImmQX<uint64_t>(machInst, vd, 148210037SARM gem5 Developers bigImm); 148310037SARM gem5 Developers else 148410037SARM gem5 Developers return new BicImmDX<uint64_t>(machInst, vd, 148510037SARM gem5 Developers bigImm); 148610037SARM gem5 Developers } 148710037SARM gem5 Developers } 148810037SARM gem5 Developers } 148910037SARM gem5 Developers } else { 149010037SARM gem5 Developers if (bits(cmode, 3) == 0) { 149110037SARM gem5 Developers if (bits(cmode, 0) == 0) { 149210037SARM gem5 Developers if (q) 149310037SARM gem5 Developers return new MoviQX<uint64_t>(machInst, vd, bigImm); 149410037SARM gem5 Developers else 149510037SARM gem5 Developers return new MoviDX<uint64_t>(machInst, vd, bigImm); 149610037SARM gem5 Developers } else { 149710037SARM gem5 Developers if (q) 149810037SARM gem5 Developers return new OrrImmQX<uint64_t>(machInst, vd, bigImm); 149910037SARM gem5 Developers else 150010037SARM gem5 Developers return new OrrImmDX<uint64_t>(machInst, vd, bigImm); 150110037SARM gem5 Developers } 150210037SARM gem5 Developers } else { 150310037SARM gem5 Developers if (bits(cmode, 2) == 1) { 150410037SARM gem5 Developers if (bits(cmode, 1, 0) == 0x3) { 150510037SARM gem5 Developers if (q) 150610037SARM gem5 Developers return new FmovQX<uint32_t>(machInst, vd, bigImm); 150710037SARM gem5 Developers else 150810037SARM gem5 Developers return new FmovDX<uint32_t>(machInst, vd, bigImm); 150910037SARM gem5 Developers } else { 151010037SARM gem5 Developers if (q) 151110037SARM gem5 Developers return new MoviQX<uint64_t>(machInst, vd, bigImm); 151210037SARM gem5 Developers else 151310037SARM gem5 Developers return new MoviDX<uint64_t>(machInst, vd, bigImm); 151410037SARM gem5 Developers } 151510037SARM gem5 Developers } else { 151610037SARM gem5 Developers if (bits(cmode, 0) == 0) { 151710037SARM gem5 Developers if (q) 151810037SARM gem5 Developers return new MoviQX<uint64_t>(machInst, vd, bigImm); 151910037SARM gem5 Developers else 152010037SARM gem5 Developers return new MoviDX<uint64_t>(machInst, vd, bigImm); 152110037SARM gem5 Developers } else { 152210037SARM gem5 Developers if (q) 152310037SARM gem5 Developers return new OrrImmQX<uint64_t>(machInst, vd, 152410037SARM gem5 Developers bigImm); 152510037SARM gem5 Developers else 152610037SARM gem5 Developers return new OrrImmDX<uint64_t>(machInst, vd, bigImm); 152710037SARM gem5 Developers } 152810037SARM gem5 Developers } 152910037SARM gem5 Developers } 153010037SARM gem5 Developers } 153110037SARM gem5 Developers return new Unknown(machInst); 153210037SARM gem5 Developers } 153310037SARM gem5 Developers 153410037SARM gem5 Developers StaticInstPtr 153510037SARM gem5 Developers decodeNeonShiftByImm(ExtMachInst machInst) 153610037SARM gem5 Developers { 153710037SARM gem5 Developers uint8_t q = bits(machInst, 30); 153810037SARM gem5 Developers uint8_t u = bits(machInst, 29); 153910037SARM gem5 Developers uint8_t immh = bits(machInst, 22, 19); 154010037SARM gem5 Developers uint8_t immb = bits(machInst, 18, 16); 154110037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 11); 154210037SARM gem5 Developers 154310037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 154410037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 154510037SARM gem5 Developers 154610037SARM gem5 Developers uint8_t immh3 = bits(machInst, 22); 154710037SARM gem5 Developers uint8_t immh3_q = (immh3 << 1) | q; 154810037SARM gem5 Developers uint8_t op_u = (bits(machInst, 12) << 1) | u; 154910037SARM gem5 Developers uint8_t size = findMsbSet(immh); 155010037SARM gem5 Developers int shiftAmt = 0; 155110037SARM gem5 Developers 155210037SARM gem5 Developers switch (opcode) { 155310037SARM gem5 Developers case 0x00: 155410037SARM gem5 Developers if (immh3_q == 0x2) 155510037SARM gem5 Developers return new Unknown64(machInst); 155610037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 155710037SARM gem5 Developers if (u) 155810037SARM gem5 Developers return decodeNeonUTwoShiftXReg<UshrDX, UshrQX>( 155910037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 156010037SARM gem5 Developers else 156110037SARM gem5 Developers return decodeNeonSTwoShiftXReg<SshrDX, SshrQX>( 156210037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 156310037SARM gem5 Developers case 0x02: 156410037SARM gem5 Developers if (immh3_q == 0x2) 156510037SARM gem5 Developers return new Unknown64(machInst); 156610037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 156710037SARM gem5 Developers if (u) 156810037SARM gem5 Developers return decodeNeonUTwoShiftXReg<UsraDX, UsraQX>( 156910037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 157010037SARM gem5 Developers else 157110037SARM gem5 Developers return decodeNeonSTwoShiftXReg<SsraDX, SsraQX>( 157210037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 157310037SARM gem5 Developers case 0x04: 157410037SARM gem5 Developers if (immh3_q == 0x2) 157510037SARM gem5 Developers return new Unknown64(machInst); 157610037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 157710037SARM gem5 Developers if (u) 157810037SARM gem5 Developers return decodeNeonUTwoShiftXReg<UrshrDX, UrshrQX>( 157910037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 158010037SARM gem5 Developers else 158110037SARM gem5 Developers return decodeNeonSTwoShiftXReg<SrshrDX, SrshrQX>( 158210037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 158310037SARM gem5 Developers case 0x06: 158410037SARM gem5 Developers if (immh3_q == 0x2) 158510037SARM gem5 Developers return new Unknown64(machInst); 158610037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 158710037SARM gem5 Developers if (u) 158810037SARM gem5 Developers return decodeNeonUTwoShiftXReg<UrsraDX, UrsraQX>( 158910037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 159010037SARM gem5 Developers else 159110037SARM gem5 Developers return decodeNeonSTwoShiftXReg<SrsraDX, SrsraQX>( 159210037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 159310037SARM gem5 Developers case 0x08: 159410037SARM gem5 Developers if (u && !(immh3_q == 0x2)) { 159510037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 159610037SARM gem5 Developers return decodeNeonUTwoShiftXReg<SriDX, SriQX>( 159710037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 159810037SARM gem5 Developers } else { 159910037SARM gem5 Developers return new Unknown64(machInst); 160010037SARM gem5 Developers } 160110037SARM gem5 Developers case 0x0a: 160210037SARM gem5 Developers if (immh3_q == 0x2) 160310037SARM gem5 Developers return new Unknown64(machInst); 160410037SARM gem5 Developers shiftAmt = ((immh << 3) | immb) - (8 << size); 160510037SARM gem5 Developers if (u) 160610037SARM gem5 Developers return decodeNeonUTwoShiftXReg<SliDX, SliQX>( 160710037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 160810037SARM gem5 Developers else 160910037SARM gem5 Developers return decodeNeonUTwoShiftXReg<ShlDX, ShlQX>( 161010037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 161110037SARM gem5 Developers case 0x0c: 161210037SARM gem5 Developers if (u && !(immh3_q == 0x2 || op_u == 0x0)) { 161310037SARM gem5 Developers shiftAmt = ((immh << 3) | immb) - (8 << size); 161410037SARM gem5 Developers return decodeNeonSTwoShiftXReg<SqshluDX, SqshluQX>( 161510037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 161610037SARM gem5 Developers } else { 161710037SARM gem5 Developers return new Unknown64(machInst); 161810037SARM gem5 Developers } 161910037SARM gem5 Developers case 0x0e: 162010037SARM gem5 Developers if (immh3_q == 0x2 || op_u == 0x0) 162110037SARM gem5 Developers return new Unknown64(machInst); 162210037SARM gem5 Developers shiftAmt = ((immh << 3) | immb) - (8 << size); 162310037SARM gem5 Developers if (u) 162410037SARM gem5 Developers return decodeNeonUTwoShiftXReg<UqshlImmDX, UqshlImmQX>( 162510037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 162610037SARM gem5 Developers else 162710037SARM gem5 Developers return decodeNeonSTwoShiftXReg<SqshlImmDX, SqshlImmQX>( 162810037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 162910037SARM gem5 Developers case 0x10: 163010037SARM gem5 Developers if (immh3) 163110037SARM gem5 Developers return new Unknown64(machInst); 163210037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 163310037SARM gem5 Developers if (u) 163410037SARM gem5 Developers return decodeNeonSTwoShiftSReg<SqshrunX, Sqshrun2X>( 163510037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 163610037SARM gem5 Developers else 163710037SARM gem5 Developers return decodeNeonUTwoShiftSReg<ShrnX, Shrn2X>( 163810037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 163910037SARM gem5 Developers case 0x11: 164010037SARM gem5 Developers if (immh3) 164110037SARM gem5 Developers return new Unknown64(machInst); 164210037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 164310037SARM gem5 Developers if (u) 164410037SARM gem5 Developers return decodeNeonSTwoShiftSReg<SqrshrunX, Sqrshrun2X>( 164510037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 164610037SARM gem5 Developers else 164710037SARM gem5 Developers return decodeNeonUTwoShiftSReg<RshrnX, Rshrn2X>( 164810037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 164910037SARM gem5 Developers case 0x12: 165010037SARM gem5 Developers if (immh3) 165110037SARM gem5 Developers return new Unknown64(machInst); 165210037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 165310037SARM gem5 Developers if (u) 165410037SARM gem5 Developers return decodeNeonUTwoShiftSReg<UqshrnX, Uqshrn2X>( 165510037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 165610037SARM gem5 Developers else 165710037SARM gem5 Developers return decodeNeonSTwoShiftSReg<SqshrnX, Sqshrn2X>( 165810037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 165910037SARM gem5 Developers case 0x13: 166010037SARM gem5 Developers if (immh3) 166110037SARM gem5 Developers return new Unknown64(machInst); 166210037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 166310037SARM gem5 Developers if (u) 166410037SARM gem5 Developers return decodeNeonUTwoShiftSReg<UqrshrnX, Uqrshrn2X>( 166510037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 166610037SARM gem5 Developers else 166710037SARM gem5 Developers return decodeNeonSTwoShiftSReg<SqrshrnX, Sqrshrn2X>( 166810037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 166910037SARM gem5 Developers case 0x14: 167010037SARM gem5 Developers if (immh3) 167110037SARM gem5 Developers return new Unknown64(machInst); 167210037SARM gem5 Developers shiftAmt = ((immh << 3) | immb) - (8 << size); 167310037SARM gem5 Developers if (u) 167410037SARM gem5 Developers return decodeNeonUTwoShiftSReg<UshllX, Ushll2X>( 167510037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 167610037SARM gem5 Developers else 167710037SARM gem5 Developers return decodeNeonSTwoShiftSReg<SshllX, Sshll2X>( 167810037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 167910037SARM gem5 Developers case 0x1c: 168010037SARM gem5 Developers if (immh < 0x4 || immh3_q == 0x2) 168110037SARM gem5 Developers return new Unknown64(machInst); 168210037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 168310037SARM gem5 Developers if (u) { 168410037SARM gem5 Developers return decodeNeonUTwoShiftFpReg<UcvtfFixedDX, UcvtfFixedQX>( 168510037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, shiftAmt); 168610037SARM gem5 Developers } else { 168710037SARM gem5 Developers if (q) { 168810037SARM gem5 Developers if (size & 0x1) 168910037SARM gem5 Developers return new ScvtfFixedDQX<uint64_t>(machInst, vd, vn, 169010037SARM gem5 Developers shiftAmt); 169110037SARM gem5 Developers else 169210037SARM gem5 Developers return new ScvtfFixedSQX<uint32_t>(machInst, vd, vn, 169310037SARM gem5 Developers shiftAmt); 169410037SARM gem5 Developers } else { 169510037SARM gem5 Developers if (size & 0x1) 169610037SARM gem5 Developers return new Unknown(machInst); 169710037SARM gem5 Developers else 169810037SARM gem5 Developers return new ScvtfFixedDX<uint32_t>(machInst, vd, vn, 169910037SARM gem5 Developers shiftAmt); 170010037SARM gem5 Developers } 170110037SARM gem5 Developers } 170210037SARM gem5 Developers case 0x1f: 170310037SARM gem5 Developers if (immh < 0x4 || immh3_q == 0x2) 170410037SARM gem5 Developers return new Unknown64(machInst); 170510037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 170610037SARM gem5 Developers if (u) 170710037SARM gem5 Developers return decodeNeonUTwoShiftFpReg<FcvtzuFixedDX, FcvtzuFixedQX>( 170810037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, shiftAmt); 170910037SARM gem5 Developers else 171010037SARM gem5 Developers return decodeNeonUTwoShiftFpReg<FcvtzsFixedDX, FcvtzsFixedQX>( 171110037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, shiftAmt); 171210037SARM gem5 Developers default: 171310037SARM gem5 Developers return new Unknown64(machInst); 171410037SARM gem5 Developers } 171510037SARM gem5 Developers } 171610037SARM gem5 Developers 171710037SARM gem5 Developers StaticInstPtr 171810037SARM gem5 Developers decodeNeonTblTbx(ExtMachInst machInst) 171910037SARM gem5 Developers { 172010037SARM gem5 Developers uint8_t q = bits(machInst, 30); 172110037SARM gem5 Developers 172210037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 172310037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 172410037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 172510037SARM gem5 Developers 172610037SARM gem5 Developers uint8_t switchVal = bits(machInst, 14, 12); 172710037SARM gem5 Developers 172810037SARM gem5 Developers switch (switchVal) { 172910037SARM gem5 Developers case 0x0: 173010037SARM gem5 Developers if (q) 173110037SARM gem5 Developers return new Tbl1QX<uint8_t>(machInst, vd, vn, vm); 173210037SARM gem5 Developers else 173310037SARM gem5 Developers return new Tbl1DX<uint8_t>(machInst, vd, vn, vm); 173410037SARM gem5 Developers case 0x1: 173510037SARM gem5 Developers if (q) 173610037SARM gem5 Developers return new Tbx1QX<uint8_t>(machInst, vd, vn, vm); 173710037SARM gem5 Developers else 173810037SARM gem5 Developers return new Tbx1DX<uint8_t>(machInst, vd, vn, vm); 173910037SARM gem5 Developers case 0x2: 174010037SARM gem5 Developers if (q) 174110037SARM gem5 Developers return new Tbl2QX<uint8_t>(machInst, vd, vn, vm); 174210037SARM gem5 Developers else 174310037SARM gem5 Developers return new Tbl2DX<uint8_t>(machInst, vd, vn, vm); 174410037SARM gem5 Developers case 0x3: 174510037SARM gem5 Developers if (q) 174610037SARM gem5 Developers return new Tbx2QX<uint8_t>(machInst, vd, vn, vm); 174710037SARM gem5 Developers else 174810037SARM gem5 Developers return new Tbx2DX<uint8_t>(machInst, vd, vn, vm); 174910037SARM gem5 Developers case 0x4: 175010037SARM gem5 Developers if (q) 175110037SARM gem5 Developers return new Tbl3QX<uint8_t>(machInst, vd, vn, vm); 175210037SARM gem5 Developers else 175310037SARM gem5 Developers return new Tbl3DX<uint8_t>(machInst, vd, vn, vm); 175410037SARM gem5 Developers case 0x5: 175510037SARM gem5 Developers if (q) 175610037SARM gem5 Developers return new Tbx3QX<uint8_t>(machInst, vd, vn, vm); 175710037SARM gem5 Developers else 175810037SARM gem5 Developers return new Tbx3DX<uint8_t>(machInst, vd, vn, vm); 175910037SARM gem5 Developers case 0x6: 176010037SARM gem5 Developers if (q) 176110037SARM gem5 Developers return new Tbl4QX<uint8_t>(machInst, vd, vn, vm); 176210037SARM gem5 Developers else 176310037SARM gem5 Developers return new Tbl4DX<uint8_t>(machInst, vd, vn, vm); 176410037SARM gem5 Developers case 0x7: 176510037SARM gem5 Developers if (q) 176610037SARM gem5 Developers return new Tbx4QX<uint8_t>(machInst, vd, vn, vm); 176710037SARM gem5 Developers else 176810037SARM gem5 Developers return new Tbx4DX<uint8_t>(machInst, vd, vn, vm); 176910037SARM gem5 Developers default: 177010037SARM gem5 Developers return new Unknown64(machInst); 177110037SARM gem5 Developers } 177210037SARM gem5 Developers 177310037SARM gem5 Developers return new Unknown64(machInst); 177410037SARM gem5 Developers } 177510037SARM gem5 Developers 177610037SARM gem5 Developers StaticInstPtr 177710037SARM gem5 Developers decodeNeonZipUzpTrn(ExtMachInst machInst) 177810037SARM gem5 Developers { 177910037SARM gem5 Developers uint8_t q = bits(machInst, 30); 178010037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 178110037SARM gem5 Developers uint8_t opcode = bits(machInst, 14, 12); 178210037SARM gem5 Developers 178310037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 178410037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 178510037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 178610037SARM gem5 Developers 178710037SARM gem5 Developers switch (opcode) { 178810037SARM gem5 Developers case 0x1: 178910037SARM gem5 Developers return decodeNeonUThreeXReg<Uzp1DX, Uzp1QX>( 179010037SARM gem5 Developers q, size, machInst, vd, vn, vm); 179110037SARM gem5 Developers case 0x2: 179210037SARM gem5 Developers return decodeNeonUThreeXReg<Trn1DX, Trn1QX>( 179310037SARM gem5 Developers q, size, machInst, vd, vn, vm); 179410037SARM gem5 Developers case 0x3: 179510037SARM gem5 Developers return decodeNeonUThreeXReg<Zip1DX, Zip1QX>( 179610037SARM gem5 Developers q, size, machInst, vd, vn, vm); 179710037SARM gem5 Developers case 0x5: 179810037SARM gem5 Developers return decodeNeonUThreeXReg<Uzp2DX, Uzp2QX>( 179910037SARM gem5 Developers q, size, machInst, vd, vn, vm); 180010037SARM gem5 Developers case 0x6: 180110037SARM gem5 Developers return decodeNeonUThreeXReg<Trn2DX, Trn2QX>( 180210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 180310037SARM gem5 Developers case 0x7: 180410037SARM gem5 Developers return decodeNeonUThreeXReg<Zip2DX, Zip2QX>( 180510037SARM gem5 Developers q, size, machInst, vd, vn, vm); 180610037SARM gem5 Developers default: 180710037SARM gem5 Developers return new Unknown64(machInst); 180810037SARM gem5 Developers } 180910037SARM gem5 Developers return new Unknown64(machInst); 181010037SARM gem5 Developers } 181110037SARM gem5 Developers 181210037SARM gem5 Developers StaticInstPtr 181310037SARM gem5 Developers decodeNeonExt(ExtMachInst machInst) 181410037SARM gem5 Developers { 181510037SARM gem5 Developers uint8_t q = bits(machInst, 30); 181610037SARM gem5 Developers uint8_t op2 = bits(machInst, 23, 22); 181710037SARM gem5 Developers uint8_t imm4 = bits(machInst, 14, 11); 181810037SARM gem5 Developers 181910037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 182010037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 182110037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 182210037SARM gem5 Developers 182310037SARM gem5 Developers if (op2 != 0 || (q == 0x0 && bits(imm4, 3) == 0x1)) 182410037SARM gem5 Developers return new Unknown64(machInst); 182510037SARM gem5 Developers 182610037SARM gem5 Developers uint8_t index = q ? imm4 : imm4 & 0x7; 182710037SARM gem5 Developers 182810037SARM gem5 Developers if (q) { 182910037SARM gem5 Developers return new ExtQX<uint8_t>(machInst, vd, vn, vm, index); 183010037SARM gem5 Developers } else { 183110037SARM gem5 Developers return new ExtDX<uint8_t>(machInst, vd, vn, vm, index); 183210037SARM gem5 Developers } 183310037SARM gem5 Developers } 183410037SARM gem5 Developers 183510037SARM gem5 Developers StaticInstPtr 183610037SARM gem5 Developers decodeNeonSc3Same(ExtMachInst machInst) 183710037SARM gem5 Developers { 183810037SARM gem5 Developers uint8_t u = bits(machInst, 29); 183910037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 184010037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 11); 184110037SARM gem5 Developers uint8_t s = bits(machInst, 11); 184210037SARM gem5 Developers 184310037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 184410037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 184510037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 184610037SARM gem5 Developers 184710037SARM gem5 Developers switch (opcode) { 184810037SARM gem5 Developers case 0x01: 184910037SARM gem5 Developers if (u) 185010037SARM gem5 Developers return decodeNeonUThreeUReg<UqaddScX>( 185110037SARM gem5 Developers size, machInst, vd, vn, vm); 185210037SARM gem5 Developers else 185310037SARM gem5 Developers return decodeNeonSThreeUReg<SqaddScX>( 185410037SARM gem5 Developers size, machInst, vd, vn, vm); 185510037SARM gem5 Developers case 0x05: 185610037SARM gem5 Developers if (u) 185710037SARM gem5 Developers return decodeNeonUThreeUReg<UqsubScX>( 185810037SARM gem5 Developers size, machInst, vd, vn, vm); 185910037SARM gem5 Developers else 186010037SARM gem5 Developers return decodeNeonSThreeUReg<SqsubScX>( 186110037SARM gem5 Developers size, machInst, vd, vn, vm); 186210037SARM gem5 Developers case 0x06: 186310037SARM gem5 Developers if (size != 0x3) 186410037SARM gem5 Developers return new Unknown64(machInst); 186510037SARM gem5 Developers if (u) 186610037SARM gem5 Developers return new CmhiDX<uint64_t>(machInst, vd, vn, vm); 186710037SARM gem5 Developers else 186810037SARM gem5 Developers return new CmgtDX<int64_t>(machInst, vd, vn, vm); 186910037SARM gem5 Developers case 0x07: 187010037SARM gem5 Developers if (size != 0x3) 187110037SARM gem5 Developers return new Unknown64(machInst); 187210037SARM gem5 Developers if (u) 187310037SARM gem5 Developers return new CmhsDX<uint64_t>(machInst, vd, vn, vm); 187410037SARM gem5 Developers else 187510037SARM gem5 Developers return new CmgeDX<int64_t>(machInst, vd, vn, vm); 187610037SARM gem5 Developers case 0x08: 187710037SARM gem5 Developers if (!s && size != 0x3) 187810037SARM gem5 Developers return new Unknown64(machInst); 187910037SARM gem5 Developers if (u) 188010037SARM gem5 Developers return new UshlDX<uint64_t>(machInst, vd, vn, vm); 188110037SARM gem5 Developers else 188210037SARM gem5 Developers return new SshlDX<int64_t>(machInst, vd, vn, vm); 188310037SARM gem5 Developers case 0x09: 188410037SARM gem5 Developers if (!s && size != 0x3) 188510037SARM gem5 Developers return new Unknown64(machInst); 188610037SARM gem5 Developers if (u) 188710037SARM gem5 Developers return decodeNeonUThreeUReg<UqshlScX>( 188810037SARM gem5 Developers size, machInst, vd, vn, vm); 188910037SARM gem5 Developers else 189010037SARM gem5 Developers return decodeNeonSThreeUReg<SqshlScX>( 189110037SARM gem5 Developers size, machInst, vd, vn, vm); 189210037SARM gem5 Developers case 0x0a: 189310037SARM gem5 Developers if (!s && size != 0x3) 189410037SARM gem5 Developers return new Unknown64(machInst); 189510037SARM gem5 Developers if (u) 189610037SARM gem5 Developers return new UrshlDX<uint64_t>(machInst, vd, vn, vm); 189710037SARM gem5 Developers else 189810037SARM gem5 Developers return new SrshlDX<int64_t>(machInst, vd, vn, vm); 189910037SARM gem5 Developers case 0x0b: 190010037SARM gem5 Developers if (!s && size != 0x3) 190110037SARM gem5 Developers return new Unknown64(machInst); 190210037SARM gem5 Developers if (u) 190310037SARM gem5 Developers return decodeNeonUThreeUReg<UqrshlScX>( 190410037SARM gem5 Developers size, machInst, vd, vn, vm); 190510037SARM gem5 Developers else 190610037SARM gem5 Developers return decodeNeonSThreeUReg<SqrshlScX>( 190710037SARM gem5 Developers size, machInst, vd, vn, vm); 190810037SARM gem5 Developers case 0x10: 190910037SARM gem5 Developers if (size != 0x3) 191010037SARM gem5 Developers return new Unknown64(machInst); 191110037SARM gem5 Developers if (u) 191210037SARM gem5 Developers return new SubDX<uint64_t>(machInst, vd, vn, vm); 191310037SARM gem5 Developers else 191410037SARM gem5 Developers return new AddDX<uint64_t>(machInst, vd, vn, vm); 191510037SARM gem5 Developers case 0x11: 191610037SARM gem5 Developers if (size != 0x3) 191710037SARM gem5 Developers return new Unknown64(machInst); 191810037SARM gem5 Developers if (u) 191910037SARM gem5 Developers return new CmeqDX<uint64_t>(machInst, vd, vn, vm); 192010037SARM gem5 Developers else 192110037SARM gem5 Developers return new CmtstDX<uint64_t>(machInst, vd, vn, vm); 192210037SARM gem5 Developers case 0x16: 192310037SARM gem5 Developers if (size == 0x3 || size == 0x0) 192410037SARM gem5 Developers return new Unknown64(machInst); 192510037SARM gem5 Developers if (u) 192610037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqrdmulhScX>( 192710037SARM gem5 Developers size, machInst, vd, vn, vm); 192810037SARM gem5 Developers else 192910037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmulhScX>( 193010037SARM gem5 Developers size, machInst, vd, vn, vm); 193110037SARM gem5 Developers case 0x1a: 193210037SARM gem5 Developers if (!u || size < 0x2) 193310037SARM gem5 Developers return new Unknown64(machInst); 193410037SARM gem5 Developers else 193510037SARM gem5 Developers return decodeNeonUThreeScFpReg<FabdScX>( 193610037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 193710037SARM gem5 Developers case 0x1b: 193810037SARM gem5 Developers if (u || size > 0x1) 193910037SARM gem5 Developers return new Unknown64(machInst); 194010037SARM gem5 Developers else 194110037SARM gem5 Developers return decodeNeonUThreeScFpReg<FmulxScX>( 194210037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 194310037SARM gem5 Developers case 0x1c: 194410037SARM gem5 Developers if (size < 0x2) { 194510037SARM gem5 Developers if (u) 194610037SARM gem5 Developers return decodeNeonUThreeScFpReg<FcmgeScX>( 194710037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 194810037SARM gem5 Developers else 194910037SARM gem5 Developers return decodeNeonUThreeScFpReg<FcmeqScX>( 195010037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 195110037SARM gem5 Developers } else { 195210037SARM gem5 Developers if (u) 195310037SARM gem5 Developers return decodeNeonUThreeScFpReg<FcmgtScX>( 195410037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 195510037SARM gem5 Developers else 195610037SARM gem5 Developers return new Unknown64(machInst); 195710037SARM gem5 Developers } 195810037SARM gem5 Developers case 0x1d: 195910037SARM gem5 Developers if (!u) 196010037SARM gem5 Developers return new Unknown64(machInst); 196110037SARM gem5 Developers if (size < 0x2) 196210037SARM gem5 Developers return decodeNeonUThreeScFpReg<FacgeScX>( 196310037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 196410037SARM gem5 Developers else 196510037SARM gem5 Developers return decodeNeonUThreeScFpReg<FacgtScX>( 196610037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 196710037SARM gem5 Developers case 0x1f: 196810037SARM gem5 Developers if (u) 196910037SARM gem5 Developers return new Unknown64(machInst); 197010037SARM gem5 Developers if (size < 0x2) 197110037SARM gem5 Developers return decodeNeonUThreeScFpReg<FrecpsScX>( 197210037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 197310037SARM gem5 Developers else 197410037SARM gem5 Developers return decodeNeonUThreeScFpReg<FrsqrtsScX>( 197510037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 197610037SARM gem5 Developers default: 197710037SARM gem5 Developers return new Unknown64(machInst); 197810037SARM gem5 Developers } 197910037SARM gem5 Developers } 198010037SARM gem5 Developers 198110037SARM gem5 Developers StaticInstPtr 198210037SARM gem5 Developers decodeNeonSc3Diff(ExtMachInst machInst) 198310037SARM gem5 Developers { 198410037SARM gem5 Developers if (bits(machInst, 29)) 198510037SARM gem5 Developers return new Unknown64(machInst); 198610037SARM gem5 Developers 198710037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 198810037SARM gem5 Developers if (size == 0x0 || size == 0x3) 198910037SARM gem5 Developers return new Unknown64(machInst); 199010037SARM gem5 Developers 199110037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 12); 199210037SARM gem5 Developers 199310037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 199410037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 199510037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 199610037SARM gem5 Developers 199710037SARM gem5 Developers switch (opcode) { 199810037SARM gem5 Developers case 0x9: 199910037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmlalScX>(size, machInst, vd, vn, vm); 200010037SARM gem5 Developers case 0xb: 200110037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmlslScX>(size, machInst, vd, vn, vm); 200210037SARM gem5 Developers case 0xd: 200310037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmullScX>(size, machInst, vd, vn, vm); 200410037SARM gem5 Developers default: 200510037SARM gem5 Developers return new Unknown64(machInst); 200610037SARM gem5 Developers } 200710037SARM gem5 Developers } 200810037SARM gem5 Developers 200910037SARM gem5 Developers StaticInstPtr 201010037SARM gem5 Developers decodeNeonSc2RegMisc(ExtMachInst machInst) 201110037SARM gem5 Developers { 201210037SARM gem5 Developers uint8_t u = bits(machInst, 29); 201310037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 201410037SARM gem5 Developers uint8_t opcode = bits(machInst, 16, 12); 201510037SARM gem5 Developers 201610037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 201710037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 201810037SARM gem5 Developers 201910037SARM gem5 Developers uint8_t switchVal = opcode | ((u ? 1 : 0) << 5); 202010037SARM gem5 Developers switch (switchVal) { 202110037SARM gem5 Developers case 0x03: 202210037SARM gem5 Developers return decodeNeonUTwoMiscUReg<SuqaddScX>(size, machInst, vd, vn); 202310037SARM gem5 Developers case 0x07: 202410037SARM gem5 Developers return decodeNeonSTwoMiscUReg<SqabsScX>(size, machInst, vd, vn); 202510037SARM gem5 Developers case 0x08: 202610037SARM gem5 Developers if (size != 0x3) 202710037SARM gem5 Developers return new Unknown64(machInst); 202810037SARM gem5 Developers else 202910037SARM gem5 Developers return new CmgtZeroDX<int64_t>(machInst, vd, vn); 203010037SARM gem5 Developers case 0x09: 203110037SARM gem5 Developers if (size != 0x3) 203210037SARM gem5 Developers return new Unknown64(machInst); 203310037SARM gem5 Developers else 203410037SARM gem5 Developers return new CmeqZeroDX<int64_t>(machInst, vd, vn); 203510037SARM gem5 Developers case 0x0a: 203610037SARM gem5 Developers if (size != 0x3) 203710037SARM gem5 Developers return new Unknown64(machInst); 203810037SARM gem5 Developers else 203910037SARM gem5 Developers return new CmltZeroDX<int64_t>(machInst, vd, vn); 204010037SARM gem5 Developers case 0x0b: 204110037SARM gem5 Developers if (size != 0x3) 204210037SARM gem5 Developers return new Unknown64(machInst); 204310037SARM gem5 Developers else 204410037SARM gem5 Developers return new AbsDX<int64_t>(machInst, vd, vn); 204510037SARM gem5 Developers case 0x0c: 204610037SARM gem5 Developers if (size < 0x2) 204710037SARM gem5 Developers return new Unknown64(machInst); 204810037SARM gem5 Developers else 204910037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcmgtZeroScX>( 205010037SARM gem5 Developers size & 0x1, machInst, vd, vn); 205110037SARM gem5 Developers case 0x0d: 205210037SARM gem5 Developers if (size < 0x2) 205310037SARM gem5 Developers return new Unknown64(machInst); 205410037SARM gem5 Developers else 205510037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcmeqZeroScX>( 205610037SARM gem5 Developers size & 0x1, machInst, vd, vn); 205710037SARM gem5 Developers case 0x0e: 205810037SARM gem5 Developers if (size < 0x2) 205910037SARM gem5 Developers return new Unknown64(machInst); 206010037SARM gem5 Developers else 206110037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcmltZeroScX>( 206210037SARM gem5 Developers size & 0x1, machInst, vd, vn); 206310037SARM gem5 Developers case 0x14: 206410037SARM gem5 Developers if (size == 0x3) { 206510037SARM gem5 Developers return new Unknown64(machInst); 206610037SARM gem5 Developers } else { 206710037SARM gem5 Developers switch (size) { 206810037SARM gem5 Developers case 0x0: 206910037SARM gem5 Developers return new SqxtnScX<int8_t>(machInst, vd, vn); 207010037SARM gem5 Developers case 0x1: 207110037SARM gem5 Developers return new SqxtnScX<int16_t>(machInst, vd, vn); 207210037SARM gem5 Developers case 0x2: 207310037SARM gem5 Developers return new SqxtnScX<int32_t>(machInst, vd, vn); 207410037SARM gem5 Developers } 207510037SARM gem5 Developers } 207610037SARM gem5 Developers case 0x1a: 207710037SARM gem5 Developers if (size < 0x2) 207810037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtnsScX>( 207910037SARM gem5 Developers size & 0x1, machInst, vd, vn); 208010037SARM gem5 Developers else 208110037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtpsScX>( 208210037SARM gem5 Developers size & 0x1, machInst, vd, vn); 208310037SARM gem5 Developers case 0x1b: 208410037SARM gem5 Developers if (size < 0x2) 208510037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtmsScX>( 208610037SARM gem5 Developers size & 0x1, machInst, vd, vn); 208710037SARM gem5 Developers else 208810037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtzsIntScX>( 208910037SARM gem5 Developers size & 0x1, machInst, vd, vn); 209010037SARM gem5 Developers case 0x1c: 209110037SARM gem5 Developers if (size < 0x2) 209210037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtasScX>( 209310037SARM gem5 Developers size & 0x1, machInst, vd, vn); 209410037SARM gem5 Developers else 209510037SARM gem5 Developers return new Unknown64(machInst); 209610037SARM gem5 Developers case 0x1d: 209710037SARM gem5 Developers if (size < 0x2) { 209810037SARM gem5 Developers if (size & 0x1) 209910037SARM gem5 Developers return new ScvtfIntScDX<uint64_t>(machInst, vd, vn); 210010037SARM gem5 Developers else 210110037SARM gem5 Developers return new ScvtfIntScSX<uint32_t>(machInst, vd, vn); 210210037SARM gem5 Developers } else { 210310037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FrecpeScX>( 210410037SARM gem5 Developers size & 0x1, machInst, vd, vn); 210510037SARM gem5 Developers } 210610037SARM gem5 Developers case 0x1f: 210710037SARM gem5 Developers if (size < 0x2) 210810037SARM gem5 Developers return new Unknown64(machInst); 210910037SARM gem5 Developers else 211010037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FrecpxX>( 211110037SARM gem5 Developers size & 0x1, machInst, vd, vn); 211210037SARM gem5 Developers case 0x23: 211310037SARM gem5 Developers return decodeNeonUTwoMiscUReg<UsqaddScX>(size, machInst, vd, vn); 211410037SARM gem5 Developers case 0x27: 211510037SARM gem5 Developers return decodeNeonSTwoMiscUReg<SqnegScX>(size, machInst, vd, vn); 211610037SARM gem5 Developers case 0x28: 211710037SARM gem5 Developers if (size != 0x3) 211810037SARM gem5 Developers return new Unknown64(machInst); 211910037SARM gem5 Developers else 212010037SARM gem5 Developers return new CmgeZeroDX<int64_t>(machInst, vd, vn); 212110037SARM gem5 Developers case 0x29: 212210037SARM gem5 Developers if (size != 0x3) 212310037SARM gem5 Developers return new Unknown64(machInst); 212410037SARM gem5 Developers else 212510037SARM gem5 Developers return new CmleZeroDX<int64_t>(machInst, vd, vn); 212610037SARM gem5 Developers case 0x2b: 212710037SARM gem5 Developers if (size != 0x3) 212810037SARM gem5 Developers return new Unknown64(machInst); 212910037SARM gem5 Developers else 213010037SARM gem5 Developers return new NegDX<int64_t>(machInst, vd, vn); 213110037SARM gem5 Developers case 0x2c: 213210037SARM gem5 Developers if (size < 0x2) 213310037SARM gem5 Developers return new Unknown64(machInst); 213410037SARM gem5 Developers else 213510037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcmgeZeroScX>( 213610037SARM gem5 Developers size & 0x1, machInst, vd, vn); 213710037SARM gem5 Developers case 0x2d: 213810037SARM gem5 Developers if (size < 0x2) 213910037SARM gem5 Developers return new Unknown64(machInst); 214010037SARM gem5 Developers else 214110037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcmleZeroScX>( 214210037SARM gem5 Developers size & 0x1, machInst, vd, vn); 214310037SARM gem5 Developers case 0x32: 214410037SARM gem5 Developers if (size == 0x3) { 214510037SARM gem5 Developers return new Unknown64(machInst); 214610037SARM gem5 Developers } else { 214710037SARM gem5 Developers switch (size) { 214810037SARM gem5 Developers case 0x0: 214910037SARM gem5 Developers return new SqxtunScX<int8_t>(machInst, vd, vn); 215010037SARM gem5 Developers case 0x1: 215110037SARM gem5 Developers return new SqxtunScX<int16_t>(machInst, vd, vn); 215210037SARM gem5 Developers case 0x2: 215310037SARM gem5 Developers return new SqxtunScX<int32_t>(machInst, vd, vn); 215410037SARM gem5 Developers } 215510037SARM gem5 Developers } 215610037SARM gem5 Developers case 0x34: 215710037SARM gem5 Developers if (size == 0x3) { 215810037SARM gem5 Developers return new Unknown64(machInst); 215910037SARM gem5 Developers } else { 216010037SARM gem5 Developers switch (size) { 216110037SARM gem5 Developers case 0x0: 216210037SARM gem5 Developers return new UqxtnScX<uint8_t>(machInst, vd, vn); 216310037SARM gem5 Developers case 0x1: 216410037SARM gem5 Developers return new UqxtnScX<uint16_t>(machInst, vd, vn); 216510037SARM gem5 Developers case 0x2: 216610037SARM gem5 Developers return new UqxtnScX<uint32_t>(machInst, vd, vn); 216710037SARM gem5 Developers } 216810037SARM gem5 Developers } 216910037SARM gem5 Developers case 0x36: 217010037SARM gem5 Developers if (size != 0x1) { 217110037SARM gem5 Developers return new Unknown64(machInst); 217210037SARM gem5 Developers } else { 217310037SARM gem5 Developers return new FcvtxnScX<uint32_t>(machInst, vd, vn); 217410037SARM gem5 Developers } 217510037SARM gem5 Developers case 0x3a: 217610037SARM gem5 Developers if (size < 0x2) 217710037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtnuScX>( 217810037SARM gem5 Developers size & 0x1, machInst, vd, vn); 217910037SARM gem5 Developers else 218010037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtpuScX>( 218110037SARM gem5 Developers size & 0x1, machInst, vd, vn); 218210037SARM gem5 Developers case 0x3b: 218310037SARM gem5 Developers if (size < 0x2) 218410037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtmuScX>( 218510037SARM gem5 Developers size & 0x1, machInst, vd, vn); 218610037SARM gem5 Developers else 218710037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtzuIntScX>( 218810037SARM gem5 Developers size & 0x1, machInst, vd, vn); 218910037SARM gem5 Developers case 0x3c: 219010037SARM gem5 Developers if (size < 0x2) 219110037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtauScX>( 219210037SARM gem5 Developers size & 0x1, machInst, vd, vn); 219310037SARM gem5 Developers else 219410037SARM gem5 Developers return new Unknown64(machInst); 219510037SARM gem5 Developers case 0x3d: 219610037SARM gem5 Developers if (size < 0x2) 219710037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<UcvtfIntScX>( 219810037SARM gem5 Developers size & 0x1, machInst, vd, vn); 219910037SARM gem5 Developers else 220010037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FrsqrteScX>( 220110037SARM gem5 Developers size & 0x1, machInst, vd, vn); 220210037SARM gem5 Developers default: 220310037SARM gem5 Developers return new Unknown64(machInst); 220410037SARM gem5 Developers } 220510037SARM gem5 Developers } 220610037SARM gem5 Developers 220710037SARM gem5 Developers StaticInstPtr 220810037SARM gem5 Developers decodeNeonScPwise(ExtMachInst machInst) 220910037SARM gem5 Developers { 221010037SARM gem5 Developers uint8_t u = bits(machInst, 29); 221110037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 221210037SARM gem5 Developers uint8_t opcode = bits(machInst, 16, 12); 221310037SARM gem5 Developers 221410037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 221510037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 221610037SARM gem5 Developers 221710037SARM gem5 Developers if (!u) { 221810037SARM gem5 Developers if (opcode == 0x1b && size == 0x3) 221910037SARM gem5 Developers return new AddpScQX<uint64_t>(machInst, vd, vn); 222010037SARM gem5 Developers else 222110037SARM gem5 Developers return new Unknown64(machInst); 222210037SARM gem5 Developers } 222310037SARM gem5 Developers 222410037SARM gem5 Developers uint8_t switchVal = (opcode << 0) | (size << 5); 222510037SARM gem5 Developers switch (switchVal) { 222610037SARM gem5 Developers case 0x0c: 222710037SARM gem5 Developers case 0x2c: 222810037SARM gem5 Developers return decodeNeonUTwoMiscPwiseScFpReg<FmaxnmpScDX, FmaxnmpScQX>( 222910037SARM gem5 Developers size & 0x1, machInst, vd, vn); 223010037SARM gem5 Developers case 0x0d: 223110037SARM gem5 Developers case 0x2d: 223210037SARM gem5 Developers return decodeNeonUTwoMiscPwiseScFpReg<FaddpScDX, FaddpScQX>( 223310037SARM gem5 Developers size & 0x1, machInst, vd, vn); 223410037SARM gem5 Developers case 0x0f: 223510037SARM gem5 Developers case 0x2f: 223610037SARM gem5 Developers return decodeNeonUTwoMiscPwiseScFpReg<FmaxpScDX, FmaxpScQX>( 223710037SARM gem5 Developers size & 0x1, machInst, vd, vn); 223810037SARM gem5 Developers case 0x4c: 223910037SARM gem5 Developers case 0x6c: 224010037SARM gem5 Developers return decodeNeonUTwoMiscPwiseScFpReg<FminnmpScDX, FminnmpScQX>( 224110037SARM gem5 Developers size & 0x1, machInst, vd, vn); 224210037SARM gem5 Developers case 0x4f: 224310037SARM gem5 Developers case 0x6f: 224410037SARM gem5 Developers return decodeNeonUTwoMiscPwiseScFpReg<FminpScDX, FminpScQX>( 224510037SARM gem5 Developers size & 0x1, machInst, vd, vn); 224610037SARM gem5 Developers default: 224710037SARM gem5 Developers return new Unknown64(machInst); 224810037SARM gem5 Developers } 224910037SARM gem5 Developers } 225010037SARM gem5 Developers 225110037SARM gem5 Developers StaticInstPtr 225210037SARM gem5 Developers decodeNeonScCopy(ExtMachInst machInst) 225310037SARM gem5 Developers { 225410037SARM gem5 Developers if (bits(machInst, 14, 11) != 0 || bits(machInst, 29)) 225510037SARM gem5 Developers return new Unknown64(machInst); 225610037SARM gem5 Developers 225710037SARM gem5 Developers uint8_t imm5 = bits(machInst, 20, 16); 225810037SARM gem5 Developers 225910037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 226010037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 226110037SARM gem5 Developers 226210037SARM gem5 Developers uint8_t size = findLsbSet(imm5); 226310037SARM gem5 Developers uint8_t index = bits(imm5, 4, size + 1); 226410037SARM gem5 Developers 226510037SARM gem5 Developers return decodeNeonUTwoShiftUReg<DupElemScX>( 226610037SARM gem5 Developers size, machInst, vd, vn, index); 226710037SARM gem5 Developers } 226810037SARM gem5 Developers 226910037SARM gem5 Developers StaticInstPtr 227010037SARM gem5 Developers decodeNeonScIndexedElem(ExtMachInst machInst) 227110037SARM gem5 Developers { 227210037SARM gem5 Developers uint8_t u = bits(machInst, 29); 227310037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 227410037SARM gem5 Developers uint8_t L = bits(machInst, 21); 227510037SARM gem5 Developers uint8_t M = bits(machInst, 20); 227610037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 12); 227710037SARM gem5 Developers uint8_t H = bits(machInst, 11); 227810037SARM gem5 Developers 227910037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 228010037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 228110037SARM gem5 Developers IntRegIndex vm_bf = (IntRegIndex) (uint8_t) bits(machInst, 19, 16); 228210037SARM gem5 Developers 228310037SARM gem5 Developers uint8_t index = 0; 228410037SARM gem5 Developers uint8_t index_fp = 0; 228510037SARM gem5 Developers uint8_t vmh = 0; 228610037SARM gem5 Developers uint8_t sz_L = bits(machInst, 22, 21); 228710037SARM gem5 Developers 228810037SARM gem5 Developers // Index and 2nd register operand for integer instructions 228910037SARM gem5 Developers if (size == 0x1) { 229010037SARM gem5 Developers index = (H << 2) | (L << 1) | M; 229110037SARM gem5 Developers // vmh = 0; 229210037SARM gem5 Developers } else if (size == 0x2) { 229310037SARM gem5 Developers index = (H << 1) | L; 229410037SARM gem5 Developers vmh = M; 229510037SARM gem5 Developers } else if (size == 0x3) { 229610037SARM gem5 Developers index = H; 229710037SARM gem5 Developers vmh = M; 229810037SARM gem5 Developers } 229910037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) (vmh << 4 | vm_bf); 230010037SARM gem5 Developers 230110037SARM gem5 Developers // Index and 2nd register operand for FP instructions 230210037SARM gem5 Developers vmh = M; 230310037SARM gem5 Developers if ((size & 0x1) == 0) { 230410037SARM gem5 Developers index_fp = (H << 1) | L; 230510037SARM gem5 Developers } else if (L == 0) { 230610037SARM gem5 Developers index_fp = H; 230710037SARM gem5 Developers } 230810037SARM gem5 Developers IntRegIndex vm_fp = (IntRegIndex) (uint8_t) (vmh << 4 | vm_bf); 230910037SARM gem5 Developers 231010037SARM gem5 Developers if (u && opcode != 9) 231110037SARM gem5 Developers return new Unknown64(machInst); 231210037SARM gem5 Developers 231310037SARM gem5 Developers switch (opcode) { 231410037SARM gem5 Developers case 0x1: 231510037SARM gem5 Developers if (size < 2 || sz_L == 0x3) 231610037SARM gem5 Developers return new Unknown64(machInst); 231710037SARM gem5 Developers else 231810037SARM gem5 Developers return decodeNeonUThreeImmScFpReg<FmlaElemScX>( 231910037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm_fp, index_fp); 232010037SARM gem5 Developers case 0x3: 232110037SARM gem5 Developers if (size == 0x0 || size == 0x3) 232210037SARM gem5 Developers return new Unknown64(machInst); 232310037SARM gem5 Developers else 232410037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmlalElemScX>( 232510037SARM gem5 Developers size, machInst, vd, vn, vm, index); 232610037SARM gem5 Developers case 0x5: 232710037SARM gem5 Developers if (size < 2 || sz_L == 0x3) 232810037SARM gem5 Developers return new Unknown64(machInst); 232910037SARM gem5 Developers else 233010037SARM gem5 Developers return decodeNeonUThreeImmScFpReg<FmlsElemScX>( 233110037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm_fp, index_fp); 233210037SARM gem5 Developers case 0x7: 233310037SARM gem5 Developers if (size == 0x0 || size == 0x3) 233410037SARM gem5 Developers return new Unknown64(machInst); 233510037SARM gem5 Developers else 233610037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmlslElemScX>( 233710037SARM gem5 Developers size, machInst, vd, vn, vm, index); 233810037SARM gem5 Developers case 0x9: 233910037SARM gem5 Developers if (size < 2 || sz_L == 0x3) 234010037SARM gem5 Developers return new Unknown64(machInst); 234110037SARM gem5 Developers if (u) 234210037SARM gem5 Developers return decodeNeonUThreeImmScFpReg<FmulxElemScX>( 234310037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm_fp, index_fp); 234410037SARM gem5 Developers else 234510037SARM gem5 Developers return decodeNeonUThreeImmScFpReg<FmulElemScX>( 234610037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm_fp, index_fp); 234710037SARM gem5 Developers case 0xb: 234810037SARM gem5 Developers if (size == 0x0 || size == 0x3) 234910037SARM gem5 Developers return new Unknown64(machInst); 235010037SARM gem5 Developers else 235110037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmullElemScX>( 235210037SARM gem5 Developers size, machInst, vd, vn, vm, index); 235310037SARM gem5 Developers case 0xc: 235410037SARM gem5 Developers if (size == 0x0 || size == 0x3) 235510037SARM gem5 Developers return new Unknown64(machInst); 235610037SARM gem5 Developers else 235710037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmulhElemScX>( 235810037SARM gem5 Developers size, machInst, vd, vn, vm, index); 235910037SARM gem5 Developers case 0xd: 236010037SARM gem5 Developers if (size == 0x0 || size == 0x3) 236110037SARM gem5 Developers return new Unknown64(machInst); 236210037SARM gem5 Developers else 236310037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqrdmulhElemScX>( 236410037SARM gem5 Developers size, machInst, vd, vn, vm, index); 236510037SARM gem5 Developers default: 236610037SARM gem5 Developers return new Unknown64(machInst); 236710037SARM gem5 Developers } 236810037SARM gem5 Developers } 236910037SARM gem5 Developers 237010037SARM gem5 Developers StaticInstPtr 237110037SARM gem5 Developers decodeNeonScShiftByImm(ExtMachInst machInst) 237210037SARM gem5 Developers { 237310037SARM gem5 Developers bool u = bits(machInst, 29); 237410037SARM gem5 Developers uint8_t immh = bits(machInst, 22, 19); 237510037SARM gem5 Developers uint8_t immb = bits(machInst, 18, 16); 237610037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 11); 237710037SARM gem5 Developers 237810037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 237910037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 238010037SARM gem5 Developers 238110037SARM gem5 Developers uint8_t immh3 = bits(machInst, 22); 238210037SARM gem5 Developers uint8_t size = findMsbSet(immh); 238310037SARM gem5 Developers int shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 238410037SARM gem5 Developers 238510037SARM gem5 Developers if (immh == 0x0) 238610037SARM gem5 Developers return new Unknown64(machInst); 238710037SARM gem5 Developers 238810037SARM gem5 Developers switch (opcode) { 238910037SARM gem5 Developers case 0x00: 239010037SARM gem5 Developers if (!immh3) 239110037SARM gem5 Developers return new Unknown64(machInst); 239210037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 239310037SARM gem5 Developers if (u) 239410037SARM gem5 Developers return new UshrDX<uint64_t>(machInst, vd, vn, shiftAmt); 239510037SARM gem5 Developers else 239610037SARM gem5 Developers return new SshrDX<int64_t>(machInst, vd, vn, shiftAmt); 239710037SARM gem5 Developers case 0x02: 239810037SARM gem5 Developers if (!immh3) 239910037SARM gem5 Developers return new Unknown64(machInst); 240010037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 240110037SARM gem5 Developers if (u) 240210037SARM gem5 Developers return new UsraDX<uint64_t>(machInst, vd, vn, shiftAmt); 240310037SARM gem5 Developers else 240410037SARM gem5 Developers return new SsraDX<int64_t>(machInst, vd, vn, shiftAmt); 240510037SARM gem5 Developers case 0x04: 240610037SARM gem5 Developers if (!immh3) 240710037SARM gem5 Developers return new Unknown64(machInst); 240810037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 240910037SARM gem5 Developers if (u) 241010037SARM gem5 Developers return new UrshrDX<uint64_t>(machInst, vd, vn, shiftAmt); 241110037SARM gem5 Developers else 241210037SARM gem5 Developers return new SrshrDX<int64_t>(machInst, vd, vn, shiftAmt); 241310037SARM gem5 Developers case 0x06: 241410037SARM gem5 Developers if (!immh3) 241510037SARM gem5 Developers return new Unknown64(machInst); 241610037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 241710037SARM gem5 Developers if (u) 241810037SARM gem5 Developers return new UrsraDX<uint64_t>(machInst, vd, vn, shiftAmt); 241910037SARM gem5 Developers else 242010037SARM gem5 Developers return new SrsraDX<int64_t>(machInst, vd, vn, shiftAmt); 242110037SARM gem5 Developers case 0x08: 242210037SARM gem5 Developers if (!immh3) 242310037SARM gem5 Developers return new Unknown64(machInst); 242410037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 242510037SARM gem5 Developers if (u) 242610037SARM gem5 Developers return new SriDX<uint64_t>(machInst, vd, vn, shiftAmt); 242710037SARM gem5 Developers else 242810037SARM gem5 Developers return new Unknown64(machInst); 242910037SARM gem5 Developers case 0x0a: 243010037SARM gem5 Developers if (!immh3) 243110037SARM gem5 Developers return new Unknown64(machInst); 243210037SARM gem5 Developers shiftAmt = ((immh << 3) | immb) - (8 << size); 243310037SARM gem5 Developers if (u) 243410037SARM gem5 Developers return new SliDX<uint64_t>(machInst, vd, vn, shiftAmt); 243510037SARM gem5 Developers else 243610037SARM gem5 Developers return new ShlDX<uint64_t>(machInst, vd, vn, shiftAmt); 243710037SARM gem5 Developers case 0x0c: 243810037SARM gem5 Developers if (u) { 243910037SARM gem5 Developers shiftAmt = ((immh << 3) | immb) - (8 << size); 244010037SARM gem5 Developers return decodeNeonSTwoShiftUReg<SqshluScX>( 244110037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 244210037SARM gem5 Developers } else { 244310037SARM gem5 Developers return new Unknown64(machInst); 244410037SARM gem5 Developers } 244510037SARM gem5 Developers case 0x0e: 244610037SARM gem5 Developers shiftAmt = ((immh << 3) | immb) - (8 << size); 244710037SARM gem5 Developers if (u) 244810037SARM gem5 Developers return decodeNeonUTwoShiftUReg<UqshlImmScX>( 244910037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 245010037SARM gem5 Developers else 245110037SARM gem5 Developers return decodeNeonSTwoShiftUReg<SqshlImmScX>( 245210037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 245310037SARM gem5 Developers case 0x10: 245410037SARM gem5 Developers if (!u || immh3) 245510037SARM gem5 Developers return new Unknown64(machInst); 245610037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 245710037SARM gem5 Developers return decodeNeonSTwoShiftUSReg<SqshrunScX>( 245810037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 245910037SARM gem5 Developers case 0x11: 246010037SARM gem5 Developers if (!u || immh3) 246110037SARM gem5 Developers return new Unknown64(machInst); 246210037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 246310037SARM gem5 Developers return decodeNeonSTwoShiftUSReg<SqrshrunScX>( 246410037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 246510037SARM gem5 Developers case 0x12: 246610037SARM gem5 Developers if (immh3) 246710037SARM gem5 Developers return new Unknown64(machInst); 246810037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 246910037SARM gem5 Developers if (u) 247010037SARM gem5 Developers return decodeNeonUTwoShiftUSReg<UqshrnScX>( 247110037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 247210037SARM gem5 Developers else 247310037SARM gem5 Developers return decodeNeonSTwoShiftUSReg<SqshrnScX>( 247410037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 247510037SARM gem5 Developers case 0x13: 247610037SARM gem5 Developers if (immh3) 247710037SARM gem5 Developers return new Unknown64(machInst); 247810037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 247910037SARM gem5 Developers if (u) 248010037SARM gem5 Developers return decodeNeonUTwoShiftUSReg<UqrshrnScX>( 248110037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 248210037SARM gem5 Developers else 248310037SARM gem5 Developers return decodeNeonSTwoShiftUSReg<SqrshrnScX>( 248410037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 248510037SARM gem5 Developers case 0x1c: 248610037SARM gem5 Developers if (immh < 0x4) 248710037SARM gem5 Developers return new Unknown64(machInst); 248810037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 248910037SARM gem5 Developers if (u) { 249010037SARM gem5 Developers return decodeNeonUTwoShiftUFpReg<UcvtfFixedScX>( 249110037SARM gem5 Developers size & 0x1, machInst, vd, vn, shiftAmt); 249210037SARM gem5 Developers } else { 249310037SARM gem5 Developers if (size & 0x1) 249410037SARM gem5 Developers return new ScvtfFixedScDX<uint64_t>(machInst, vd, vn, 249510037SARM gem5 Developers shiftAmt); 249610037SARM gem5 Developers else 249710037SARM gem5 Developers return new ScvtfFixedScSX<uint32_t>(machInst, vd, vn, 249810037SARM gem5 Developers shiftAmt); 249910037SARM gem5 Developers } 250010037SARM gem5 Developers case 0x1f: 250110037SARM gem5 Developers if (immh < 0x4) 250210037SARM gem5 Developers return new Unknown64(machInst); 250310037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 250410037SARM gem5 Developers if (u) 250510037SARM gem5 Developers return decodeNeonUTwoShiftUFpReg<FcvtzuFixedScX>( 250610037SARM gem5 Developers size & 0x1, machInst, vd, vn, shiftAmt); 250710037SARM gem5 Developers else 250810037SARM gem5 Developers return decodeNeonUTwoShiftUFpReg<FcvtzsFixedScX>( 250910037SARM gem5 Developers size & 0x1, machInst, vd, vn, shiftAmt); 251010037SARM gem5 Developers default: 251110037SARM gem5 Developers return new Unknown64(machInst); 251210037SARM gem5 Developers } 251310037SARM gem5 Developers } 251410037SARM gem5 Developers 251510037SARM gem5 Developers StaticInstPtr 251610037SARM gem5 Developers decodeNeonMem(ExtMachInst machInst) 251710037SARM gem5 Developers { 251810037SARM gem5 Developers uint8_t dataSize = bits(machInst, 30) ? 128 : 64; 251910037SARM gem5 Developers bool multiple = bits(machInst, 24, 23) < 0x2; 252010037SARM gem5 Developers bool load = bits(machInst, 22); 252110037SARM gem5 Developers 252210037SARM gem5 Developers uint8_t numStructElems = 0; 252310037SARM gem5 Developers uint8_t numRegs = 0; 252410037SARM gem5 Developers 252510037SARM gem5 Developers if (multiple) { // AdvSIMD load/store multiple structures 252610037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 12); 252710037SARM gem5 Developers uint8_t eSize = bits(machInst, 11, 10); 252810037SARM gem5 Developers bool wb = !(bits(machInst, 20, 16) == 0x0 && !bits(machInst, 23)); 252910037SARM gem5 Developers 253010037SARM gem5 Developers switch (opcode) { 253110037SARM gem5 Developers case 0x0: // LD/ST4 (4 regs) 253210037SARM gem5 Developers numStructElems = 4; 253310037SARM gem5 Developers numRegs = 4; 253410037SARM gem5 Developers break; 253510037SARM gem5 Developers case 0x2: // LD/ST1 (4 regs) 253610037SARM gem5 Developers numStructElems = 1; 253710037SARM gem5 Developers numRegs = 4; 253810037SARM gem5 Developers break; 253910037SARM gem5 Developers case 0x4: // LD/ST3 (3 regs) 254010037SARM gem5 Developers numStructElems = 3; 254110037SARM gem5 Developers numRegs = 3; 254210037SARM gem5 Developers break; 254310037SARM gem5 Developers case 0x6: // LD/ST1 (3 regs) 254410037SARM gem5 Developers numStructElems = 1; 254510037SARM gem5 Developers numRegs = 3; 254610037SARM gem5 Developers break; 254710037SARM gem5 Developers case 0x7: // LD/ST1 (1 reg) 254810037SARM gem5 Developers numStructElems = 1; 254910037SARM gem5 Developers numRegs = 1; 255010037SARM gem5 Developers break; 255110037SARM gem5 Developers case 0x8: // LD/ST2 (2 regs) 255210037SARM gem5 Developers numStructElems = 2; 255310037SARM gem5 Developers numRegs = 2; 255410037SARM gem5 Developers break; 255510037SARM gem5 Developers case 0xa: // LD/ST1 (2 regs) 255610037SARM gem5 Developers numStructElems = 1; 255710037SARM gem5 Developers numRegs = 2; 255810037SARM gem5 Developers break; 255910037SARM gem5 Developers default: 256010037SARM gem5 Developers return new Unknown64(machInst); 256110037SARM gem5 Developers } 256210037SARM gem5 Developers 256310037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 256410037SARM gem5 Developers IntRegIndex rn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 256510037SARM gem5 Developers IntRegIndex rm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 256610037SARM gem5 Developers 256710037SARM gem5 Developers if (load) { 256810037SARM gem5 Developers return new VldMult64(machInst, rn, vd, rm, eSize, dataSize, 256910037SARM gem5 Developers numStructElems, numRegs, wb); 257010037SARM gem5 Developers } else { 257110037SARM gem5 Developers return new VstMult64(machInst, rn, vd, rm, eSize, dataSize, 257210037SARM gem5 Developers numStructElems, numRegs, wb); 257310037SARM gem5 Developers } 257410037SARM gem5 Developers } else { // AdvSIMD load/store single structure 257510037SARM gem5 Developers uint8_t scale = bits(machInst, 15, 14); 257610037SARM gem5 Developers uint8_t numStructElems = (((uint8_t) bits(machInst, 13) << 1) | 257710037SARM gem5 Developers (uint8_t) bits(machInst, 21)) + 1; 257810037SARM gem5 Developers uint8_t index = 0; 257910037SARM gem5 Developers bool wb = !(bits(machInst, 20, 16) == 0x0 && !bits(machInst, 23)); 258010037SARM gem5 Developers bool replicate = false; 258110037SARM gem5 Developers 258210037SARM gem5 Developers switch (scale) { 258310037SARM gem5 Developers case 0x0: 258410037SARM gem5 Developers index = ((uint8_t) bits(machInst, 30) << 3) | 258510037SARM gem5 Developers ((uint8_t) bits(machInst, 12) << 2) | 258610037SARM gem5 Developers (uint8_t) bits(machInst, 11, 10); 258710037SARM gem5 Developers break; 258810037SARM gem5 Developers case 0x1: 258910037SARM gem5 Developers index = ((uint8_t) bits(machInst, 30) << 2) | 259010037SARM gem5 Developers ((uint8_t) bits(machInst, 12) << 1) | 259110037SARM gem5 Developers (uint8_t) bits(machInst, 11); 259210037SARM gem5 Developers break; 259310037SARM gem5 Developers case 0x2: 259410037SARM gem5 Developers if (bits(machInst, 10) == 0x0) { 259510037SARM gem5 Developers index = ((uint8_t) bits(machInst, 30) << 1) | 259610037SARM gem5 Developers bits(machInst, 12); 259710037SARM gem5 Developers } else { 259810037SARM gem5 Developers index = (uint8_t) bits(machInst, 30); 259910037SARM gem5 Developers scale = 0x3; 260010037SARM gem5 Developers } 260110037SARM gem5 Developers break; 260210037SARM gem5 Developers case 0x3: 260310037SARM gem5 Developers scale = bits(machInst, 11, 10); 260410037SARM gem5 Developers replicate = true; 260510037SARM gem5 Developers break; 260610037SARM gem5 Developers default: 260710037SARM gem5 Developers return new Unknown64(machInst); 260810037SARM gem5 Developers } 260910037SARM gem5 Developers 261010037SARM gem5 Developers uint8_t eSize = scale; 261110037SARM gem5 Developers 261210037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 261310037SARM gem5 Developers IntRegIndex rn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 261410037SARM gem5 Developers IntRegIndex rm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 261510037SARM gem5 Developers 261610037SARM gem5 Developers if (load) { 261710037SARM gem5 Developers return new VldSingle64(machInst, rn, vd, rm, eSize, dataSize, 261810037SARM gem5 Developers numStructElems, index, wb, replicate); 261910037SARM gem5 Developers } else { 262010037SARM gem5 Developers return new VstSingle64(machInst, rn, vd, rm, eSize, dataSize, 262110037SARM gem5 Developers numStructElems, index, wb, replicate); 262210037SARM gem5 Developers } 262310037SARM gem5 Developers } 262410037SARM gem5 Developers } 262510037SARM gem5 Developers} 262610037SARM gem5 Developers}}; 2627