110037SARM gem5 Developers// Copyright (c) 2012-2013 ARM Limited 210037SARM gem5 Developers// All rights reserved 310037SARM gem5 Developers// 410037SARM gem5 Developers// The license below extends only to copyright in the software and shall 510037SARM gem5 Developers// not be construed as granting a license to any other intellectual 610037SARM gem5 Developers// property including but not limited to intellectual property relating 710037SARM gem5 Developers// to a hardware implementation of the functionality of the software 810037SARM gem5 Developers// licensed hereunder. You may use the software subject to the license 910037SARM gem5 Developers// terms below provided that you ensure that this notice is replicated 1010037SARM gem5 Developers// unmodified and in its entirety in all distributions of the software, 1110037SARM gem5 Developers// modified or unmodified, in source code or in binary form. 1210037SARM gem5 Developers// 1310037SARM gem5 Developers// Redistribution and use in source and binary forms, with or without 1410037SARM gem5 Developers// modification, are permitted provided that the following conditions are 1510037SARM gem5 Developers// met: redistributions of source code must retain the above copyright 1610037SARM gem5 Developers// notice, this list of conditions and the following disclaimer; 1710037SARM gem5 Developers// redistributions in binary form must reproduce the above copyright 1810037SARM gem5 Developers// notice, this list of conditions and the following disclaimer in the 1910037SARM gem5 Developers// documentation and/or other materials provided with the distribution; 2010037SARM gem5 Developers// neither the name of the copyright holders nor the names of its 2110037SARM gem5 Developers// contributors may be used to endorse or promote products derived from 2210037SARM gem5 Developers// this software without specific prior written permission. 2310037SARM gem5 Developers// 2410037SARM gem5 Developers// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2510037SARM gem5 Developers// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2610037SARM gem5 Developers// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2710037SARM gem5 Developers// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2810037SARM gem5 Developers// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2910037SARM gem5 Developers// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3010037SARM gem5 Developers// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3110037SARM gem5 Developers// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3210037SARM gem5 Developers// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3310037SARM gem5 Developers// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3410037SARM gem5 Developers// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3510037SARM gem5 Developers// 3610037SARM gem5 Developers// Authors: Giacomo Gabrielli 3710037SARM gem5 Developers// Mbou Eyole 3810037SARM gem5 Developers 3910037SARM gem5 Developersoutput header {{ 4010037SARM gem5 Developersnamespace Aarch64 4110037SARM gem5 Developers{ 4210037SARM gem5 Developers // AdvSIMD three same 4311165SRekai.GonzalezAlberquilla@arm.com template <typename DecoderFeatures> 4410037SARM gem5 Developers StaticInstPtr decodeNeon3Same(ExtMachInst machInst); 4510037SARM gem5 Developers // AdvSIMD three different 4611165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeon3Diff(ExtMachInst machInst); 4710037SARM gem5 Developers // AdvSIMD two-reg misc 4811165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeon2RegMisc(ExtMachInst machInst); 4910037SARM gem5 Developers // AdvSIMD across lanes 5011165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeonAcrossLanes(ExtMachInst machInst); 5110037SARM gem5 Developers // AdvSIMD copy 5211165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeonCopy(ExtMachInst machInst); 5310037SARM gem5 Developers // AdvSIMD vector x indexed element 5411165SRekai.GonzalezAlberquilla@arm.com template <typename DecoderFeatures> 5510037SARM gem5 Developers StaticInstPtr decodeNeonIndexedElem(ExtMachInst machInst); 5610037SARM gem5 Developers // AdvSIMD modified immediate 5711165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeonModImm(ExtMachInst machInst); 5810037SARM gem5 Developers // AdvSIMD shift by immediate 5911165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeonShiftByImm(ExtMachInst machInst); 6010037SARM gem5 Developers // AdvSIMD TBL/TBX 6111165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeonTblTbx(ExtMachInst machInst); 6210037SARM gem5 Developers // AdvSIMD ZIP/UZP/TRN 6311165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeonZipUzpTrn(ExtMachInst machInst); 6410037SARM gem5 Developers // AdvSIMD EXT 6511165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeonExt(ExtMachInst machInst); 6610037SARM gem5 Developers 6710037SARM gem5 Developers // AdvSIMD scalar three same 6811165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeonSc3Same(ExtMachInst machInst); 6910037SARM gem5 Developers // AdvSIMD scalar three different 7011165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeonSc3Diff(ExtMachInst machInst); 7110037SARM gem5 Developers // AdvSIMD scalar two-reg misc 7211165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeonSc2RegMisc(ExtMachInst machInst); 7310037SARM gem5 Developers // AdvSIMD scalar pairwise 7411165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeonScPwise(ExtMachInst machInst); 7510037SARM gem5 Developers // AdvSIMD scalar copy 7611165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeonScCopy(ExtMachInst machInst); 7710037SARM gem5 Developers // AdvSIMD scalar x indexed element 7811165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeonScIndexedElem(ExtMachInst machInst); 7910037SARM gem5 Developers // AdvSIMD scalar shift by immediate 8011165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeonScShiftByImm(ExtMachInst machInst); 8110037SARM gem5 Developers 8210037SARM gem5 Developers // AdvSIMD load/store 8311165SRekai.GonzalezAlberquilla@arm.com inline StaticInstPtr decodeNeonMem(ExtMachInst machInst); 8410037SARM gem5 Developers} 8510037SARM gem5 Developers}}; 8610037SARM gem5 Developers 8710037SARM gem5 Developersoutput decoder {{ 8810037SARM gem5 Developersnamespace Aarch64 8910037SARM gem5 Developers{ 9011165SRekai.GonzalezAlberquilla@arm.com template <typename DecoderFeatures> 9110037SARM gem5 Developers StaticInstPtr 9210037SARM gem5 Developers decodeNeon3Same(ExtMachInst machInst) 9310037SARM gem5 Developers { 9410037SARM gem5 Developers uint8_t q = bits(machInst, 30); 9510037SARM gem5 Developers uint8_t u = bits(machInst, 29); 9610037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 9710037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 11); 9810037SARM gem5 Developers 9910037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 10010037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 10110037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 10210037SARM gem5 Developers 10310037SARM gem5 Developers uint8_t size_q = (size << 1) | q; 10410037SARM gem5 Developers uint8_t sz_q = size_q & 0x3; 10510037SARM gem5 Developers 10610037SARM gem5 Developers switch (opcode) { 10710037SARM gem5 Developers case 0x00: 10810037SARM gem5 Developers if (size == 0x3) 10910037SARM gem5 Developers return new Unknown64(machInst); 11010037SARM gem5 Developers if (u) 11110037SARM gem5 Developers return decodeNeonUThreeSReg<UhaddDX, UhaddQX>( 11210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 11310037SARM gem5 Developers else 11410037SARM gem5 Developers return decodeNeonSThreeSReg<ShaddDX, ShaddQX>( 11510037SARM gem5 Developers q, size, machInst, vd, vn, vm); 11610037SARM gem5 Developers case 0x01: 11710037SARM gem5 Developers if (size_q == 0x6) 11810037SARM gem5 Developers return new Unknown64(machInst); 11910037SARM gem5 Developers if (u) 12010037SARM gem5 Developers return decodeNeonUThreeXReg<UqaddDX, UqaddQX>( 12110037SARM gem5 Developers q, size, machInst, vd, vn, vm); 12210037SARM gem5 Developers else 12310037SARM gem5 Developers return decodeNeonSThreeXReg<SqaddDX, SqaddQX>( 12410037SARM gem5 Developers q, size, machInst, vd, vn, vm); 12510037SARM gem5 Developers case 0x02: 12610037SARM gem5 Developers if (size == 0x3) 12710037SARM gem5 Developers return new Unknown64(machInst); 12810037SARM gem5 Developers if (u) 12910037SARM gem5 Developers return decodeNeonUThreeSReg<UrhaddDX, UrhaddQX>( 13010037SARM gem5 Developers q, size, machInst, vd, vn, vm); 13110037SARM gem5 Developers else 13210037SARM gem5 Developers return decodeNeonSThreeSReg<SrhaddDX, SrhaddQX>( 13310037SARM gem5 Developers q, size, machInst, vd, vn, vm); 13410037SARM gem5 Developers case 0x03: 13510037SARM gem5 Developers switch (size) { 13610037SARM gem5 Developers case 0x0: 13710037SARM gem5 Developers if (u) { 13810037SARM gem5 Developers if (q) 13910037SARM gem5 Developers return new EorQX<uint64_t>(machInst, vd, vn, vm); 14010037SARM gem5 Developers else 14110037SARM gem5 Developers return new EorDX<uint64_t>(machInst, vd, vn, vm); 14210037SARM gem5 Developers } else { 14310037SARM gem5 Developers if (q) 14410037SARM gem5 Developers return new AndQX<uint64_t>(machInst, vd, vn, vm); 14510037SARM gem5 Developers else 14610037SARM gem5 Developers return new AndDX<uint64_t>(machInst, vd, vn, vm); 14710037SARM gem5 Developers } 14810037SARM gem5 Developers case 0x1: 14910037SARM gem5 Developers if (u) { 15010037SARM gem5 Developers if (q) 15110037SARM gem5 Developers return new BslQX<uint64_t>(machInst, vd, vn, vm); 15210037SARM gem5 Developers else 15310037SARM gem5 Developers return new BslDX<uint64_t>(machInst, vd, vn, vm); 15410037SARM gem5 Developers } else { 15510037SARM gem5 Developers if (q) 15610037SARM gem5 Developers return new BicQX<uint64_t>(machInst, vd, vn, vm); 15710037SARM gem5 Developers else 15810037SARM gem5 Developers return new BicDX<uint64_t>(machInst, vd, vn, vm); 15910037SARM gem5 Developers } 16010037SARM gem5 Developers case 0x2: 16110037SARM gem5 Developers if (u) { 16210037SARM gem5 Developers if (q) 16310037SARM gem5 Developers return new BitQX<uint64_t>(machInst, vd, vn, vm); 16410037SARM gem5 Developers else 16510037SARM gem5 Developers return new BitDX<uint64_t>(machInst, vd, vn, vm); 16610037SARM gem5 Developers } else { 16710037SARM gem5 Developers if (q) 16810037SARM gem5 Developers return new OrrQX<uint64_t>(machInst, vd, vn, vm); 16910037SARM gem5 Developers else 17010037SARM gem5 Developers return new OrrDX<uint64_t>(machInst, vd, vn, vm); 17110037SARM gem5 Developers } 17210037SARM gem5 Developers case 0x3: 17310037SARM gem5 Developers if (u) { 17410037SARM gem5 Developers if (q) 17510037SARM gem5 Developers return new BifQX<uint64_t>(machInst, vd, vn, vm); 17610037SARM gem5 Developers else 17710037SARM gem5 Developers return new BifDX<uint64_t>(machInst, vd, vn, vm); 17810037SARM gem5 Developers } else { 17910037SARM gem5 Developers if (q) 18010037SARM gem5 Developers return new OrnQX<uint64_t>(machInst, vd, vn, vm); 18110037SARM gem5 Developers else 18210037SARM gem5 Developers return new OrnDX<uint64_t>(machInst, vd, vn, vm); 18310037SARM gem5 Developers } 18412595Ssiddhesh.poyarekar@gmail.com default: 18512595Ssiddhesh.poyarekar@gmail.com M5_UNREACHABLE; 18610037SARM gem5 Developers } 18710037SARM gem5 Developers case 0x04: 18810037SARM gem5 Developers if (size == 0x3) 18910037SARM gem5 Developers return new Unknown64(machInst); 19010037SARM gem5 Developers if (u) 19110037SARM gem5 Developers return decodeNeonUThreeSReg<UhsubDX, UhsubQX>( 19210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 19310037SARM gem5 Developers else 19410037SARM gem5 Developers return decodeNeonSThreeSReg<ShsubDX, ShsubQX>( 19510037SARM gem5 Developers q, size, machInst, vd, vn, vm); 19610037SARM gem5 Developers case 0x05: 19710037SARM gem5 Developers if (size_q == 0x6) 19810037SARM gem5 Developers return new Unknown64(machInst); 19910037SARM gem5 Developers if (u) 20010037SARM gem5 Developers return decodeNeonUThreeXReg<UqsubDX, UqsubQX>( 20110037SARM gem5 Developers q, size, machInst, vd, vn, vm); 20210037SARM gem5 Developers else 20310037SARM gem5 Developers return decodeNeonSThreeXReg<SqsubDX, SqsubQX>( 20410037SARM gem5 Developers q, size, machInst, vd, vn, vm); 20510037SARM gem5 Developers case 0x06: 20610037SARM gem5 Developers if (size_q == 0x6) 20710037SARM gem5 Developers return new Unknown64(machInst); 20810037SARM gem5 Developers if (u) 20910037SARM gem5 Developers return decodeNeonUThreeXReg<CmhiDX, CmhiQX>( 21010037SARM gem5 Developers q, size, machInst, vd, vn, vm); 21110037SARM gem5 Developers else 21210037SARM gem5 Developers return decodeNeonSThreeXReg<CmgtDX, CmgtQX>( 21310037SARM gem5 Developers q, size, machInst, vd, vn, vm); 21410037SARM gem5 Developers case 0x07: 21510037SARM gem5 Developers if (size_q == 0x6) 21610037SARM gem5 Developers return new Unknown64(machInst); 21710037SARM gem5 Developers if (u) 21810037SARM gem5 Developers return decodeNeonUThreeXReg<CmhsDX, CmhsQX>( 21910037SARM gem5 Developers q, size, machInst, vd, vn, vm); 22010037SARM gem5 Developers else 22110037SARM gem5 Developers return decodeNeonSThreeXReg<CmgeDX, CmgeQX>( 22210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 22310037SARM gem5 Developers case 0x08: 22410037SARM gem5 Developers if (size_q == 0x6) 22510037SARM gem5 Developers return new Unknown64(machInst); 22610037SARM gem5 Developers if (u) 22710037SARM gem5 Developers return decodeNeonUThreeXReg<UshlDX, UshlQX>( 22810037SARM gem5 Developers q, size, machInst, vd, vn, vm); 22910037SARM gem5 Developers else 23010037SARM gem5 Developers return decodeNeonSThreeXReg<SshlDX, SshlQX>( 23110037SARM gem5 Developers q, size, machInst, vd, vn, vm); 23210037SARM gem5 Developers case 0x09: 23310037SARM gem5 Developers if (size_q == 0x6) 23410037SARM gem5 Developers return new Unknown64(machInst); 23510037SARM gem5 Developers if (u) 23610037SARM gem5 Developers return decodeNeonUThreeXReg<UqshlDX, UqshlQX>( 23710037SARM gem5 Developers q, size, machInst, vd, vn, vm); 23810037SARM gem5 Developers else 23910037SARM gem5 Developers return decodeNeonSThreeXReg<SqshlDX, SqshlQX>( 24010037SARM gem5 Developers q, size, machInst, vd, vn, vm); 24110037SARM gem5 Developers case 0x0a: 24210037SARM gem5 Developers if (size_q == 0x6) 24310037SARM gem5 Developers return new Unknown64(machInst); 24410037SARM gem5 Developers if (u) 24510037SARM gem5 Developers return decodeNeonUThreeXReg<UrshlDX, UrshlQX>( 24610037SARM gem5 Developers q, size, machInst, vd, vn, vm); 24710037SARM gem5 Developers else 24810037SARM gem5 Developers return decodeNeonSThreeXReg<SrshlDX, SrshlQX>( 24910037SARM gem5 Developers q, size, machInst, vd, vn, vm); 25010037SARM gem5 Developers case 0x0b: 25110037SARM gem5 Developers if (size_q == 0x6) 25210037SARM gem5 Developers return new Unknown64(machInst); 25310037SARM gem5 Developers if (u) 25410037SARM gem5 Developers return decodeNeonUThreeXReg<UqrshlDX, UqrshlQX>( 25510037SARM gem5 Developers q, size, machInst, vd, vn, vm); 25610037SARM gem5 Developers else 25710037SARM gem5 Developers return decodeNeonSThreeXReg<SqrshlDX, SqrshlQX>( 25810037SARM gem5 Developers q, size, machInst, vd, vn, vm); 25910037SARM gem5 Developers case 0x0c: 26010037SARM gem5 Developers if (size == 0x3) 26110037SARM gem5 Developers return new Unknown64(machInst); 26210037SARM gem5 Developers if (u) 26310037SARM gem5 Developers return decodeNeonUThreeSReg<UmaxDX, UmaxQX>( 26410037SARM gem5 Developers q, size, machInst, vd, vn, vm); 26510037SARM gem5 Developers else 26610037SARM gem5 Developers return decodeNeonSThreeSReg<SmaxDX, SmaxQX>( 26710037SARM gem5 Developers q, size, machInst, vd, vn, vm); 26810037SARM gem5 Developers case 0x0d: 26910037SARM gem5 Developers if (size == 0x3) 27010037SARM gem5 Developers return new Unknown64(machInst); 27110037SARM gem5 Developers if (u) 27210037SARM gem5 Developers return decodeNeonUThreeSReg<UminDX, UminQX>( 27310037SARM gem5 Developers q, size, machInst, vd, vn, vm); 27410037SARM gem5 Developers else 27510037SARM gem5 Developers return decodeNeonSThreeSReg<SminDX, SminQX>( 27610037SARM gem5 Developers q, size, machInst, vd, vn, vm); 27710037SARM gem5 Developers case 0x0e: 27810037SARM gem5 Developers if (size == 0x3) 27910037SARM gem5 Developers return new Unknown64(machInst); 28010037SARM gem5 Developers if (u) 28110037SARM gem5 Developers return decodeNeonUThreeSReg<UabdDX, UabdQX>( 28210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 28310037SARM gem5 Developers else 28410037SARM gem5 Developers return decodeNeonSThreeSReg<SabdDX, SabdQX>( 28510037SARM gem5 Developers q, size, machInst, vd, vn, vm); 28610037SARM gem5 Developers case 0x0f: 28710037SARM gem5 Developers if (size == 0x3) 28810037SARM gem5 Developers return new Unknown64(machInst); 28910037SARM gem5 Developers if (u) 29010037SARM gem5 Developers return decodeNeonUThreeSReg<UabaDX, UabaQX>( 29110037SARM gem5 Developers q, size, machInst, vd, vn, vm); 29210037SARM gem5 Developers else 29310037SARM gem5 Developers return decodeNeonSThreeSReg<SabaDX, SabaQX>( 29410037SARM gem5 Developers q, size, machInst, vd, vn, vm); 29510037SARM gem5 Developers case 0x10: 29610037SARM gem5 Developers if (size_q == 0x6) 29710037SARM gem5 Developers return new Unknown64(machInst); 29810037SARM gem5 Developers if (u) 29910037SARM gem5 Developers return decodeNeonUThreeXReg<SubDX, SubQX>( 30010037SARM gem5 Developers q, size, machInst, vd, vn, vm); 30110037SARM gem5 Developers else 30210037SARM gem5 Developers return decodeNeonUThreeXReg<AddDX, AddQX>( 30310037SARM gem5 Developers q, size, machInst, vd, vn, vm); 30410037SARM gem5 Developers case 0x11: 30510037SARM gem5 Developers if (size_q == 0x6) 30610037SARM gem5 Developers return new Unknown64(machInst); 30710037SARM gem5 Developers if (u) 30810037SARM gem5 Developers return decodeNeonUThreeXReg<CmeqDX, CmeqQX>( 30910037SARM gem5 Developers q, size, machInst, vd, vn, vm); 31010037SARM gem5 Developers else 31110037SARM gem5 Developers return decodeNeonUThreeXReg<CmtstDX, CmtstQX>( 31210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 31310037SARM gem5 Developers case 0x12: 31410037SARM gem5 Developers if (size == 0x3) 31510037SARM gem5 Developers return new Unknown64(machInst); 31610037SARM gem5 Developers if (u) 31710037SARM gem5 Developers return decodeNeonUThreeSReg<MlsDX, MlsQX>( 31810037SARM gem5 Developers q, size, machInst, vd, vn, vm); 31910037SARM gem5 Developers else 32010037SARM gem5 Developers return decodeNeonUThreeSReg<MlaDX, MlaQX>( 32110037SARM gem5 Developers q, size, machInst, vd, vn, vm); 32210037SARM gem5 Developers case 0x13: 32310037SARM gem5 Developers if (size == 0x3 || (size != 0x0 && bits(machInst, 29))) 32410037SARM gem5 Developers return new Unknown64(machInst); 32510037SARM gem5 Developers if (u) { 32610037SARM gem5 Developers if (q) 32710037SARM gem5 Developers return new PmulQX<uint8_t>(machInst, vd, vn, vm); 32810037SARM gem5 Developers else 32910037SARM gem5 Developers return new PmulDX<uint8_t>(machInst, vd, vn, vm); 33010037SARM gem5 Developers } else { 33110037SARM gem5 Developers return decodeNeonUThreeSReg<MulDX, MulQX>( 33210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 33310037SARM gem5 Developers } 33410037SARM gem5 Developers case 0x14: 33510037SARM gem5 Developers if (size == 0x3) 33610037SARM gem5 Developers return new Unknown64(machInst); 33710037SARM gem5 Developers if (u) 33810037SARM gem5 Developers return decodeNeonUThreeSReg<UmaxpDX, UmaxpQX>( 33910037SARM gem5 Developers q, size, machInst, vd, vn, vm); 34010037SARM gem5 Developers else 34110037SARM gem5 Developers return decodeNeonSThreeSReg<SmaxpDX, SmaxpQX>( 34210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 34310037SARM gem5 Developers case 0x15: 34410037SARM gem5 Developers if (size == 0x3) 34510037SARM gem5 Developers return new Unknown64(machInst); 34610037SARM gem5 Developers if (u) 34710037SARM gem5 Developers return decodeNeonUThreeSReg<UminpDX, UminpQX>( 34810037SARM gem5 Developers q, size, machInst, vd, vn, vm); 34910037SARM gem5 Developers else 35010037SARM gem5 Developers return decodeNeonSThreeSReg<SminpDX, SminpQX>( 35110037SARM gem5 Developers q, size, machInst, vd, vn, vm); 35210037SARM gem5 Developers case 0x16: 35310037SARM gem5 Developers if (size == 0x3 || size == 0x0) 35410037SARM gem5 Developers return new Unknown64(machInst); 35510037SARM gem5 Developers if (u) { 35610037SARM gem5 Developers if (q) 35710037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqrdmulhQX>( 35810037SARM gem5 Developers size, machInst, vd, vn, vm); 35910037SARM gem5 Developers else 36010037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqrdmulhDX>( 36110037SARM gem5 Developers size, machInst, vd, vn, vm); 36210037SARM gem5 Developers } else { 36310037SARM gem5 Developers if (q) 36410037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmulhQX>( 36510037SARM gem5 Developers size, machInst, vd, vn, vm); 36610037SARM gem5 Developers else 36710037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmulhDX>( 36810037SARM gem5 Developers size, machInst, vd, vn, vm); 36910037SARM gem5 Developers } 37010037SARM gem5 Developers case 0x17: 37110037SARM gem5 Developers if (u || size_q == 0x6) 37210037SARM gem5 Developers return new Unknown64(machInst); 37310037SARM gem5 Developers else 37410037SARM gem5 Developers return decodeNeonUThreeXReg<AddpDX, AddpQX>( 37510037SARM gem5 Developers q, size, machInst, vd, vn, vm); 37610037SARM gem5 Developers case 0x18: 37710037SARM gem5 Developers if (sz_q == 0x2) 37810037SARM gem5 Developers return new Unknown64(machInst); 37910037SARM gem5 Developers if (size < 0x2) { 38010037SARM gem5 Developers if (u) 38110037SARM gem5 Developers return decodeNeonUThreeFpReg<FmaxnmpDX, FmaxnmpQX>( 38210037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 38310037SARM gem5 Developers else 38410037SARM gem5 Developers return decodeNeonUThreeFpReg<FmaxnmDX, FmaxnmQX>( 38510037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 38610037SARM gem5 Developers } else { 38710037SARM gem5 Developers if (u) 38810037SARM gem5 Developers return decodeNeonUThreeFpReg<FminnmpDX, FminnmpQX>( 38910037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 39010037SARM gem5 Developers else 39110037SARM gem5 Developers return decodeNeonUThreeFpReg<FminnmDX, FminnmQX>( 39210037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 39310037SARM gem5 Developers } 39410037SARM gem5 Developers case 0x19: 39510037SARM gem5 Developers if (size < 0x2) { 39610037SARM gem5 Developers if (u || sz_q == 0x2) 39710037SARM gem5 Developers return new Unknown64(machInst); 39810037SARM gem5 Developers else 39910037SARM gem5 Developers return decodeNeonUThreeFpReg<FmlaDX, FmlaQX>( 40010037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 40110037SARM gem5 Developers } else { 40210037SARM gem5 Developers if (u || sz_q == 0x2) 40310037SARM gem5 Developers return new Unknown64(machInst); 40410037SARM gem5 Developers else 40510037SARM gem5 Developers return decodeNeonUThreeFpReg<FmlsDX, FmlsQX>( 40610037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 40710037SARM gem5 Developers } 40810037SARM gem5 Developers case 0x1a: 40910037SARM gem5 Developers if (sz_q == 0x2) 41010037SARM gem5 Developers return new Unknown64(machInst); 41110037SARM gem5 Developers if (size < 0x2) { 41210037SARM gem5 Developers if (u) 41310037SARM gem5 Developers return decodeNeonUThreeFpReg<FaddpDX, FaddpQX>( 41410037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 41510037SARM gem5 Developers else 41610037SARM gem5 Developers return decodeNeonUThreeFpReg<FaddDX, FaddQX>( 41710037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 41810037SARM gem5 Developers } else { 41910037SARM gem5 Developers if (u) 42010037SARM gem5 Developers return decodeNeonUThreeFpReg<FabdDX, FabdQX>( 42110037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 42210037SARM gem5 Developers else 42310037SARM gem5 Developers return decodeNeonUThreeFpReg<FsubDX, FsubQX>( 42410037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 42510037SARM gem5 Developers } 42610037SARM gem5 Developers case 0x1b: 42710037SARM gem5 Developers if (size < 0x2 && sz_q != 0x2) { 42810037SARM gem5 Developers if (u) 42910037SARM gem5 Developers return decodeNeonUThreeFpReg<FmulDX, FmulQX>( 43010037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 43110037SARM gem5 Developers else 43210037SARM gem5 Developers return decodeNeonUThreeFpReg<FmulxDX, FmulxQX>( 43310037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 43410037SARM gem5 Developers } else { 43510037SARM gem5 Developers return new Unknown64(machInst); 43610037SARM gem5 Developers } 43710037SARM gem5 Developers case 0x1c: 43810037SARM gem5 Developers if (size < 0x2) { 43910037SARM gem5 Developers if (u) 44010037SARM gem5 Developers return decodeNeonUThreeFpReg<FcmgeDX, FcmgeQX>( 44110037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 44210037SARM gem5 Developers else 44310037SARM gem5 Developers return decodeNeonUThreeFpReg<FcmeqDX, FcmeqQX>( 44410037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 44510037SARM gem5 Developers } else { 44610037SARM gem5 Developers if (u) 44710037SARM gem5 Developers return decodeNeonUThreeFpReg<FcmgtDX, FcmgtQX>( 44810037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 44910037SARM gem5 Developers else 45010037SARM gem5 Developers return new Unknown64(machInst); 45110037SARM gem5 Developers } 45210037SARM gem5 Developers case 0x1d: 45310037SARM gem5 Developers if (size < 0x2) { 45410037SARM gem5 Developers if (u) 45510037SARM gem5 Developers return decodeNeonUThreeFpReg<FacgeDX, FacgeQX>( 45610037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 45710037SARM gem5 Developers else 45810037SARM gem5 Developers return new Unknown64(machInst); 45910037SARM gem5 Developers } else { 46010037SARM gem5 Developers if (u) 46110037SARM gem5 Developers return decodeNeonUThreeFpReg<FacgtDX, FacgtQX>( 46210037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 46310037SARM gem5 Developers else 46410037SARM gem5 Developers return new Unknown64(machInst); 46510037SARM gem5 Developers } 46610037SARM gem5 Developers case 0x1e: 46710037SARM gem5 Developers if (sz_q == 0x2) 46810037SARM gem5 Developers return new Unknown64(machInst); 46910037SARM gem5 Developers if (size < 0x2) { 47010037SARM gem5 Developers if (u) 47110037SARM gem5 Developers return decodeNeonUThreeFpReg<FmaxpDX, FmaxpQX>( 47210037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 47310037SARM gem5 Developers else 47410037SARM gem5 Developers return decodeNeonUThreeFpReg<FmaxDX, FmaxQX>( 47510037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 47610037SARM gem5 Developers } else { 47710037SARM gem5 Developers if (u) 47810037SARM gem5 Developers return decodeNeonUThreeFpReg<FminpDX, FminpQX>( 47910037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 48010037SARM gem5 Developers else 48110037SARM gem5 Developers return decodeNeonUThreeFpReg<FminDX, FminQX>( 48210037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 48310037SARM gem5 Developers } 48410037SARM gem5 Developers case 0x1f: 48510037SARM gem5 Developers if (sz_q == 0x2) 48610037SARM gem5 Developers return new Unknown64(machInst); 48710037SARM gem5 Developers if (size < 0x2) { 48810037SARM gem5 Developers if (u) 48910037SARM gem5 Developers return decodeNeonUThreeFpReg<FdivDX, FdivQX>( 49010037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 49110037SARM gem5 Developers else 49210037SARM gem5 Developers return decodeNeonUThreeFpReg<FrecpsDX, FrecpsQX>( 49310037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 49410037SARM gem5 Developers } else { 49510037SARM gem5 Developers if (u) 49610037SARM gem5 Developers return new Unknown64(machInst); 49710037SARM gem5 Developers else 49810037SARM gem5 Developers return decodeNeonUThreeFpReg<FrsqrtsDX, FrsqrtsQX>( 49910037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, vm); 50010037SARM gem5 Developers } 50110037SARM gem5 Developers default: 50210037SARM gem5 Developers return new Unknown64(machInst); 50310037SARM gem5 Developers } 50410037SARM gem5 Developers } 50510037SARM gem5 Developers 50610037SARM gem5 Developers StaticInstPtr 50710037SARM gem5 Developers decodeNeon3Diff(ExtMachInst machInst) 50810037SARM gem5 Developers { 50910037SARM gem5 Developers uint8_t q = bits(machInst, 30); 51010037SARM gem5 Developers uint8_t u = bits(machInst, 29); 51110037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 51210037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 12); 51310037SARM gem5 Developers 51410037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 51510037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 51610037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 51710037SARM gem5 Developers 51810037SARM gem5 Developers switch (opcode) { 51910037SARM gem5 Developers case 0x0: 52010037SARM gem5 Developers if (size == 0x3) 52110037SARM gem5 Developers return new Unknown64(machInst); 52210037SARM gem5 Developers if (u) 52310037SARM gem5 Developers return decodeNeonUThreeSReg<UaddlX, Uaddl2X>( 52410037SARM gem5 Developers q, size, machInst, vd, vn, vm); 52510037SARM gem5 Developers else 52610037SARM gem5 Developers return decodeNeonSThreeSReg<SaddlX, Saddl2X>( 52710037SARM gem5 Developers q, size, machInst, vd, vn, vm); 52810037SARM gem5 Developers case 0x1: 52910037SARM gem5 Developers if (size == 0x3) 53010037SARM gem5 Developers return new Unknown64(machInst); 53110037SARM gem5 Developers if (u) 53210037SARM gem5 Developers return decodeNeonUThreeSReg<UaddwX, Uaddw2X>( 53310037SARM gem5 Developers q, size, machInst, vd, vn, vm); 53410037SARM gem5 Developers else 53510037SARM gem5 Developers return decodeNeonSThreeSReg<SaddwX, Saddw2X>( 53610037SARM gem5 Developers q, size, machInst, vd, vn, vm); 53710037SARM gem5 Developers case 0x2: 53810037SARM gem5 Developers if (size == 0x3) 53910037SARM gem5 Developers return new Unknown64(machInst); 54010037SARM gem5 Developers if (u) 54110037SARM gem5 Developers return decodeNeonUThreeSReg<UsublX, Usubl2X>( 54210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 54310037SARM gem5 Developers else 54410037SARM gem5 Developers return decodeNeonSThreeSReg<SsublX, Ssubl2X>( 54510037SARM gem5 Developers q, size, machInst, vd, vn, vm); 54610037SARM gem5 Developers case 0x3: 54710037SARM gem5 Developers if (size == 0x3) 54810037SARM gem5 Developers return new Unknown64(machInst); 54910037SARM gem5 Developers if (u) 55010037SARM gem5 Developers return decodeNeonUThreeSReg<UsubwX, Usubw2X>( 55110037SARM gem5 Developers q, size, machInst, vd, vn, vm); 55210037SARM gem5 Developers else 55310037SARM gem5 Developers return decodeNeonSThreeSReg<SsubwX, Ssubw2X>( 55410037SARM gem5 Developers q, size, machInst, vd, vn, vm); 55510037SARM gem5 Developers case 0x4: 55610037SARM gem5 Developers if (size == 0x3) 55710037SARM gem5 Developers return new Unknown64(machInst); 55810037SARM gem5 Developers if (u) 55910037SARM gem5 Developers return decodeNeonUThreeSReg<RaddhnX, Raddhn2X>( 56010037SARM gem5 Developers q, size, machInst, vd, vn, vm); 56110037SARM gem5 Developers else 56210037SARM gem5 Developers return decodeNeonUThreeSReg<AddhnX, Addhn2X>( 56310037SARM gem5 Developers q, size, machInst, vd, vn, vm); 56410037SARM gem5 Developers case 0x5: 56510037SARM gem5 Developers if (size == 0x3) 56610037SARM gem5 Developers return new Unknown64(machInst); 56710037SARM gem5 Developers if (u) 56810037SARM gem5 Developers return decodeNeonUThreeSReg<UabalX, Uabal2X>( 56910037SARM gem5 Developers q, size, machInst, vd, vn, vm); 57010037SARM gem5 Developers else 57110037SARM gem5 Developers return decodeNeonSThreeSReg<SabalX, Sabal2X>( 57210037SARM gem5 Developers q, size, machInst, vd, vn, vm); 57310037SARM gem5 Developers case 0x6: 57410037SARM gem5 Developers if (size == 0x3) 57510037SARM gem5 Developers return new Unknown64(machInst); 57610037SARM gem5 Developers if (u) 57710037SARM gem5 Developers return decodeNeonUThreeSReg<RsubhnX, Rsubhn2X>( 57810037SARM gem5 Developers q, size, machInst, vd, vn, vm); 57910037SARM gem5 Developers else 58010037SARM gem5 Developers return decodeNeonUThreeSReg<SubhnX, Subhn2X>( 58110037SARM gem5 Developers q, size, machInst, vd, vn, vm); 58210037SARM gem5 Developers case 0x7: 58310037SARM gem5 Developers if (size == 0x3) 58410037SARM gem5 Developers return new Unknown64(machInst); 58510037SARM gem5 Developers if (u) 58610037SARM gem5 Developers return decodeNeonUThreeSReg<UabdlX, Uabdl2X>( 58710037SARM gem5 Developers q, size, machInst, vd, vn, vm); 58810037SARM gem5 Developers else 58910037SARM gem5 Developers return decodeNeonSThreeSReg<SabdlX, Sabdl2X>( 59010037SARM gem5 Developers q, size, machInst, vd, vn, vm); 59110037SARM gem5 Developers case 0x8: 59210037SARM gem5 Developers if (size == 0x3) 59310037SARM gem5 Developers return new Unknown64(machInst); 59410037SARM gem5 Developers if (u) 59510037SARM gem5 Developers return decodeNeonUThreeSReg<UmlalX, Umlal2X>( 59610037SARM gem5 Developers q, size, machInst, vd, vn, vm); 59710037SARM gem5 Developers else 59810037SARM gem5 Developers return decodeNeonSThreeSReg<SmlalX, Smlal2X>( 59910037SARM gem5 Developers q, size, machInst, vd, vn, vm); 60010037SARM gem5 Developers case 0x9: 60110037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) { 60210037SARM gem5 Developers return new Unknown64(machInst); 60310037SARM gem5 Developers } else { 60410037SARM gem5 Developers if (q) { 60510037SARM gem5 Developers return decodeNeonSThreeHAndWReg<Sqdmlal2X>( 60610037SARM gem5 Developers size, machInst, vd, vn, vm); 60710037SARM gem5 Developers } else { 60810037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmlalX>( 60910037SARM gem5 Developers size, machInst, vd, vn, vm); 61010037SARM gem5 Developers } 61110037SARM gem5 Developers } 61210037SARM gem5 Developers case 0xa: 61310037SARM gem5 Developers if (size == 0x3) 61410037SARM gem5 Developers return new Unknown64(machInst); 61510037SARM gem5 Developers if (u) 61610037SARM gem5 Developers return decodeNeonUThreeSReg<UmlslX, Umlsl2X>( 61710037SARM gem5 Developers q, size, machInst, vd, vn, vm); 61810037SARM gem5 Developers else 61910037SARM gem5 Developers return decodeNeonSThreeSReg<SmlslX, Smlsl2X>( 62010037SARM gem5 Developers q, size, machInst, vd, vn, vm); 62110037SARM gem5 Developers case 0xb: 62210037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) { 62310037SARM gem5 Developers return new Unknown64(machInst); 62410037SARM gem5 Developers } else { 62510037SARM gem5 Developers if (q) { 62610037SARM gem5 Developers return decodeNeonSThreeHAndWReg<Sqdmlsl2X>( 62710037SARM gem5 Developers size, machInst, vd, vn, vm); 62810037SARM gem5 Developers } else { 62910037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmlslX>( 63010037SARM gem5 Developers size, machInst, vd, vn, vm); 63110037SARM gem5 Developers } 63210037SARM gem5 Developers } 63310037SARM gem5 Developers case 0xc: 63410037SARM gem5 Developers if (size == 0x3) 63510037SARM gem5 Developers return new Unknown64(machInst); 63610037SARM gem5 Developers if (u) 63710037SARM gem5 Developers return decodeNeonUThreeSReg<UmullX, Umull2X>( 63810037SARM gem5 Developers q, size, machInst, vd, vn, vm); 63910037SARM gem5 Developers else 64010037SARM gem5 Developers return decodeNeonSThreeSReg<SmullX, Smull2X>( 64110037SARM gem5 Developers q, size, machInst, vd, vn, vm); 64210037SARM gem5 Developers case 0xd: 64310037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) { 64410037SARM gem5 Developers return new Unknown64(machInst); 64510037SARM gem5 Developers } else { 64610037SARM gem5 Developers if (q) { 64710037SARM gem5 Developers return decodeNeonSThreeHAndWReg<Sqdmull2X>( 64810037SARM gem5 Developers size, machInst, vd, vn, vm); 64910037SARM gem5 Developers } else { 65010037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmullX>( 65110037SARM gem5 Developers size, machInst, vd, vn, vm); 65210037SARM gem5 Developers } 65310037SARM gem5 Developers } 65410037SARM gem5 Developers case 0xe: 65510037SARM gem5 Developers if (u || size != 0) { 65610037SARM gem5 Developers return new Unknown64(machInst); 65710037SARM gem5 Developers } else { 65810037SARM gem5 Developers if (q) 65910037SARM gem5 Developers return new Pmull2X<uint8_t>(machInst, vd, vn, vm); 66010037SARM gem5 Developers else 66110037SARM gem5 Developers return new PmullX<uint8_t>(machInst, vd, vn, vm); 66210037SARM gem5 Developers } 66310037SARM gem5 Developers default: 66410037SARM gem5 Developers return new Unknown64(machInst); 66510037SARM gem5 Developers } 66610037SARM gem5 Developers } 66710037SARM gem5 Developers 66810037SARM gem5 Developers StaticInstPtr 66910037SARM gem5 Developers decodeNeon2RegMisc(ExtMachInst machInst) 67010037SARM gem5 Developers { 67110037SARM gem5 Developers uint8_t q = bits(machInst, 30); 67210037SARM gem5 Developers uint8_t u = bits(machInst, 29); 67310037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 67410037SARM gem5 Developers uint8_t opcode = bits(machInst, 16, 12); 67510037SARM gem5 Developers 67610037SARM gem5 Developers IntRegIndex vd = (IntRegIndex)(uint8_t)bits(machInst, 4, 0); 67710037SARM gem5 Developers IntRegIndex vn = (IntRegIndex)(uint8_t)bits(machInst, 9, 5); 67810037SARM gem5 Developers 67910037SARM gem5 Developers uint8_t size_q = (size << 1) | q; 68010037SARM gem5 Developers uint8_t sz_q = size_q & 0x3; 68110037SARM gem5 Developers uint8_t op = (uint8_t)((bits(machInst, 12) << 1) | 68210037SARM gem5 Developers bits(machInst, 29)); 68310037SARM gem5 Developers uint8_t switchVal = opcode | ((u ? 1 : 0) << 5); 68410037SARM gem5 Developers 68510037SARM gem5 Developers switch (switchVal) { 68610037SARM gem5 Developers case 0x00: 68710037SARM gem5 Developers if (op + size >= 3) 68810037SARM gem5 Developers return new Unknown64(machInst); 68910037SARM gem5 Developers return decodeNeonUTwoMiscSReg<Rev64DX, Rev64QX>( 69010037SARM gem5 Developers q, size, machInst, vd, vn); 69110037SARM gem5 Developers case 0x01: 69210037SARM gem5 Developers if (op + size >= 3) 69310037SARM gem5 Developers return new Unknown64(machInst); 69410037SARM gem5 Developers if (q) 69510037SARM gem5 Developers return new Rev16QX<uint8_t>(machInst, vd, vn); 69610037SARM gem5 Developers else 69710037SARM gem5 Developers return new Rev16DX<uint8_t>(machInst, vd, vn); 69810037SARM gem5 Developers case 0x02: 69910037SARM gem5 Developers if (size == 0x3) 70010037SARM gem5 Developers return new Unknown64(machInst); 70110037SARM gem5 Developers return decodeNeonSTwoMiscSReg<SaddlpDX, SaddlpQX>( 70210037SARM gem5 Developers q, size, machInst, vd, vn); 70310037SARM gem5 Developers case 0x03: 70410037SARM gem5 Developers if (size_q == 0x6) 70510037SARM gem5 Developers return new Unknown64(machInst); 70610037SARM gem5 Developers return decodeNeonUTwoMiscXReg<SuqaddDX, SuqaddQX>( 70710037SARM gem5 Developers q, size, machInst, vd, vn); 70810037SARM gem5 Developers case 0x04: 70910037SARM gem5 Developers if (size == 0x3) 71010037SARM gem5 Developers return new Unknown64(machInst); 71110037SARM gem5 Developers return decodeNeonSTwoMiscSReg<ClsDX, ClsQX>( 71210037SARM gem5 Developers q, size, machInst, vd, vn); 71310037SARM gem5 Developers case 0x05: 71410037SARM gem5 Developers if (size != 0x0) 71510037SARM gem5 Developers return new Unknown64(machInst); 71610037SARM gem5 Developers if (q) 71710037SARM gem5 Developers return new CntQX<uint8_t>(machInst, vd, vn); 71810037SARM gem5 Developers else 71910037SARM gem5 Developers return new CntDX<uint8_t>(machInst, vd, vn); 72010037SARM gem5 Developers case 0x06: 72110037SARM gem5 Developers if (size == 0x3) 72210037SARM gem5 Developers return new Unknown64(machInst); 72310037SARM gem5 Developers return decodeNeonSTwoMiscSReg<SadalpDX, SadalpQX>( 72410037SARM gem5 Developers q, size, machInst, vd, vn); 72510037SARM gem5 Developers case 0x07: 72610037SARM gem5 Developers if (size_q == 0x6) 72710037SARM gem5 Developers return new Unknown64(machInst); 72810037SARM gem5 Developers return decodeNeonSTwoMiscXReg<SqabsDX, SqabsQX>( 72910037SARM gem5 Developers q, size, machInst, vd, vn); 73010037SARM gem5 Developers case 0x08: 73110037SARM gem5 Developers if (size_q == 0x6) 73210037SARM gem5 Developers return new Unknown64(machInst); 73310037SARM gem5 Developers return decodeNeonSTwoMiscXReg<CmgtZeroDX, CmgtZeroQX>( 73410037SARM gem5 Developers q, size, machInst, vd, vn); 73510037SARM gem5 Developers case 0x09: 73610037SARM gem5 Developers if (size_q == 0x6) 73710037SARM gem5 Developers return new Unknown64(machInst); 73810037SARM gem5 Developers return decodeNeonSTwoMiscXReg<CmeqZeroDX, CmeqZeroQX>( 73910037SARM gem5 Developers q, size, machInst, vd, vn); 74010037SARM gem5 Developers case 0x0a: 74110037SARM gem5 Developers if (size_q == 0x6) 74210037SARM gem5 Developers return new Unknown64(machInst); 74310037SARM gem5 Developers return decodeNeonSTwoMiscXReg<CmltZeroDX, CmltZeroQX>( 74410037SARM gem5 Developers q, size, machInst, vd, vn); 74510037SARM gem5 Developers case 0x0b: 74610037SARM gem5 Developers if (size_q == 0x6) 74710037SARM gem5 Developers return new Unknown64(machInst); 74810037SARM gem5 Developers return decodeNeonSTwoMiscXReg<AbsDX, AbsQX>( 74910037SARM gem5 Developers q, size, machInst, vd, vn); 75010037SARM gem5 Developers case 0x0c: 75110037SARM gem5 Developers if (size < 0x2 || sz_q == 0x2) 75210037SARM gem5 Developers return new Unknown64(machInst); 75310037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcmgtZeroDX, FcmgtZeroQX>( 75410037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 75510037SARM gem5 Developers case 0x0d: 75610037SARM gem5 Developers if (size < 0x2 || sz_q == 0x2) 75710037SARM gem5 Developers return new Unknown64(machInst); 75810037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcmeqZeroDX, FcmeqZeroQX>( 75910037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 76010037SARM gem5 Developers case 0x0e: 76110037SARM gem5 Developers if (size < 0x2 || sz_q == 0x2) 76210037SARM gem5 Developers return new Unknown64(machInst); 76310037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcmltZeroDX, FcmltZeroQX>( 76410037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 76510037SARM gem5 Developers case 0x0f: 76610037SARM gem5 Developers if (size < 0x2 || sz_q == 0x2) 76710037SARM gem5 Developers return new Unknown64(machInst); 76810037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FabsDX, FabsQX>( 76910037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 77010037SARM gem5 Developers case 0x12: 77110037SARM gem5 Developers if (size == 0x3) 77210037SARM gem5 Developers return new Unknown64(machInst); 77310037SARM gem5 Developers return decodeNeonUTwoMiscSReg<XtnX, Xtn2X>( 77410037SARM gem5 Developers q, size, machInst, vd, vn); 77510037SARM gem5 Developers case 0x14: 77610037SARM gem5 Developers if (size == 0x3) 77710037SARM gem5 Developers return new Unknown64(machInst); 77810037SARM gem5 Developers return decodeNeonSTwoMiscSReg<SqxtnX, Sqxtn2X>( 77910037SARM gem5 Developers q, size, machInst, vd, vn); 78010037SARM gem5 Developers case 0x16: 78110037SARM gem5 Developers if (size > 0x1) 78210037SARM gem5 Developers return new Unknown64(machInst); 78310037SARM gem5 Developers if (q) { 78410037SARM gem5 Developers if (size) 78510037SARM gem5 Developers return new Fcvtn2X<uint32_t>(machInst, vd, vn); 78610037SARM gem5 Developers else 78710037SARM gem5 Developers return new Fcvtn2X<uint16_t>(machInst, vd, vn); 78810037SARM gem5 Developers } else { 78910037SARM gem5 Developers if (size) 79010037SARM gem5 Developers return new FcvtnX<uint32_t>(machInst, vd, vn); 79110037SARM gem5 Developers else 79210037SARM gem5 Developers return new FcvtnX<uint16_t>(machInst, vd, vn); 79310037SARM gem5 Developers } 79410037SARM gem5 Developers case 0x17: 79510037SARM gem5 Developers if (size > 0x1) 79610037SARM gem5 Developers return new Unknown64(machInst); 79710037SARM gem5 Developers if (q) { 79810037SARM gem5 Developers if (size) 79910037SARM gem5 Developers return new Fcvtl2X<uint32_t>(machInst, vd, vn); 80010037SARM gem5 Developers else 80110037SARM gem5 Developers return new Fcvtl2X<uint16_t>(machInst, vd, vn); 80210037SARM gem5 Developers } else { 80310037SARM gem5 Developers if (size) 80410037SARM gem5 Developers return new FcvtlX<uint32_t>(machInst, vd, vn); 80510037SARM gem5 Developers else 80610037SARM gem5 Developers return new FcvtlX<uint16_t>(machInst, vd, vn); 80710037SARM gem5 Developers } 80810037SARM gem5 Developers case 0x18: 80910037SARM gem5 Developers if (sz_q == 0x2) 81010037SARM gem5 Developers return new Unknown64(machInst); 81110037SARM gem5 Developers if (size < 0x2) 81210037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrintnDX, FrintnQX>( 81310037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 81410037SARM gem5 Developers else 81510037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrintpDX, FrintpQX>( 81610037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 81710037SARM gem5 Developers case 0x19: 81810037SARM gem5 Developers if (sz_q == 0x2) 81910037SARM gem5 Developers return new Unknown64(machInst); 82010037SARM gem5 Developers if (size < 0x2) 82110037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrintmDX, FrintmQX>( 82210037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 82310037SARM gem5 Developers else 82410037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrintzDX, FrintzQX>( 82510037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 82610037SARM gem5 Developers case 0x1a: 82710037SARM gem5 Developers if (sz_q == 0x2) 82810037SARM gem5 Developers return new Unknown64(machInst); 82910037SARM gem5 Developers if (size < 0x2) 83010037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtnsDX, FcvtnsQX>( 83110037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 83210037SARM gem5 Developers else 83310037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtpsDX, FcvtpsQX>( 83410037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 83510037SARM gem5 Developers case 0x1b: 83610037SARM gem5 Developers if (sz_q == 0x2) 83710037SARM gem5 Developers return new Unknown64(machInst); 83810037SARM gem5 Developers if (size < 0x2) 83910037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtmsDX, FcvtmsQX>( 84010037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 84110037SARM gem5 Developers else 84210037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtzsIntDX, FcvtzsIntQX>( 84310037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 84410037SARM gem5 Developers case 0x1c: 84510037SARM gem5 Developers if (size < 0x2) { 84610037SARM gem5 Developers if (sz_q == 0x2) 84710037SARM gem5 Developers return new Unknown64(machInst); 84810037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtasDX, FcvtasQX>( 84910037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 85010037SARM gem5 Developers } else { 85110037SARM gem5 Developers if (size & 0x1) 85210037SARM gem5 Developers return new Unknown64(machInst); 85310037SARM gem5 Developers if (q) 85410037SARM gem5 Developers return new UrecpeQX<uint32_t>(machInst, vd, vn); 85510037SARM gem5 Developers else 85610037SARM gem5 Developers return new UrecpeDX<uint32_t>(machInst, vd, vn); 85710037SARM gem5 Developers } 85810037SARM gem5 Developers case 0x1d: 85910037SARM gem5 Developers if (sz_q == 0x2) 86010037SARM gem5 Developers return new Unknown64(machInst); 86110037SARM gem5 Developers if (size < 0x2) { 86210037SARM gem5 Developers if (q) { 86310037SARM gem5 Developers if (size & 0x1) 86410037SARM gem5 Developers return new ScvtfIntDQX<uint64_t>(machInst, vd, vn); 86510037SARM gem5 Developers else 86610037SARM gem5 Developers return new ScvtfIntSQX<uint32_t>(machInst, vd, vn); 86710037SARM gem5 Developers } else { 86810037SARM gem5 Developers if (size & 0x1) 86910037SARM gem5 Developers return new Unknown(machInst); 87010037SARM gem5 Developers else 87110037SARM gem5 Developers return new ScvtfIntDX<uint32_t>(machInst, vd, vn); 87210037SARM gem5 Developers } 87310037SARM gem5 Developers } else { 87410037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrecpeDX, FrecpeQX>( 87510037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 87610037SARM gem5 Developers } 87710037SARM gem5 Developers case 0x20: 87810037SARM gem5 Developers if (op + size >= 3) 87910037SARM gem5 Developers return new Unknown64(machInst); 88010037SARM gem5 Developers if (q) { 88110037SARM gem5 Developers if (size & 0x1) 88210037SARM gem5 Developers return new Rev32QX<uint16_t>(machInst, vd, vn); 88310037SARM gem5 Developers else 88410037SARM gem5 Developers return new Rev32QX<uint8_t>(machInst, vd, vn); 88510037SARM gem5 Developers } else { 88610037SARM gem5 Developers if (size & 0x1) 88710037SARM gem5 Developers return new Rev32DX<uint16_t>(machInst, vd, vn); 88810037SARM gem5 Developers else 88910037SARM gem5 Developers return new Rev32DX<uint8_t>(machInst, vd, vn); 89010037SARM gem5 Developers } 89110037SARM gem5 Developers case 0x22: 89210037SARM gem5 Developers if (size == 0x3) 89310037SARM gem5 Developers return new Unknown64(machInst); 89410037SARM gem5 Developers return decodeNeonUTwoMiscSReg<UaddlpDX, UaddlpQX>( 89510037SARM gem5 Developers q, size, machInst, vd, vn); 89610037SARM gem5 Developers case 0x23: 89710037SARM gem5 Developers if (size_q == 0x6) 89810037SARM gem5 Developers return new Unknown64(machInst); 89910037SARM gem5 Developers return decodeNeonUTwoMiscXReg<UsqaddDX, UsqaddQX>( 90010037SARM gem5 Developers q, size, machInst, vd, vn); 90110037SARM gem5 Developers return new Unknown64(machInst); 90210037SARM gem5 Developers case 0x24: 90310037SARM gem5 Developers if (size == 0x3) 90410037SARM gem5 Developers return new Unknown64(machInst); 90510037SARM gem5 Developers return decodeNeonSTwoMiscSReg<ClzDX, ClzQX>( 90610037SARM gem5 Developers q, size, machInst, vd, vn); 90710037SARM gem5 Developers case 0x25: 90810037SARM gem5 Developers if (size == 0x0) { 90910037SARM gem5 Developers if (q) 91010037SARM gem5 Developers return new MvnQX<uint64_t>(machInst, vd, vn); 91110037SARM gem5 Developers else 91210037SARM gem5 Developers return new MvnDX<uint64_t>(machInst, vd, vn); 91310037SARM gem5 Developers } else if (size == 0x1) { 91410037SARM gem5 Developers if (q) 91510037SARM gem5 Developers return new RbitQX<uint8_t>(machInst, vd, vn); 91610037SARM gem5 Developers else 91710037SARM gem5 Developers return new RbitDX<uint8_t>(machInst, vd, vn); 91810037SARM gem5 Developers } else { 91910037SARM gem5 Developers return new Unknown64(machInst); 92010037SARM gem5 Developers } 92110037SARM gem5 Developers case 0x26: 92210037SARM gem5 Developers if (size == 0x3) 92310037SARM gem5 Developers return new Unknown64(machInst); 92410037SARM gem5 Developers return decodeNeonUTwoMiscSReg<UadalpDX, UadalpQX>( 92510037SARM gem5 Developers q, size, machInst, vd, vn); 92610037SARM gem5 Developers case 0x27: 92710037SARM gem5 Developers if (size_q == 0x6) 92810037SARM gem5 Developers return new Unknown64(machInst); 92910037SARM gem5 Developers return decodeNeonSTwoMiscXReg<SqnegDX, SqnegQX>( 93010037SARM gem5 Developers q, size, machInst, vd, vn); 93110037SARM gem5 Developers case 0x28: 93210037SARM gem5 Developers if (size_q == 0x6) 93310037SARM gem5 Developers return new Unknown64(machInst); 93410037SARM gem5 Developers return decodeNeonSTwoMiscXReg<CmgeZeroDX, CmgeZeroQX>( 93510037SARM gem5 Developers q, size, machInst, vd, vn); 93610037SARM gem5 Developers case 0x29: 93710037SARM gem5 Developers if (size_q == 0x6) 93810037SARM gem5 Developers return new Unknown64(machInst); 93910037SARM gem5 Developers return decodeNeonSTwoMiscXReg<CmleZeroDX, CmleZeroQX>( 94010037SARM gem5 Developers q, size, machInst, vd, vn); 94110037SARM gem5 Developers case 0x2b: 94210037SARM gem5 Developers if (size_q == 0x6) 94310037SARM gem5 Developers return new Unknown64(machInst); 94410037SARM gem5 Developers return decodeNeonSTwoMiscXReg<NegDX, NegQX>( 94510037SARM gem5 Developers q, size, machInst, vd, vn); 94610037SARM gem5 Developers case 0x2c: 94710037SARM gem5 Developers if (size < 0x2 || sz_q == 0x2) 94810037SARM gem5 Developers return new Unknown64(machInst); 94910037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcmgeZeroDX, FcmgeZeroQX>( 95010037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 95110037SARM gem5 Developers case 0x2d: 95210037SARM gem5 Developers if (size < 0x2 || sz_q == 0x2) 95310037SARM gem5 Developers return new Unknown64(machInst); 95410037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcmleZeroDX, FcmleZeroQX>( 95510037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 95610037SARM gem5 Developers case 0x2f: 95710037SARM gem5 Developers if (size < 0x2 || size_q == 0x6) 95810037SARM gem5 Developers return new Unknown64(machInst); 95910037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FnegDX, FnegQX>( 96010037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 96110037SARM gem5 Developers case 0x32: 96210037SARM gem5 Developers if (size == 0x3) 96310037SARM gem5 Developers return new Unknown64(machInst); 96410037SARM gem5 Developers return decodeNeonSTwoMiscSReg<SqxtunX, Sqxtun2X>( 96510037SARM gem5 Developers q, size, machInst, vd, vn); 96610037SARM gem5 Developers case 0x33: 96710037SARM gem5 Developers if (size == 0x3) 96810037SARM gem5 Developers return new Unknown64(machInst); 96910037SARM gem5 Developers return decodeNeonUTwoMiscSReg<ShllX, Shll2X>( 97010037SARM gem5 Developers q, size, machInst, vd, vn); 97110037SARM gem5 Developers case 0x34: 97210037SARM gem5 Developers if (size == 0x3) 97310037SARM gem5 Developers return new Unknown64(machInst); 97410037SARM gem5 Developers return decodeNeonUTwoMiscSReg<UqxtnX, Uqxtn2X>( 97510037SARM gem5 Developers q, size, machInst, vd, vn); 97610037SARM gem5 Developers case 0x36: 97710037SARM gem5 Developers if (size != 0x1) 97810037SARM gem5 Developers return new Unknown64(machInst); 97910037SARM gem5 Developers if (q) 98010037SARM gem5 Developers return new Fcvtxn2X<uint32_t>(machInst, vd, vn); 98110037SARM gem5 Developers else 98210037SARM gem5 Developers return new FcvtxnX<uint32_t>(machInst, vd, vn); 98310037SARM gem5 Developers case 0x38: 98410037SARM gem5 Developers if (size > 0x1 || sz_q == 0x2) 98510037SARM gem5 Developers return new Unknown64(machInst); 98610037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrintaDX, FrintaQX>( 98710037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 98810037SARM gem5 Developers case 0x39: 98910037SARM gem5 Developers if (sz_q == 0x2) 99010037SARM gem5 Developers return new Unknown64(machInst); 99110037SARM gem5 Developers if (size < 0x2) 99210037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrintxDX, FrintxQX>( 99310037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 99410037SARM gem5 Developers else 99510037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrintiDX, FrintiQX>( 99610037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 99710037SARM gem5 Developers case 0x3a: 99810037SARM gem5 Developers if (sz_q == 0x2) 99910037SARM gem5 Developers return new Unknown64(machInst); 100010037SARM gem5 Developers if (size < 0x2) 100110037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtnuDX, FcvtnuQX>( 100210037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 100310037SARM gem5 Developers else 100410037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtpuDX, FcvtpuQX>( 100510037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 100610037SARM gem5 Developers case 0x3b: 100710037SARM gem5 Developers if (sz_q == 0x2) 100810037SARM gem5 Developers return new Unknown64(machInst); 100910037SARM gem5 Developers if (size < 0x2) 101010037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtmuDX, FcvtmuQX>( 101110037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 101210037SARM gem5 Developers else 101310037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtzuIntDX, FcvtzuIntQX>( 101410037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 101510037SARM gem5 Developers case 0x3c: 101610037SARM gem5 Developers if (size < 0x2) { 101710037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FcvtauDX, FcvtauQX>( 101810037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 101910037SARM gem5 Developers } else if (size == 0x2) { 102010037SARM gem5 Developers if (q) 102110037SARM gem5 Developers return new UrsqrteQX<uint32_t>(machInst, vd, vn); 102210037SARM gem5 Developers else 102310037SARM gem5 Developers return new UrsqrteDX<uint32_t>(machInst, vd, vn); 102410037SARM gem5 Developers } else { 102510037SARM gem5 Developers return new Unknown64(machInst); 102610037SARM gem5 Developers } 102710037SARM gem5 Developers case 0x3d: 102810037SARM gem5 Developers if (sz_q == 0x2) 102910037SARM gem5 Developers return new Unknown64(machInst); 103010037SARM gem5 Developers if (size < 0x2) 103110037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<UcvtfIntDX, UcvtfIntQX>( 103210037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 103310037SARM gem5 Developers else 103410037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FrsqrteDX, FrsqrteQX>( 103510037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 103610037SARM gem5 Developers case 0x3f: 103710037SARM gem5 Developers if (size < 0x2 || sz_q == 0x2) 103810037SARM gem5 Developers return new Unknown64(machInst); 103910037SARM gem5 Developers return decodeNeonUTwoMiscFpReg<FsqrtDX, FsqrtQX>( 104010037SARM gem5 Developers q, size & 0x1, machInst, vd, vn); 104110037SARM gem5 Developers default: 104210037SARM gem5 Developers return new Unknown64(machInst); 104310037SARM gem5 Developers } 104410037SARM gem5 Developers } 104510037SARM gem5 Developers 104610037SARM gem5 Developers StaticInstPtr 104710037SARM gem5 Developers decodeNeonAcrossLanes(ExtMachInst machInst) 104810037SARM gem5 Developers { 104910037SARM gem5 Developers uint8_t q = bits(machInst, 30); 105010037SARM gem5 Developers uint8_t u = bits(machInst, 29); 105110037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 105210037SARM gem5 Developers uint8_t opcode = bits(machInst, 16, 12); 105310037SARM gem5 Developers 105410037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 105510037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 105610037SARM gem5 Developers 105710037SARM gem5 Developers uint8_t size_q = (size << 1) | q; 105810037SARM gem5 Developers uint8_t sz_q = size_q & 0x3; 105910037SARM gem5 Developers uint8_t switchVal = opcode | ((u ? 1 : 0) << 5); 106010037SARM gem5 Developers 106110037SARM gem5 Developers switch (switchVal) { 106210037SARM gem5 Developers case 0x03: 106310037SARM gem5 Developers if (size_q == 0x4 || size == 0x3) 106410037SARM gem5 Developers return new Unknown64(machInst); 106510037SARM gem5 Developers return decodeNeonSAcrossLanesLongReg<SaddlvDX, SaddlvQX, 106610037SARM gem5 Developers SaddlvBQX>( 106710037SARM gem5 Developers q, size, machInst, vd, vn); 106810037SARM gem5 Developers case 0x0a: 106910037SARM gem5 Developers if (size_q == 0x4 || size == 0x3) 107010037SARM gem5 Developers return new Unknown64(machInst); 107110037SARM gem5 Developers return decodeNeonSAcrossLanesReg<SmaxvDX, SmaxvQX>( 107210037SARM gem5 Developers q, size, machInst, vd, vn); 107310037SARM gem5 Developers case 0x1a: 107410037SARM gem5 Developers if (size_q == 0x4 || size == 0x3) 107510037SARM gem5 Developers return new Unknown64(machInst); 107610037SARM gem5 Developers return decodeNeonSAcrossLanesReg<SminvDX, SminvQX>( 107710037SARM gem5 Developers q, size, machInst, vd, vn); 107810037SARM gem5 Developers case 0x1b: 107910037SARM gem5 Developers if (size_q == 0x4 || size == 0x3) 108010037SARM gem5 Developers return new Unknown64(machInst); 108110037SARM gem5 Developers return decodeNeonUAcrossLanesReg<AddvDX, AddvQX>( 108210037SARM gem5 Developers q, size, machInst, vd, vn); 108310037SARM gem5 Developers case 0x23: 108410037SARM gem5 Developers if (size_q == 0x4 || size == 0x3) 108510037SARM gem5 Developers return new Unknown64(machInst); 108610037SARM gem5 Developers return decodeNeonUAcrossLanesLongReg<UaddlvDX, UaddlvQX, 108710037SARM gem5 Developers UaddlvBQX>( 108810037SARM gem5 Developers q, size, machInst, vd, vn); 108910037SARM gem5 Developers case 0x2a: 109010037SARM gem5 Developers if (size_q == 0x4 || size == 0x3) 109110037SARM gem5 Developers return new Unknown64(machInst); 109210037SARM gem5 Developers return decodeNeonUAcrossLanesReg<UmaxvDX, UmaxvQX>( 109310037SARM gem5 Developers q, size, machInst, vd, vn); 109410037SARM gem5 Developers case 0x2c: 109510037SARM gem5 Developers if (sz_q != 0x1) 109610037SARM gem5 Developers return new Unknown64(machInst); 109710037SARM gem5 Developers if (size < 0x2) { 109810037SARM gem5 Developers if (q) 109910037SARM gem5 Developers return new FmaxnmvQX<uint32_t>(machInst, vd, vn); 110010037SARM gem5 Developers else 110110037SARM gem5 Developers return new Unknown64(machInst); 110210037SARM gem5 Developers } else { 110310037SARM gem5 Developers if (q) 110410037SARM gem5 Developers return new FminnmvQX<uint32_t>(machInst, vd, vn); 110510037SARM gem5 Developers else 110610037SARM gem5 Developers return new Unknown64(machInst); 110710037SARM gem5 Developers } 110810037SARM gem5 Developers case 0x2f: 110910037SARM gem5 Developers if (sz_q != 0x1) 111010037SARM gem5 Developers return new Unknown64(machInst); 111110037SARM gem5 Developers if (size < 0x2) { 111210037SARM gem5 Developers if (q) 111310037SARM gem5 Developers return new FmaxvQX<uint32_t>(machInst, vd, vn); 111410037SARM gem5 Developers else 111510037SARM gem5 Developers return new Unknown64(machInst); 111610037SARM gem5 Developers } else { 111710037SARM gem5 Developers if (q) 111810037SARM gem5 Developers return new FminvQX<uint32_t>(machInst, vd, vn); 111910037SARM gem5 Developers else 112010037SARM gem5 Developers return new Unknown64(machInst); 112110037SARM gem5 Developers } 112210037SARM gem5 Developers case 0x3a: 112310037SARM gem5 Developers if (size_q == 0x4 || size == 0x3) 112410037SARM gem5 Developers return new Unknown64(machInst); 112510037SARM gem5 Developers return decodeNeonUAcrossLanesReg<UminvDX, UminvQX>( 112610037SARM gem5 Developers q, size, machInst, vd, vn); 112710037SARM gem5 Developers default: 112810037SARM gem5 Developers return new Unknown64(machInst); 112910037SARM gem5 Developers } 113010037SARM gem5 Developers } 113110037SARM gem5 Developers 113210037SARM gem5 Developers StaticInstPtr 113310037SARM gem5 Developers decodeNeonCopy(ExtMachInst machInst) 113410037SARM gem5 Developers { 113510037SARM gem5 Developers uint8_t q = bits(machInst, 30); 113610037SARM gem5 Developers uint8_t op = bits(machInst, 29); 113710037SARM gem5 Developers uint8_t imm5 = bits(machInst, 20, 16); 113810037SARM gem5 Developers uint8_t imm4 = bits(machInst, 14, 11); 113910037SARM gem5 Developers 114010037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 114110037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 114210037SARM gem5 Developers 114310037SARM gem5 Developers uint8_t imm5_pos = findLsbSet(imm5); 114410037SARM gem5 Developers uint8_t index1 = 0, index2 = 0; 114510037SARM gem5 Developers 114610037SARM gem5 Developers if (op) { 114710037SARM gem5 Developers if (!q || (imm4 & mask(imm5_pos))) 114810037SARM gem5 Developers return new Unknown64(machInst); 114910037SARM gem5 Developers 115010037SARM gem5 Developers index1 = bits(imm5, 4, imm5_pos + 1); // dst 115110037SARM gem5 Developers index2 = bits(imm4, 3, imm5_pos); // src 115210037SARM gem5 Developers 115310037SARM gem5 Developers switch (imm5_pos) { 115410037SARM gem5 Developers case 0: 115510037SARM gem5 Developers return new InsElemX<uint8_t>(machInst, vd, vn, index1, index2); 115610037SARM gem5 Developers case 1: 115710037SARM gem5 Developers return new InsElemX<uint16_t>(machInst, vd, vn, index1, index2); 115810037SARM gem5 Developers case 2: 115910037SARM gem5 Developers return new InsElemX<uint32_t>(machInst, vd, vn, index1, index2); 116010037SARM gem5 Developers case 3: 116110037SARM gem5 Developers return new InsElemX<uint64_t>(machInst, vd, vn, index1, index2); 116210037SARM gem5 Developers default: 116310037SARM gem5 Developers return new Unknown64(machInst); 116410037SARM gem5 Developers } 116510037SARM gem5 Developers } 116610037SARM gem5 Developers 116710037SARM gem5 Developers switch (imm4) { 116810037SARM gem5 Developers case 0x0: 116910037SARM gem5 Developers index1 = bits(imm5, 4, imm5_pos + 1); 117010037SARM gem5 Developers switch (imm5_pos) { 117110037SARM gem5 Developers case 0: 117210037SARM gem5 Developers if (q) 117310037SARM gem5 Developers return new DupElemQX<uint8_t>(machInst, vd, vn, index1); 117410037SARM gem5 Developers else 117510037SARM gem5 Developers return new DupElemDX<uint8_t>(machInst, vd, vn, index1); 117610037SARM gem5 Developers case 1: 117710037SARM gem5 Developers if (q) 117810037SARM gem5 Developers return new DupElemQX<uint16_t>(machInst, vd, vn, index1); 117910037SARM gem5 Developers else 118010037SARM gem5 Developers return new DupElemDX<uint16_t>(machInst, vd, vn, index1); 118110037SARM gem5 Developers case 2: 118210037SARM gem5 Developers if (q) 118310037SARM gem5 Developers return new DupElemQX<uint32_t>(machInst, vd, vn, index1); 118410037SARM gem5 Developers else 118510037SARM gem5 Developers return new DupElemDX<uint32_t>(machInst, vd, vn, index1); 118610037SARM gem5 Developers case 3: 118710037SARM gem5 Developers if (q) 118810037SARM gem5 Developers return new DupElemQX<uint64_t>(machInst, vd, vn, index1); 118910037SARM gem5 Developers else 119010037SARM gem5 Developers return new Unknown64(machInst); 119110037SARM gem5 Developers default: 119210037SARM gem5 Developers return new Unknown64(machInst); 119310037SARM gem5 Developers } 119410037SARM gem5 Developers case 0x1: 119510037SARM gem5 Developers switch (imm5) { 119610037SARM gem5 Developers case 0x1: 119710037SARM gem5 Developers if (q) 119810037SARM gem5 Developers return new DupGprWQX<uint8_t>(machInst, vd, vn); 119910037SARM gem5 Developers else 120010037SARM gem5 Developers return new DupGprWDX<uint8_t>(machInst, vd, vn); 120110037SARM gem5 Developers case 0x2: 120210037SARM gem5 Developers if (q) 120310037SARM gem5 Developers return new DupGprWQX<uint16_t>(machInst, vd, vn); 120410037SARM gem5 Developers else 120510037SARM gem5 Developers return new DupGprWDX<uint16_t>(machInst, vd, vn); 120610037SARM gem5 Developers case 0x4: 120710037SARM gem5 Developers if (q) 120810037SARM gem5 Developers return new DupGprWQX<uint32_t>(machInst, vd, vn); 120910037SARM gem5 Developers else 121010037SARM gem5 Developers return new DupGprWDX<uint32_t>(machInst, vd, vn); 121110037SARM gem5 Developers case 0x8: 121210037SARM gem5 Developers if (q) 121310037SARM gem5 Developers return new DupGprXQX<uint64_t>(machInst, vd, vn); 121410037SARM gem5 Developers else 121510037SARM gem5 Developers return new Unknown64(machInst); 121612595Ssiddhesh.poyarekar@gmail.com default: 121712595Ssiddhesh.poyarekar@gmail.com return new Unknown64(machInst); 121810037SARM gem5 Developers } 121910037SARM gem5 Developers case 0x3: 122010037SARM gem5 Developers index1 = imm5 >> (imm5_pos + 1); 122110037SARM gem5 Developers switch (imm5_pos) { 122210037SARM gem5 Developers case 0: 122310037SARM gem5 Developers return new InsGprWX<uint8_t>(machInst, vd, vn, index1); 122410037SARM gem5 Developers case 1: 122510037SARM gem5 Developers return new InsGprWX<uint16_t>(machInst, vd, vn, index1); 122610037SARM gem5 Developers case 2: 122710037SARM gem5 Developers return new InsGprWX<uint32_t>(machInst, vd, vn, index1); 122810037SARM gem5 Developers case 3: 122910037SARM gem5 Developers return new InsGprXX<uint64_t>(machInst, vd, vn, index1); 123010037SARM gem5 Developers default: 123110037SARM gem5 Developers return new Unknown64(machInst); 123210037SARM gem5 Developers } 123310037SARM gem5 Developers case 0x5: 123410037SARM gem5 Developers index1 = bits(imm5, 4, imm5_pos + 1); 123510037SARM gem5 Developers switch (imm5_pos) { 123610037SARM gem5 Developers case 0: 123710037SARM gem5 Developers if (q) 123810037SARM gem5 Developers return new SmovXX<int8_t>(machInst, vd, vn, index1); 123910037SARM gem5 Developers else 124010037SARM gem5 Developers return new SmovWX<int8_t>(machInst, vd, vn, index1); 124110037SARM gem5 Developers case 1: 124210037SARM gem5 Developers if (q) 124310037SARM gem5 Developers return new SmovXX<int16_t>(machInst, vd, vn, index1); 124410037SARM gem5 Developers else 124510037SARM gem5 Developers return new SmovWX<int16_t>(machInst, vd, vn, index1); 124610037SARM gem5 Developers case 2: 124710037SARM gem5 Developers if (q) 124810037SARM gem5 Developers return new SmovXX<int32_t>(machInst, vd, vn, index1); 124910037SARM gem5 Developers else 125010037SARM gem5 Developers return new Unknown64(machInst); 125110037SARM gem5 Developers default: 125210037SARM gem5 Developers return new Unknown64(machInst); 125310037SARM gem5 Developers } 125410037SARM gem5 Developers case 0x7: 125510037SARM gem5 Developers index1 = imm5 >> (imm5_pos + 1); 125610037SARM gem5 Developers 125710037SARM gem5 Developers if ((q && imm5_pos != 3) || (!q && imm5_pos >= 3)) 125810037SARM gem5 Developers return new Unknown64(machInst); 125910037SARM gem5 Developers 126010037SARM gem5 Developers switch (imm5_pos) { 126110037SARM gem5 Developers case 0: 126210037SARM gem5 Developers return new UmovWX<uint8_t>(machInst, vd, vn, index1); 126310037SARM gem5 Developers case 1: 126410037SARM gem5 Developers return new UmovWX<uint16_t>(machInst, vd, vn, index1); 126510037SARM gem5 Developers case 2: 126610037SARM gem5 Developers return new UmovWX<uint32_t>(machInst, vd, vn, index1); 126710037SARM gem5 Developers case 3: 126810037SARM gem5 Developers return new UmovXX<uint64_t>(machInst, vd, vn, index1); 126910037SARM gem5 Developers default: 127010037SARM gem5 Developers return new Unknown64(machInst); 127110037SARM gem5 Developers } 127210037SARM gem5 Developers default: 127310037SARM gem5 Developers return new Unknown64(machInst); 127410037SARM gem5 Developers } 127510037SARM gem5 Developers } 127610037SARM gem5 Developers 127711165SRekai.GonzalezAlberquilla@arm.com template <typename DecoderFeatures> 127810037SARM gem5 Developers StaticInstPtr 127910037SARM gem5 Developers decodeNeonIndexedElem(ExtMachInst machInst) 128010037SARM gem5 Developers { 128110037SARM gem5 Developers uint8_t q = bits(machInst, 30); 128210037SARM gem5 Developers uint8_t u = bits(machInst, 29); 128310037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 128410037SARM gem5 Developers uint8_t L = bits(machInst, 21); 128510037SARM gem5 Developers uint8_t M = bits(machInst, 20); 128610037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 12); 128710037SARM gem5 Developers uint8_t H = bits(machInst, 11); 128810037SARM gem5 Developers 128910037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 129010037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 129110037SARM gem5 Developers IntRegIndex vm_bf = (IntRegIndex) (uint8_t) bits(machInst, 19, 16); 129210037SARM gem5 Developers 129310037SARM gem5 Developers uint8_t index = 0; 129410037SARM gem5 Developers uint8_t index_fp = 0; 129510037SARM gem5 Developers uint8_t vmh = 0; 129610037SARM gem5 Developers uint8_t sz = size & 0x1; 129710037SARM gem5 Developers uint8_t sz_q = (sz << 1) | bits(machInst, 30); 129810037SARM gem5 Developers uint8_t sz_L = (sz << 1) | L; 129910037SARM gem5 Developers 130010037SARM gem5 Developers // Index and 2nd register operand for integer instructions 130110037SARM gem5 Developers if (size == 0x1) { 130210037SARM gem5 Developers index = (H << 2) | (L << 1) | M; 130310037SARM gem5 Developers // vmh = 0; 130410037SARM gem5 Developers } else if (size == 0x2) { 130510037SARM gem5 Developers index = (H << 1) | L; 130610037SARM gem5 Developers vmh = M; 130710037SARM gem5 Developers } 130810037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) (vmh << 4 | vm_bf); 130910037SARM gem5 Developers 131010037SARM gem5 Developers // Index and 2nd register operand for FP instructions 131110037SARM gem5 Developers vmh = M; 131210037SARM gem5 Developers if ((size & 0x1) == 0) { 131310037SARM gem5 Developers index_fp = (H << 1) | L; 131410037SARM gem5 Developers } else if (L == 0) { 131510037SARM gem5 Developers index_fp = H; 131610037SARM gem5 Developers } 131710037SARM gem5 Developers IntRegIndex vm_fp = (IntRegIndex) (uint8_t) (vmh << 4 | vm_bf); 131810037SARM gem5 Developers 131910037SARM gem5 Developers switch (opcode) { 132010037SARM gem5 Developers case 0x0: 132110037SARM gem5 Developers if (!u || (size == 0x0 || size == 0x3)) 132210037SARM gem5 Developers return new Unknown64(machInst); 132310037SARM gem5 Developers else 132410037SARM gem5 Developers return decodeNeonUThreeImmHAndWReg<MlaElemDX, MlaElemQX>( 132510037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 132610037SARM gem5 Developers case 0x1: 132710037SARM gem5 Developers if (!u && size >= 2 && sz_q != 0x2 && sz_L != 0x3) 132810037SARM gem5 Developers return decodeNeonUThreeImmFpReg<FmlaElemDX, FmlaElemQX>( 132910037SARM gem5 Developers q, sz, machInst, vd, vn, vm_fp, index_fp); 133010037SARM gem5 Developers else 133110037SARM gem5 Developers return new Unknown64(machInst); 133210037SARM gem5 Developers case 0x2: 133310037SARM gem5 Developers if (size == 0x0 || size == 0x3) 133410037SARM gem5 Developers return new Unknown64(machInst); 133510037SARM gem5 Developers if (u) 133610037SARM gem5 Developers return decodeNeonUThreeImmHAndWReg<UmlalElemX, UmlalElem2X>( 133710037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 133810037SARM gem5 Developers else 133910037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SmlalElemX, SmlalElem2X>( 134010037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 134110037SARM gem5 Developers case 0x3: 134210037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) 134310037SARM gem5 Developers return new Unknown64(machInst); 134410037SARM gem5 Developers else 134510037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmlalElemX, 134610037SARM gem5 Developers SqdmlalElem2X>( 134710037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 134810037SARM gem5 Developers case 0x4: 134910037SARM gem5 Developers if (u && !(size == 0x0 || size == 0x3)) 135010037SARM gem5 Developers return decodeNeonUThreeImmHAndWReg<MlsElemDX, MlsElemQX>( 135110037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 135210037SARM gem5 Developers else 135310037SARM gem5 Developers return new Unknown64(machInst); 135410037SARM gem5 Developers case 0x5: 135510037SARM gem5 Developers if (!u && size >= 0x2 && sz_L != 0x3 && sz_q != 0x2) 135610037SARM gem5 Developers return decodeNeonUThreeImmFpReg<FmlsElemDX, FmlsElemQX>( 135710037SARM gem5 Developers q, sz, machInst, vd, vn, vm_fp, index_fp); 135810037SARM gem5 Developers else 135910037SARM gem5 Developers return new Unknown64(machInst); 136010037SARM gem5 Developers case 0x6: 136110037SARM gem5 Developers if (size == 0x0 || size == 0x3) 136210037SARM gem5 Developers return new Unknown64(machInst); 136310037SARM gem5 Developers if (u) 136410037SARM gem5 Developers return decodeNeonUThreeImmHAndWReg<UmlslElemX, UmlslElem2X>( 136510037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 136610037SARM gem5 Developers else 136710037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SmlslElemX, SmlslElem2X>( 136810037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 136910037SARM gem5 Developers case 0x7: 137010037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) 137110037SARM gem5 Developers return new Unknown64(machInst); 137210037SARM gem5 Developers else 137310037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmlslElemX, 137410037SARM gem5 Developers SqdmlslElem2X>( 137510037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 137610037SARM gem5 Developers case 0x8: 137710037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) 137810037SARM gem5 Developers return new Unknown64(machInst); 137910037SARM gem5 Developers else 138010037SARM gem5 Developers return decodeNeonUThreeImmHAndWReg<MulElemDX, MulElemQX>( 138110037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 138210037SARM gem5 Developers case 0x9: 138310037SARM gem5 Developers if (size >= 2 && sz_q != 0x2 && sz_L != 0x3) { 138410037SARM gem5 Developers if (u) 138510037SARM gem5 Developers return decodeNeonUThreeImmFpReg<FmulxElemDX, FmulxElemQX>( 138610037SARM gem5 Developers q, sz, machInst, vd, vn, vm_fp, index_fp); 138710037SARM gem5 Developers else 138810037SARM gem5 Developers return decodeNeonUThreeImmFpReg<FmulElemDX, FmulElemQX>( 138910037SARM gem5 Developers q, sz, machInst, vd, vn, vm_fp, index_fp); 139010037SARM gem5 Developers } else { 139110037SARM gem5 Developers return new Unknown64(machInst); 139210037SARM gem5 Developers } 139310037SARM gem5 Developers case 0xa: 139410037SARM gem5 Developers if (size == 0x0 || size == 0x3) 139510037SARM gem5 Developers return new Unknown64(machInst); 139610037SARM gem5 Developers if (u) 139710037SARM gem5 Developers return decodeNeonUThreeImmHAndWReg<UmullElemX, UmullElem2X>( 139810037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 139910037SARM gem5 Developers else 140010037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SmullElemX, SmullElem2X>( 140110037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 140210037SARM gem5 Developers case 0xb: 140310037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) 140410037SARM gem5 Developers return new Unknown64(machInst); 140510037SARM gem5 Developers else 140610037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmullElemX, SqdmullElem2X>( 140710037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 140810037SARM gem5 Developers case 0xc: 140910037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) 141010037SARM gem5 Developers return new Unknown64(machInst); 141110037SARM gem5 Developers else 141210037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmulhElemDX, SqdmulhElemQX>( 141310037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 141410037SARM gem5 Developers case 0xd: 141510037SARM gem5 Developers if (u || (size == 0x0 || size == 0x3)) 141610037SARM gem5 Developers return new Unknown64(machInst); 141710037SARM gem5 Developers else 141810037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqrdmulhElemDX, SqrdmulhElemQX>( 141910037SARM gem5 Developers q, size, machInst, vd, vn, vm, index); 142010037SARM gem5 Developers default: 142110037SARM gem5 Developers return new Unknown64(machInst); 142210037SARM gem5 Developers } 142310037SARM gem5 Developers } 142410037SARM gem5 Developers 142510037SARM gem5 Developers StaticInstPtr 142610037SARM gem5 Developers decodeNeonModImm(ExtMachInst machInst) 142710037SARM gem5 Developers { 142810037SARM gem5 Developers uint8_t q = bits(machInst, 30); 142910037SARM gem5 Developers uint8_t op = bits(machInst, 29); 143010037SARM gem5 Developers uint8_t abcdefgh = (bits(machInst, 18, 16) << 5) | 143110037SARM gem5 Developers bits(machInst, 9, 5); 143210037SARM gem5 Developers uint8_t cmode = bits(machInst, 15, 12); 143310037SARM gem5 Developers uint8_t o2 = bits(machInst, 11); 143410037SARM gem5 Developers 143510037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 143610037SARM gem5 Developers 143710037SARM gem5 Developers if (o2 == 0x1 || (op == 0x1 && cmode == 0xf && !q)) 143810037SARM gem5 Developers return new Unknown64(machInst); 143910037SARM gem5 Developers 144010037SARM gem5 Developers bool immValid = true; 144110037SARM gem5 Developers const uint64_t bigImm = simd_modified_imm(op, cmode, abcdefgh, 144210037SARM gem5 Developers immValid, 144310037SARM gem5 Developers true /* isAarch64 */); 144410037SARM gem5 Developers if (!immValid) { 144510037SARM gem5 Developers return new Unknown(machInst); 144610037SARM gem5 Developers } 144710037SARM gem5 Developers 144810037SARM gem5 Developers if (op) { 144910037SARM gem5 Developers if (bits(cmode, 3) == 0) { 145010037SARM gem5 Developers if (bits(cmode, 0) == 0) { 145110037SARM gem5 Developers if (q) 145210037SARM gem5 Developers return new MvniQX<uint64_t>(machInst, vd, bigImm); 145310037SARM gem5 Developers else 145410037SARM gem5 Developers return new MvniDX<uint64_t>(machInst, vd, bigImm); 145510037SARM gem5 Developers } else { 145610037SARM gem5 Developers if (q) 145710037SARM gem5 Developers return new BicImmQX<uint64_t>(machInst, vd, bigImm); 145810037SARM gem5 Developers else 145910037SARM gem5 Developers return new BicImmDX<uint64_t>(machInst, vd, bigImm); 146010037SARM gem5 Developers } 146110037SARM gem5 Developers } else { 146210037SARM gem5 Developers if (bits(cmode, 2) == 1) { 146310037SARM gem5 Developers switch (bits(cmode, 1, 0)) { 146410037SARM gem5 Developers case 0: 146510037SARM gem5 Developers case 1: 146610037SARM gem5 Developers if (q) 146710037SARM gem5 Developers return new MvniQX<uint64_t>(machInst, vd, bigImm); 146810037SARM gem5 Developers else 146910037SARM gem5 Developers return new MvniDX<uint64_t>(machInst, vd, bigImm); 147010037SARM gem5 Developers case 2: 147110037SARM gem5 Developers if (q) 147210037SARM gem5 Developers return new MoviQX<uint64_t>(machInst, vd, bigImm); 147310037SARM gem5 Developers else 147410037SARM gem5 Developers return new MoviDX<uint64_t>(machInst, vd, bigImm); 147510037SARM gem5 Developers case 3: 147610037SARM gem5 Developers if (q) 147710037SARM gem5 Developers return new FmovQX<uint64_t>(machInst, vd, bigImm); 147810037SARM gem5 Developers else 147910037SARM gem5 Developers return new MoviDX<uint64_t>(machInst, vd, bigImm); 148010037SARM gem5 Developers } 148110037SARM gem5 Developers } else { 148210037SARM gem5 Developers if (bits(cmode, 0) == 0) { 148310037SARM gem5 Developers if (q) 148410037SARM gem5 Developers return new MvniQX<uint64_t>(machInst, vd, bigImm); 148510037SARM gem5 Developers else 148610037SARM gem5 Developers return new MvniDX<uint64_t>(machInst, vd, bigImm); 148710037SARM gem5 Developers } else { 148810037SARM gem5 Developers if (q) 148910037SARM gem5 Developers return new BicImmQX<uint64_t>(machInst, vd, 149010037SARM gem5 Developers bigImm); 149110037SARM gem5 Developers else 149210037SARM gem5 Developers return new BicImmDX<uint64_t>(machInst, vd, 149310037SARM gem5 Developers bigImm); 149410037SARM gem5 Developers } 149510037SARM gem5 Developers } 149610037SARM gem5 Developers } 149710037SARM gem5 Developers } else { 149810037SARM gem5 Developers if (bits(cmode, 3) == 0) { 149910037SARM gem5 Developers if (bits(cmode, 0) == 0) { 150010037SARM gem5 Developers if (q) 150110037SARM gem5 Developers return new MoviQX<uint64_t>(machInst, vd, bigImm); 150210037SARM gem5 Developers else 150310037SARM gem5 Developers return new MoviDX<uint64_t>(machInst, vd, bigImm); 150410037SARM gem5 Developers } else { 150510037SARM gem5 Developers if (q) 150610037SARM gem5 Developers return new OrrImmQX<uint64_t>(machInst, vd, bigImm); 150710037SARM gem5 Developers else 150810037SARM gem5 Developers return new OrrImmDX<uint64_t>(machInst, vd, bigImm); 150910037SARM gem5 Developers } 151010037SARM gem5 Developers } else { 151110037SARM gem5 Developers if (bits(cmode, 2) == 1) { 151210037SARM gem5 Developers if (bits(cmode, 1, 0) == 0x3) { 151310037SARM gem5 Developers if (q) 151410037SARM gem5 Developers return new FmovQX<uint32_t>(machInst, vd, bigImm); 151510037SARM gem5 Developers else 151610037SARM gem5 Developers return new FmovDX<uint32_t>(machInst, vd, bigImm); 151710037SARM gem5 Developers } else { 151810037SARM gem5 Developers if (q) 151910037SARM gem5 Developers return new MoviQX<uint64_t>(machInst, vd, bigImm); 152010037SARM gem5 Developers else 152110037SARM gem5 Developers return new MoviDX<uint64_t>(machInst, vd, bigImm); 152210037SARM gem5 Developers } 152310037SARM gem5 Developers } else { 152410037SARM gem5 Developers if (bits(cmode, 0) == 0) { 152510037SARM gem5 Developers if (q) 152610037SARM gem5 Developers return new MoviQX<uint64_t>(machInst, vd, bigImm); 152710037SARM gem5 Developers else 152810037SARM gem5 Developers return new MoviDX<uint64_t>(machInst, vd, bigImm); 152910037SARM gem5 Developers } else { 153010037SARM gem5 Developers if (q) 153110037SARM gem5 Developers return new OrrImmQX<uint64_t>(machInst, vd, 153210037SARM gem5 Developers bigImm); 153310037SARM gem5 Developers else 153410037SARM gem5 Developers return new OrrImmDX<uint64_t>(machInst, vd, bigImm); 153510037SARM gem5 Developers } 153610037SARM gem5 Developers } 153710037SARM gem5 Developers } 153810037SARM gem5 Developers } 153910037SARM gem5 Developers return new Unknown(machInst); 154010037SARM gem5 Developers } 154110037SARM gem5 Developers 154210037SARM gem5 Developers StaticInstPtr 154310037SARM gem5 Developers decodeNeonShiftByImm(ExtMachInst machInst) 154410037SARM gem5 Developers { 154510037SARM gem5 Developers uint8_t q = bits(machInst, 30); 154610037SARM gem5 Developers uint8_t u = bits(machInst, 29); 154710037SARM gem5 Developers uint8_t immh = bits(machInst, 22, 19); 154810037SARM gem5 Developers uint8_t immb = bits(machInst, 18, 16); 154910037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 11); 155010037SARM gem5 Developers 155110037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 155210037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 155310037SARM gem5 Developers 155410037SARM gem5 Developers uint8_t immh3 = bits(machInst, 22); 155510037SARM gem5 Developers uint8_t immh3_q = (immh3 << 1) | q; 155610037SARM gem5 Developers uint8_t op_u = (bits(machInst, 12) << 1) | u; 155710037SARM gem5 Developers uint8_t size = findMsbSet(immh); 155810037SARM gem5 Developers int shiftAmt = 0; 155910037SARM gem5 Developers 156010037SARM gem5 Developers switch (opcode) { 156110037SARM gem5 Developers case 0x00: 156210037SARM gem5 Developers if (immh3_q == 0x2) 156310037SARM gem5 Developers return new Unknown64(machInst); 156410037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 156510037SARM gem5 Developers if (u) 156610037SARM gem5 Developers return decodeNeonUTwoShiftXReg<UshrDX, UshrQX>( 156710037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 156810037SARM gem5 Developers else 156910037SARM gem5 Developers return decodeNeonSTwoShiftXReg<SshrDX, SshrQX>( 157010037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 157110037SARM gem5 Developers case 0x02: 157210037SARM gem5 Developers if (immh3_q == 0x2) 157310037SARM gem5 Developers return new Unknown64(machInst); 157410037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 157510037SARM gem5 Developers if (u) 157610037SARM gem5 Developers return decodeNeonUTwoShiftXReg<UsraDX, UsraQX>( 157710037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 157810037SARM gem5 Developers else 157910037SARM gem5 Developers return decodeNeonSTwoShiftXReg<SsraDX, SsraQX>( 158010037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 158110037SARM gem5 Developers case 0x04: 158210037SARM gem5 Developers if (immh3_q == 0x2) 158310037SARM gem5 Developers return new Unknown64(machInst); 158410037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 158510037SARM gem5 Developers if (u) 158610037SARM gem5 Developers return decodeNeonUTwoShiftXReg<UrshrDX, UrshrQX>( 158710037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 158810037SARM gem5 Developers else 158910037SARM gem5 Developers return decodeNeonSTwoShiftXReg<SrshrDX, SrshrQX>( 159010037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 159110037SARM gem5 Developers case 0x06: 159210037SARM gem5 Developers if (immh3_q == 0x2) 159310037SARM gem5 Developers return new Unknown64(machInst); 159410037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 159510037SARM gem5 Developers if (u) 159610037SARM gem5 Developers return decodeNeonUTwoShiftXReg<UrsraDX, UrsraQX>( 159710037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 159810037SARM gem5 Developers else 159910037SARM gem5 Developers return decodeNeonSTwoShiftXReg<SrsraDX, SrsraQX>( 160010037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 160110037SARM gem5 Developers case 0x08: 160210037SARM gem5 Developers if (u && !(immh3_q == 0x2)) { 160310037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 160410037SARM gem5 Developers return decodeNeonUTwoShiftXReg<SriDX, SriQX>( 160510037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 160610037SARM gem5 Developers } else { 160710037SARM gem5 Developers return new Unknown64(machInst); 160810037SARM gem5 Developers } 160910037SARM gem5 Developers case 0x0a: 161010037SARM gem5 Developers if (immh3_q == 0x2) 161110037SARM gem5 Developers return new Unknown64(machInst); 161210037SARM gem5 Developers shiftAmt = ((immh << 3) | immb) - (8 << size); 161310037SARM gem5 Developers if (u) 161410037SARM gem5 Developers return decodeNeonUTwoShiftXReg<SliDX, SliQX>( 161510037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 161610037SARM gem5 Developers else 161710037SARM gem5 Developers return decodeNeonUTwoShiftXReg<ShlDX, ShlQX>( 161810037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 161910037SARM gem5 Developers case 0x0c: 162010037SARM gem5 Developers if (u && !(immh3_q == 0x2 || op_u == 0x0)) { 162110037SARM gem5 Developers shiftAmt = ((immh << 3) | immb) - (8 << size); 162210037SARM gem5 Developers return decodeNeonSTwoShiftXReg<SqshluDX, SqshluQX>( 162310037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 162410037SARM gem5 Developers } else { 162510037SARM gem5 Developers return new Unknown64(machInst); 162610037SARM gem5 Developers } 162710037SARM gem5 Developers case 0x0e: 162810037SARM gem5 Developers if (immh3_q == 0x2 || op_u == 0x0) 162910037SARM gem5 Developers return new Unknown64(machInst); 163010037SARM gem5 Developers shiftAmt = ((immh << 3) | immb) - (8 << size); 163110037SARM gem5 Developers if (u) 163210037SARM gem5 Developers return decodeNeonUTwoShiftXReg<UqshlImmDX, UqshlImmQX>( 163310037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 163410037SARM gem5 Developers else 163510037SARM gem5 Developers return decodeNeonSTwoShiftXReg<SqshlImmDX, SqshlImmQX>( 163610037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 163710037SARM gem5 Developers case 0x10: 163810037SARM gem5 Developers if (immh3) 163910037SARM gem5 Developers return new Unknown64(machInst); 164010037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 164110037SARM gem5 Developers if (u) 164210037SARM gem5 Developers return decodeNeonSTwoShiftSReg<SqshrunX, Sqshrun2X>( 164310037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 164410037SARM gem5 Developers else 164510037SARM gem5 Developers return decodeNeonUTwoShiftSReg<ShrnX, Shrn2X>( 164610037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 164710037SARM gem5 Developers case 0x11: 164810037SARM gem5 Developers if (immh3) 164910037SARM gem5 Developers return new Unknown64(machInst); 165010037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 165110037SARM gem5 Developers if (u) 165210037SARM gem5 Developers return decodeNeonSTwoShiftSReg<SqrshrunX, Sqrshrun2X>( 165310037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 165410037SARM gem5 Developers else 165510037SARM gem5 Developers return decodeNeonUTwoShiftSReg<RshrnX, Rshrn2X>( 165610037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 165710037SARM gem5 Developers case 0x12: 165810037SARM gem5 Developers if (immh3) 165910037SARM gem5 Developers return new Unknown64(machInst); 166010037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 166110037SARM gem5 Developers if (u) 166210037SARM gem5 Developers return decodeNeonUTwoShiftSReg<UqshrnX, Uqshrn2X>( 166310037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 166410037SARM gem5 Developers else 166510037SARM gem5 Developers return decodeNeonSTwoShiftSReg<SqshrnX, Sqshrn2X>( 166610037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 166710037SARM gem5 Developers case 0x13: 166810037SARM gem5 Developers if (immh3) 166910037SARM gem5 Developers return new Unknown64(machInst); 167010037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 167110037SARM gem5 Developers if (u) 167210037SARM gem5 Developers return decodeNeonUTwoShiftSReg<UqrshrnX, Uqrshrn2X>( 167310037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 167410037SARM gem5 Developers else 167510037SARM gem5 Developers return decodeNeonSTwoShiftSReg<SqrshrnX, Sqrshrn2X>( 167610037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 167710037SARM gem5 Developers case 0x14: 167810037SARM gem5 Developers if (immh3) 167910037SARM gem5 Developers return new Unknown64(machInst); 168010037SARM gem5 Developers shiftAmt = ((immh << 3) | immb) - (8 << size); 168110037SARM gem5 Developers if (u) 168210037SARM gem5 Developers return decodeNeonUTwoShiftSReg<UshllX, Ushll2X>( 168310037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 168410037SARM gem5 Developers else 168510037SARM gem5 Developers return decodeNeonSTwoShiftSReg<SshllX, Sshll2X>( 168610037SARM gem5 Developers q, size, machInst, vd, vn, shiftAmt); 168710037SARM gem5 Developers case 0x1c: 168810037SARM gem5 Developers if (immh < 0x4 || immh3_q == 0x2) 168910037SARM gem5 Developers return new Unknown64(machInst); 169010037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 169110037SARM gem5 Developers if (u) { 169210037SARM gem5 Developers return decodeNeonUTwoShiftFpReg<UcvtfFixedDX, UcvtfFixedQX>( 169310037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, shiftAmt); 169410037SARM gem5 Developers } else { 169510037SARM gem5 Developers if (q) { 169610037SARM gem5 Developers if (size & 0x1) 169710037SARM gem5 Developers return new ScvtfFixedDQX<uint64_t>(machInst, vd, vn, 169810037SARM gem5 Developers shiftAmt); 169910037SARM gem5 Developers else 170010037SARM gem5 Developers return new ScvtfFixedSQX<uint32_t>(machInst, vd, vn, 170110037SARM gem5 Developers shiftAmt); 170210037SARM gem5 Developers } else { 170310037SARM gem5 Developers if (size & 0x1) 170410037SARM gem5 Developers return new Unknown(machInst); 170510037SARM gem5 Developers else 170610037SARM gem5 Developers return new ScvtfFixedDX<uint32_t>(machInst, vd, vn, 170710037SARM gem5 Developers shiftAmt); 170810037SARM gem5 Developers } 170910037SARM gem5 Developers } 171010037SARM gem5 Developers case 0x1f: 171110037SARM gem5 Developers if (immh < 0x4 || immh3_q == 0x2) 171210037SARM gem5 Developers return new Unknown64(machInst); 171310037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 171410037SARM gem5 Developers if (u) 171510037SARM gem5 Developers return decodeNeonUTwoShiftFpReg<FcvtzuFixedDX, FcvtzuFixedQX>( 171610037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, shiftAmt); 171710037SARM gem5 Developers else 171810037SARM gem5 Developers return decodeNeonUTwoShiftFpReg<FcvtzsFixedDX, FcvtzsFixedQX>( 171910037SARM gem5 Developers q, size & 0x1, machInst, vd, vn, shiftAmt); 172010037SARM gem5 Developers default: 172110037SARM gem5 Developers return new Unknown64(machInst); 172210037SARM gem5 Developers } 172310037SARM gem5 Developers } 172410037SARM gem5 Developers 172510037SARM gem5 Developers StaticInstPtr 172610037SARM gem5 Developers decodeNeonTblTbx(ExtMachInst machInst) 172710037SARM gem5 Developers { 172810037SARM gem5 Developers uint8_t q = bits(machInst, 30); 172910037SARM gem5 Developers 173010037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 173110037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 173210037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 173310037SARM gem5 Developers 173410037SARM gem5 Developers uint8_t switchVal = bits(machInst, 14, 12); 173510037SARM gem5 Developers 173610037SARM gem5 Developers switch (switchVal) { 173710037SARM gem5 Developers case 0x0: 173810037SARM gem5 Developers if (q) 173910037SARM gem5 Developers return new Tbl1QX<uint8_t>(machInst, vd, vn, vm); 174010037SARM gem5 Developers else 174110037SARM gem5 Developers return new Tbl1DX<uint8_t>(machInst, vd, vn, vm); 174210037SARM gem5 Developers case 0x1: 174310037SARM gem5 Developers if (q) 174410037SARM gem5 Developers return new Tbx1QX<uint8_t>(machInst, vd, vn, vm); 174510037SARM gem5 Developers else 174610037SARM gem5 Developers return new Tbx1DX<uint8_t>(machInst, vd, vn, vm); 174710037SARM gem5 Developers case 0x2: 174810037SARM gem5 Developers if (q) 174910037SARM gem5 Developers return new Tbl2QX<uint8_t>(machInst, vd, vn, vm); 175010037SARM gem5 Developers else 175110037SARM gem5 Developers return new Tbl2DX<uint8_t>(machInst, vd, vn, vm); 175210037SARM gem5 Developers case 0x3: 175310037SARM gem5 Developers if (q) 175410037SARM gem5 Developers return new Tbx2QX<uint8_t>(machInst, vd, vn, vm); 175510037SARM gem5 Developers else 175610037SARM gem5 Developers return new Tbx2DX<uint8_t>(machInst, vd, vn, vm); 175710037SARM gem5 Developers case 0x4: 175810037SARM gem5 Developers if (q) 175910037SARM gem5 Developers return new Tbl3QX<uint8_t>(machInst, vd, vn, vm); 176010037SARM gem5 Developers else 176110037SARM gem5 Developers return new Tbl3DX<uint8_t>(machInst, vd, vn, vm); 176210037SARM gem5 Developers case 0x5: 176310037SARM gem5 Developers if (q) 176410037SARM gem5 Developers return new Tbx3QX<uint8_t>(machInst, vd, vn, vm); 176510037SARM gem5 Developers else 176610037SARM gem5 Developers return new Tbx3DX<uint8_t>(machInst, vd, vn, vm); 176710037SARM gem5 Developers case 0x6: 176810037SARM gem5 Developers if (q) 176910037SARM gem5 Developers return new Tbl4QX<uint8_t>(machInst, vd, vn, vm); 177010037SARM gem5 Developers else 177110037SARM gem5 Developers return new Tbl4DX<uint8_t>(machInst, vd, vn, vm); 177210037SARM gem5 Developers case 0x7: 177310037SARM gem5 Developers if (q) 177410037SARM gem5 Developers return new Tbx4QX<uint8_t>(machInst, vd, vn, vm); 177510037SARM gem5 Developers else 177610037SARM gem5 Developers return new Tbx4DX<uint8_t>(machInst, vd, vn, vm); 177710037SARM gem5 Developers default: 177810037SARM gem5 Developers return new Unknown64(machInst); 177910037SARM gem5 Developers } 178010037SARM gem5 Developers 178110037SARM gem5 Developers return new Unknown64(machInst); 178210037SARM gem5 Developers } 178310037SARM gem5 Developers 178410037SARM gem5 Developers StaticInstPtr 178510037SARM gem5 Developers decodeNeonZipUzpTrn(ExtMachInst machInst) 178610037SARM gem5 Developers { 178710037SARM gem5 Developers uint8_t q = bits(machInst, 30); 178810037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 178910037SARM gem5 Developers uint8_t opcode = bits(machInst, 14, 12); 179010037SARM gem5 Developers 179110037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 179210037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 179310037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 179410037SARM gem5 Developers 179510037SARM gem5 Developers switch (opcode) { 179610037SARM gem5 Developers case 0x1: 179710037SARM gem5 Developers return decodeNeonUThreeXReg<Uzp1DX, Uzp1QX>( 179810037SARM gem5 Developers q, size, machInst, vd, vn, vm); 179910037SARM gem5 Developers case 0x2: 180010037SARM gem5 Developers return decodeNeonUThreeXReg<Trn1DX, Trn1QX>( 180110037SARM gem5 Developers q, size, machInst, vd, vn, vm); 180210037SARM gem5 Developers case 0x3: 180310037SARM gem5 Developers return decodeNeonUThreeXReg<Zip1DX, Zip1QX>( 180410037SARM gem5 Developers q, size, machInst, vd, vn, vm); 180510037SARM gem5 Developers case 0x5: 180610037SARM gem5 Developers return decodeNeonUThreeXReg<Uzp2DX, Uzp2QX>( 180710037SARM gem5 Developers q, size, machInst, vd, vn, vm); 180810037SARM gem5 Developers case 0x6: 180910037SARM gem5 Developers return decodeNeonUThreeXReg<Trn2DX, Trn2QX>( 181010037SARM gem5 Developers q, size, machInst, vd, vn, vm); 181110037SARM gem5 Developers case 0x7: 181210037SARM gem5 Developers return decodeNeonUThreeXReg<Zip2DX, Zip2QX>( 181310037SARM gem5 Developers q, size, machInst, vd, vn, vm); 181410037SARM gem5 Developers default: 181510037SARM gem5 Developers return new Unknown64(machInst); 181610037SARM gem5 Developers } 181710037SARM gem5 Developers return new Unknown64(machInst); 181810037SARM gem5 Developers } 181910037SARM gem5 Developers 182010037SARM gem5 Developers StaticInstPtr 182110037SARM gem5 Developers decodeNeonExt(ExtMachInst machInst) 182210037SARM gem5 Developers { 182310037SARM gem5 Developers uint8_t q = bits(machInst, 30); 182410037SARM gem5 Developers uint8_t op2 = bits(machInst, 23, 22); 182510037SARM gem5 Developers uint8_t imm4 = bits(machInst, 14, 11); 182610037SARM gem5 Developers 182710037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 182810037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 182910037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 183010037SARM gem5 Developers 183110037SARM gem5 Developers if (op2 != 0 || (q == 0x0 && bits(imm4, 3) == 0x1)) 183210037SARM gem5 Developers return new Unknown64(machInst); 183310037SARM gem5 Developers 183410037SARM gem5 Developers uint8_t index = q ? imm4 : imm4 & 0x7; 183510037SARM gem5 Developers 183610037SARM gem5 Developers if (q) { 183710037SARM gem5 Developers return new ExtQX<uint8_t>(machInst, vd, vn, vm, index); 183810037SARM gem5 Developers } else { 183910037SARM gem5 Developers return new ExtDX<uint8_t>(machInst, vd, vn, vm, index); 184010037SARM gem5 Developers } 184110037SARM gem5 Developers } 184210037SARM gem5 Developers 184310037SARM gem5 Developers StaticInstPtr 184410037SARM gem5 Developers decodeNeonSc3Same(ExtMachInst machInst) 184510037SARM gem5 Developers { 184610037SARM gem5 Developers uint8_t u = bits(machInst, 29); 184710037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 184810037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 11); 184910037SARM gem5 Developers uint8_t s = bits(machInst, 11); 185010037SARM gem5 Developers 185110037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 185210037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 185310037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 185410037SARM gem5 Developers 185510037SARM gem5 Developers switch (opcode) { 185610037SARM gem5 Developers case 0x01: 185710037SARM gem5 Developers if (u) 185810037SARM gem5 Developers return decodeNeonUThreeUReg<UqaddScX>( 185910037SARM gem5 Developers size, machInst, vd, vn, vm); 186010037SARM gem5 Developers else 186110037SARM gem5 Developers return decodeNeonSThreeUReg<SqaddScX>( 186210037SARM gem5 Developers size, machInst, vd, vn, vm); 186310037SARM gem5 Developers case 0x05: 186410037SARM gem5 Developers if (u) 186510037SARM gem5 Developers return decodeNeonUThreeUReg<UqsubScX>( 186610037SARM gem5 Developers size, machInst, vd, vn, vm); 186710037SARM gem5 Developers else 186810037SARM gem5 Developers return decodeNeonSThreeUReg<SqsubScX>( 186910037SARM gem5 Developers size, machInst, vd, vn, vm); 187010037SARM gem5 Developers case 0x06: 187110037SARM gem5 Developers if (size != 0x3) 187210037SARM gem5 Developers return new Unknown64(machInst); 187310037SARM gem5 Developers if (u) 187410037SARM gem5 Developers return new CmhiDX<uint64_t>(machInst, vd, vn, vm); 187510037SARM gem5 Developers else 187610037SARM gem5 Developers return new CmgtDX<int64_t>(machInst, vd, vn, vm); 187710037SARM gem5 Developers case 0x07: 187810037SARM gem5 Developers if (size != 0x3) 187910037SARM gem5 Developers return new Unknown64(machInst); 188010037SARM gem5 Developers if (u) 188110037SARM gem5 Developers return new CmhsDX<uint64_t>(machInst, vd, vn, vm); 188210037SARM gem5 Developers else 188310037SARM gem5 Developers return new CmgeDX<int64_t>(machInst, vd, vn, vm); 188410037SARM gem5 Developers case 0x08: 188510037SARM gem5 Developers if (!s && size != 0x3) 188610037SARM gem5 Developers return new Unknown64(machInst); 188710037SARM gem5 Developers if (u) 188810037SARM gem5 Developers return new UshlDX<uint64_t>(machInst, vd, vn, vm); 188910037SARM gem5 Developers else 189010037SARM gem5 Developers return new SshlDX<int64_t>(machInst, vd, vn, vm); 189110037SARM gem5 Developers case 0x09: 189210037SARM gem5 Developers if (!s && size != 0x3) 189310037SARM gem5 Developers return new Unknown64(machInst); 189410037SARM gem5 Developers if (u) 189510037SARM gem5 Developers return decodeNeonUThreeUReg<UqshlScX>( 189610037SARM gem5 Developers size, machInst, vd, vn, vm); 189710037SARM gem5 Developers else 189810037SARM gem5 Developers return decodeNeonSThreeUReg<SqshlScX>( 189910037SARM gem5 Developers size, machInst, vd, vn, vm); 190010037SARM gem5 Developers case 0x0a: 190110037SARM gem5 Developers if (!s && size != 0x3) 190210037SARM gem5 Developers return new Unknown64(machInst); 190310037SARM gem5 Developers if (u) 190410037SARM gem5 Developers return new UrshlDX<uint64_t>(machInst, vd, vn, vm); 190510037SARM gem5 Developers else 190610037SARM gem5 Developers return new SrshlDX<int64_t>(machInst, vd, vn, vm); 190710037SARM gem5 Developers case 0x0b: 190810037SARM gem5 Developers if (!s && size != 0x3) 190910037SARM gem5 Developers return new Unknown64(machInst); 191010037SARM gem5 Developers if (u) 191110037SARM gem5 Developers return decodeNeonUThreeUReg<UqrshlScX>( 191210037SARM gem5 Developers size, machInst, vd, vn, vm); 191310037SARM gem5 Developers else 191410037SARM gem5 Developers return decodeNeonSThreeUReg<SqrshlScX>( 191510037SARM gem5 Developers size, machInst, vd, vn, vm); 191610037SARM gem5 Developers case 0x10: 191710037SARM gem5 Developers if (size != 0x3) 191810037SARM gem5 Developers return new Unknown64(machInst); 191910037SARM gem5 Developers if (u) 192010037SARM gem5 Developers return new SubDX<uint64_t>(machInst, vd, vn, vm); 192110037SARM gem5 Developers else 192210037SARM gem5 Developers return new AddDX<uint64_t>(machInst, vd, vn, vm); 192310037SARM gem5 Developers case 0x11: 192410037SARM gem5 Developers if (size != 0x3) 192510037SARM gem5 Developers return new Unknown64(machInst); 192610037SARM gem5 Developers if (u) 192710037SARM gem5 Developers return new CmeqDX<uint64_t>(machInst, vd, vn, vm); 192810037SARM gem5 Developers else 192910037SARM gem5 Developers return new CmtstDX<uint64_t>(machInst, vd, vn, vm); 193010037SARM gem5 Developers case 0x16: 193110037SARM gem5 Developers if (size == 0x3 || size == 0x0) 193210037SARM gem5 Developers return new Unknown64(machInst); 193310037SARM gem5 Developers if (u) 193410037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqrdmulhScX>( 193510037SARM gem5 Developers size, machInst, vd, vn, vm); 193610037SARM gem5 Developers else 193710037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmulhScX>( 193810037SARM gem5 Developers size, machInst, vd, vn, vm); 193910037SARM gem5 Developers case 0x1a: 194010037SARM gem5 Developers if (!u || size < 0x2) 194110037SARM gem5 Developers return new Unknown64(machInst); 194210037SARM gem5 Developers else 194310037SARM gem5 Developers return decodeNeonUThreeScFpReg<FabdScX>( 194410037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 194510037SARM gem5 Developers case 0x1b: 194610037SARM gem5 Developers if (u || size > 0x1) 194710037SARM gem5 Developers return new Unknown64(machInst); 194810037SARM gem5 Developers else 194910037SARM gem5 Developers return decodeNeonUThreeScFpReg<FmulxScX>( 195010037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 195110037SARM gem5 Developers case 0x1c: 195210037SARM gem5 Developers if (size < 0x2) { 195310037SARM gem5 Developers if (u) 195410037SARM gem5 Developers return decodeNeonUThreeScFpReg<FcmgeScX>( 195510037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 195610037SARM gem5 Developers else 195710037SARM gem5 Developers return decodeNeonUThreeScFpReg<FcmeqScX>( 195810037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 195910037SARM gem5 Developers } else { 196010037SARM gem5 Developers if (u) 196110037SARM gem5 Developers return decodeNeonUThreeScFpReg<FcmgtScX>( 196210037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 196310037SARM gem5 Developers else 196410037SARM gem5 Developers return new Unknown64(machInst); 196510037SARM gem5 Developers } 196610037SARM gem5 Developers case 0x1d: 196710037SARM gem5 Developers if (!u) 196810037SARM gem5 Developers return new Unknown64(machInst); 196910037SARM gem5 Developers if (size < 0x2) 197010037SARM gem5 Developers return decodeNeonUThreeScFpReg<FacgeScX>( 197110037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 197210037SARM gem5 Developers else 197310037SARM gem5 Developers return decodeNeonUThreeScFpReg<FacgtScX>( 197410037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 197510037SARM gem5 Developers case 0x1f: 197610037SARM gem5 Developers if (u) 197710037SARM gem5 Developers return new Unknown64(machInst); 197810037SARM gem5 Developers if (size < 0x2) 197910037SARM gem5 Developers return decodeNeonUThreeScFpReg<FrecpsScX>( 198010037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 198110037SARM gem5 Developers else 198210037SARM gem5 Developers return decodeNeonUThreeScFpReg<FrsqrtsScX>( 198310037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm); 198410037SARM gem5 Developers default: 198510037SARM gem5 Developers return new Unknown64(machInst); 198610037SARM gem5 Developers } 198710037SARM gem5 Developers } 198810037SARM gem5 Developers 198910037SARM gem5 Developers StaticInstPtr 199010037SARM gem5 Developers decodeNeonSc3Diff(ExtMachInst machInst) 199110037SARM gem5 Developers { 199210037SARM gem5 Developers if (bits(machInst, 29)) 199310037SARM gem5 Developers return new Unknown64(machInst); 199410037SARM gem5 Developers 199510037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 199610037SARM gem5 Developers if (size == 0x0 || size == 0x3) 199710037SARM gem5 Developers return new Unknown64(machInst); 199810037SARM gem5 Developers 199910037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 12); 200010037SARM gem5 Developers 200110037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 200210037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 200310037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 200410037SARM gem5 Developers 200510037SARM gem5 Developers switch (opcode) { 200610037SARM gem5 Developers case 0x9: 200710037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmlalScX>(size, machInst, vd, vn, vm); 200810037SARM gem5 Developers case 0xb: 200910037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmlslScX>(size, machInst, vd, vn, vm); 201010037SARM gem5 Developers case 0xd: 201110037SARM gem5 Developers return decodeNeonSThreeHAndWReg<SqdmullScX>(size, machInst, vd, vn, vm); 201210037SARM gem5 Developers default: 201310037SARM gem5 Developers return new Unknown64(machInst); 201410037SARM gem5 Developers } 201510037SARM gem5 Developers } 201610037SARM gem5 Developers 201710037SARM gem5 Developers StaticInstPtr 201810037SARM gem5 Developers decodeNeonSc2RegMisc(ExtMachInst machInst) 201910037SARM gem5 Developers { 202010037SARM gem5 Developers uint8_t u = bits(machInst, 29); 202110037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 202210037SARM gem5 Developers uint8_t opcode = bits(machInst, 16, 12); 202310037SARM gem5 Developers 202410037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 202510037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 202610037SARM gem5 Developers 202710037SARM gem5 Developers uint8_t switchVal = opcode | ((u ? 1 : 0) << 5); 202810037SARM gem5 Developers switch (switchVal) { 202910037SARM gem5 Developers case 0x03: 203010037SARM gem5 Developers return decodeNeonUTwoMiscUReg<SuqaddScX>(size, machInst, vd, vn); 203110037SARM gem5 Developers case 0x07: 203210037SARM gem5 Developers return decodeNeonSTwoMiscUReg<SqabsScX>(size, machInst, vd, vn); 203310037SARM gem5 Developers case 0x08: 203410037SARM gem5 Developers if (size != 0x3) 203510037SARM gem5 Developers return new Unknown64(machInst); 203610037SARM gem5 Developers else 203710037SARM gem5 Developers return new CmgtZeroDX<int64_t>(machInst, vd, vn); 203810037SARM gem5 Developers case 0x09: 203910037SARM gem5 Developers if (size != 0x3) 204010037SARM gem5 Developers return new Unknown64(machInst); 204110037SARM gem5 Developers else 204210037SARM gem5 Developers return new CmeqZeroDX<int64_t>(machInst, vd, vn); 204310037SARM gem5 Developers case 0x0a: 204410037SARM gem5 Developers if (size != 0x3) 204510037SARM gem5 Developers return new Unknown64(machInst); 204610037SARM gem5 Developers else 204710037SARM gem5 Developers return new CmltZeroDX<int64_t>(machInst, vd, vn); 204810037SARM gem5 Developers case 0x0b: 204910037SARM gem5 Developers if (size != 0x3) 205010037SARM gem5 Developers return new Unknown64(machInst); 205110037SARM gem5 Developers else 205210037SARM gem5 Developers return new AbsDX<int64_t>(machInst, vd, vn); 205310037SARM gem5 Developers case 0x0c: 205410037SARM gem5 Developers if (size < 0x2) 205510037SARM gem5 Developers return new Unknown64(machInst); 205610037SARM gem5 Developers else 205710037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcmgtZeroScX>( 205810037SARM gem5 Developers size & 0x1, machInst, vd, vn); 205910037SARM gem5 Developers case 0x0d: 206010037SARM gem5 Developers if (size < 0x2) 206110037SARM gem5 Developers return new Unknown64(machInst); 206210037SARM gem5 Developers else 206310037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcmeqZeroScX>( 206410037SARM gem5 Developers size & 0x1, machInst, vd, vn); 206510037SARM gem5 Developers case 0x0e: 206610037SARM gem5 Developers if (size < 0x2) 206710037SARM gem5 Developers return new Unknown64(machInst); 206810037SARM gem5 Developers else 206910037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcmltZeroScX>( 207010037SARM gem5 Developers size & 0x1, machInst, vd, vn); 207110037SARM gem5 Developers case 0x14: 207212595Ssiddhesh.poyarekar@gmail.com switch (size) { 207312595Ssiddhesh.poyarekar@gmail.com case 0x0: 207412595Ssiddhesh.poyarekar@gmail.com return new SqxtnScX<int8_t>(machInst, vd, vn); 207512595Ssiddhesh.poyarekar@gmail.com case 0x1: 207612595Ssiddhesh.poyarekar@gmail.com return new SqxtnScX<int16_t>(machInst, vd, vn); 207712595Ssiddhesh.poyarekar@gmail.com case 0x2: 207812595Ssiddhesh.poyarekar@gmail.com return new SqxtnScX<int32_t>(machInst, vd, vn); 207912595Ssiddhesh.poyarekar@gmail.com case 0x3: 208010037SARM gem5 Developers return new Unknown64(machInst); 208112595Ssiddhesh.poyarekar@gmail.com default: 208212595Ssiddhesh.poyarekar@gmail.com M5_UNREACHABLE; 208310037SARM gem5 Developers } 208410037SARM gem5 Developers case 0x1a: 208510037SARM gem5 Developers if (size < 0x2) 208610037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtnsScX>( 208710037SARM gem5 Developers size & 0x1, machInst, vd, vn); 208810037SARM gem5 Developers else 208910037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtpsScX>( 209010037SARM gem5 Developers size & 0x1, machInst, vd, vn); 209110037SARM gem5 Developers case 0x1b: 209210037SARM gem5 Developers if (size < 0x2) 209310037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtmsScX>( 209410037SARM gem5 Developers size & 0x1, machInst, vd, vn); 209510037SARM gem5 Developers else 209610037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtzsIntScX>( 209710037SARM gem5 Developers size & 0x1, machInst, vd, vn); 209810037SARM gem5 Developers case 0x1c: 209910037SARM gem5 Developers if (size < 0x2) 210010037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtasScX>( 210110037SARM gem5 Developers size & 0x1, machInst, vd, vn); 210210037SARM gem5 Developers else 210310037SARM gem5 Developers return new Unknown64(machInst); 210410037SARM gem5 Developers case 0x1d: 210510037SARM gem5 Developers if (size < 0x2) { 210610037SARM gem5 Developers if (size & 0x1) 210710037SARM gem5 Developers return new ScvtfIntScDX<uint64_t>(machInst, vd, vn); 210810037SARM gem5 Developers else 210910037SARM gem5 Developers return new ScvtfIntScSX<uint32_t>(machInst, vd, vn); 211010037SARM gem5 Developers } else { 211110037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FrecpeScX>( 211210037SARM gem5 Developers size & 0x1, machInst, vd, vn); 211310037SARM gem5 Developers } 211410037SARM gem5 Developers case 0x1f: 211510037SARM gem5 Developers if (size < 0x2) 211610037SARM gem5 Developers return new Unknown64(machInst); 211710037SARM gem5 Developers else 211810037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FrecpxX>( 211910037SARM gem5 Developers size & 0x1, machInst, vd, vn); 212010037SARM gem5 Developers case 0x23: 212110037SARM gem5 Developers return decodeNeonUTwoMiscUReg<UsqaddScX>(size, machInst, vd, vn); 212210037SARM gem5 Developers case 0x27: 212310037SARM gem5 Developers return decodeNeonSTwoMiscUReg<SqnegScX>(size, machInst, vd, vn); 212410037SARM gem5 Developers case 0x28: 212510037SARM gem5 Developers if (size != 0x3) 212610037SARM gem5 Developers return new Unknown64(machInst); 212710037SARM gem5 Developers else 212810037SARM gem5 Developers return new CmgeZeroDX<int64_t>(machInst, vd, vn); 212910037SARM gem5 Developers case 0x29: 213010037SARM gem5 Developers if (size != 0x3) 213110037SARM gem5 Developers return new Unknown64(machInst); 213210037SARM gem5 Developers else 213310037SARM gem5 Developers return new CmleZeroDX<int64_t>(machInst, vd, vn); 213410037SARM gem5 Developers case 0x2b: 213510037SARM gem5 Developers if (size != 0x3) 213610037SARM gem5 Developers return new Unknown64(machInst); 213710037SARM gem5 Developers else 213810037SARM gem5 Developers return new NegDX<int64_t>(machInst, vd, vn); 213910037SARM gem5 Developers case 0x2c: 214010037SARM gem5 Developers if (size < 0x2) 214110037SARM gem5 Developers return new Unknown64(machInst); 214210037SARM gem5 Developers else 214310037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcmgeZeroScX>( 214410037SARM gem5 Developers size & 0x1, machInst, vd, vn); 214510037SARM gem5 Developers case 0x2d: 214610037SARM gem5 Developers if (size < 0x2) 214710037SARM gem5 Developers return new Unknown64(machInst); 214810037SARM gem5 Developers else 214910037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcmleZeroScX>( 215010037SARM gem5 Developers size & 0x1, machInst, vd, vn); 215110037SARM gem5 Developers case 0x32: 215212595Ssiddhesh.poyarekar@gmail.com switch (size) { 215312595Ssiddhesh.poyarekar@gmail.com case 0x0: 215412595Ssiddhesh.poyarekar@gmail.com return new SqxtunScX<int8_t>(machInst, vd, vn); 215512595Ssiddhesh.poyarekar@gmail.com case 0x1: 215612595Ssiddhesh.poyarekar@gmail.com return new SqxtunScX<int16_t>(machInst, vd, vn); 215712595Ssiddhesh.poyarekar@gmail.com case 0x2: 215812595Ssiddhesh.poyarekar@gmail.com return new SqxtunScX<int32_t>(machInst, vd, vn); 215912595Ssiddhesh.poyarekar@gmail.com case 0x3: 216010037SARM gem5 Developers return new Unknown64(machInst); 216112595Ssiddhesh.poyarekar@gmail.com default: 216212595Ssiddhesh.poyarekar@gmail.com M5_UNREACHABLE; 216310037SARM gem5 Developers } 216410037SARM gem5 Developers case 0x34: 216512595Ssiddhesh.poyarekar@gmail.com switch (size) { 216612595Ssiddhesh.poyarekar@gmail.com case 0x0: 216712595Ssiddhesh.poyarekar@gmail.com return new UqxtnScX<uint8_t>(machInst, vd, vn); 216812595Ssiddhesh.poyarekar@gmail.com case 0x1: 216912595Ssiddhesh.poyarekar@gmail.com return new UqxtnScX<uint16_t>(machInst, vd, vn); 217012595Ssiddhesh.poyarekar@gmail.com case 0x2: 217112595Ssiddhesh.poyarekar@gmail.com return new UqxtnScX<uint32_t>(machInst, vd, vn); 217212595Ssiddhesh.poyarekar@gmail.com case 0x3: 217310037SARM gem5 Developers return new Unknown64(machInst); 217412595Ssiddhesh.poyarekar@gmail.com default: 217512595Ssiddhesh.poyarekar@gmail.com M5_UNREACHABLE; 217610037SARM gem5 Developers } 217710037SARM gem5 Developers case 0x36: 217810037SARM gem5 Developers if (size != 0x1) { 217910037SARM gem5 Developers return new Unknown64(machInst); 218010037SARM gem5 Developers } else { 218110037SARM gem5 Developers return new FcvtxnScX<uint32_t>(machInst, vd, vn); 218210037SARM gem5 Developers } 218310037SARM gem5 Developers case 0x3a: 218410037SARM gem5 Developers if (size < 0x2) 218510037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtnuScX>( 218610037SARM gem5 Developers size & 0x1, machInst, vd, vn); 218710037SARM gem5 Developers else 218810037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtpuScX>( 218910037SARM gem5 Developers size & 0x1, machInst, vd, vn); 219010037SARM gem5 Developers case 0x3b: 219110037SARM gem5 Developers if (size < 0x2) 219210037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtmuScX>( 219310037SARM gem5 Developers size & 0x1, machInst, vd, vn); 219410037SARM gem5 Developers else 219510037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtzuIntScX>( 219610037SARM gem5 Developers size & 0x1, machInst, vd, vn); 219710037SARM gem5 Developers case 0x3c: 219810037SARM gem5 Developers if (size < 0x2) 219910037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FcvtauScX>( 220010037SARM gem5 Developers size & 0x1, machInst, vd, vn); 220110037SARM gem5 Developers else 220210037SARM gem5 Developers return new Unknown64(machInst); 220310037SARM gem5 Developers case 0x3d: 220410037SARM gem5 Developers if (size < 0x2) 220510037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<UcvtfIntScX>( 220610037SARM gem5 Developers size & 0x1, machInst, vd, vn); 220710037SARM gem5 Developers else 220810037SARM gem5 Developers return decodeNeonUTwoMiscScFpReg<FrsqrteScX>( 220910037SARM gem5 Developers size & 0x1, machInst, vd, vn); 221010037SARM gem5 Developers default: 221110037SARM gem5 Developers return new Unknown64(machInst); 221210037SARM gem5 Developers } 221310037SARM gem5 Developers } 221410037SARM gem5 Developers 221510037SARM gem5 Developers StaticInstPtr 221610037SARM gem5 Developers decodeNeonScPwise(ExtMachInst machInst) 221710037SARM gem5 Developers { 221810037SARM gem5 Developers uint8_t u = bits(machInst, 29); 221910037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 222010037SARM gem5 Developers uint8_t opcode = bits(machInst, 16, 12); 222110037SARM gem5 Developers 222210037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 222310037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 222410037SARM gem5 Developers 222510037SARM gem5 Developers if (!u) { 222610037SARM gem5 Developers if (opcode == 0x1b && size == 0x3) 222710037SARM gem5 Developers return new AddpScQX<uint64_t>(machInst, vd, vn); 222810037SARM gem5 Developers else 222910037SARM gem5 Developers return new Unknown64(machInst); 223010037SARM gem5 Developers } 223110037SARM gem5 Developers 223210037SARM gem5 Developers uint8_t switchVal = (opcode << 0) | (size << 5); 223310037SARM gem5 Developers switch (switchVal) { 223410037SARM gem5 Developers case 0x0c: 223510037SARM gem5 Developers case 0x2c: 223610037SARM gem5 Developers return decodeNeonUTwoMiscPwiseScFpReg<FmaxnmpScDX, FmaxnmpScQX>( 223710037SARM gem5 Developers size & 0x1, machInst, vd, vn); 223810037SARM gem5 Developers case 0x0d: 223910037SARM gem5 Developers case 0x2d: 224010037SARM gem5 Developers return decodeNeonUTwoMiscPwiseScFpReg<FaddpScDX, FaddpScQX>( 224110037SARM gem5 Developers size & 0x1, machInst, vd, vn); 224210037SARM gem5 Developers case 0x0f: 224310037SARM gem5 Developers case 0x2f: 224410037SARM gem5 Developers return decodeNeonUTwoMiscPwiseScFpReg<FmaxpScDX, FmaxpScQX>( 224510037SARM gem5 Developers size & 0x1, machInst, vd, vn); 224610037SARM gem5 Developers case 0x4c: 224710037SARM gem5 Developers case 0x6c: 224810037SARM gem5 Developers return decodeNeonUTwoMiscPwiseScFpReg<FminnmpScDX, FminnmpScQX>( 224910037SARM gem5 Developers size & 0x1, machInst, vd, vn); 225010037SARM gem5 Developers case 0x4f: 225110037SARM gem5 Developers case 0x6f: 225210037SARM gem5 Developers return decodeNeonUTwoMiscPwiseScFpReg<FminpScDX, FminpScQX>( 225310037SARM gem5 Developers size & 0x1, machInst, vd, vn); 225410037SARM gem5 Developers default: 225510037SARM gem5 Developers return new Unknown64(machInst); 225610037SARM gem5 Developers } 225710037SARM gem5 Developers } 225810037SARM gem5 Developers 225910037SARM gem5 Developers StaticInstPtr 226010037SARM gem5 Developers decodeNeonScCopy(ExtMachInst machInst) 226110037SARM gem5 Developers { 226210037SARM gem5 Developers if (bits(machInst, 14, 11) != 0 || bits(machInst, 29)) 226310037SARM gem5 Developers return new Unknown64(machInst); 226410037SARM gem5 Developers 226510037SARM gem5 Developers uint8_t imm5 = bits(machInst, 20, 16); 226610037SARM gem5 Developers 226710037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 226810037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 226910037SARM gem5 Developers 227010037SARM gem5 Developers uint8_t size = findLsbSet(imm5); 227110037SARM gem5 Developers uint8_t index = bits(imm5, 4, size + 1); 227210037SARM gem5 Developers 227310037SARM gem5 Developers return decodeNeonUTwoShiftUReg<DupElemScX>( 227410037SARM gem5 Developers size, machInst, vd, vn, index); 227510037SARM gem5 Developers } 227610037SARM gem5 Developers 227710037SARM gem5 Developers StaticInstPtr 227810037SARM gem5 Developers decodeNeonScIndexedElem(ExtMachInst machInst) 227910037SARM gem5 Developers { 228010037SARM gem5 Developers uint8_t u = bits(machInst, 29); 228110037SARM gem5 Developers uint8_t size = bits(machInst, 23, 22); 228210037SARM gem5 Developers uint8_t L = bits(machInst, 21); 228310037SARM gem5 Developers uint8_t M = bits(machInst, 20); 228410037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 12); 228510037SARM gem5 Developers uint8_t H = bits(machInst, 11); 228610037SARM gem5 Developers 228710037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 228810037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 228910037SARM gem5 Developers IntRegIndex vm_bf = (IntRegIndex) (uint8_t) bits(machInst, 19, 16); 229010037SARM gem5 Developers 229110037SARM gem5 Developers uint8_t index = 0; 229210037SARM gem5 Developers uint8_t index_fp = 0; 229310037SARM gem5 Developers uint8_t vmh = 0; 229410037SARM gem5 Developers uint8_t sz_L = bits(machInst, 22, 21); 229510037SARM gem5 Developers 229610037SARM gem5 Developers // Index and 2nd register operand for integer instructions 229710037SARM gem5 Developers if (size == 0x1) { 229810037SARM gem5 Developers index = (H << 2) | (L << 1) | M; 229910037SARM gem5 Developers // vmh = 0; 230010037SARM gem5 Developers } else if (size == 0x2) { 230110037SARM gem5 Developers index = (H << 1) | L; 230210037SARM gem5 Developers vmh = M; 230310037SARM gem5 Developers } else if (size == 0x3) { 230410037SARM gem5 Developers index = H; 230510037SARM gem5 Developers vmh = M; 230610037SARM gem5 Developers } 230710037SARM gem5 Developers IntRegIndex vm = (IntRegIndex) (uint8_t) (vmh << 4 | vm_bf); 230810037SARM gem5 Developers 230910037SARM gem5 Developers // Index and 2nd register operand for FP instructions 231010037SARM gem5 Developers vmh = M; 231110037SARM gem5 Developers if ((size & 0x1) == 0) { 231210037SARM gem5 Developers index_fp = (H << 1) | L; 231310037SARM gem5 Developers } else if (L == 0) { 231410037SARM gem5 Developers index_fp = H; 231510037SARM gem5 Developers } 231610037SARM gem5 Developers IntRegIndex vm_fp = (IntRegIndex) (uint8_t) (vmh << 4 | vm_bf); 231710037SARM gem5 Developers 231810037SARM gem5 Developers if (u && opcode != 9) 231910037SARM gem5 Developers return new Unknown64(machInst); 232010037SARM gem5 Developers 232110037SARM gem5 Developers switch (opcode) { 232210037SARM gem5 Developers case 0x1: 232310037SARM gem5 Developers if (size < 2 || sz_L == 0x3) 232410037SARM gem5 Developers return new Unknown64(machInst); 232510037SARM gem5 Developers else 232610037SARM gem5 Developers return decodeNeonUThreeImmScFpReg<FmlaElemScX>( 232710037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm_fp, index_fp); 232810037SARM gem5 Developers case 0x3: 232910037SARM gem5 Developers if (size == 0x0 || size == 0x3) 233010037SARM gem5 Developers return new Unknown64(machInst); 233110037SARM gem5 Developers else 233210037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmlalElemScX>( 233310037SARM gem5 Developers size, machInst, vd, vn, vm, index); 233410037SARM gem5 Developers case 0x5: 233510037SARM gem5 Developers if (size < 2 || sz_L == 0x3) 233610037SARM gem5 Developers return new Unknown64(machInst); 233710037SARM gem5 Developers else 233810037SARM gem5 Developers return decodeNeonUThreeImmScFpReg<FmlsElemScX>( 233910037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm_fp, index_fp); 234010037SARM gem5 Developers case 0x7: 234110037SARM gem5 Developers if (size == 0x0 || size == 0x3) 234210037SARM gem5 Developers return new Unknown64(machInst); 234310037SARM gem5 Developers else 234410037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmlslElemScX>( 234510037SARM gem5 Developers size, machInst, vd, vn, vm, index); 234610037SARM gem5 Developers case 0x9: 234710037SARM gem5 Developers if (size < 2 || sz_L == 0x3) 234810037SARM gem5 Developers return new Unknown64(machInst); 234910037SARM gem5 Developers if (u) 235010037SARM gem5 Developers return decodeNeonUThreeImmScFpReg<FmulxElemScX>( 235110037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm_fp, index_fp); 235210037SARM gem5 Developers else 235310037SARM gem5 Developers return decodeNeonUThreeImmScFpReg<FmulElemScX>( 235410037SARM gem5 Developers size & 0x1, machInst, vd, vn, vm_fp, index_fp); 235510037SARM gem5 Developers case 0xb: 235610037SARM gem5 Developers if (size == 0x0 || size == 0x3) 235710037SARM gem5 Developers return new Unknown64(machInst); 235810037SARM gem5 Developers else 235910037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmullElemScX>( 236010037SARM gem5 Developers size, machInst, vd, vn, vm, index); 236110037SARM gem5 Developers case 0xc: 236210037SARM gem5 Developers if (size == 0x0 || size == 0x3) 236310037SARM gem5 Developers return new Unknown64(machInst); 236410037SARM gem5 Developers else 236510037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqdmulhElemScX>( 236610037SARM gem5 Developers size, machInst, vd, vn, vm, index); 236710037SARM gem5 Developers case 0xd: 236810037SARM gem5 Developers if (size == 0x0 || size == 0x3) 236910037SARM gem5 Developers return new Unknown64(machInst); 237010037SARM gem5 Developers else 237110037SARM gem5 Developers return decodeNeonSThreeImmHAndWReg<SqrdmulhElemScX>( 237210037SARM gem5 Developers size, machInst, vd, vn, vm, index); 237310037SARM gem5 Developers default: 237410037SARM gem5 Developers return new Unknown64(machInst); 237510037SARM gem5 Developers } 237610037SARM gem5 Developers } 237710037SARM gem5 Developers 237810037SARM gem5 Developers StaticInstPtr 237910037SARM gem5 Developers decodeNeonScShiftByImm(ExtMachInst machInst) 238010037SARM gem5 Developers { 238110037SARM gem5 Developers bool u = bits(machInst, 29); 238210037SARM gem5 Developers uint8_t immh = bits(machInst, 22, 19); 238310037SARM gem5 Developers uint8_t immb = bits(machInst, 18, 16); 238410037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 11); 238510037SARM gem5 Developers 238610037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 238710037SARM gem5 Developers IntRegIndex vn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 238810037SARM gem5 Developers 238910037SARM gem5 Developers uint8_t immh3 = bits(machInst, 22); 239010037SARM gem5 Developers uint8_t size = findMsbSet(immh); 239110037SARM gem5 Developers int shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 239210037SARM gem5 Developers 239310037SARM gem5 Developers if (immh == 0x0) 239410037SARM gem5 Developers return new Unknown64(machInst); 239510037SARM gem5 Developers 239610037SARM gem5 Developers switch (opcode) { 239710037SARM gem5 Developers case 0x00: 239810037SARM gem5 Developers if (!immh3) 239910037SARM gem5 Developers return new Unknown64(machInst); 240010037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 240110037SARM gem5 Developers if (u) 240210037SARM gem5 Developers return new UshrDX<uint64_t>(machInst, vd, vn, shiftAmt); 240310037SARM gem5 Developers else 240410037SARM gem5 Developers return new SshrDX<int64_t>(machInst, vd, vn, shiftAmt); 240510037SARM gem5 Developers case 0x02: 240610037SARM gem5 Developers if (!immh3) 240710037SARM gem5 Developers return new Unknown64(machInst); 240810037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 240910037SARM gem5 Developers if (u) 241010037SARM gem5 Developers return new UsraDX<uint64_t>(machInst, vd, vn, shiftAmt); 241110037SARM gem5 Developers else 241210037SARM gem5 Developers return new SsraDX<int64_t>(machInst, vd, vn, shiftAmt); 241310037SARM gem5 Developers case 0x04: 241410037SARM gem5 Developers if (!immh3) 241510037SARM gem5 Developers return new Unknown64(machInst); 241610037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 241710037SARM gem5 Developers if (u) 241810037SARM gem5 Developers return new UrshrDX<uint64_t>(machInst, vd, vn, shiftAmt); 241910037SARM gem5 Developers else 242010037SARM gem5 Developers return new SrshrDX<int64_t>(machInst, vd, vn, shiftAmt); 242110037SARM gem5 Developers case 0x06: 242210037SARM gem5 Developers if (!immh3) 242310037SARM gem5 Developers return new Unknown64(machInst); 242410037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 242510037SARM gem5 Developers if (u) 242610037SARM gem5 Developers return new UrsraDX<uint64_t>(machInst, vd, vn, shiftAmt); 242710037SARM gem5 Developers else 242810037SARM gem5 Developers return new SrsraDX<int64_t>(machInst, vd, vn, shiftAmt); 242910037SARM gem5 Developers case 0x08: 243010037SARM gem5 Developers if (!immh3) 243110037SARM gem5 Developers return new Unknown64(machInst); 243210037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 243310037SARM gem5 Developers if (u) 243410037SARM gem5 Developers return new SriDX<uint64_t>(machInst, vd, vn, shiftAmt); 243510037SARM gem5 Developers else 243610037SARM gem5 Developers return new Unknown64(machInst); 243710037SARM gem5 Developers case 0x0a: 243810037SARM gem5 Developers if (!immh3) 243910037SARM gem5 Developers return new Unknown64(machInst); 244010037SARM gem5 Developers shiftAmt = ((immh << 3) | immb) - (8 << size); 244110037SARM gem5 Developers if (u) 244210037SARM gem5 Developers return new SliDX<uint64_t>(machInst, vd, vn, shiftAmt); 244310037SARM gem5 Developers else 244410037SARM gem5 Developers return new ShlDX<uint64_t>(machInst, vd, vn, shiftAmt); 244510037SARM gem5 Developers case 0x0c: 244610037SARM gem5 Developers if (u) { 244710037SARM gem5 Developers shiftAmt = ((immh << 3) | immb) - (8 << size); 244810037SARM gem5 Developers return decodeNeonSTwoShiftUReg<SqshluScX>( 244910037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 245010037SARM gem5 Developers } else { 245110037SARM gem5 Developers return new Unknown64(machInst); 245210037SARM gem5 Developers } 245310037SARM gem5 Developers case 0x0e: 245410037SARM gem5 Developers shiftAmt = ((immh << 3) | immb) - (8 << size); 245510037SARM gem5 Developers if (u) 245610037SARM gem5 Developers return decodeNeonUTwoShiftUReg<UqshlImmScX>( 245710037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 245810037SARM gem5 Developers else 245910037SARM gem5 Developers return decodeNeonSTwoShiftUReg<SqshlImmScX>( 246010037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 246110037SARM gem5 Developers case 0x10: 246210037SARM gem5 Developers if (!u || immh3) 246310037SARM gem5 Developers return new Unknown64(machInst); 246410037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 246510037SARM gem5 Developers return decodeNeonSTwoShiftUSReg<SqshrunScX>( 246610037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 246710037SARM gem5 Developers case 0x11: 246810037SARM gem5 Developers if (!u || immh3) 246910037SARM gem5 Developers return new Unknown64(machInst); 247010037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 247110037SARM gem5 Developers return decodeNeonSTwoShiftUSReg<SqrshrunScX>( 247210037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 247310037SARM gem5 Developers case 0x12: 247410037SARM gem5 Developers if (immh3) 247510037SARM gem5 Developers return new Unknown64(machInst); 247610037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 247710037SARM gem5 Developers if (u) 247810037SARM gem5 Developers return decodeNeonUTwoShiftUSReg<UqshrnScX>( 247910037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 248010037SARM gem5 Developers else 248110037SARM gem5 Developers return decodeNeonSTwoShiftUSReg<SqshrnScX>( 248210037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 248310037SARM gem5 Developers case 0x13: 248410037SARM gem5 Developers if (immh3) 248510037SARM gem5 Developers return new Unknown64(machInst); 248610037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 248710037SARM gem5 Developers if (u) 248810037SARM gem5 Developers return decodeNeonUTwoShiftUSReg<UqrshrnScX>( 248910037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 249010037SARM gem5 Developers else 249110037SARM gem5 Developers return decodeNeonSTwoShiftUSReg<SqrshrnScX>( 249210037SARM gem5 Developers size, machInst, vd, vn, shiftAmt); 249310037SARM gem5 Developers case 0x1c: 249410037SARM gem5 Developers if (immh < 0x4) 249510037SARM gem5 Developers return new Unknown64(machInst); 249610037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 249710037SARM gem5 Developers if (u) { 249810037SARM gem5 Developers return decodeNeonUTwoShiftUFpReg<UcvtfFixedScX>( 249910037SARM gem5 Developers size & 0x1, machInst, vd, vn, shiftAmt); 250010037SARM gem5 Developers } else { 250110037SARM gem5 Developers if (size & 0x1) 250210037SARM gem5 Developers return new ScvtfFixedScDX<uint64_t>(machInst, vd, vn, 250310037SARM gem5 Developers shiftAmt); 250410037SARM gem5 Developers else 250510037SARM gem5 Developers return new ScvtfFixedScSX<uint32_t>(machInst, vd, vn, 250610037SARM gem5 Developers shiftAmt); 250710037SARM gem5 Developers } 250810037SARM gem5 Developers case 0x1f: 250910037SARM gem5 Developers if (immh < 0x4) 251010037SARM gem5 Developers return new Unknown64(machInst); 251110037SARM gem5 Developers shiftAmt = (8 << (size + 1)) - ((immh << 3) | immb); 251210037SARM gem5 Developers if (u) 251310037SARM gem5 Developers return decodeNeonUTwoShiftUFpReg<FcvtzuFixedScX>( 251410037SARM gem5 Developers size & 0x1, machInst, vd, vn, shiftAmt); 251510037SARM gem5 Developers else 251610037SARM gem5 Developers return decodeNeonUTwoShiftUFpReg<FcvtzsFixedScX>( 251710037SARM gem5 Developers size & 0x1, machInst, vd, vn, shiftAmt); 251810037SARM gem5 Developers default: 251910037SARM gem5 Developers return new Unknown64(machInst); 252010037SARM gem5 Developers } 252110037SARM gem5 Developers } 252210037SARM gem5 Developers 252310037SARM gem5 Developers StaticInstPtr 252410037SARM gem5 Developers decodeNeonMem(ExtMachInst machInst) 252510037SARM gem5 Developers { 252610037SARM gem5 Developers uint8_t dataSize = bits(machInst, 30) ? 128 : 64; 252710037SARM gem5 Developers bool multiple = bits(machInst, 24, 23) < 0x2; 252810037SARM gem5 Developers bool load = bits(machInst, 22); 252910037SARM gem5 Developers 253010037SARM gem5 Developers uint8_t numStructElems = 0; 253110037SARM gem5 Developers uint8_t numRegs = 0; 253210037SARM gem5 Developers 253310037SARM gem5 Developers if (multiple) { // AdvSIMD load/store multiple structures 253410037SARM gem5 Developers uint8_t opcode = bits(machInst, 15, 12); 253510037SARM gem5 Developers uint8_t eSize = bits(machInst, 11, 10); 253610037SARM gem5 Developers bool wb = !(bits(machInst, 20, 16) == 0x0 && !bits(machInst, 23)); 253710037SARM gem5 Developers 253810037SARM gem5 Developers switch (opcode) { 253910037SARM gem5 Developers case 0x0: // LD/ST4 (4 regs) 254010037SARM gem5 Developers numStructElems = 4; 254110037SARM gem5 Developers numRegs = 4; 254210037SARM gem5 Developers break; 254310037SARM gem5 Developers case 0x2: // LD/ST1 (4 regs) 254410037SARM gem5 Developers numStructElems = 1; 254510037SARM gem5 Developers numRegs = 4; 254610037SARM gem5 Developers break; 254710037SARM gem5 Developers case 0x4: // LD/ST3 (3 regs) 254810037SARM gem5 Developers numStructElems = 3; 254910037SARM gem5 Developers numRegs = 3; 255010037SARM gem5 Developers break; 255110037SARM gem5 Developers case 0x6: // LD/ST1 (3 regs) 255210037SARM gem5 Developers numStructElems = 1; 255310037SARM gem5 Developers numRegs = 3; 255410037SARM gem5 Developers break; 255510037SARM gem5 Developers case 0x7: // LD/ST1 (1 reg) 255610037SARM gem5 Developers numStructElems = 1; 255710037SARM gem5 Developers numRegs = 1; 255810037SARM gem5 Developers break; 255910037SARM gem5 Developers case 0x8: // LD/ST2 (2 regs) 256010037SARM gem5 Developers numStructElems = 2; 256110037SARM gem5 Developers numRegs = 2; 256210037SARM gem5 Developers break; 256310037SARM gem5 Developers case 0xa: // LD/ST1 (2 regs) 256410037SARM gem5 Developers numStructElems = 1; 256510037SARM gem5 Developers numRegs = 2; 256610037SARM gem5 Developers break; 256710037SARM gem5 Developers default: 256810037SARM gem5 Developers return new Unknown64(machInst); 256910037SARM gem5 Developers } 257010037SARM gem5 Developers 257110037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 257210037SARM gem5 Developers IntRegIndex rn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 257310037SARM gem5 Developers IntRegIndex rm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 257410037SARM gem5 Developers 257510037SARM gem5 Developers if (load) { 257610037SARM gem5 Developers return new VldMult64(machInst, rn, vd, rm, eSize, dataSize, 257710037SARM gem5 Developers numStructElems, numRegs, wb); 257810037SARM gem5 Developers } else { 257910037SARM gem5 Developers return new VstMult64(machInst, rn, vd, rm, eSize, dataSize, 258010037SARM gem5 Developers numStructElems, numRegs, wb); 258110037SARM gem5 Developers } 258210037SARM gem5 Developers } else { // AdvSIMD load/store single structure 258310037SARM gem5 Developers uint8_t scale = bits(machInst, 15, 14); 258410037SARM gem5 Developers uint8_t numStructElems = (((uint8_t) bits(machInst, 13) << 1) | 258510037SARM gem5 Developers (uint8_t) bits(machInst, 21)) + 1; 258610037SARM gem5 Developers uint8_t index = 0; 258710037SARM gem5 Developers bool wb = !(bits(machInst, 20, 16) == 0x0 && !bits(machInst, 23)); 258810037SARM gem5 Developers bool replicate = false; 258910037SARM gem5 Developers 259010037SARM gem5 Developers switch (scale) { 259110037SARM gem5 Developers case 0x0: 259210037SARM gem5 Developers index = ((uint8_t) bits(machInst, 30) << 3) | 259310037SARM gem5 Developers ((uint8_t) bits(machInst, 12) << 2) | 259410037SARM gem5 Developers (uint8_t) bits(machInst, 11, 10); 259510037SARM gem5 Developers break; 259610037SARM gem5 Developers case 0x1: 259710037SARM gem5 Developers index = ((uint8_t) bits(machInst, 30) << 2) | 259810037SARM gem5 Developers ((uint8_t) bits(machInst, 12) << 1) | 259910037SARM gem5 Developers (uint8_t) bits(machInst, 11); 260010037SARM gem5 Developers break; 260110037SARM gem5 Developers case 0x2: 260210037SARM gem5 Developers if (bits(machInst, 10) == 0x0) { 260310037SARM gem5 Developers index = ((uint8_t) bits(machInst, 30) << 1) | 260410037SARM gem5 Developers bits(machInst, 12); 260510037SARM gem5 Developers } else { 260610037SARM gem5 Developers index = (uint8_t) bits(machInst, 30); 260710037SARM gem5 Developers scale = 0x3; 260810037SARM gem5 Developers } 260910037SARM gem5 Developers break; 261010037SARM gem5 Developers case 0x3: 261110037SARM gem5 Developers scale = bits(machInst, 11, 10); 261210037SARM gem5 Developers replicate = true; 261310037SARM gem5 Developers break; 261410037SARM gem5 Developers default: 261510037SARM gem5 Developers return new Unknown64(machInst); 261610037SARM gem5 Developers } 261710037SARM gem5 Developers 261810037SARM gem5 Developers uint8_t eSize = scale; 261910037SARM gem5 Developers 262010037SARM gem5 Developers IntRegIndex vd = (IntRegIndex) (uint8_t) bits(machInst, 4, 0); 262110037SARM gem5 Developers IntRegIndex rn = (IntRegIndex) (uint8_t) bits(machInst, 9, 5); 262210037SARM gem5 Developers IntRegIndex rm = (IntRegIndex) (uint8_t) bits(machInst, 20, 16); 262310037SARM gem5 Developers 262410037SARM gem5 Developers if (load) { 262510037SARM gem5 Developers return new VldSingle64(machInst, rn, vd, rm, eSize, dataSize, 262610037SARM gem5 Developers numStructElems, index, wb, replicate); 262710037SARM gem5 Developers } else { 262810037SARM gem5 Developers return new VstSingle64(machInst, rn, vd, rm, eSize, dataSize, 262910037SARM gem5 Developers numStructElems, index, wb, replicate); 263010037SARM gem5 Developers } 263110037SARM gem5 Developers } 263210037SARM gem5 Developers } 263310037SARM gem5 Developers} 263410037SARM gem5 Developers}}; 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