mem.isa revision 7131:ab3a70a37ca8
1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating 9// to a hardware implementation of the functionality of the software 10// licensed hereunder. You may use the software subject to the license 11// terms below provided that you ensure that this notice is replicated 12// unmodified and in its entirety in all distributions of the software, 13// modified or unmodified, in source code or in binary form. 14// 15// Copyright (c) 2007-2008 The Florida State University 16// All rights reserved. 17// 18// Redistribution and use in source and binary forms, with or without 19// modification, are permitted provided that the following conditions are 20// met: redistributions of source code must retain the above copyright 21// notice, this list of conditions and the following disclaimer; 22// redistributions in binary form must reproduce the above copyright 23// notice, this list of conditions and the following disclaimer in the 24// documentation and/or other materials provided with the distribution; 25// neither the name of the copyright holders nor the names of its 26// contributors may be used to endorse or promote products derived from 27// this software without specific prior written permission. 28// 29// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40// 41// Authors: Gabe Black 42 43def format AddrMode2(imm) {{ 44 if eval(imm): 45 imm = True 46 else: 47 imm = False 48 49 def buildPUBWLCase(p, u, b, w, l): 50 return (p << 4) + (u << 3) + (b << 2) + (w << 1) + (l << 0) 51 52 header_output = decoder_output = exec_output = "" 53 decode_block = "switch(PUBWL) {\n" 54 55 # Loop over all the values of p, u, b, w and l and build instructions and 56 # a decode block for them. 57 for p in (0, 1): 58 for u in (0, 1): 59 for b in (0, 1): 60 for w in (0, 1): 61 post = (p == 0) 62 user = (p == 0 and w == 1) 63 writeback = (p == 0 or w == 1) 64 add = (u == 1) 65 if b == 0: 66 size = 4 67 else: 68 size = 1 69 if add: 70 addStr = "true" 71 else: 72 addStr = "false" 73 if imm: 74 newDecode = "return new %s(machInst, RD, RN," + \ 75 "%s, machInst.immed11_0);" 76 loadClass = loadImmClassName(post, add, writeback, 77 size, False, user) 78 storeClass = storeImmClassName(post, add, writeback, 79 size, False, user) 80 loadDecode = newDecode % (loadClass, addStr) 81 storeDecode = newDecode % (storeClass, addStr) 82 else: 83 newDecode = "return new %s(machInst, RD, RN, %s," + \ 84 "machInst.shiftSize," + \ 85 "machInst.shift, RM);" 86 loadClass = loadRegClassName(post, add, writeback, 87 size, False, user) 88 storeClass = storeRegClassName(post, add, writeback, 89 size, False, user) 90 loadDecode = newDecode % (loadClass, addStr) 91 storeDecode = newDecode % (storeClass, addStr) 92 decode = ''' 93 case %#x: 94 {%s} 95 break; 96 ''' 97 decode_block += decode % \ 98 (buildPUBWLCase(p,u,b,w,1), loadDecode) 99 decode_block += decode % \ 100 (buildPUBWLCase(p,u,b,w,0), storeDecode) 101 decode_block += ''' 102 default: 103 return new Unknown(machInst); 104 break; 105 }''' 106}}; 107 108def format AddrMode3() {{ 109 decode = ''' 110 { 111 const uint32_t op1 = bits(machInst, 24, 20); 112 const uint32_t op2 = bits(machInst, 6, 5); 113 const uint32_t puiw = bits(machInst, 24, 21); 114 const uint32_t imm = IMMED_HI_11_8 << 4 | IMMED_LO_3_0; 115 switch (op2) { 116 case 0x1: 117 if (op1 & 0x1) { 118 %(ldrh)s 119 } else { 120 %(strh)s 121 } 122 case 0x2: 123 if (op1 & 0x1) { 124 %(ldrsb)s 125 } else { 126 %(ldrd)s 127 } 128 case 0x3: 129 if (op1 & 0x1) { 130 %(ldrsh)s 131 } else { 132 %(strd)s 133 } 134 default: 135 return new Unknown(machInst); 136 } 137 } 138 ''' 139 140 def decodePuiwCase(load, d, p, u, i, w, size=4, sign=False): 141 post = (p == 0) 142 user = (p == 0 and w == 1) 143 writeback = (p == 0 or w == 1) 144 add = (u == 1) 145 caseVal = (p << 3) + (u << 2) + (i << 1) + (w << 0) 146 decode = ''' 147 case %#x: 148 return new '''% caseVal 149 if add: 150 addStr = "true" 151 else: 152 addStr = "false" 153 if i: 154 if load: 155 if d: 156 className = loadDoubleImmClassName(post, add, writeback) 157 else: 158 className = loadImmClassName(post, add, writeback, \ 159 size=size, sign=sign, \ 160 user=user) 161 else: 162 if d: 163 className = storeDoubleImmClassName(post, add, writeback) 164 else: 165 className = storeImmClassName(post, add, writeback, \ 166 size=size, sign=sign, \ 167 user=user) 168 decode += ("%s(machInst, RT, RN, %s, imm);\n" % \ 169 (className, addStr)) 170 else: 171 if load: 172 if d: 173 className = loadDoubleRegClassName(post, add, writeback) 174 else: 175 className = loadRegClassName(post, add, writeback, \ 176 size=size, sign=sign, \ 177 user=user) 178 else: 179 if d: 180 className = storeDoubleRegClassName(post, add, writeback) 181 else: 182 className = storeRegClassName(post, add, writeback, \ 183 size=size, sign=sign, \ 184 user=user) 185 decode += ("%s(machInst, RT, RN, %s, 0, LSL, RM);\n" % \ 186 (className, addStr)) 187 return decode 188 189 def decodePuiw(load, d, size=4, sign=False): 190 global decodePuiwCase 191 decode = "switch (puiw) {\n" 192 for p in (0, 1): 193 for u in (0, 1): 194 for i in (0, 1): 195 for w in (0, 1): 196 decode += decodePuiwCase(load, d, p, u, i, w, 197 size, sign) 198 decode += ''' 199 default: 200 return new Unknown(machInst); 201 } 202 ''' 203 return decode 204 205 subs = { 206 "ldrh" : decodePuiw(True, False, size=2), 207 "strh" : decodePuiw(False, False, size=2), 208 "ldrsb" : decodePuiw(True, False, size=1, sign=True), 209 "ldrd" : decodePuiw(True, True), 210 "ldrsh" : decodePuiw(True, False, size=2, sign=True), 211 "strd" : decodePuiw(False, True) 212 } 213 decode_block = decode % subs 214}}; 215 216def format Thumb32LoadWord() {{ 217 decode = ''' 218 { 219 uint32_t op1 = bits(machInst, 24, 23); 220 if (bits(op1, 1) == 0) { 221 uint32_t op2 = bits(machInst, 11, 6); 222 if (HTRN == 0xF) { 223 if (UP) { 224 return new %(literal_u)s(machInst, RT, INTREG_PC, 225 true, IMMED_11_0); 226 } else { 227 return new %(literal)s(machInst, RT, INTREG_PC, 228 false, IMMED_11_0); 229 } 230 } else if (op1 == 0x1) { 231 return new %(imm_pu)s(machInst, RT, RN, true, IMMED_11_0); 232 } else if (op2 == 0) { 233 return new %(register)s(machInst, RT, RN, UP, 234 bits(machInst, 5, 4), LSL, RM); 235 } else if ((op2 & 0x3c) == 0x38) { 236 return new %(ldrt)s(machInst, RT, RN, true, IMMED_7_0); 237 } else if ((op2 & 0x3c) == 0x30 || //P 238 (op2 & 0x24) == 0x24) { //W 239 uint32_t puw = bits(machInst, 10, 8); 240 uint32_t imm = IMMED_7_0; 241 switch (puw) { 242 case 0: 243 case 2: 244 // If we're here, either P or W must have been set. 245 panic("Neither P or W set, but that " 246 "shouldn't be possible.\\n"); 247 case 1: 248 return new %(imm_w)s(machInst, RT, RN, false, imm); 249 case 3: 250 return new %(imm_uw)s(machInst, RT, RN, true, imm); 251 case 4: 252 return new %(imm_p)s(machInst, RT, RN, false, imm); 253 case 5: 254 return new %(imm_pw)s(machInst, RT, RN, false, imm); 255 case 6: 256 return new %(imm_pu)s(machInst, RT, RN, true, imm); 257 case 7: 258 return new %(imm_puw)s(machInst, RT, RN, true, imm); 259 } 260 } 261 } else { 262 return new Unknown(machInst); 263 } 264 } 265 ''' 266 classNames = { 267 "literal_u" : loadImmClassName(False, True, False), 268 "literal" : loadImmClassName(False, False, False), 269 "register" : loadRegClassName(False, True, False), 270 "ldrt" : loadImmClassName(False, True, False, user=True), 271 "imm_w" : loadImmClassName(True, False, True), 272 "imm_uw" : loadImmClassName(True, True, True), 273 "imm_p" : loadImmClassName(False, False, False), 274 "imm_pw" : loadImmClassName(False, False, True), 275 "imm_pu" : loadImmClassName(False, True, False), 276 "imm_puw" : loadImmClassName(False, True, True) 277 } 278 decode_block = decode % classNames 279}}; 280 281def format Thumb32StoreSingle() {{ 282 def buildPuwDecode(size): 283 puwDecode = ''' 284 { 285 uint32_t puw = bits(machInst, 10, 8); 286 uint32_t imm = IMMED_7_0; 287 switch (puw) { 288 case 0: 289 case 2: 290 // If we're here, either P or W must have been set. 291 panic("Neither P or W set, but that " 292 "shouldn't be possible.\\n"); 293 case 1: 294 return new %(imm_w)s(machInst, RT, RN, false, imm); 295 case 3: 296 return new %(imm_uw)s(machInst, RT, RN, true, imm); 297 case 4: 298 return new %(imm_p)s(machInst, RT, RN, false, imm); 299 case 5: 300 return new %(imm_pw)s(machInst, RT, RN, false, imm); 301 case 6: 302 return new %(imm_pu)s(machInst, RT, RN, true, imm); 303 case 7: 304 return new %(imm_puw)s(machInst, RT, RN, true, imm); 305 } 306 } 307 ''' 308 return puwDecode % { 309 "imm_w" : storeImmClassName(True, False, True, size=size), 310 "imm_uw" : storeImmClassName(True, True, True, size=size), 311 "imm_p" : storeImmClassName(False, False, False, size=size), 312 "imm_pw" : storeImmClassName(False, False, True, size=size), 313 "imm_pu" : storeImmClassName(False, True, False, size=size), 314 "imm_puw" : storeImmClassName(False, True, True, size=size) 315 } 316 decode = ''' 317 { 318 uint32_t op1 = bits(machInst, 23, 21); 319 uint32_t op2 = bits(machInst, 11, 6); 320 bool op2Puw = ((op2 & 0x24) == 0x24 || 321 (op2 & 0x3c) == 0x30); 322 if (op1 == 4) { 323 return new %(strb_imm)s(machInst, RT, RN, true, IMMED_11_0); 324 } else if (op1 == 0 && op2Puw) { 325 %(strb_puw)s; 326 } else if (op1 == 0 && ((op2 & 0x3c) == 0x38)) { 327 return new %(strbt)s(machInst, RT, RN, true, IMMED_7_0); 328 } else if (op1 == 0 && op2 == 0) { 329 return new %(strb_reg)s(machInst, RT, RN, true, 330 bits(machInst, 5, 4), LSL, RM); 331 } else if (op1 == 5) { 332 return new %(strh_imm)s(machInst, RT, RN, true, IMMED_11_0); 333 } else if (op1 == 1 && op2Puw) { 334 %(strh_puw)s; 335 } else if (op1 == 1 && ((op2 & 0x3c) == 0x38)) { 336 return new %(strht)s(machInst, RT, RN, true, IMMED_7_0); 337 } else if (op1 == 1 && op2 == 0) { 338 return new %(strh_reg)s(machInst, RT, RN, true, 339 bits(machInst, 5, 4), LSL, RM); 340 } else if (op1 == 6) { 341 return new %(str_imm)s(machInst, RT, RN, true, IMMED_11_0); 342 } else if (op1 == 2 && op2Puw) { 343 %(str_puw)s; 344 } else if (op1 == 2 && ((op2 & 0x3c) == 0x38)) { 345 return new %(strt)s(machInst, RT, RN, true, IMMED_7_0); 346 } else if (op1 == 2 && op2 == 0) { 347 return new %(str_reg)s(machInst, RT, RN, true, 348 bits(machInst, 5, 4), LSL, RM); 349 } else { 350 return new Unknown(machInst); 351 } 352 } 353 ''' 354 classNames = { 355 "strb_imm" : storeImmClassName(False, True, False, size=1), 356 "strb_puw" : buildPuwDecode(1), 357 "strbt" : storeImmClassName(False, True, False, user=True, size=1), 358 "strb_reg" : storeRegClassName(False, True, False, size=1), 359 "strh_imm" : storeImmClassName(False, True, False, size=2), 360 "strh_puw" : buildPuwDecode(2), 361 "strht" : storeImmClassName(False, True, False, user=True, size=2), 362 "strh_reg" : storeRegClassName(False, True, False, size=2), 363 "str_imm" : storeImmClassName(False, True, False), 364 "str_puw" : buildPuwDecode(4), 365 "strt" : storeImmClassName(False, True, False, user=True), 366 "str_reg" : storeRegClassName(False, True, False) 367 } 368 decode_block = decode % classNames 369}}; 370 371def format Thumb16MemReg() {{ 372 decode = ''' 373 { 374 const uint32_t opb = bits(machInst, 11, 9); 375 const uint32_t rt = bits(machInst, 2, 0); 376 const uint32_t rn = bits(machInst, 5, 3); 377 const uint32_t rm = bits(machInst, 8, 6); 378 switch (opb) { 379 case 0x0: 380 return new %(str)s(machInst, rt, rn, true, 0, LSL, rm); 381 case 0x1: 382 return new %(strh)s(machInst, rt, rn, true, 0, LSL, rm); 383 case 0x2: 384 return new %(strb)s(machInst, rt, rn, true, 0, LSL, rm); 385 case 0x3: 386 return new %(ldrsb)s(machInst, rt, rn, true, 0, LSL, rm); 387 case 0x4: 388 return new %(ldr)s(machInst, rt, rn, true, 0, LSL, rm); 389 case 0x5: 390 return new %(ldrh)s(machInst, rt, rn, true, 0, LSL, rm); 391 case 0x6: 392 return new %(ldrb)s(machInst, rt, rn, true, 0, LSL, rm); 393 case 0x7: 394 return new %(ldrsh)s(machInst, rt, rn, true, 0, LSL, rm); 395 } 396 } 397 ''' 398 classNames = { 399 "str" : storeRegClassName(False, True, False), 400 "strh" : storeRegClassName(False, True, False, size=2), 401 "strb" : storeRegClassName(False, True, False, size=1), 402 "ldrsb" : loadRegClassName(False, True, False, sign=True, size=1), 403 "ldr" : loadRegClassName(False, True, False), 404 "ldrh" : loadRegClassName(False, True, False, size=2), 405 "ldrb" : loadRegClassName(False, True, False, size=1), 406 "ldrsh" : loadRegClassName(False, True, False, sign=True, size=2), 407 } 408 decode_block = decode % classNames 409}}; 410 411def format Thumb16MemImm() {{ 412 decode = ''' 413 { 414 const uint32_t opa = bits(machInst, 15, 12); 415 const uint32_t opb = bits(machInst, 11, 9); 416 const uint32_t lrt = bits(machInst, 2, 0); 417 const uint32_t lrn = bits(machInst, 5, 3); 418 const uint32_t hrt = bits(machInst, 10, 8); 419 const uint32_t imm5 = bits(machInst, 10, 6); 420 const uint32_t imm8 = bits(machInst, 7, 0); 421 const bool load = bits(opb, 2); 422 switch (opa) { 423 case 0x6: 424 if (load) { 425 return new %(ldr)s(machInst, lrt, lrn, true, imm5 << 2); 426 } else { 427 return new %(str)s(machInst, lrt, lrn, true, imm5 << 2); 428 } 429 case 0x7: 430 if (load) { 431 return new %(ldrb)s(machInst, lrt, lrn, true, imm5); 432 } else { 433 return new %(strb)s(machInst, lrt, lrn, true, imm5); 434 } 435 case 0x8: 436 if (load) { 437 return new %(ldrh)s(machInst, lrt, lrn, true, imm5 << 1); 438 } else { 439 return new %(strh)s(machInst, lrt, lrn, true, imm5 << 1); 440 } 441 case 0x9: 442 if (load) { 443 return new %(ldr)s(machInst, hrt, INTREG_SP, true, imm8 << 2); 444 } else { 445 return new %(str)s(machInst, hrt, INTREG_SP, true, imm8 << 2); 446 } 447 default: 448 return new Unknown(machInst); 449 } 450 } 451 ''' 452 classNames = { 453 "ldr" : loadImmClassName(False, True, False), 454 "str" : storeImmClassName(False, True, False), 455 "ldrh" : loadImmClassName(False, True, False, size=2), 456 "strh" : storeImmClassName(False, True, False, size=2), 457 "ldrb" : loadImmClassName(False, True, False, size=1), 458 "strb" : storeImmClassName(False, True, False, size=1), 459 } 460 decode_block = decode % classNames 461}}; 462 463def format Thumb16MemLit() {{ 464 decode_block = ''' 465 { 466 const uint32_t rt = bits(machInst, 10, 8); 467 const uint32_t imm8 = bits(machInst, 7, 0); 468 return new %s(machInst, rt, INTREG_PC, true, imm8 << 2); 469 } 470 ''' % loadImmClassName(False, True, False) 471}}; 472 473