xref: /gem5/src/arch/arm/isa/formats/fp.isa

// -*- mode:c++ -*-

// Copyright (c) 2007-2008 The Florida State University
// All rights reserved.
//
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// modification, are permitted provided that the following conditions are
// met: redistributions of source code must retain the above copyright
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// redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
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// neither the name of the copyright holders nor the names of its
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// this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// Authors: Stephen Hines

////////////////////////////////////////////////////////////////////
//
// Floating Point operate instructions
//

output header {{

        /**
         * Base class for FP operations.
         */
        class FPAOp : public PredOp
        {
                protected:

                /// Constructor
                FPAOp(const char *mnem, MachInst _machInst, OpClass __opClass) : PredOp(mnem, _machInst, __opClass)
                {
                }

            //std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
        };

}};

output exec {{
}};

def template FPAExecute {{
        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
        {
                Fault fault = NoFault;

                %(fp_enable_check)s;

                %(op_decl)s;
                %(op_rd)s;

                %(code)s;

                if (arm_predicate(xc->readMiscReg(ArmISA::CPSR), condCode) &&
                        fault == NoFault)
                {
                    %(op_wb)s;
                }

                return fault;
        }
}};

def template FloatDoubleDecode {{
    {
        ArmStaticInst *i = NULL;
        switch (OPCODE_19 << 1 | OPCODE_7)
        {
            case 0:
                i = (ArmStaticInst *)new %(class_name)sS(machInst);
                break;
            case 1:
                i = (ArmStaticInst *)new %(class_name)sD(machInst);
                break;
            case 2:
            case 3:
            default:
                panic("Cannot decode float/double nature of the instruction");
        }
        return i;
    }
}};

// Primary format for float point operate instructions:
def format FloatOp(code, *flags) {{
        orig_code = code

        cblk = code
        iop = InstObjParams(name, Name, 'FPAOp', cblk, flags)
        header_output = BasicDeclare.subst(iop)
        decoder_output = BasicConstructor.subst(iop)
        exec_output = FPAExecute.subst(iop)

        sng_cblk = code
        sng_iop = InstObjParams(name, Name+'S', 'FPAOp', sng_cblk, flags)
        header_output += BasicDeclare.subst(sng_iop)
        decoder_output += BasicConstructor.subst(sng_iop)
        exec_output += FPAExecute.subst(sng_iop)

        dbl_code = re.sub(r'\.sf', '.df', orig_code)

        dbl_cblk = dbl_code
        dbl_iop = InstObjParams(name, Name+'D', 'FPAOp', dbl_cblk, flags)
        header_output += BasicDeclare.subst(dbl_iop)
        decoder_output += BasicConstructor.subst(dbl_iop)
        exec_output += FPAExecute.subst(dbl_iop)

        decode_block = FloatDoubleDecode.subst(iop)
}};

let {{
        calcFPCcCode = '''
        uint16_t _in, _iz, _ic, _iv;

        _in = %(fReg1)s < %(fReg2)s;
        _iz = %(fReg1)s == %(fReg2)s;
        _ic = %(fReg1)s >= %(fReg2)s;
        _iv = (isnan(%(fReg1)s) || isnan(%(fReg2)s)) & 1;

        Cpsr = _in << 31 | _iz << 30 | _ic << 29 | _iv << 28 |
            (Cpsr & 0x0FFFFFFF);
        '''
}};

def format FloatCmp(fReg1, fReg2, *flags) {{
        code = calcFPCcCode % vars()
        iop = InstObjParams(name, Name, 'FPAOp', code, flags)
        header_output = BasicDeclare.subst(iop)
        decoder_output = BasicConstructor.subst(iop)
        decode_block = BasicDecode.subst(iop)
        exec_output = FPAExecute.subst(iop)
}};