fp.isa revision 14176
16019Shines@cs.fsu.edu// -*- mode:c++ -*- 26019Shines@cs.fsu.edu 313738Sciro.santilli@arm.com// Copyright (c) 2010-2011, 2016-2019 ARM Limited 47178Sgblack@eecs.umich.edu// All rights reserved 57178Sgblack@eecs.umich.edu// 67178Sgblack@eecs.umich.edu// The license below extends only to copyright in the software and shall 77178Sgblack@eecs.umich.edu// not be construed as granting a license to any other intellectual 87178Sgblack@eecs.umich.edu// property including but not limited to intellectual property relating 97178Sgblack@eecs.umich.edu// to a hardware implementation of the functionality of the software 107178Sgblack@eecs.umich.edu// licensed hereunder. You may use the software subject to the license 117178Sgblack@eecs.umich.edu// terms below provided that you ensure that this notice is replicated 127178Sgblack@eecs.umich.edu// unmodified and in its entirety in all distributions of the software, 137178Sgblack@eecs.umich.edu// modified or unmodified, in source code or in binary form. 147178Sgblack@eecs.umich.edu// 156019Shines@cs.fsu.edu// Copyright (c) 2007-2008 The Florida State University 166019Shines@cs.fsu.edu// All rights reserved. 176019Shines@cs.fsu.edu// 186019Shines@cs.fsu.edu// Redistribution and use in source and binary forms, with or without 196019Shines@cs.fsu.edu// modification, are permitted provided that the following conditions are 206019Shines@cs.fsu.edu// met: redistributions of source code must retain the above copyright 216019Shines@cs.fsu.edu// notice, this list of conditions and the following disclaimer; 226019Shines@cs.fsu.edu// redistributions in binary form must reproduce the above copyright 236019Shines@cs.fsu.edu// notice, this list of conditions and the following disclaimer in the 246019Shines@cs.fsu.edu// documentation and/or other materials provided with the distribution; 256019Shines@cs.fsu.edu// neither the name of the copyright holders nor the names of its 266019Shines@cs.fsu.edu// contributors may be used to endorse or promote products derived from 276019Shines@cs.fsu.edu// this software without specific prior written permission. 286019Shines@cs.fsu.edu// 296019Shines@cs.fsu.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 306019Shines@cs.fsu.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 316019Shines@cs.fsu.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 326019Shines@cs.fsu.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 336019Shines@cs.fsu.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 346019Shines@cs.fsu.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 356019Shines@cs.fsu.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 366019Shines@cs.fsu.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 376019Shines@cs.fsu.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 386019Shines@cs.fsu.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 396019Shines@cs.fsu.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 406019Shines@cs.fsu.edu// 416019Shines@cs.fsu.edu// Authors: Stephen Hines 426019Shines@cs.fsu.edu 436019Shines@cs.fsu.edu//////////////////////////////////////////////////////////////////// 446019Shines@cs.fsu.edu// 456019Shines@cs.fsu.edu// Floating Point operate instructions 466019Shines@cs.fsu.edu// 476019Shines@cs.fsu.edu 487639Sgblack@eecs.umich.eduoutput header {{ 497639Sgblack@eecs.umich.edu 507639Sgblack@eecs.umich.edu template<template <typename T> class Base> 517639Sgblack@eecs.umich.edu StaticInstPtr 527639Sgblack@eecs.umich.edu newNeonMemInst(const unsigned size, 537639Sgblack@eecs.umich.edu const ExtMachInst &machInst, 547639Sgblack@eecs.umich.edu const RegIndex dest, const RegIndex ra, 557639Sgblack@eecs.umich.edu const uint32_t imm, const unsigned extraMemFlags) 567639Sgblack@eecs.umich.edu { 577639Sgblack@eecs.umich.edu switch (size) { 587639Sgblack@eecs.umich.edu case 0: 597639Sgblack@eecs.umich.edu return new Base<uint8_t>(machInst, dest, ra, imm, extraMemFlags); 607639Sgblack@eecs.umich.edu case 1: 617639Sgblack@eecs.umich.edu return new Base<uint16_t>(machInst, dest, ra, imm, extraMemFlags); 627639Sgblack@eecs.umich.edu case 2: 637639Sgblack@eecs.umich.edu return new Base<uint32_t>(machInst, dest, ra, imm, extraMemFlags); 647639Sgblack@eecs.umich.edu case 3: 657639Sgblack@eecs.umich.edu return new Base<uint64_t>(machInst, dest, ra, imm, extraMemFlags); 667639Sgblack@eecs.umich.edu default: 677639Sgblack@eecs.umich.edu panic("Unrecognized width %d for Neon mem inst.\n", (1 << size)); 687639Sgblack@eecs.umich.edu } 697639Sgblack@eecs.umich.edu } 707639Sgblack@eecs.umich.edu 717639Sgblack@eecs.umich.edu template<template <typename T> class Base> 727639Sgblack@eecs.umich.edu StaticInstPtr 737639Sgblack@eecs.umich.edu newNeonMixInst(const unsigned size, 747639Sgblack@eecs.umich.edu const ExtMachInst &machInst, 757639Sgblack@eecs.umich.edu const RegIndex dest, const RegIndex op1, 767639Sgblack@eecs.umich.edu const uint32_t step) 777639Sgblack@eecs.umich.edu { 787639Sgblack@eecs.umich.edu switch (size) { 797639Sgblack@eecs.umich.edu case 0: 807639Sgblack@eecs.umich.edu return new Base<uint8_t>(machInst, dest, op1, step); 817639Sgblack@eecs.umich.edu case 1: 827639Sgblack@eecs.umich.edu return new Base<uint16_t>(machInst, dest, op1, step); 837639Sgblack@eecs.umich.edu case 2: 847639Sgblack@eecs.umich.edu return new Base<uint32_t>(machInst, dest, op1, step); 857639Sgblack@eecs.umich.edu case 3: 867639Sgblack@eecs.umich.edu return new Base<uint64_t>(machInst, dest, op1, step); 877639Sgblack@eecs.umich.edu default: 887639Sgblack@eecs.umich.edu panic("Unrecognized width %d for Neon mem inst.\n", (1 << size)); 897639Sgblack@eecs.umich.edu } 907639Sgblack@eecs.umich.edu } 917639Sgblack@eecs.umich.edu 927639Sgblack@eecs.umich.edu}}; 937639Sgblack@eecs.umich.edu 947356Sgblack@eecs.umich.edulet {{ 957356Sgblack@eecs.umich.edu header_output = ''' 967356Sgblack@eecs.umich.edu StaticInstPtr 977435Sgblack@eecs.umich.edu decodeNeonMem(ExtMachInst machInst); 987435Sgblack@eecs.umich.edu 997435Sgblack@eecs.umich.edu StaticInstPtr 1007435Sgblack@eecs.umich.edu decodeNeonData(ExtMachInst machInst); 1017435Sgblack@eecs.umich.edu ''' 1027435Sgblack@eecs.umich.edu 1037435Sgblack@eecs.umich.edu decoder_output = ''' 1047435Sgblack@eecs.umich.edu StaticInstPtr 1057435Sgblack@eecs.umich.edu decodeNeonMem(ExtMachInst machInst) 1067435Sgblack@eecs.umich.edu { 1077435Sgblack@eecs.umich.edu const uint32_t b = bits(machInst, 11, 8); 1087639Sgblack@eecs.umich.edu const bool single = bits(machInst, 23); 1097639Sgblack@eecs.umich.edu const bool singleAll = single && (bits(b, 3, 2) == 3); 1107639Sgblack@eecs.umich.edu const bool load = bits(machInst, 21); 1117435Sgblack@eecs.umich.edu 1127639Sgblack@eecs.umich.edu unsigned width = 0; 1137639Sgblack@eecs.umich.edu 1147639Sgblack@eecs.umich.edu if (single) { 1157639Sgblack@eecs.umich.edu width = bits(b, 1, 0) + 1; 1167639Sgblack@eecs.umich.edu } else { 1177639Sgblack@eecs.umich.edu switch (bits(b, 3, 1)) { 1187639Sgblack@eecs.umich.edu case 0x0: width = 4; 1197639Sgblack@eecs.umich.edu break; 1207639Sgblack@eecs.umich.edu case 0x1: width = (b & 0x1) ? 2 : 1; 1217639Sgblack@eecs.umich.edu break; 1227639Sgblack@eecs.umich.edu case 0x2: width = 3; 1237639Sgblack@eecs.umich.edu break; 1247639Sgblack@eecs.umich.edu case 0x3: width = 1; 1257639Sgblack@eecs.umich.edu break; 1267639Sgblack@eecs.umich.edu case 0x4: width = 2; 1277639Sgblack@eecs.umich.edu break; 1287639Sgblack@eecs.umich.edu case 0x5: 1297639Sgblack@eecs.umich.edu if ((b & 0x1) == 0) { 1307639Sgblack@eecs.umich.edu width = 1; 1317639Sgblack@eecs.umich.edu break; 1327639Sgblack@eecs.umich.edu } 13312595Ssiddhesh.poyarekar@gmail.com M5_FALLTHROUGH; 1347639Sgblack@eecs.umich.edu default: 1357639Sgblack@eecs.umich.edu return new Unknown(machInst); 1367639Sgblack@eecs.umich.edu } 1377639Sgblack@eecs.umich.edu } 1387639Sgblack@eecs.umich.edu assert(width > 0 && width <= 4); 1397639Sgblack@eecs.umich.edu 1407639Sgblack@eecs.umich.edu const RegIndex rm = (RegIndex)(uint32_t)bits(machInst, 3, 0); 1417639Sgblack@eecs.umich.edu const RegIndex rn = (RegIndex)(uint32_t)bits(machInst, 19, 16); 1427639Sgblack@eecs.umich.edu const RegIndex vd = (RegIndex)(uint32_t)(bits(machInst, 15, 12) | 1437639Sgblack@eecs.umich.edu bits(machInst, 22) << 4); 1447639Sgblack@eecs.umich.edu const uint32_t type = bits(machInst, 11, 8); 1457639Sgblack@eecs.umich.edu uint32_t size = 0; 1468144SAli.Saidi@ARM.com uint32_t align = TLB::MustBeOne; 1477639Sgblack@eecs.umich.edu unsigned inc = 1; 1487639Sgblack@eecs.umich.edu unsigned regs = 1; 1497639Sgblack@eecs.umich.edu unsigned lane = 0; 1507639Sgblack@eecs.umich.edu if (single) { 1517639Sgblack@eecs.umich.edu if (singleAll) { 1527639Sgblack@eecs.umich.edu size = bits(machInst, 7, 6); 1537639Sgblack@eecs.umich.edu bool t = bits(machInst, 5); 15410037SARM gem5 Developers align = size | TLB::AllowUnaligned; 1557639Sgblack@eecs.umich.edu if (width == 1) { 1567639Sgblack@eecs.umich.edu regs = t ? 2 : 1; 1577639Sgblack@eecs.umich.edu inc = 1; 1587639Sgblack@eecs.umich.edu } else { 1597639Sgblack@eecs.umich.edu regs = width; 1607639Sgblack@eecs.umich.edu inc = t ? 2 : 1; 1617639Sgblack@eecs.umich.edu } 1627639Sgblack@eecs.umich.edu switch (width) { 1637639Sgblack@eecs.umich.edu case 1: 1647639Sgblack@eecs.umich.edu case 2: 1657639Sgblack@eecs.umich.edu if (bits(machInst, 4)) 16610037SARM gem5 Developers align = size + width - 1; 1677639Sgblack@eecs.umich.edu break; 1687639Sgblack@eecs.umich.edu case 3: 1697639Sgblack@eecs.umich.edu break; 1707639Sgblack@eecs.umich.edu case 4: 1717639Sgblack@eecs.umich.edu if (size == 3) { 1727639Sgblack@eecs.umich.edu if (bits(machInst, 4) == 0) 1737639Sgblack@eecs.umich.edu return new Unknown(machInst); 1747639Sgblack@eecs.umich.edu size = 2; 17510037SARM gem5 Developers align = 0x4; 1767639Sgblack@eecs.umich.edu } else if (size == 2) { 1777639Sgblack@eecs.umich.edu if (bits(machInst, 4)) 17810037SARM gem5 Developers align = 0x3; 1797639Sgblack@eecs.umich.edu } else { 1807639Sgblack@eecs.umich.edu if (bits(machInst, 4)) 18110037SARM gem5 Developers align = size + 2; 1827591SAli.Saidi@ARM.com } 1837639Sgblack@eecs.umich.edu break; 1847435Sgblack@eecs.umich.edu } 1857435Sgblack@eecs.umich.edu } else { 1867639Sgblack@eecs.umich.edu size = bits(machInst, 11, 10); 18710037SARM gem5 Developers align = size | TLB::AllowUnaligned; 1887639Sgblack@eecs.umich.edu regs = width; 1897639Sgblack@eecs.umich.edu unsigned indexAlign = bits(machInst, 7, 4); 1907639Sgblack@eecs.umich.edu // If width is 1, inc is always 1. That's overridden later. 1917639Sgblack@eecs.umich.edu switch (size) { 1927639Sgblack@eecs.umich.edu case 0: 1937639Sgblack@eecs.umich.edu inc = 1; 1947639Sgblack@eecs.umich.edu lane = bits(indexAlign, 3, 1); 1957639Sgblack@eecs.umich.edu break; 1967639Sgblack@eecs.umich.edu case 1: 1977639Sgblack@eecs.umich.edu inc = bits(indexAlign, 1) ? 2 : 1; 1987639Sgblack@eecs.umich.edu lane = bits(indexAlign, 3, 2); 1997639Sgblack@eecs.umich.edu break; 2007639Sgblack@eecs.umich.edu case 2: 2017639Sgblack@eecs.umich.edu inc = bits(indexAlign, 2) ? 2 : 1; 2027639Sgblack@eecs.umich.edu lane = bits(indexAlign, 3); 2037639Sgblack@eecs.umich.edu break; 2047639Sgblack@eecs.umich.edu } 2057639Sgblack@eecs.umich.edu // Override inc for width of 1. 2067639Sgblack@eecs.umich.edu if (width == 1) { 2077639Sgblack@eecs.umich.edu inc = 1; 2087639Sgblack@eecs.umich.edu } 2097639Sgblack@eecs.umich.edu switch (width) { 2107639Sgblack@eecs.umich.edu case 1: 2117639Sgblack@eecs.umich.edu switch (size) { 2127639Sgblack@eecs.umich.edu case 0: 2137639Sgblack@eecs.umich.edu break; 2147639Sgblack@eecs.umich.edu case 1: 2157639Sgblack@eecs.umich.edu if (bits(indexAlign, 0)) 2167639Sgblack@eecs.umich.edu align = 1; 2177639Sgblack@eecs.umich.edu break; 2187639Sgblack@eecs.umich.edu case 2: 2197639Sgblack@eecs.umich.edu if (bits(indexAlign, 1, 0)) 22010037SARM gem5 Developers align = 2; 2217591SAli.Saidi@ARM.com break; 2227591SAli.Saidi@ARM.com } 2237639Sgblack@eecs.umich.edu break; 2247639Sgblack@eecs.umich.edu case 2: 2257639Sgblack@eecs.umich.edu if (bits(indexAlign, 0)) 22610037SARM gem5 Developers align = size + 1; 2277639Sgblack@eecs.umich.edu break; 2287639Sgblack@eecs.umich.edu case 3: 2297639Sgblack@eecs.umich.edu break; 2307639Sgblack@eecs.umich.edu case 4: 2317639Sgblack@eecs.umich.edu switch (size) { 2327639Sgblack@eecs.umich.edu case 0: 2337639Sgblack@eecs.umich.edu case 1: 2347639Sgblack@eecs.umich.edu if (bits(indexAlign, 0)) 23510037SARM gem5 Developers align = size + 2; 2367639Sgblack@eecs.umich.edu break; 2377639Sgblack@eecs.umich.edu case 2: 2387639Sgblack@eecs.umich.edu if (bits(indexAlign, 0)) 23910037SARM gem5 Developers align = bits(indexAlign, 1, 0) + 2; 2407639Sgblack@eecs.umich.edu break; 2417639Sgblack@eecs.umich.edu } 2427639Sgblack@eecs.umich.edu break; 2437435Sgblack@eecs.umich.edu } 2447435Sgblack@eecs.umich.edu } 2457639Sgblack@eecs.umich.edu if (size == 0x3) { 2467639Sgblack@eecs.umich.edu return new Unknown(machInst); 2477639Sgblack@eecs.umich.edu } 2487639Sgblack@eecs.umich.edu } else { 2497639Sgblack@eecs.umich.edu size = bits(machInst, 7, 6); 2507639Sgblack@eecs.umich.edu align = bits(machInst, 5, 4); 2517639Sgblack@eecs.umich.edu if (align == 0) { 2527639Sgblack@eecs.umich.edu // @align wasn't specified, so alignment can be turned off. 25310037SARM gem5 Developers align = size | TLB::AllowUnaligned; 2547639Sgblack@eecs.umich.edu } else { 25510037SARM gem5 Developers align = align + 2; 2567639Sgblack@eecs.umich.edu } 2577639Sgblack@eecs.umich.edu switch (width) { 2587639Sgblack@eecs.umich.edu case 1: 2597639Sgblack@eecs.umich.edu switch (type) { 2607639Sgblack@eecs.umich.edu case 0x7: regs = 1; 2617639Sgblack@eecs.umich.edu break; 2627639Sgblack@eecs.umich.edu case 0xa: regs = 2; 2637639Sgblack@eecs.umich.edu break; 2647639Sgblack@eecs.umich.edu case 0x6: regs = 3; 2657639Sgblack@eecs.umich.edu break; 2667639Sgblack@eecs.umich.edu case 0x2: regs = 4; 2677639Sgblack@eecs.umich.edu break; 2687639Sgblack@eecs.umich.edu default: 2697639Sgblack@eecs.umich.edu return new Unknown(machInst); 2707639Sgblack@eecs.umich.edu } 2717639Sgblack@eecs.umich.edu break; 2727639Sgblack@eecs.umich.edu case 2: 2737639Sgblack@eecs.umich.edu // Regs doesn't behave exactly as it does in the manual 2747639Sgblack@eecs.umich.edu // because they loop over regs registers twice and we break 2757639Sgblack@eecs.umich.edu // it down in the macroop. 2767639Sgblack@eecs.umich.edu switch (type) { 2777639Sgblack@eecs.umich.edu case 0x8: regs = 2; inc = 1; 2787639Sgblack@eecs.umich.edu break; 2797639Sgblack@eecs.umich.edu case 0x9: regs = 2; inc = 2; 2807639Sgblack@eecs.umich.edu break; 2817639Sgblack@eecs.umich.edu case 0x3: regs = 4; inc = 2; 2827639Sgblack@eecs.umich.edu break; 2837639Sgblack@eecs.umich.edu default: 2847639Sgblack@eecs.umich.edu return new Unknown(machInst); 2857639Sgblack@eecs.umich.edu } 2867639Sgblack@eecs.umich.edu break; 2877639Sgblack@eecs.umich.edu case 3: 2887639Sgblack@eecs.umich.edu regs = 3; 2897639Sgblack@eecs.umich.edu switch (type) { 2907639Sgblack@eecs.umich.edu case 0x4: inc = 1; 2917639Sgblack@eecs.umich.edu break; 2927639Sgblack@eecs.umich.edu case 0x5: inc = 2;; 2937639Sgblack@eecs.umich.edu break; 2947639Sgblack@eecs.umich.edu default: 2957639Sgblack@eecs.umich.edu return new Unknown(machInst); 2967639Sgblack@eecs.umich.edu } 2977639Sgblack@eecs.umich.edu break; 2987639Sgblack@eecs.umich.edu case 4: 2997639Sgblack@eecs.umich.edu regs = 4; 3007639Sgblack@eecs.umich.edu switch (type) { 3017639Sgblack@eecs.umich.edu case 0: inc = 1; 3027639Sgblack@eecs.umich.edu break; 3037639Sgblack@eecs.umich.edu case 1: inc = 2; 3047639Sgblack@eecs.umich.edu break; 3057639Sgblack@eecs.umich.edu default: 3067639Sgblack@eecs.umich.edu return new Unknown(machInst); 3077639Sgblack@eecs.umich.edu } 3087639Sgblack@eecs.umich.edu break; 3097639Sgblack@eecs.umich.edu } 3107639Sgblack@eecs.umich.edu } 3117639Sgblack@eecs.umich.edu 3127639Sgblack@eecs.umich.edu if (load) { 3137639Sgblack@eecs.umich.edu // Load instructions. 3147639Sgblack@eecs.umich.edu if (single) { 3157639Sgblack@eecs.umich.edu return new VldSingle(machInst, singleAll, width, rn, vd, 3167639Sgblack@eecs.umich.edu regs, inc, size, align, rm, lane); 3177639Sgblack@eecs.umich.edu } else { 3187639Sgblack@eecs.umich.edu return new VldMult(machInst, width, rn, vd, 3197639Sgblack@eecs.umich.edu regs, inc, size, align, rm); 3207639Sgblack@eecs.umich.edu } 3217435Sgblack@eecs.umich.edu } else { 3227435Sgblack@eecs.umich.edu // Store instructions. 3237639Sgblack@eecs.umich.edu if (single) { 3247639Sgblack@eecs.umich.edu if (singleAll) { 3257639Sgblack@eecs.umich.edu return new Unknown(machInst); 3267591SAli.Saidi@ARM.com } else { 3277639Sgblack@eecs.umich.edu return new VstSingle(machInst, false, width, rn, vd, 3287639Sgblack@eecs.umich.edu regs, inc, size, align, rm, lane); 3297435Sgblack@eecs.umich.edu } 3307435Sgblack@eecs.umich.edu } else { 3317639Sgblack@eecs.umich.edu return new VstMult(machInst, width, rn, vd, 3327639Sgblack@eecs.umich.edu regs, inc, size, align, rm); 3337435Sgblack@eecs.umich.edu } 3347435Sgblack@eecs.umich.edu } 3357591SAli.Saidi@ARM.com return new Unknown(machInst); 3367435Sgblack@eecs.umich.edu } 3377435Sgblack@eecs.umich.edu ''' 3387435Sgblack@eecs.umich.edu 3397435Sgblack@eecs.umich.edu decoder_output += ''' 3407435Sgblack@eecs.umich.edu static StaticInstPtr 3417435Sgblack@eecs.umich.edu decodeNeonThreeRegistersSameLength(ExtMachInst machInst) 3427435Sgblack@eecs.umich.edu { 3437435Sgblack@eecs.umich.edu const bool u = THUMB ? bits(machInst, 28) : bits(machInst, 24); 34413977Sciro.santilli@arm.com const uint32_t opc = bits(machInst, 11, 8); 34513977Sciro.santilli@arm.com const bool o1 = bits(machInst, 4); 34613977Sciro.santilli@arm.com const uint32_t size = bits(machInst, 21, 20); 3477639Sgblack@eecs.umich.edu const IntRegIndex vd = 3487639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 15, 12) | 3497639Sgblack@eecs.umich.edu (bits(machInst, 22) << 4))); 3507639Sgblack@eecs.umich.edu const IntRegIndex vn = 3517639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 19, 16) | 3527639Sgblack@eecs.umich.edu (bits(machInst, 7) << 4))); 3537639Sgblack@eecs.umich.edu const IntRegIndex vm = 3547639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 3, 0) | 3557639Sgblack@eecs.umich.edu (bits(machInst, 5) << 4))); 3567639Sgblack@eecs.umich.edu const bool q = bits(machInst, 6); 3577639Sgblack@eecs.umich.edu if (q && ((vd & 0x1) || (vn & 0x1) || (vm & 0x1))) 3587639Sgblack@eecs.umich.edu return new Unknown(machInst); 35913977Sciro.santilli@arm.com switch (opc) { 3607435Sgblack@eecs.umich.edu case 0x0: 36113977Sciro.santilli@arm.com if (o1) { 3627639Sgblack@eecs.umich.edu if (u) { 3637639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<VqaddUD, VqaddUQ>( 3647639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 3657435Sgblack@eecs.umich.edu } else { 3667639Sgblack@eecs.umich.edu return decodeNeonSThreeReg<VqaddSD, VqaddSQ>( 3677639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 3687435Sgblack@eecs.umich.edu } 3697435Sgblack@eecs.umich.edu } else { 3707639Sgblack@eecs.umich.edu if (size == 3) 3717639Sgblack@eecs.umich.edu return new Unknown(machInst); 3727639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VhaddD, VhaddQ>( 3737639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 3747435Sgblack@eecs.umich.edu } 3757435Sgblack@eecs.umich.edu case 0x1: 37613977Sciro.santilli@arm.com if (!o1) { 3777639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VrhaddD, VrhaddQ>( 3787639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 3797435Sgblack@eecs.umich.edu } else { 3807435Sgblack@eecs.umich.edu if (u) { 38113977Sciro.santilli@arm.com switch (size) { 3827435Sgblack@eecs.umich.edu case 0: 3837639Sgblack@eecs.umich.edu if (q) { 3847639Sgblack@eecs.umich.edu return new VeorQ<uint64_t>(machInst, vd, vn, vm); 3857639Sgblack@eecs.umich.edu } else { 3867639Sgblack@eecs.umich.edu return new VeorD<uint64_t>(machInst, vd, vn, vm); 3877639Sgblack@eecs.umich.edu } 3887435Sgblack@eecs.umich.edu case 1: 3897639Sgblack@eecs.umich.edu if (q) { 3907639Sgblack@eecs.umich.edu return new VbslQ<uint64_t>(machInst, vd, vn, vm); 3917639Sgblack@eecs.umich.edu } else { 3927639Sgblack@eecs.umich.edu return new VbslD<uint64_t>(machInst, vd, vn, vm); 3937639Sgblack@eecs.umich.edu } 3947435Sgblack@eecs.umich.edu case 2: 3957639Sgblack@eecs.umich.edu if (q) { 3967639Sgblack@eecs.umich.edu return new VbitQ<uint64_t>(machInst, vd, vn, vm); 3977639Sgblack@eecs.umich.edu } else { 3987639Sgblack@eecs.umich.edu return new VbitD<uint64_t>(machInst, vd, vn, vm); 3997639Sgblack@eecs.umich.edu } 4007435Sgblack@eecs.umich.edu case 3: 4017639Sgblack@eecs.umich.edu if (q) { 4027639Sgblack@eecs.umich.edu return new VbifQ<uint64_t>(machInst, vd, vn, vm); 4037639Sgblack@eecs.umich.edu } else { 4047639Sgblack@eecs.umich.edu return new VbifD<uint64_t>(machInst, vd, vn, vm); 4057639Sgblack@eecs.umich.edu } 40612595Ssiddhesh.poyarekar@gmail.com default: 40712595Ssiddhesh.poyarekar@gmail.com M5_UNREACHABLE; 4087435Sgblack@eecs.umich.edu } 4097435Sgblack@eecs.umich.edu } else { 41013977Sciro.santilli@arm.com switch (size) { 4117435Sgblack@eecs.umich.edu case 0: 4127639Sgblack@eecs.umich.edu if (q) { 4137639Sgblack@eecs.umich.edu return new VandQ<uint64_t>(machInst, vd, vn, vm); 4147639Sgblack@eecs.umich.edu } else { 4157639Sgblack@eecs.umich.edu return new VandD<uint64_t>(machInst, vd, vn, vm); 4167639Sgblack@eecs.umich.edu } 4177435Sgblack@eecs.umich.edu case 1: 4187639Sgblack@eecs.umich.edu if (q) { 4197639Sgblack@eecs.umich.edu return new VbicQ<uint64_t>(machInst, vd, vn, vm); 4207639Sgblack@eecs.umich.edu } else { 4217639Sgblack@eecs.umich.edu return new VbicD<uint64_t>(machInst, vd, vn, vm); 4227639Sgblack@eecs.umich.edu } 4237435Sgblack@eecs.umich.edu case 2: 4247639Sgblack@eecs.umich.edu if (vn == vm) { 4257639Sgblack@eecs.umich.edu if (q) { 4267639Sgblack@eecs.umich.edu return new VmovQ<uint64_t>( 4277639Sgblack@eecs.umich.edu machInst, vd, vn, vm); 4287435Sgblack@eecs.umich.edu } else { 4297639Sgblack@eecs.umich.edu return new VmovD<uint64_t>( 4307639Sgblack@eecs.umich.edu machInst, vd, vn, vm); 4317639Sgblack@eecs.umich.edu } 4327639Sgblack@eecs.umich.edu } else { 4337639Sgblack@eecs.umich.edu if (q) { 4347639Sgblack@eecs.umich.edu return new VorrQ<uint64_t>( 4357639Sgblack@eecs.umich.edu machInst, vd, vn, vm); 4367639Sgblack@eecs.umich.edu } else { 4377639Sgblack@eecs.umich.edu return new VorrD<uint64_t>( 4387639Sgblack@eecs.umich.edu machInst, vd, vn, vm); 4397435Sgblack@eecs.umich.edu } 4407435Sgblack@eecs.umich.edu } 4417435Sgblack@eecs.umich.edu case 3: 4427639Sgblack@eecs.umich.edu if (q) { 4437639Sgblack@eecs.umich.edu return new VornQ<uint64_t>( 4447639Sgblack@eecs.umich.edu machInst, vd, vn, vm); 4457639Sgblack@eecs.umich.edu } else { 4467639Sgblack@eecs.umich.edu return new VornD<uint64_t>( 4477639Sgblack@eecs.umich.edu machInst, vd, vn, vm); 4487639Sgblack@eecs.umich.edu } 44912595Ssiddhesh.poyarekar@gmail.com default: 45012595Ssiddhesh.poyarekar@gmail.com M5_UNREACHABLE; 4517435Sgblack@eecs.umich.edu } 4527435Sgblack@eecs.umich.edu } 4537435Sgblack@eecs.umich.edu } 4547435Sgblack@eecs.umich.edu case 0x2: 45513977Sciro.santilli@arm.com if (o1) { 4567639Sgblack@eecs.umich.edu if (u) { 4577639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<VqsubUD, VqsubUQ>( 4587639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 4597639Sgblack@eecs.umich.edu } else { 4607639Sgblack@eecs.umich.edu return decodeNeonSThreeReg<VqsubSD, VqsubSQ>( 4617639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 4627639Sgblack@eecs.umich.edu } 4637435Sgblack@eecs.umich.edu } else { 4647639Sgblack@eecs.umich.edu if (size == 3) 4657639Sgblack@eecs.umich.edu return new Unknown(machInst); 4667639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VhsubD, VhsubQ>( 4677639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 4687435Sgblack@eecs.umich.edu } 4697435Sgblack@eecs.umich.edu case 0x3: 47013977Sciro.santilli@arm.com if (o1) { 4717639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VcgeD, VcgeQ>( 4727639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 4737435Sgblack@eecs.umich.edu } else { 4747639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VcgtD, VcgtQ>( 4757639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 4767435Sgblack@eecs.umich.edu } 4777435Sgblack@eecs.umich.edu case 0x4: 47813977Sciro.santilli@arm.com if (o1) { 4797639Sgblack@eecs.umich.edu if (u) { 4807639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<VqshlUD, VqshlUQ>( 4817639Sgblack@eecs.umich.edu q, size, machInst, vd, vm, vn); 4827639Sgblack@eecs.umich.edu } else { 4837639Sgblack@eecs.umich.edu return decodeNeonSThreeReg<VqshlSD, VqshlSQ>( 4847639Sgblack@eecs.umich.edu q, size, machInst, vd, vm, vn); 4857639Sgblack@eecs.umich.edu } 4867435Sgblack@eecs.umich.edu } else { 4877639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VshlD, VshlQ>( 4887639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vm, vn); 4897435Sgblack@eecs.umich.edu } 4907435Sgblack@eecs.umich.edu case 0x5: 49113977Sciro.santilli@arm.com if (o1) { 4927639Sgblack@eecs.umich.edu if (u) { 4937639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<VqrshlUD, VqrshlUQ>( 4947639Sgblack@eecs.umich.edu q, size, machInst, vd, vm, vn); 4957639Sgblack@eecs.umich.edu } else { 4967639Sgblack@eecs.umich.edu return decodeNeonSThreeReg<VqrshlSD, VqrshlSQ>( 4977639Sgblack@eecs.umich.edu q, size, machInst, vd, vm, vn); 4987639Sgblack@eecs.umich.edu } 4997435Sgblack@eecs.umich.edu } else { 5007639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VrshlD, VrshlQ>( 5017639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vm, vn); 5027435Sgblack@eecs.umich.edu } 5037435Sgblack@eecs.umich.edu case 0x6: 50413977Sciro.santilli@arm.com if (o1) { 5057639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VminD, VminQ>( 5067639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 5077435Sgblack@eecs.umich.edu } else { 5087639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VmaxD, VmaxQ>( 5097639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 5107435Sgblack@eecs.umich.edu } 5117435Sgblack@eecs.umich.edu case 0x7: 51213977Sciro.santilli@arm.com if (o1) { 5137639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VabaD, VabaQ>( 5147639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 5157435Sgblack@eecs.umich.edu } else { 5167435Sgblack@eecs.umich.edu if (bits(machInst, 23) == 1) { 5177639Sgblack@eecs.umich.edu if (q) { 5187435Sgblack@eecs.umich.edu return new Unknown(machInst); 5197435Sgblack@eecs.umich.edu } else { 5207639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vabdl>( 5217639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 5227435Sgblack@eecs.umich.edu } 5237435Sgblack@eecs.umich.edu } else { 5247639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VabdD, VabdQ>( 5257639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 5267435Sgblack@eecs.umich.edu } 5277435Sgblack@eecs.umich.edu } 5287435Sgblack@eecs.umich.edu case 0x8: 52913977Sciro.santilli@arm.com if (o1) { 5307435Sgblack@eecs.umich.edu if (u) { 5317639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<VceqD, VceqQ>( 5327639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5337435Sgblack@eecs.umich.edu } else { 5347639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<VtstD, VtstQ>( 5357639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5367435Sgblack@eecs.umich.edu } 5377435Sgblack@eecs.umich.edu } else { 5387435Sgblack@eecs.umich.edu if (u) { 5397639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<NVsubD, NVsubQ>( 5407639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5417435Sgblack@eecs.umich.edu } else { 5427639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<NVaddD, NVaddQ>( 5437639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5447435Sgblack@eecs.umich.edu } 5457435Sgblack@eecs.umich.edu } 5467435Sgblack@eecs.umich.edu case 0x9: 54713977Sciro.santilli@arm.com if (o1) { 5487435Sgblack@eecs.umich.edu if (u) { 5497639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<NVmulpD, NVmulpQ>( 5507639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5517435Sgblack@eecs.umich.edu } else { 5527639Sgblack@eecs.umich.edu return decodeNeonSThreeReg<NVmulD, NVmulQ>( 5537639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5547435Sgblack@eecs.umich.edu } 5557435Sgblack@eecs.umich.edu } else { 5567435Sgblack@eecs.umich.edu if (u) { 5577639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<NVmlsD, NVmlsQ>( 5587639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 5597435Sgblack@eecs.umich.edu } else { 5607639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<NVmlaD, NVmlaQ>( 5617639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 5627435Sgblack@eecs.umich.edu } 5637435Sgblack@eecs.umich.edu } 5647435Sgblack@eecs.umich.edu case 0xa: 5658607Sgblack@eecs.umich.edu if (q) 5668607Sgblack@eecs.umich.edu return new Unknown(machInst); 56713977Sciro.santilli@arm.com if (o1) { 5688607Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<VpminD>( 5698607Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 5707435Sgblack@eecs.umich.edu } else { 5718607Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<VpmaxD>( 5728607Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 5737435Sgblack@eecs.umich.edu } 5747435Sgblack@eecs.umich.edu case 0xb: 57513977Sciro.santilli@arm.com if (o1) { 5768607Sgblack@eecs.umich.edu if (u || q) { 5777435Sgblack@eecs.umich.edu return new Unknown(machInst); 5787435Sgblack@eecs.umich.edu } else { 5798607Sgblack@eecs.umich.edu return decodeNeonUThreeUSReg<NVpaddD>( 5808607Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 5817435Sgblack@eecs.umich.edu } 5827435Sgblack@eecs.umich.edu } else { 5837435Sgblack@eecs.umich.edu if (u) { 5847639Sgblack@eecs.umich.edu return decodeNeonSThreeSReg<VqrdmulhD, VqrdmulhQ>( 5857639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5867435Sgblack@eecs.umich.edu } else { 5877639Sgblack@eecs.umich.edu return decodeNeonSThreeSReg<VqdmulhD, VqdmulhQ>( 5887639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5897435Sgblack@eecs.umich.edu } 5907435Sgblack@eecs.umich.edu } 5917435Sgblack@eecs.umich.edu case 0xc: 59213977Sciro.santilli@arm.com if (o1) { 59310037SARM gem5 Developers if (!u) { 59413977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 59510037SARM gem5 Developers if (q) { 59610037SARM gem5 Developers return new NVfmaQFp<float>(machInst, vd, vn, vm); 59710037SARM gem5 Developers } else { 59810037SARM gem5 Developers return new NVfmaDFp<float>(machInst, vd, vn, vm); 59910037SARM gem5 Developers } 60010037SARM gem5 Developers } else { 60110037SARM gem5 Developers if (q) { 60210037SARM gem5 Developers return new NVfmsQFp<float>(machInst, vd, vn, vm); 60310037SARM gem5 Developers } else { 60410037SARM gem5 Developers return new NVfmsDFp<float>(machInst, vd, vn, vm); 60510037SARM gem5 Developers } 60610037SARM gem5 Developers } 60710037SARM gem5 Developers } 60813168Smatt.horsnell@arm.com } else { 60913168Smatt.horsnell@arm.com if (u) { 61013977Sciro.santilli@arm.com switch (size) { 61113168Smatt.horsnell@arm.com case 0x0: 61213168Smatt.horsnell@arm.com return new SHA256H(machInst, vd, vn, vm); 61313168Smatt.horsnell@arm.com case 0x1: 61413168Smatt.horsnell@arm.com return new SHA256H2(machInst, vd, vn, vm); 61513168Smatt.horsnell@arm.com case 0x2: 61613168Smatt.horsnell@arm.com return new SHA256SU1(machInst, vd, vn, vm); 61713168Smatt.horsnell@arm.com case 0x3: 61813168Smatt.horsnell@arm.com return new Unknown(machInst); 61913168Smatt.horsnell@arm.com default: 62013168Smatt.horsnell@arm.com M5_UNREACHABLE; 62113168Smatt.horsnell@arm.com } 62213168Smatt.horsnell@arm.com } else { 62313977Sciro.santilli@arm.com switch (size) { 62413168Smatt.horsnell@arm.com case 0x0: 62513168Smatt.horsnell@arm.com return new SHA1C(machInst, vd, vn, vm); 62613168Smatt.horsnell@arm.com case 0x1: 62713168Smatt.horsnell@arm.com return new SHA1P(machInst, vd, vn, vm); 62813168Smatt.horsnell@arm.com case 0x2: 62913168Smatt.horsnell@arm.com return new SHA1M(machInst, vd, vn, vm); 63013168Smatt.horsnell@arm.com case 0x3: 63113168Smatt.horsnell@arm.com return new SHA1SU0(machInst, vd, vn, vm); 63213168Smatt.horsnell@arm.com default: 63313168Smatt.horsnell@arm.com M5_UNREACHABLE; 63413168Smatt.horsnell@arm.com } 63513168Smatt.horsnell@arm.com } 63610037SARM gem5 Developers } 6377435Sgblack@eecs.umich.edu return new Unknown(machInst); 6387435Sgblack@eecs.umich.edu case 0xd: 63913977Sciro.santilli@arm.com if (o1) { 6407435Sgblack@eecs.umich.edu if (u) { 64113977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 6427639Sgblack@eecs.umich.edu if (q) { 6437639Sgblack@eecs.umich.edu return new NVmulQFp<float>(machInst, vd, vn, vm); 6447639Sgblack@eecs.umich.edu } else { 6457639Sgblack@eecs.umich.edu return new NVmulDFp<float>(machInst, vd, vn, vm); 6467639Sgblack@eecs.umich.edu } 6477435Sgblack@eecs.umich.edu } else { 6487435Sgblack@eecs.umich.edu return new Unknown(machInst); 6497435Sgblack@eecs.umich.edu } 6507435Sgblack@eecs.umich.edu } else { 65113977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 6527639Sgblack@eecs.umich.edu if (q) { 6537639Sgblack@eecs.umich.edu return new NVmlaQFp<float>(machInst, vd, vn, vm); 6547639Sgblack@eecs.umich.edu } else { 6557639Sgblack@eecs.umich.edu return new NVmlaDFp<float>(machInst, vd, vn, vm); 6567639Sgblack@eecs.umich.edu } 6577435Sgblack@eecs.umich.edu } else { 6587639Sgblack@eecs.umich.edu if (q) { 6597639Sgblack@eecs.umich.edu return new NVmlsQFp<float>(machInst, vd, vn, vm); 6607639Sgblack@eecs.umich.edu } else { 6617639Sgblack@eecs.umich.edu return new NVmlsDFp<float>(machInst, vd, vn, vm); 6627639Sgblack@eecs.umich.edu } 6637435Sgblack@eecs.umich.edu } 6647435Sgblack@eecs.umich.edu } 6657435Sgblack@eecs.umich.edu } else { 6667435Sgblack@eecs.umich.edu if (u) { 66713977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 6687639Sgblack@eecs.umich.edu if (q) { 6697639Sgblack@eecs.umich.edu return new VpaddQFp<float>(machInst, vd, vn, vm); 6707639Sgblack@eecs.umich.edu } else { 6717639Sgblack@eecs.umich.edu return new VpaddDFp<float>(machInst, vd, vn, vm); 6727639Sgblack@eecs.umich.edu } 6737435Sgblack@eecs.umich.edu } else { 6747639Sgblack@eecs.umich.edu if (q) { 6757639Sgblack@eecs.umich.edu return new VabdQFp<float>(machInst, vd, vn, vm); 6767639Sgblack@eecs.umich.edu } else { 6777639Sgblack@eecs.umich.edu return new VabdDFp<float>(machInst, vd, vn, vm); 6787639Sgblack@eecs.umich.edu } 6797435Sgblack@eecs.umich.edu } 6807435Sgblack@eecs.umich.edu } else { 68113977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 6827639Sgblack@eecs.umich.edu if (q) { 6837639Sgblack@eecs.umich.edu return new VaddQFp<float>(machInst, vd, vn, vm); 6847639Sgblack@eecs.umich.edu } else { 6857639Sgblack@eecs.umich.edu return new VaddDFp<float>(machInst, vd, vn, vm); 6867639Sgblack@eecs.umich.edu } 6877435Sgblack@eecs.umich.edu } else { 6887639Sgblack@eecs.umich.edu if (q) { 6897639Sgblack@eecs.umich.edu return new VsubQFp<float>(machInst, vd, vn, vm); 6907639Sgblack@eecs.umich.edu } else { 6917639Sgblack@eecs.umich.edu return new VsubDFp<float>(machInst, vd, vn, vm); 6927639Sgblack@eecs.umich.edu } 6937435Sgblack@eecs.umich.edu } 6947435Sgblack@eecs.umich.edu } 6957435Sgblack@eecs.umich.edu } 6967435Sgblack@eecs.umich.edu case 0xe: 69713977Sciro.santilli@arm.com if (o1) { 6987435Sgblack@eecs.umich.edu if (u) { 69913977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 7007639Sgblack@eecs.umich.edu if (q) { 7017639Sgblack@eecs.umich.edu return new VacgeQFp<float>(machInst, vd, vn, vm); 7027639Sgblack@eecs.umich.edu } else { 7037639Sgblack@eecs.umich.edu return new VacgeDFp<float>(machInst, vd, vn, vm); 7047639Sgblack@eecs.umich.edu } 7057435Sgblack@eecs.umich.edu } else { 7067639Sgblack@eecs.umich.edu if (q) { 7077639Sgblack@eecs.umich.edu return new VacgtQFp<float>(machInst, vd, vn, vm); 7087639Sgblack@eecs.umich.edu } else { 7097639Sgblack@eecs.umich.edu return new VacgtDFp<float>(machInst, vd, vn, vm); 7107639Sgblack@eecs.umich.edu } 7117435Sgblack@eecs.umich.edu } 7127435Sgblack@eecs.umich.edu } else { 7137435Sgblack@eecs.umich.edu return new Unknown(machInst); 7147435Sgblack@eecs.umich.edu } 7157435Sgblack@eecs.umich.edu } else { 7167435Sgblack@eecs.umich.edu if (u) { 71713977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 7187639Sgblack@eecs.umich.edu if (q) { 7197639Sgblack@eecs.umich.edu return new VcgeQFp<float>(machInst, vd, vn, vm); 7207639Sgblack@eecs.umich.edu } else { 7217639Sgblack@eecs.umich.edu return new VcgeDFp<float>(machInst, vd, vn, vm); 7227639Sgblack@eecs.umich.edu } 7237435Sgblack@eecs.umich.edu } else { 7247639Sgblack@eecs.umich.edu if (q) { 7257639Sgblack@eecs.umich.edu return new VcgtQFp<float>(machInst, vd, vn, vm); 7267639Sgblack@eecs.umich.edu } else { 7277639Sgblack@eecs.umich.edu return new VcgtDFp<float>(machInst, vd, vn, vm); 7287639Sgblack@eecs.umich.edu } 7297435Sgblack@eecs.umich.edu } 7307435Sgblack@eecs.umich.edu } else { 73113977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 7327639Sgblack@eecs.umich.edu if (q) { 7337639Sgblack@eecs.umich.edu return new VceqQFp<float>(machInst, vd, vn, vm); 7347639Sgblack@eecs.umich.edu } else { 7357639Sgblack@eecs.umich.edu return new VceqDFp<float>(machInst, vd, vn, vm); 7367639Sgblack@eecs.umich.edu } 7377435Sgblack@eecs.umich.edu } else { 7387435Sgblack@eecs.umich.edu return new Unknown(machInst); 7397435Sgblack@eecs.umich.edu } 7407435Sgblack@eecs.umich.edu } 7417435Sgblack@eecs.umich.edu } 7427435Sgblack@eecs.umich.edu case 0xf: 74313977Sciro.santilli@arm.com if (o1) { 7447435Sgblack@eecs.umich.edu if (u) { 74513978Sciro.santilli@arm.com if (bits(size, 1) == 0) { 74613978Sciro.santilli@arm.com if (q) { 74713978Sciro.santilli@arm.com return new VmaxnmQFp<uint32_t>( 74813978Sciro.santilli@arm.com machInst, vd, vn, vm); 74913978Sciro.santilli@arm.com } else { 75013978Sciro.santilli@arm.com return new VmaxnmDFp<uint32_t>( 75113978Sciro.santilli@arm.com machInst, vd, vn, vm); 75213978Sciro.santilli@arm.com } 75313978Sciro.santilli@arm.com } else { 75413978Sciro.santilli@arm.com if (q) { 75513978Sciro.santilli@arm.com return new VminnmQFp<uint32_t>( 75613978Sciro.santilli@arm.com machInst, vd, vn, vm); 75713978Sciro.santilli@arm.com } else { 75813978Sciro.santilli@arm.com return new VminnmDFp<uint32_t>( 75913978Sciro.santilli@arm.com machInst, vd, vn, vm); 76013978Sciro.santilli@arm.com } 76113978Sciro.santilli@arm.com } 7627435Sgblack@eecs.umich.edu } else { 76313977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 7647639Sgblack@eecs.umich.edu if (q) { 7657639Sgblack@eecs.umich.edu return new VrecpsQFp<float>(machInst, vd, vn, vm); 7667639Sgblack@eecs.umich.edu } else { 7677639Sgblack@eecs.umich.edu return new VrecpsDFp<float>(machInst, vd, vn, vm); 7687639Sgblack@eecs.umich.edu } 7697435Sgblack@eecs.umich.edu } else { 7707639Sgblack@eecs.umich.edu if (q) { 7717639Sgblack@eecs.umich.edu return new VrsqrtsQFp<float>(machInst, vd, vn, vm); 7727639Sgblack@eecs.umich.edu } else { 7737639Sgblack@eecs.umich.edu return new VrsqrtsDFp<float>(machInst, vd, vn, vm); 7747639Sgblack@eecs.umich.edu } 7757435Sgblack@eecs.umich.edu } 7767435Sgblack@eecs.umich.edu } 7777435Sgblack@eecs.umich.edu } else { 7787435Sgblack@eecs.umich.edu if (u) { 77913977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 7807639Sgblack@eecs.umich.edu if (q) { 78113978Sciro.santilli@arm.com return new VpmaxQFp<uint32_t>( 78213978Sciro.santilli@arm.com machInst, vd, vn, vm); 7837639Sgblack@eecs.umich.edu } else { 78413978Sciro.santilli@arm.com return new VpmaxDFp<uint32_t>( 78513978Sciro.santilli@arm.com machInst, vd, vn, vm); 7867639Sgblack@eecs.umich.edu } 7877435Sgblack@eecs.umich.edu } else { 7887639Sgblack@eecs.umich.edu if (q) { 78913978Sciro.santilli@arm.com return new VpminQFp<uint32_t>( 79013978Sciro.santilli@arm.com machInst, vd, vn, vm); 7917639Sgblack@eecs.umich.edu } else { 79213978Sciro.santilli@arm.com return new VpminDFp<uint32_t>( 79313978Sciro.santilli@arm.com machInst, vd, vn, vm); 7947639Sgblack@eecs.umich.edu } 7957435Sgblack@eecs.umich.edu } 7967435Sgblack@eecs.umich.edu } else { 79713977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 7987639Sgblack@eecs.umich.edu if (q) { 79913978Sciro.santilli@arm.com return new VmaxQFp<uint32_t>( 80013978Sciro.santilli@arm.com machInst, vd, vn, vm); 8017639Sgblack@eecs.umich.edu } else { 80213978Sciro.santilli@arm.com return new VmaxDFp<uint32_t>( 80313978Sciro.santilli@arm.com machInst, vd, vn, vm); 8047639Sgblack@eecs.umich.edu } 8057435Sgblack@eecs.umich.edu } else { 8067639Sgblack@eecs.umich.edu if (q) { 80713978Sciro.santilli@arm.com return new VminQFp<uint32_t>( 80813978Sciro.santilli@arm.com machInst, vd, vn, vm); 8097639Sgblack@eecs.umich.edu } else { 81013978Sciro.santilli@arm.com return new VminDFp<uint32_t>( 81113978Sciro.santilli@arm.com machInst, vd, vn, vm); 8127639Sgblack@eecs.umich.edu } 8137435Sgblack@eecs.umich.edu } 8147435Sgblack@eecs.umich.edu } 8157435Sgblack@eecs.umich.edu } 8167435Sgblack@eecs.umich.edu } 8177435Sgblack@eecs.umich.edu return new Unknown(machInst); 8187435Sgblack@eecs.umich.edu } 8197435Sgblack@eecs.umich.edu 8207435Sgblack@eecs.umich.edu static StaticInstPtr 8217435Sgblack@eecs.umich.edu decodeNeonOneRegModImm(ExtMachInst machInst) 8227435Sgblack@eecs.umich.edu { 8237639Sgblack@eecs.umich.edu const IntRegIndex vd = 8247639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 15, 12) | 8257639Sgblack@eecs.umich.edu (bits(machInst, 22) << 4))); 8267639Sgblack@eecs.umich.edu const bool q = bits(machInst, 6); 8277435Sgblack@eecs.umich.edu const bool op = bits(machInst, 5); 8287639Sgblack@eecs.umich.edu const uint8_t cmode = bits(machInst, 11, 8); 8297639Sgblack@eecs.umich.edu const uint8_t imm = ((THUMB ? bits(machInst, 28) : 8307639Sgblack@eecs.umich.edu bits(machInst, 24)) << 7) | 8317639Sgblack@eecs.umich.edu (bits(machInst, 18, 16) << 4) | 8327639Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 0); 8337853SMatt.Horsnell@ARM.com 8347853SMatt.Horsnell@ARM.com // Check for invalid immediate encodings and return an unknown op 8357853SMatt.Horsnell@ARM.com // if it happens 8367853SMatt.Horsnell@ARM.com bool immValid = true; 8377853SMatt.Horsnell@ARM.com const uint64_t bigImm = simd_modified_imm(op, cmode, imm, immValid); 8387853SMatt.Horsnell@ARM.com if (!immValid) { 8397853SMatt.Horsnell@ARM.com return new Unknown(machInst); 8407853SMatt.Horsnell@ARM.com } 8417853SMatt.Horsnell@ARM.com 8427435Sgblack@eecs.umich.edu if (op) { 8437435Sgblack@eecs.umich.edu if (bits(cmode, 3) == 0) { 8447435Sgblack@eecs.umich.edu if (bits(cmode, 0) == 0) { 8457639Sgblack@eecs.umich.edu if (q) 8467639Sgblack@eecs.umich.edu return new NVmvniQ<uint64_t>(machInst, vd, bigImm); 8477639Sgblack@eecs.umich.edu else 8487639Sgblack@eecs.umich.edu return new NVmvniD<uint64_t>(machInst, vd, bigImm); 8497435Sgblack@eecs.umich.edu } else { 8507639Sgblack@eecs.umich.edu if (q) 8517639Sgblack@eecs.umich.edu return new NVbiciQ<uint64_t>(machInst, vd, bigImm); 8527639Sgblack@eecs.umich.edu else 8537639Sgblack@eecs.umich.edu return new NVbiciD<uint64_t>(machInst, vd, bigImm); 8547435Sgblack@eecs.umich.edu } 8557435Sgblack@eecs.umich.edu } else { 8567435Sgblack@eecs.umich.edu if (bits(cmode, 2) == 1) { 8577639Sgblack@eecs.umich.edu switch (bits(cmode, 1, 0)) { 8587639Sgblack@eecs.umich.edu case 0: 8597639Sgblack@eecs.umich.edu case 1: 8607639Sgblack@eecs.umich.edu if (q) 8617639Sgblack@eecs.umich.edu return new NVmvniQ<uint64_t>(machInst, vd, bigImm); 8627639Sgblack@eecs.umich.edu else 8637639Sgblack@eecs.umich.edu return new NVmvniD<uint64_t>(machInst, vd, bigImm); 8647639Sgblack@eecs.umich.edu case 2: 8657639Sgblack@eecs.umich.edu if (q) 8667639Sgblack@eecs.umich.edu return new NVmoviQ<uint64_t>(machInst, vd, bigImm); 8677639Sgblack@eecs.umich.edu else 8687639Sgblack@eecs.umich.edu return new NVmoviD<uint64_t>(machInst, vd, bigImm); 8697639Sgblack@eecs.umich.edu case 3: 8707639Sgblack@eecs.umich.edu if (q) 8717639Sgblack@eecs.umich.edu return new Unknown(machInst); 8727639Sgblack@eecs.umich.edu else 8737639Sgblack@eecs.umich.edu return new Unknown(machInst); 8747639Sgblack@eecs.umich.edu } 8757435Sgblack@eecs.umich.edu } else { 8767435Sgblack@eecs.umich.edu if (bits(cmode, 0) == 0) { 8777639Sgblack@eecs.umich.edu if (q) 8787639Sgblack@eecs.umich.edu return new NVmvniQ<uint64_t>(machInst, vd, bigImm); 8797639Sgblack@eecs.umich.edu else 8807639Sgblack@eecs.umich.edu return new NVmvniD<uint64_t>(machInst, vd, bigImm); 8817435Sgblack@eecs.umich.edu } else { 8827639Sgblack@eecs.umich.edu if (q) 8837639Sgblack@eecs.umich.edu return new NVbiciQ<uint64_t>(machInst, vd, bigImm); 8847639Sgblack@eecs.umich.edu else 8857639Sgblack@eecs.umich.edu return new NVbiciD<uint64_t>(machInst, vd, bigImm); 8867435Sgblack@eecs.umich.edu } 8877435Sgblack@eecs.umich.edu } 8887435Sgblack@eecs.umich.edu } 8897435Sgblack@eecs.umich.edu } else { 8907435Sgblack@eecs.umich.edu if (bits(cmode, 3) == 0) { 8917435Sgblack@eecs.umich.edu if (bits(cmode, 0) == 0) { 8927639Sgblack@eecs.umich.edu if (q) 8937639Sgblack@eecs.umich.edu return new NVmoviQ<uint64_t>(machInst, vd, bigImm); 8947639Sgblack@eecs.umich.edu else 8957639Sgblack@eecs.umich.edu return new NVmoviD<uint64_t>(machInst, vd, bigImm); 8967435Sgblack@eecs.umich.edu } else { 8977639Sgblack@eecs.umich.edu if (q) 8987639Sgblack@eecs.umich.edu return new NVorriQ<uint64_t>(machInst, vd, bigImm); 8997639Sgblack@eecs.umich.edu else 9007639Sgblack@eecs.umich.edu return new NVorriD<uint64_t>(machInst, vd, bigImm); 9017435Sgblack@eecs.umich.edu } 9027435Sgblack@eecs.umich.edu } else { 9037435Sgblack@eecs.umich.edu if (bits(cmode, 2) == 1) { 9047639Sgblack@eecs.umich.edu if (q) 9057639Sgblack@eecs.umich.edu return new NVmoviQ<uint64_t>(machInst, vd, bigImm); 9067639Sgblack@eecs.umich.edu else 9077639Sgblack@eecs.umich.edu return new NVmoviD<uint64_t>(machInst, vd, bigImm); 9087435Sgblack@eecs.umich.edu } else { 9097435Sgblack@eecs.umich.edu if (bits(cmode, 0) == 0) { 9107639Sgblack@eecs.umich.edu if (q) 9117639Sgblack@eecs.umich.edu return new NVmoviQ<uint64_t>(machInst, vd, bigImm); 9127639Sgblack@eecs.umich.edu else 9137639Sgblack@eecs.umich.edu return new NVmoviD<uint64_t>(machInst, vd, bigImm); 9147435Sgblack@eecs.umich.edu } else { 9157639Sgblack@eecs.umich.edu if (q) 9167639Sgblack@eecs.umich.edu return new NVorriQ<uint64_t>(machInst, vd, bigImm); 9177639Sgblack@eecs.umich.edu else 9187639Sgblack@eecs.umich.edu return new NVorriD<uint64_t>(machInst, vd, bigImm); 9197435Sgblack@eecs.umich.edu } 9207435Sgblack@eecs.umich.edu } 9217435Sgblack@eecs.umich.edu } 9227435Sgblack@eecs.umich.edu } 9237435Sgblack@eecs.umich.edu return new Unknown(machInst); 9247435Sgblack@eecs.umich.edu } 9257435Sgblack@eecs.umich.edu 9267435Sgblack@eecs.umich.edu static StaticInstPtr 9277435Sgblack@eecs.umich.edu decodeNeonTwoRegAndShift(ExtMachInst machInst) 9287435Sgblack@eecs.umich.edu { 92913977Sciro.santilli@arm.com const uint32_t opc = bits(machInst, 11, 8); 9307435Sgblack@eecs.umich.edu const bool u = THUMB ? bits(machInst, 28) : bits(machInst, 24); 93113977Sciro.santilli@arm.com const bool q = bits(machInst, 6); 9327435Sgblack@eecs.umich.edu const bool l = bits(machInst, 7); 9337639Sgblack@eecs.umich.edu const IntRegIndex vd = 9347639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 15, 12) | 9357639Sgblack@eecs.umich.edu (bits(machInst, 22) << 4))); 9367639Sgblack@eecs.umich.edu const IntRegIndex vm = 9377639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 3, 0) | 9387639Sgblack@eecs.umich.edu (bits(machInst, 5) << 4))); 9397639Sgblack@eecs.umich.edu unsigned imm6 = bits(machInst, 21, 16); 9407639Sgblack@eecs.umich.edu unsigned imm = ((l ? 1 : 0) << 6) | imm6; 9417639Sgblack@eecs.umich.edu unsigned size = 3; 9427639Sgblack@eecs.umich.edu unsigned lShiftAmt = 0; 9437639Sgblack@eecs.umich.edu unsigned bitSel; 9447639Sgblack@eecs.umich.edu for (bitSel = 1 << 6; true; bitSel >>= 1) { 9457639Sgblack@eecs.umich.edu if (bitSel & imm) 9467639Sgblack@eecs.umich.edu break; 9477639Sgblack@eecs.umich.edu else if (!size) 9487639Sgblack@eecs.umich.edu return new Unknown(machInst); 9497639Sgblack@eecs.umich.edu size--; 9507639Sgblack@eecs.umich.edu } 9517639Sgblack@eecs.umich.edu lShiftAmt = imm6 & ~bitSel; 9527639Sgblack@eecs.umich.edu unsigned rShiftAmt = 0; 95313977Sciro.santilli@arm.com if (opc != 0xe && opc != 0xf) { 9547639Sgblack@eecs.umich.edu if (size > 2) 9557639Sgblack@eecs.umich.edu rShiftAmt = 64 - imm6; 9567639Sgblack@eecs.umich.edu else 9577639Sgblack@eecs.umich.edu rShiftAmt = 2 * (8 << size) - imm6; 9587639Sgblack@eecs.umich.edu } 9597435Sgblack@eecs.umich.edu 96013977Sciro.santilli@arm.com switch (opc) { 9617435Sgblack@eecs.umich.edu case 0x0: 9627639Sgblack@eecs.umich.edu return decodeNeonUSTwoShiftReg<NVshrD, NVshrQ>( 96313977Sciro.santilli@arm.com q, u, size, machInst, vd, vm, rShiftAmt); 9647435Sgblack@eecs.umich.edu case 0x1: 9657639Sgblack@eecs.umich.edu return decodeNeonUSTwoShiftReg<NVsraD, NVsraQ>( 96613977Sciro.santilli@arm.com q, u, size, machInst, vd, vm, rShiftAmt); 9677435Sgblack@eecs.umich.edu case 0x2: 9687639Sgblack@eecs.umich.edu return decodeNeonUSTwoShiftReg<NVrshrD, NVrshrQ>( 96913977Sciro.santilli@arm.com q, u, size, machInst, vd, vm, rShiftAmt); 9707435Sgblack@eecs.umich.edu case 0x3: 9717639Sgblack@eecs.umich.edu return decodeNeonUSTwoShiftReg<NVrsraD, NVrsraQ>( 97213977Sciro.santilli@arm.com q, u, size, machInst, vd, vm, rShiftAmt); 9737435Sgblack@eecs.umich.edu case 0x4: 9747435Sgblack@eecs.umich.edu if (u) { 9757639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftReg<NVsriD, NVsriQ>( 97613977Sciro.santilli@arm.com q, size, machInst, vd, vm, rShiftAmt); 9777435Sgblack@eecs.umich.edu } else { 9787435Sgblack@eecs.umich.edu return new Unknown(machInst); 9797435Sgblack@eecs.umich.edu } 9807435Sgblack@eecs.umich.edu case 0x5: 9817435Sgblack@eecs.umich.edu if (u) { 9827639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftReg<NVsliD, NVsliQ>( 98313977Sciro.santilli@arm.com q, size, machInst, vd, vm, lShiftAmt); 9847435Sgblack@eecs.umich.edu } else { 9857639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftReg<NVshlD, NVshlQ>( 98613977Sciro.santilli@arm.com q, size, machInst, vd, vm, lShiftAmt); 9877435Sgblack@eecs.umich.edu } 9887435Sgblack@eecs.umich.edu case 0x6: 9897435Sgblack@eecs.umich.edu case 0x7: 9907639Sgblack@eecs.umich.edu if (u) { 99113977Sciro.santilli@arm.com if (opc == 0x6) { 9927639Sgblack@eecs.umich.edu return decodeNeonSTwoShiftReg<NVqshlusD, NVqshlusQ>( 99313977Sciro.santilli@arm.com q, size, machInst, vd, vm, lShiftAmt); 9947639Sgblack@eecs.umich.edu } else { 9957639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftReg<NVqshluD, NVqshluQ>( 99613977Sciro.santilli@arm.com q, size, machInst, vd, vm, lShiftAmt); 9977639Sgblack@eecs.umich.edu } 9987639Sgblack@eecs.umich.edu } else { 9997639Sgblack@eecs.umich.edu return decodeNeonSTwoShiftReg<NVqshlD, NVqshlQ>( 100013977Sciro.santilli@arm.com q, size, machInst, vd, vm, lShiftAmt); 10017639Sgblack@eecs.umich.edu } 10027435Sgblack@eecs.umich.edu case 0x8: 10037435Sgblack@eecs.umich.edu if (l) { 10047435Sgblack@eecs.umich.edu return new Unknown(machInst); 10057435Sgblack@eecs.umich.edu } else if (u) { 10067639Sgblack@eecs.umich.edu return decodeNeonSTwoShiftSReg<NVqshruns, NVqrshruns>( 100713977Sciro.santilli@arm.com q, size, machInst, vd, vm, rShiftAmt); 10087435Sgblack@eecs.umich.edu } else { 10097639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftSReg<NVshrn, NVrshrn>( 101013977Sciro.santilli@arm.com q, size, machInst, vd, vm, rShiftAmt); 10117435Sgblack@eecs.umich.edu } 10127435Sgblack@eecs.umich.edu case 0x9: 10137435Sgblack@eecs.umich.edu if (l) { 10147435Sgblack@eecs.umich.edu return new Unknown(machInst); 10157639Sgblack@eecs.umich.edu } else if (u) { 10167639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftSReg<NVqshrun, NVqrshrun>( 101713977Sciro.santilli@arm.com q, size, machInst, vd, vm, rShiftAmt); 10187435Sgblack@eecs.umich.edu } else { 10197639Sgblack@eecs.umich.edu return decodeNeonSTwoShiftSReg<NVqshrn, NVqrshrn>( 102013977Sciro.santilli@arm.com q, size, machInst, vd, vm, rShiftAmt); 10217435Sgblack@eecs.umich.edu } 10227435Sgblack@eecs.umich.edu case 0xa: 102313977Sciro.santilli@arm.com if (l || q) { 10247435Sgblack@eecs.umich.edu return new Unknown(machInst); 10257435Sgblack@eecs.umich.edu } else { 10267639Sgblack@eecs.umich.edu return decodeNeonUSTwoShiftSReg<NVmovl, NVshll>( 10277639Sgblack@eecs.umich.edu lShiftAmt, u, size, machInst, vd, vm, lShiftAmt); 10287435Sgblack@eecs.umich.edu } 10297435Sgblack@eecs.umich.edu case 0xe: 10307639Sgblack@eecs.umich.edu if (l) { 10317639Sgblack@eecs.umich.edu return new Unknown(machInst); 10327639Sgblack@eecs.umich.edu } else { 10337639Sgblack@eecs.umich.edu if (bits(imm6, 5) == 0) 10347639Sgblack@eecs.umich.edu return new Unknown(machInst); 10357639Sgblack@eecs.umich.edu if (u) { 103613977Sciro.santilli@arm.com if (q) { 10377639Sgblack@eecs.umich.edu return new NVcvtu2fpQ<float>( 10387639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10397639Sgblack@eecs.umich.edu } else { 10407639Sgblack@eecs.umich.edu return new NVcvtu2fpD<float>( 10417639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10427639Sgblack@eecs.umich.edu } 10437639Sgblack@eecs.umich.edu } else { 104413977Sciro.santilli@arm.com if (q) { 10457639Sgblack@eecs.umich.edu return new NVcvts2fpQ<float>( 10467639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10477639Sgblack@eecs.umich.edu } else { 10487639Sgblack@eecs.umich.edu return new NVcvts2fpD<float>( 10497639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10507639Sgblack@eecs.umich.edu } 10517639Sgblack@eecs.umich.edu } 10527639Sgblack@eecs.umich.edu } 10537435Sgblack@eecs.umich.edu case 0xf: 10547435Sgblack@eecs.umich.edu if (l) { 10557435Sgblack@eecs.umich.edu return new Unknown(machInst); 10567639Sgblack@eecs.umich.edu } else { 10577639Sgblack@eecs.umich.edu if (bits(imm6, 5) == 0) 10587639Sgblack@eecs.umich.edu return new Unknown(machInst); 10597639Sgblack@eecs.umich.edu if (u) { 106013977Sciro.santilli@arm.com if (q) { 10617639Sgblack@eecs.umich.edu return new NVcvt2ufxQ<float>( 10627639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10637639Sgblack@eecs.umich.edu } else { 10647639Sgblack@eecs.umich.edu return new NVcvt2ufxD<float>( 10657639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10667639Sgblack@eecs.umich.edu } 10677639Sgblack@eecs.umich.edu } else { 106813977Sciro.santilli@arm.com if (q) { 10697639Sgblack@eecs.umich.edu return new NVcvt2sfxQ<float>( 10707639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10717639Sgblack@eecs.umich.edu } else { 10727639Sgblack@eecs.umich.edu return new NVcvt2sfxD<float>( 10737639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10747639Sgblack@eecs.umich.edu } 10757639Sgblack@eecs.umich.edu } 10767435Sgblack@eecs.umich.edu } 10777435Sgblack@eecs.umich.edu } 10787435Sgblack@eecs.umich.edu return new Unknown(machInst); 10797435Sgblack@eecs.umich.edu } 10807435Sgblack@eecs.umich.edu 10817435Sgblack@eecs.umich.edu static StaticInstPtr 10827435Sgblack@eecs.umich.edu decodeNeonThreeRegDiffLengths(ExtMachInst machInst) 10837435Sgblack@eecs.umich.edu { 10847435Sgblack@eecs.umich.edu const bool u = THUMB ? bits(machInst, 28) : bits(machInst, 24); 108513977Sciro.santilli@arm.com const uint32_t opc = bits(machInst, 11, 8); 10867639Sgblack@eecs.umich.edu const IntRegIndex vd = 10877639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 15, 12) | 10887639Sgblack@eecs.umich.edu (bits(machInst, 22) << 4))); 10897639Sgblack@eecs.umich.edu const IntRegIndex vn = 10907639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 19, 16) | 10917639Sgblack@eecs.umich.edu (bits(machInst, 7) << 4))); 10927639Sgblack@eecs.umich.edu const IntRegIndex vm = 10937639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 3, 0) | 10947639Sgblack@eecs.umich.edu (bits(machInst, 5) << 4))); 10957639Sgblack@eecs.umich.edu const unsigned size = bits(machInst, 21, 20); 109613977Sciro.santilli@arm.com switch (opc) { 10977435Sgblack@eecs.umich.edu case 0x0: 10987639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vaddl>( 10997639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 11007435Sgblack@eecs.umich.edu case 0x1: 11017639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vaddw>( 11027639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 11037435Sgblack@eecs.umich.edu case 0x2: 11047639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vsubl>( 11057639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 11067435Sgblack@eecs.umich.edu case 0x3: 11077639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vsubw>( 11087639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 11097435Sgblack@eecs.umich.edu case 0x4: 11107435Sgblack@eecs.umich.edu if (u) { 11117639Sgblack@eecs.umich.edu return decodeNeonUThreeUSReg<Vraddhn>( 11127639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 11137435Sgblack@eecs.umich.edu } else { 11147639Sgblack@eecs.umich.edu return decodeNeonUThreeUSReg<Vaddhn>( 11157639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 11167435Sgblack@eecs.umich.edu } 11177435Sgblack@eecs.umich.edu case 0x5: 11187639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vabal>( 11197639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 11207435Sgblack@eecs.umich.edu case 0x6: 11217435Sgblack@eecs.umich.edu if (u) { 11227639Sgblack@eecs.umich.edu return decodeNeonUThreeUSReg<Vrsubhn>( 11237639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 11247435Sgblack@eecs.umich.edu } else { 11257639Sgblack@eecs.umich.edu return decodeNeonUThreeUSReg<Vsubhn>( 11267639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 11277435Sgblack@eecs.umich.edu } 11287435Sgblack@eecs.umich.edu case 0x7: 11297435Sgblack@eecs.umich.edu if (bits(machInst, 23)) { 11307639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vabdl>( 11317639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 11327435Sgblack@eecs.umich.edu } else { 11337639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VabdD, VabdQ>( 11347639Sgblack@eecs.umich.edu bits(machInst, 6), u, size, machInst, vd, vn, vm); 11357435Sgblack@eecs.umich.edu } 11367435Sgblack@eecs.umich.edu case 0x8: 11377639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vmlal>( 11387639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 11397435Sgblack@eecs.umich.edu case 0xa: 11407639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vmlsl>( 11417639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 11427435Sgblack@eecs.umich.edu case 0x9: 11437639Sgblack@eecs.umich.edu if (u) { 11447639Sgblack@eecs.umich.edu return new Unknown(machInst); 11457435Sgblack@eecs.umich.edu } else { 11467639Sgblack@eecs.umich.edu return decodeNeonSThreeUSReg<Vqdmlal>( 11477639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 11487435Sgblack@eecs.umich.edu } 11497435Sgblack@eecs.umich.edu case 0xb: 11507639Sgblack@eecs.umich.edu if (u) { 11517435Sgblack@eecs.umich.edu return new Unknown(machInst); 11527435Sgblack@eecs.umich.edu } else { 11537639Sgblack@eecs.umich.edu return decodeNeonSThreeUSReg<Vqdmlsl>( 11547639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 11557435Sgblack@eecs.umich.edu } 11567435Sgblack@eecs.umich.edu case 0xc: 11577639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vmull>( 11587639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 11597435Sgblack@eecs.umich.edu case 0xd: 11607639Sgblack@eecs.umich.edu if (u) { 11617435Sgblack@eecs.umich.edu return new Unknown(machInst); 11627435Sgblack@eecs.umich.edu } else { 11637639Sgblack@eecs.umich.edu return decodeNeonSThreeUSReg<Vqdmull>( 11647639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 11657435Sgblack@eecs.umich.edu } 11667435Sgblack@eecs.umich.edu case 0xe: 11677639Sgblack@eecs.umich.edu return decodeNeonUThreeUSReg<Vmullp>( 11687639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 11697435Sgblack@eecs.umich.edu } 11707435Sgblack@eecs.umich.edu return new Unknown(machInst); 11717435Sgblack@eecs.umich.edu } 11727435Sgblack@eecs.umich.edu 11737435Sgblack@eecs.umich.edu static StaticInstPtr 11747435Sgblack@eecs.umich.edu decodeNeonTwoRegScalar(ExtMachInst machInst) 11757435Sgblack@eecs.umich.edu { 11767435Sgblack@eecs.umich.edu const bool u = THUMB ? bits(machInst, 28) : bits(machInst, 24); 117713977Sciro.santilli@arm.com const uint32_t opc = bits(machInst, 11, 8); 11787639Sgblack@eecs.umich.edu const unsigned size = bits(machInst, 21, 20); 11797639Sgblack@eecs.umich.edu const IntRegIndex vd = 11807639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 15, 12) | 11817639Sgblack@eecs.umich.edu (bits(machInst, 22) << 4))); 11827639Sgblack@eecs.umich.edu const IntRegIndex vn = 11837639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 19, 16) | 11847639Sgblack@eecs.umich.edu (bits(machInst, 7) << 4))); 11857639Sgblack@eecs.umich.edu const IntRegIndex vm = (size == 2) ? 11867639Sgblack@eecs.umich.edu (IntRegIndex)(2 * bits(machInst, 3, 0)) : 11877639Sgblack@eecs.umich.edu (IntRegIndex)(2 * bits(machInst, 2, 0)); 11887639Sgblack@eecs.umich.edu const unsigned index = (size == 2) ? (unsigned)bits(machInst, 5) : 11897639Sgblack@eecs.umich.edu (bits(machInst, 3) | (bits(machInst, 5) << 1)); 119013977Sciro.santilli@arm.com switch (opc) { 11917435Sgblack@eecs.umich.edu case 0x0: 11927639Sgblack@eecs.umich.edu if (u) { 11937639Sgblack@eecs.umich.edu switch (size) { 11947639Sgblack@eecs.umich.edu case 1: 11957639Sgblack@eecs.umich.edu return new VmlasQ<uint16_t>(machInst, vd, vn, vm, index); 11967639Sgblack@eecs.umich.edu case 2: 11977639Sgblack@eecs.umich.edu return new VmlasQ<uint32_t>(machInst, vd, vn, vm, index); 11987639Sgblack@eecs.umich.edu default: 11997639Sgblack@eecs.umich.edu return new Unknown(machInst); 12007639Sgblack@eecs.umich.edu } 12017639Sgblack@eecs.umich.edu } else { 12027639Sgblack@eecs.umich.edu switch (size) { 12037639Sgblack@eecs.umich.edu case 1: 12047639Sgblack@eecs.umich.edu return new VmlasD<uint16_t>(machInst, vd, vn, vm, index); 12057639Sgblack@eecs.umich.edu case 2: 12067639Sgblack@eecs.umich.edu return new VmlasD<uint32_t>(machInst, vd, vn, vm, index); 12077639Sgblack@eecs.umich.edu default: 12087639Sgblack@eecs.umich.edu return new Unknown(machInst); 12097639Sgblack@eecs.umich.edu } 12107639Sgblack@eecs.umich.edu } 12117435Sgblack@eecs.umich.edu case 0x1: 12127639Sgblack@eecs.umich.edu if (u) 12137639Sgblack@eecs.umich.edu return new VmlasQFp<float>(machInst, vd, vn, vm, index); 12147639Sgblack@eecs.umich.edu else 12157639Sgblack@eecs.umich.edu return new VmlasDFp<float>(machInst, vd, vn, vm, index); 12167435Sgblack@eecs.umich.edu case 0x4: 12177639Sgblack@eecs.umich.edu if (u) { 12187639Sgblack@eecs.umich.edu switch (size) { 12197639Sgblack@eecs.umich.edu case 1: 12207639Sgblack@eecs.umich.edu return new VmlssQ<uint16_t>(machInst, vd, vn, vm, index); 12217639Sgblack@eecs.umich.edu case 2: 12227639Sgblack@eecs.umich.edu return new VmlssQ<uint32_t>(machInst, vd, vn, vm, index); 12237639Sgblack@eecs.umich.edu default: 12247639Sgblack@eecs.umich.edu return new Unknown(machInst); 12257639Sgblack@eecs.umich.edu } 12267639Sgblack@eecs.umich.edu } else { 12277639Sgblack@eecs.umich.edu switch (size) { 12287639Sgblack@eecs.umich.edu case 1: 12297639Sgblack@eecs.umich.edu return new VmlssD<uint16_t>(machInst, vd, vn, vm, index); 12307639Sgblack@eecs.umich.edu case 2: 12317639Sgblack@eecs.umich.edu return new VmlssD<uint32_t>(machInst, vd, vn, vm, index); 12327639Sgblack@eecs.umich.edu default: 12337639Sgblack@eecs.umich.edu return new Unknown(machInst); 12347639Sgblack@eecs.umich.edu } 12357639Sgblack@eecs.umich.edu } 12367435Sgblack@eecs.umich.edu case 0x5: 12377639Sgblack@eecs.umich.edu if (u) 12387639Sgblack@eecs.umich.edu return new VmlssQFp<float>(machInst, vd, vn, vm, index); 12397639Sgblack@eecs.umich.edu else 12407639Sgblack@eecs.umich.edu return new VmlssDFp<float>(machInst, vd, vn, vm, index); 12417435Sgblack@eecs.umich.edu case 0x2: 12427639Sgblack@eecs.umich.edu if (u) { 12437639Sgblack@eecs.umich.edu switch (size) { 12447639Sgblack@eecs.umich.edu case 1: 12457639Sgblack@eecs.umich.edu return new Vmlals<uint16_t>(machInst, vd, vn, vm, index); 12467639Sgblack@eecs.umich.edu case 2: 12477639Sgblack@eecs.umich.edu return new Vmlals<uint32_t>(machInst, vd, vn, vm, index); 12487639Sgblack@eecs.umich.edu default: 12497639Sgblack@eecs.umich.edu return new Unknown(machInst); 12507639Sgblack@eecs.umich.edu } 12517639Sgblack@eecs.umich.edu } else { 12527639Sgblack@eecs.umich.edu switch (size) { 12537639Sgblack@eecs.umich.edu case 1: 12547639Sgblack@eecs.umich.edu return new Vmlals<int16_t>(machInst, vd, vn, vm, index); 12557639Sgblack@eecs.umich.edu case 2: 12567639Sgblack@eecs.umich.edu return new Vmlals<int32_t>(machInst, vd, vn, vm, index); 12577639Sgblack@eecs.umich.edu default: 12587639Sgblack@eecs.umich.edu return new Unknown(machInst); 12597639Sgblack@eecs.umich.edu } 12607639Sgblack@eecs.umich.edu } 12617435Sgblack@eecs.umich.edu case 0x6: 12627639Sgblack@eecs.umich.edu if (u) { 12637639Sgblack@eecs.umich.edu switch (size) { 12647639Sgblack@eecs.umich.edu case 1: 12657639Sgblack@eecs.umich.edu return new Vmlsls<uint16_t>(machInst, vd, vn, vm, index); 12667639Sgblack@eecs.umich.edu case 2: 12677639Sgblack@eecs.umich.edu return new Vmlsls<uint32_t>(machInst, vd, vn, vm, index); 12687639Sgblack@eecs.umich.edu default: 12697639Sgblack@eecs.umich.edu return new Unknown(machInst); 12707639Sgblack@eecs.umich.edu } 12717639Sgblack@eecs.umich.edu } else { 12727639Sgblack@eecs.umich.edu switch (size) { 12737639Sgblack@eecs.umich.edu case 1: 12747639Sgblack@eecs.umich.edu return new Vmlsls<int16_t>(machInst, vd, vn, vm, index); 12757639Sgblack@eecs.umich.edu case 2: 12767639Sgblack@eecs.umich.edu return new Vmlsls<int32_t>(machInst, vd, vn, vm, index); 12777639Sgblack@eecs.umich.edu default: 12787639Sgblack@eecs.umich.edu return new Unknown(machInst); 12797639Sgblack@eecs.umich.edu } 12807639Sgblack@eecs.umich.edu } 12817435Sgblack@eecs.umich.edu case 0x3: 12827435Sgblack@eecs.umich.edu if (u) { 12837435Sgblack@eecs.umich.edu return new Unknown(machInst); 12847435Sgblack@eecs.umich.edu } else { 12857639Sgblack@eecs.umich.edu switch (size) { 12867639Sgblack@eecs.umich.edu case 1: 12877639Sgblack@eecs.umich.edu return new Vqdmlals<int16_t>(machInst, vd, vn, vm, index); 12887639Sgblack@eecs.umich.edu case 2: 12897639Sgblack@eecs.umich.edu return new Vqdmlals<int32_t>(machInst, vd, vn, vm, index); 12907639Sgblack@eecs.umich.edu default: 12917639Sgblack@eecs.umich.edu return new Unknown(machInst); 12927639Sgblack@eecs.umich.edu } 12937435Sgblack@eecs.umich.edu } 12947435Sgblack@eecs.umich.edu case 0x7: 12957435Sgblack@eecs.umich.edu if (u) { 12967435Sgblack@eecs.umich.edu return new Unknown(machInst); 12977435Sgblack@eecs.umich.edu } else { 12987639Sgblack@eecs.umich.edu switch (size) { 12997639Sgblack@eecs.umich.edu case 1: 13007639Sgblack@eecs.umich.edu return new Vqdmlsls<int16_t>(machInst, vd, vn, vm, index); 13017639Sgblack@eecs.umich.edu case 2: 13027639Sgblack@eecs.umich.edu return new Vqdmlsls<int32_t>(machInst, vd, vn, vm, index); 13037639Sgblack@eecs.umich.edu default: 13047639Sgblack@eecs.umich.edu return new Unknown(machInst); 13057639Sgblack@eecs.umich.edu } 13067435Sgblack@eecs.umich.edu } 13077435Sgblack@eecs.umich.edu case 0x8: 13087639Sgblack@eecs.umich.edu if (u) { 13097639Sgblack@eecs.umich.edu switch (size) { 13107639Sgblack@eecs.umich.edu case 1: 13117639Sgblack@eecs.umich.edu return new VmulsQ<uint16_t>(machInst, vd, vn, vm, index); 13127639Sgblack@eecs.umich.edu case 2: 13137639Sgblack@eecs.umich.edu return new VmulsQ<uint32_t>(machInst, vd, vn, vm, index); 13147639Sgblack@eecs.umich.edu default: 13157639Sgblack@eecs.umich.edu return new Unknown(machInst); 13167639Sgblack@eecs.umich.edu } 13177639Sgblack@eecs.umich.edu } else { 13187639Sgblack@eecs.umich.edu switch (size) { 13197639Sgblack@eecs.umich.edu case 1: 13207639Sgblack@eecs.umich.edu return new VmulsD<uint16_t>(machInst, vd, vn, vm, index); 13217639Sgblack@eecs.umich.edu case 2: 13227639Sgblack@eecs.umich.edu return new VmulsD<uint32_t>(machInst, vd, vn, vm, index); 13237639Sgblack@eecs.umich.edu default: 13247639Sgblack@eecs.umich.edu return new Unknown(machInst); 13257639Sgblack@eecs.umich.edu } 13267639Sgblack@eecs.umich.edu } 13277435Sgblack@eecs.umich.edu case 0x9: 13287639Sgblack@eecs.umich.edu if (u) 13297639Sgblack@eecs.umich.edu return new VmulsQFp<float>(machInst, vd, vn, vm, index); 13307639Sgblack@eecs.umich.edu else 13317639Sgblack@eecs.umich.edu return new VmulsDFp<float>(machInst, vd, vn, vm, index); 13327435Sgblack@eecs.umich.edu case 0xa: 13337639Sgblack@eecs.umich.edu if (u) { 13347639Sgblack@eecs.umich.edu switch (size) { 13357639Sgblack@eecs.umich.edu case 1: 13367639Sgblack@eecs.umich.edu return new Vmulls<uint16_t>(machInst, vd, vn, vm, index); 13377639Sgblack@eecs.umich.edu case 2: 13387639Sgblack@eecs.umich.edu return new Vmulls<uint32_t>(machInst, vd, vn, vm, index); 13397639Sgblack@eecs.umich.edu default: 13407639Sgblack@eecs.umich.edu return new Unknown(machInst); 13417639Sgblack@eecs.umich.edu } 13427639Sgblack@eecs.umich.edu } else { 13437639Sgblack@eecs.umich.edu switch (size) { 13447639Sgblack@eecs.umich.edu case 1: 13457639Sgblack@eecs.umich.edu return new Vmulls<int16_t>(machInst, vd, vn, vm, index); 13467639Sgblack@eecs.umich.edu case 2: 13477639Sgblack@eecs.umich.edu return new Vmulls<int32_t>(machInst, vd, vn, vm, index); 13487639Sgblack@eecs.umich.edu default: 13497639Sgblack@eecs.umich.edu return new Unknown(machInst); 13507639Sgblack@eecs.umich.edu } 13517639Sgblack@eecs.umich.edu } 13527435Sgblack@eecs.umich.edu case 0xb: 13537435Sgblack@eecs.umich.edu if (u) { 13547435Sgblack@eecs.umich.edu return new Unknown(machInst); 13557435Sgblack@eecs.umich.edu } else { 13567639Sgblack@eecs.umich.edu if (u) { 13577639Sgblack@eecs.umich.edu switch (size) { 13587639Sgblack@eecs.umich.edu case 1: 13597639Sgblack@eecs.umich.edu return new Vqdmulls<uint16_t>( 13607639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13617639Sgblack@eecs.umich.edu case 2: 13627639Sgblack@eecs.umich.edu return new Vqdmulls<uint32_t>( 13637639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13647639Sgblack@eecs.umich.edu default: 13657639Sgblack@eecs.umich.edu return new Unknown(machInst); 13667639Sgblack@eecs.umich.edu } 13677639Sgblack@eecs.umich.edu } else { 13687639Sgblack@eecs.umich.edu switch (size) { 13697639Sgblack@eecs.umich.edu case 1: 13707639Sgblack@eecs.umich.edu return new Vqdmulls<int16_t>( 13717639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13727639Sgblack@eecs.umich.edu case 2: 13737639Sgblack@eecs.umich.edu return new Vqdmulls<int32_t>( 13747639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13757639Sgblack@eecs.umich.edu default: 13767639Sgblack@eecs.umich.edu return new Unknown(machInst); 13777639Sgblack@eecs.umich.edu } 13787639Sgblack@eecs.umich.edu } 13797435Sgblack@eecs.umich.edu } 13807435Sgblack@eecs.umich.edu case 0xc: 13817639Sgblack@eecs.umich.edu if (u) { 13827639Sgblack@eecs.umich.edu switch (size) { 13837639Sgblack@eecs.umich.edu case 1: 13847639Sgblack@eecs.umich.edu return new VqdmulhsQ<int16_t>( 13857639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13867639Sgblack@eecs.umich.edu case 2: 13877639Sgblack@eecs.umich.edu return new VqdmulhsQ<int32_t>( 13887639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13897639Sgblack@eecs.umich.edu default: 13907639Sgblack@eecs.umich.edu return new Unknown(machInst); 13917639Sgblack@eecs.umich.edu } 13927639Sgblack@eecs.umich.edu } else { 13937639Sgblack@eecs.umich.edu switch (size) { 13947639Sgblack@eecs.umich.edu case 1: 13957639Sgblack@eecs.umich.edu return new VqdmulhsD<int16_t>( 13967639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13977639Sgblack@eecs.umich.edu case 2: 13987639Sgblack@eecs.umich.edu return new VqdmulhsD<int32_t>( 13997639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 14007639Sgblack@eecs.umich.edu default: 14017639Sgblack@eecs.umich.edu return new Unknown(machInst); 14027639Sgblack@eecs.umich.edu } 14037639Sgblack@eecs.umich.edu } 14047435Sgblack@eecs.umich.edu case 0xd: 14057639Sgblack@eecs.umich.edu if (u) { 14067639Sgblack@eecs.umich.edu switch (size) { 14077639Sgblack@eecs.umich.edu case 1: 14087639Sgblack@eecs.umich.edu return new VqrdmulhsQ<int16_t>( 14097639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 14107639Sgblack@eecs.umich.edu case 2: 14117639Sgblack@eecs.umich.edu return new VqrdmulhsQ<int32_t>( 14127639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 14137639Sgblack@eecs.umich.edu default: 14147639Sgblack@eecs.umich.edu return new Unknown(machInst); 14157639Sgblack@eecs.umich.edu } 14167639Sgblack@eecs.umich.edu } else { 14177639Sgblack@eecs.umich.edu switch (size) { 14187639Sgblack@eecs.umich.edu case 1: 14197639Sgblack@eecs.umich.edu return new VqrdmulhsD<int16_t>( 14207639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 14217639Sgblack@eecs.umich.edu case 2: 14227639Sgblack@eecs.umich.edu return new VqrdmulhsD<int32_t>( 14237639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 14247639Sgblack@eecs.umich.edu default: 14257639Sgblack@eecs.umich.edu return new Unknown(machInst); 14267639Sgblack@eecs.umich.edu } 14277639Sgblack@eecs.umich.edu } 14287435Sgblack@eecs.umich.edu } 14297435Sgblack@eecs.umich.edu return new Unknown(machInst); 14307435Sgblack@eecs.umich.edu } 14317435Sgblack@eecs.umich.edu 14327435Sgblack@eecs.umich.edu static StaticInstPtr 14337435Sgblack@eecs.umich.edu decodeNeonTwoRegMisc(ExtMachInst machInst) 14347435Sgblack@eecs.umich.edu { 143513977Sciro.santilli@arm.com const uint32_t opc1 = bits(machInst, 17, 16); 14367435Sgblack@eecs.umich.edu const uint32_t b = bits(machInst, 10, 6); 14377639Sgblack@eecs.umich.edu const bool q = bits(machInst, 6); 14387639Sgblack@eecs.umich.edu const IntRegIndex vd = 14397639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 15, 12) | 14407639Sgblack@eecs.umich.edu (bits(machInst, 22) << 4))); 14417639Sgblack@eecs.umich.edu const IntRegIndex vm = 14427639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 3, 0) | 14437639Sgblack@eecs.umich.edu (bits(machInst, 5) << 4))); 14447639Sgblack@eecs.umich.edu const unsigned size = bits(machInst, 19, 18); 144513977Sciro.santilli@arm.com switch (opc1) { 14467435Sgblack@eecs.umich.edu case 0x0: 14477435Sgblack@eecs.umich.edu switch (bits(b, 4, 1)) { 14487435Sgblack@eecs.umich.edu case 0x0: 14497639Sgblack@eecs.umich.edu switch (size) { 14507639Sgblack@eecs.umich.edu case 0: 14517639Sgblack@eecs.umich.edu if (q) { 14527639Sgblack@eecs.umich.edu return new NVrev64Q<uint8_t>(machInst, vd, vm); 14537639Sgblack@eecs.umich.edu } else { 14547639Sgblack@eecs.umich.edu return new NVrev64D<uint8_t>(machInst, vd, vm); 14557639Sgblack@eecs.umich.edu } 14567639Sgblack@eecs.umich.edu case 1: 14577639Sgblack@eecs.umich.edu if (q) { 14587639Sgblack@eecs.umich.edu return new NVrev64Q<uint16_t>(machInst, vd, vm); 14597639Sgblack@eecs.umich.edu } else { 14607639Sgblack@eecs.umich.edu return new NVrev64D<uint16_t>(machInst, vd, vm); 14617639Sgblack@eecs.umich.edu } 14627639Sgblack@eecs.umich.edu case 2: 14637639Sgblack@eecs.umich.edu if (q) { 14647639Sgblack@eecs.umich.edu return new NVrev64Q<uint32_t>(machInst, vd, vm); 14657639Sgblack@eecs.umich.edu } else { 14667639Sgblack@eecs.umich.edu return new NVrev64D<uint32_t>(machInst, vd, vm); 14677639Sgblack@eecs.umich.edu } 14687639Sgblack@eecs.umich.edu default: 14697639Sgblack@eecs.umich.edu return new Unknown(machInst); 14707639Sgblack@eecs.umich.edu } 14717435Sgblack@eecs.umich.edu case 0x1: 14727639Sgblack@eecs.umich.edu switch (size) { 14737639Sgblack@eecs.umich.edu case 0: 14747639Sgblack@eecs.umich.edu if (q) { 14757639Sgblack@eecs.umich.edu return new NVrev32Q<uint8_t>(machInst, vd, vm); 14767639Sgblack@eecs.umich.edu } else { 14777639Sgblack@eecs.umich.edu return new NVrev32D<uint8_t>(machInst, vd, vm); 14787639Sgblack@eecs.umich.edu } 14797639Sgblack@eecs.umich.edu case 1: 14807639Sgblack@eecs.umich.edu if (q) { 14817639Sgblack@eecs.umich.edu return new NVrev32Q<uint16_t>(machInst, vd, vm); 14827639Sgblack@eecs.umich.edu } else { 14837639Sgblack@eecs.umich.edu return new NVrev32D<uint16_t>(machInst, vd, vm); 14847639Sgblack@eecs.umich.edu } 14857639Sgblack@eecs.umich.edu default: 14867639Sgblack@eecs.umich.edu return new Unknown(machInst); 14877639Sgblack@eecs.umich.edu } 14887435Sgblack@eecs.umich.edu case 0x2: 14897639Sgblack@eecs.umich.edu if (size != 0) { 14907639Sgblack@eecs.umich.edu return new Unknown(machInst); 14917639Sgblack@eecs.umich.edu } else if (q) { 14927639Sgblack@eecs.umich.edu return new NVrev16Q<uint8_t>(machInst, vd, vm); 14937639Sgblack@eecs.umich.edu } else { 14947639Sgblack@eecs.umich.edu return new NVrev16D<uint8_t>(machInst, vd, vm); 14957639Sgblack@eecs.umich.edu } 14967435Sgblack@eecs.umich.edu case 0x4: 14977639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscSReg<NVpaddlD, NVpaddlQ>( 14987639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 14997435Sgblack@eecs.umich.edu case 0x5: 15007639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscSReg<NVpaddlD, NVpaddlQ>( 15017639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 150213169Smatt.horsnell@arm.com case 0x6: 150313169Smatt.horsnell@arm.com if (q == 0) { 150413169Smatt.horsnell@arm.com return new AESE(machInst, vd, vd, vm); 150513169Smatt.horsnell@arm.com } else { 150613169Smatt.horsnell@arm.com return new AESD(machInst, vd, vd, vm); 150713169Smatt.horsnell@arm.com } 150813169Smatt.horsnell@arm.com case 0x7: 150913169Smatt.horsnell@arm.com if (q == 0) { 151013169Smatt.horsnell@arm.com return new AESMC(machInst, vd, vm); 151113169Smatt.horsnell@arm.com } else { 151213169Smatt.horsnell@arm.com return new AESIMC(machInst, vd, vm); 151313169Smatt.horsnell@arm.com } 15147435Sgblack@eecs.umich.edu case 0x8: 15157639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVclsD, NVclsQ>( 15167639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15177435Sgblack@eecs.umich.edu case 0x9: 15187639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVclzD, NVclzQ>( 15197639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15207435Sgblack@eecs.umich.edu case 0xa: 15217639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscReg<NVcntD, NVcntQ>( 15227639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15237435Sgblack@eecs.umich.edu case 0xb: 15247639Sgblack@eecs.umich.edu if (q) 15257639Sgblack@eecs.umich.edu return new NVmvnQ<uint64_t>(machInst, vd, vm); 15267639Sgblack@eecs.umich.edu else 15277639Sgblack@eecs.umich.edu return new NVmvnD<uint64_t>(machInst, vd, vm); 15287435Sgblack@eecs.umich.edu case 0xc: 15297639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscSReg<NVpadalD, NVpadalQ>( 15307639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15317435Sgblack@eecs.umich.edu case 0xd: 15327639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscSReg<NVpadalD, NVpadalQ>( 15337639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15347435Sgblack@eecs.umich.edu case 0xe: 15357639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVqabsD, NVqabsQ>( 15367639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15377435Sgblack@eecs.umich.edu case 0xf: 15387639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVqnegD, NVqnegQ>( 15397639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15407435Sgblack@eecs.umich.edu default: 15417435Sgblack@eecs.umich.edu return new Unknown(machInst); 15427435Sgblack@eecs.umich.edu } 15437435Sgblack@eecs.umich.edu case 0x1: 15447435Sgblack@eecs.umich.edu switch (bits(b, 3, 1)) { 15457435Sgblack@eecs.umich.edu case 0x0: 15467639Sgblack@eecs.umich.edu if (bits(b, 4)) { 15477639Sgblack@eecs.umich.edu if (q) { 15487639Sgblack@eecs.umich.edu return new NVcgtQFp<float>(machInst, vd, vm); 15497639Sgblack@eecs.umich.edu } else { 15507639Sgblack@eecs.umich.edu return new NVcgtDFp<float>(machInst, vd, vm); 15517639Sgblack@eecs.umich.edu } 15527639Sgblack@eecs.umich.edu } else { 15537639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVcgtD, NVcgtQ>( 15547639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15557639Sgblack@eecs.umich.edu } 15567435Sgblack@eecs.umich.edu case 0x1: 15577639Sgblack@eecs.umich.edu if (bits(b, 4)) { 15587639Sgblack@eecs.umich.edu if (q) { 15597639Sgblack@eecs.umich.edu return new NVcgeQFp<float>(machInst, vd, vm); 15607639Sgblack@eecs.umich.edu } else { 15617639Sgblack@eecs.umich.edu return new NVcgeDFp<float>(machInst, vd, vm); 15627639Sgblack@eecs.umich.edu } 15637639Sgblack@eecs.umich.edu } else { 15647639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVcgeD, NVcgeQ>( 15657639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15667639Sgblack@eecs.umich.edu } 15677435Sgblack@eecs.umich.edu case 0x2: 15687639Sgblack@eecs.umich.edu if (bits(b, 4)) { 15697639Sgblack@eecs.umich.edu if (q) { 15707639Sgblack@eecs.umich.edu return new NVceqQFp<float>(machInst, vd, vm); 15717639Sgblack@eecs.umich.edu } else { 15727639Sgblack@eecs.umich.edu return new NVceqDFp<float>(machInst, vd, vm); 15737639Sgblack@eecs.umich.edu } 15747639Sgblack@eecs.umich.edu } else { 15757639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVceqD, NVceqQ>( 15767639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15777639Sgblack@eecs.umich.edu } 15787435Sgblack@eecs.umich.edu case 0x3: 15797639Sgblack@eecs.umich.edu if (bits(b, 4)) { 15807639Sgblack@eecs.umich.edu if (q) { 15817639Sgblack@eecs.umich.edu return new NVcleQFp<float>(machInst, vd, vm); 15827639Sgblack@eecs.umich.edu } else { 15837639Sgblack@eecs.umich.edu return new NVcleDFp<float>(machInst, vd, vm); 15847639Sgblack@eecs.umich.edu } 15857639Sgblack@eecs.umich.edu } else { 15867639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVcleD, NVcleQ>( 15877639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15887639Sgblack@eecs.umich.edu } 15897435Sgblack@eecs.umich.edu case 0x4: 15907639Sgblack@eecs.umich.edu if (bits(b, 4)) { 15917639Sgblack@eecs.umich.edu if (q) { 15927639Sgblack@eecs.umich.edu return new NVcltQFp<float>(machInst, vd, vm); 15937639Sgblack@eecs.umich.edu } else { 15947639Sgblack@eecs.umich.edu return new NVcltDFp<float>(machInst, vd, vm); 15957639Sgblack@eecs.umich.edu } 15967639Sgblack@eecs.umich.edu } else { 15977639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVcltD, NVcltQ>( 15987639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15997639Sgblack@eecs.umich.edu } 160013168Smatt.horsnell@arm.com case 0x5: 160113168Smatt.horsnell@arm.com if (q) { 160213168Smatt.horsnell@arm.com return new SHA1H(machInst, vd, vm); 160313168Smatt.horsnell@arm.com } else { 160413168Smatt.horsnell@arm.com return new Unknown(machInst); 160513168Smatt.horsnell@arm.com } 16067435Sgblack@eecs.umich.edu case 0x6: 16077639Sgblack@eecs.umich.edu if (bits(machInst, 10)) { 16087639Sgblack@eecs.umich.edu if (q) 16097639Sgblack@eecs.umich.edu return new NVabsQFp<float>(machInst, vd, vm); 16107639Sgblack@eecs.umich.edu else 16117639Sgblack@eecs.umich.edu return new NVabsDFp<float>(machInst, vd, vm); 16127639Sgblack@eecs.umich.edu } else { 16137639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVabsD, NVabsQ>( 16147639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 16157639Sgblack@eecs.umich.edu } 16167435Sgblack@eecs.umich.edu case 0x7: 16177639Sgblack@eecs.umich.edu if (bits(machInst, 10)) { 16187639Sgblack@eecs.umich.edu if (q) 16197639Sgblack@eecs.umich.edu return new NVnegQFp<float>(machInst, vd, vm); 16207639Sgblack@eecs.umich.edu else 16217639Sgblack@eecs.umich.edu return new NVnegDFp<float>(machInst, vd, vm); 16227639Sgblack@eecs.umich.edu } else { 16237639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVnegD, NVnegQ>( 16247639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 16257639Sgblack@eecs.umich.edu } 162612595Ssiddhesh.poyarekar@gmail.com default: 162712595Ssiddhesh.poyarekar@gmail.com return new Unknown64(machInst); 16287435Sgblack@eecs.umich.edu } 16297435Sgblack@eecs.umich.edu case 0x2: 16307435Sgblack@eecs.umich.edu switch (bits(b, 4, 1)) { 16317435Sgblack@eecs.umich.edu case 0x0: 16327639Sgblack@eecs.umich.edu if (q) 16337639Sgblack@eecs.umich.edu return new NVswpQ<uint64_t>(machInst, vd, vm); 16347639Sgblack@eecs.umich.edu else 16357639Sgblack@eecs.umich.edu return new NVswpD<uint64_t>(machInst, vd, vm); 16367435Sgblack@eecs.umich.edu case 0x1: 16378607Sgblack@eecs.umich.edu return decodeNeonUTwoMiscSReg<NVtrnD, NVtrnQ>( 16387639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 16397435Sgblack@eecs.umich.edu case 0x2: 16407639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscReg<NVuzpD, NVuzpQ>( 16417639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 16427435Sgblack@eecs.umich.edu case 0x3: 16437639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscReg<NVzipD, NVzipQ>( 16447639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 16457435Sgblack@eecs.umich.edu case 0x4: 16467435Sgblack@eecs.umich.edu if (b == 0x8) { 16477639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscUSReg<NVmovn>( 16487639Sgblack@eecs.umich.edu size, machInst, vd, vm); 16497435Sgblack@eecs.umich.edu } else { 16507639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscUSReg<NVqmovuns>( 16517639Sgblack@eecs.umich.edu size, machInst, vd, vm); 16527435Sgblack@eecs.umich.edu } 16537435Sgblack@eecs.umich.edu case 0x5: 16547639Sgblack@eecs.umich.edu if (q) { 16557639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscUSReg<NVqmovun>( 16567639Sgblack@eecs.umich.edu size, machInst, vd, vm); 16577639Sgblack@eecs.umich.edu } else { 16587639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscUSReg<NVqmovn>( 16597639Sgblack@eecs.umich.edu size, machInst, vd, vm); 16607639Sgblack@eecs.umich.edu } 16617435Sgblack@eecs.umich.edu case 0x6: 16627435Sgblack@eecs.umich.edu if (b == 0xc) { 16637639Sgblack@eecs.umich.edu return decodeNeonSTwoShiftUSReg<NVshll>( 16647639Sgblack@eecs.umich.edu size, machInst, vd, vm, 8 << size); 16657435Sgblack@eecs.umich.edu } else { 16667435Sgblack@eecs.umich.edu return new Unknown(machInst); 16677435Sgblack@eecs.umich.edu } 166813168Smatt.horsnell@arm.com case 0x7: 166913168Smatt.horsnell@arm.com if (q) { 167013168Smatt.horsnell@arm.com return new SHA256SU0(machInst, vd, vm); 167113168Smatt.horsnell@arm.com } else { 167213168Smatt.horsnell@arm.com return new SHA1SU1(machInst, vd, vm); 167313168Smatt.horsnell@arm.com } 16747435Sgblack@eecs.umich.edu case 0xc: 16757435Sgblack@eecs.umich.edu case 0xe: 16767435Sgblack@eecs.umich.edu if (b == 0x18) { 16777639Sgblack@eecs.umich.edu if (size != 1 || (vm % 2)) 16787639Sgblack@eecs.umich.edu return new Unknown(machInst); 16797639Sgblack@eecs.umich.edu return new NVcvts2h<uint16_t>(machInst, vd, vm); 16807435Sgblack@eecs.umich.edu } else if (b == 0x1c) { 16817639Sgblack@eecs.umich.edu if (size != 1 || (vd % 2)) 16827639Sgblack@eecs.umich.edu return new Unknown(machInst); 16837639Sgblack@eecs.umich.edu return new NVcvth2s<uint16_t>(machInst, vd, vm); 16847435Sgblack@eecs.umich.edu } else { 16857435Sgblack@eecs.umich.edu return new Unknown(machInst); 16867435Sgblack@eecs.umich.edu } 16877435Sgblack@eecs.umich.edu default: 16887435Sgblack@eecs.umich.edu return new Unknown(machInst); 16897435Sgblack@eecs.umich.edu } 16907435Sgblack@eecs.umich.edu case 0x3: 16917435Sgblack@eecs.umich.edu if (bits(b, 4, 3) == 0x3) { 16927639Sgblack@eecs.umich.edu if ((q && (vd % 2 || vm % 2)) || size != 2) { 16937639Sgblack@eecs.umich.edu return new Unknown(machInst); 16947639Sgblack@eecs.umich.edu } else { 16957639Sgblack@eecs.umich.edu if (bits(b, 2)) { 16967639Sgblack@eecs.umich.edu if (bits(b, 1)) { 16977639Sgblack@eecs.umich.edu if (q) { 16987639Sgblack@eecs.umich.edu return new NVcvt2ufxQ<float>( 16997639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 17007639Sgblack@eecs.umich.edu } else { 17017639Sgblack@eecs.umich.edu return new NVcvt2ufxD<float>( 17027639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 17037639Sgblack@eecs.umich.edu } 17047639Sgblack@eecs.umich.edu } else { 17057639Sgblack@eecs.umich.edu if (q) { 17067639Sgblack@eecs.umich.edu return new NVcvt2sfxQ<float>( 17077639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 17087639Sgblack@eecs.umich.edu } else { 17097639Sgblack@eecs.umich.edu return new NVcvt2sfxD<float>( 17107639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 17117639Sgblack@eecs.umich.edu } 17127639Sgblack@eecs.umich.edu } 17137639Sgblack@eecs.umich.edu } else { 17147639Sgblack@eecs.umich.edu if (bits(b, 1)) { 17157639Sgblack@eecs.umich.edu if (q) { 17167639Sgblack@eecs.umich.edu return new NVcvtu2fpQ<float>( 17177639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 17187639Sgblack@eecs.umich.edu } else { 17197639Sgblack@eecs.umich.edu return new NVcvtu2fpD<float>( 17207639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 17217639Sgblack@eecs.umich.edu } 17227639Sgblack@eecs.umich.edu } else { 17237639Sgblack@eecs.umich.edu if (q) { 17247639Sgblack@eecs.umich.edu return new NVcvts2fpQ<float>( 17257639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 17267639Sgblack@eecs.umich.edu } else { 17277639Sgblack@eecs.umich.edu return new NVcvts2fpD<float>( 17287639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 17297639Sgblack@eecs.umich.edu } 17307639Sgblack@eecs.umich.edu } 17317639Sgblack@eecs.umich.edu } 17327639Sgblack@eecs.umich.edu } 17337435Sgblack@eecs.umich.edu } else if ((b & 0x1a) == 0x10) { 17347639Sgblack@eecs.umich.edu if (bits(b, 2)) { 17357639Sgblack@eecs.umich.edu if (q) { 17367639Sgblack@eecs.umich.edu return new NVrecpeQFp<float>(machInst, vd, vm); 17377639Sgblack@eecs.umich.edu } else { 17387639Sgblack@eecs.umich.edu return new NVrecpeDFp<float>(machInst, vd, vm); 17397639Sgblack@eecs.umich.edu } 17407639Sgblack@eecs.umich.edu } else { 17417639Sgblack@eecs.umich.edu if (q) { 17427639Sgblack@eecs.umich.edu return new NVrecpeQ<uint32_t>(machInst, vd, vm); 17437639Sgblack@eecs.umich.edu } else { 17447639Sgblack@eecs.umich.edu return new NVrecpeD<uint32_t>(machInst, vd, vm); 17457639Sgblack@eecs.umich.edu } 17467639Sgblack@eecs.umich.edu } 17477435Sgblack@eecs.umich.edu } else if ((b & 0x1a) == 0x12) { 17487639Sgblack@eecs.umich.edu if (bits(b, 2)) { 17497639Sgblack@eecs.umich.edu if (q) { 17507639Sgblack@eecs.umich.edu return new NVrsqrteQFp<float>(machInst, vd, vm); 17517639Sgblack@eecs.umich.edu } else { 17527639Sgblack@eecs.umich.edu return new NVrsqrteDFp<float>(machInst, vd, vm); 17537639Sgblack@eecs.umich.edu } 17547639Sgblack@eecs.umich.edu } else { 17557639Sgblack@eecs.umich.edu if (q) { 17567639Sgblack@eecs.umich.edu return new NVrsqrteQ<uint32_t>(machInst, vd, vm); 17577639Sgblack@eecs.umich.edu } else { 17587639Sgblack@eecs.umich.edu return new NVrsqrteD<uint32_t>(machInst, vd, vm); 17597639Sgblack@eecs.umich.edu } 17607639Sgblack@eecs.umich.edu } 17617435Sgblack@eecs.umich.edu } else { 17627435Sgblack@eecs.umich.edu return new Unknown(machInst); 17637435Sgblack@eecs.umich.edu } 17647435Sgblack@eecs.umich.edu } 17657435Sgblack@eecs.umich.edu return new Unknown(machInst); 17667435Sgblack@eecs.umich.edu } 17677435Sgblack@eecs.umich.edu 17687435Sgblack@eecs.umich.edu StaticInstPtr 17697435Sgblack@eecs.umich.edu decodeNeonData(ExtMachInst machInst) 17707435Sgblack@eecs.umich.edu { 17717435Sgblack@eecs.umich.edu const bool u = THUMB ? bits(machInst, 28) : bits(machInst, 24); 17727435Sgblack@eecs.umich.edu const uint32_t a = bits(machInst, 23, 19); 177313977Sciro.santilli@arm.com const uint32_t q = bits(machInst, 11, 8); 17747435Sgblack@eecs.umich.edu const uint32_t c = bits(machInst, 7, 4); 17757435Sgblack@eecs.umich.edu if (bits(a, 4) == 0) { 17767435Sgblack@eecs.umich.edu return decodeNeonThreeRegistersSameLength(machInst); 17777435Sgblack@eecs.umich.edu } else if ((c & 0x9) == 1) { 17787435Sgblack@eecs.umich.edu if ((a & 0x7) == 0) { 17797435Sgblack@eecs.umich.edu return decodeNeonOneRegModImm(machInst); 17807435Sgblack@eecs.umich.edu } else { 17817435Sgblack@eecs.umich.edu return decodeNeonTwoRegAndShift(machInst); 17827435Sgblack@eecs.umich.edu } 17837435Sgblack@eecs.umich.edu } else if ((c & 0x9) == 9) { 17847435Sgblack@eecs.umich.edu return decodeNeonTwoRegAndShift(machInst); 17857639Sgblack@eecs.umich.edu } else if (bits(a, 2, 1) != 0x3) { 17867639Sgblack@eecs.umich.edu if ((c & 0x5) == 0) { 17877435Sgblack@eecs.umich.edu return decodeNeonThreeRegDiffLengths(machInst); 17887639Sgblack@eecs.umich.edu } else if ((c & 0x5) == 4) { 17897435Sgblack@eecs.umich.edu return decodeNeonTwoRegScalar(machInst); 17907435Sgblack@eecs.umich.edu } 17917435Sgblack@eecs.umich.edu } else if ((a & 0x16) == 0x16) { 17927639Sgblack@eecs.umich.edu const IntRegIndex vd = 17937639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 15, 12) | 17947639Sgblack@eecs.umich.edu (bits(machInst, 22) << 4))); 17957639Sgblack@eecs.umich.edu const IntRegIndex vn = 17967639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 19, 16) | 17977639Sgblack@eecs.umich.edu (bits(machInst, 7) << 4))); 17987639Sgblack@eecs.umich.edu const IntRegIndex vm = 17997639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 3, 0) | 18007639Sgblack@eecs.umich.edu (bits(machInst, 5) << 4))); 18017435Sgblack@eecs.umich.edu if (!u) { 18027435Sgblack@eecs.umich.edu if (bits(c, 0) == 0) { 18037639Sgblack@eecs.umich.edu unsigned imm4 = bits(machInst, 11, 8); 18047639Sgblack@eecs.umich.edu bool q = bits(machInst, 6); 18057639Sgblack@eecs.umich.edu if (imm4 >= 16 && !q) 18067639Sgblack@eecs.umich.edu return new Unknown(machInst); 18077639Sgblack@eecs.umich.edu if (q) { 18087639Sgblack@eecs.umich.edu return new NVextQ<uint8_t>(machInst, vd, vn, vm, imm4); 18097639Sgblack@eecs.umich.edu } else { 18107639Sgblack@eecs.umich.edu return new NVextD<uint8_t>(machInst, vd, vn, vm, imm4); 18117639Sgblack@eecs.umich.edu } 18127435Sgblack@eecs.umich.edu } 181313977Sciro.santilli@arm.com } else if (bits(q, 3) == 0 && bits(c, 0) == 0) { 18147435Sgblack@eecs.umich.edu return decodeNeonTwoRegMisc(machInst); 181513977Sciro.santilli@arm.com } else if (bits(q, 3, 2) == 0x2 && bits(c, 0) == 0) { 18167639Sgblack@eecs.umich.edu unsigned length = bits(machInst, 9, 8) + 1; 18177639Sgblack@eecs.umich.edu if ((uint32_t)vn / 2 + length > 32) 18187639Sgblack@eecs.umich.edu return new Unknown(machInst); 18197435Sgblack@eecs.umich.edu if (bits(machInst, 6) == 0) { 18207639Sgblack@eecs.umich.edu switch (length) { 18217639Sgblack@eecs.umich.edu case 1: 18227639Sgblack@eecs.umich.edu return new NVtbl1(machInst, vd, vn, vm); 18237639Sgblack@eecs.umich.edu case 2: 18247639Sgblack@eecs.umich.edu return new NVtbl2(machInst, vd, vn, vm); 18257639Sgblack@eecs.umich.edu case 3: 18267639Sgblack@eecs.umich.edu return new NVtbl3(machInst, vd, vn, vm); 18277639Sgblack@eecs.umich.edu case 4: 18287639Sgblack@eecs.umich.edu return new NVtbl4(machInst, vd, vn, vm); 18297639Sgblack@eecs.umich.edu } 18307435Sgblack@eecs.umich.edu } else { 18317639Sgblack@eecs.umich.edu switch (length) { 18327639Sgblack@eecs.umich.edu case 1: 18337639Sgblack@eecs.umich.edu return new NVtbx1(machInst, vd, vn, vm); 18347639Sgblack@eecs.umich.edu case 2: 18357639Sgblack@eecs.umich.edu return new NVtbx2(machInst, vd, vn, vm); 18367639Sgblack@eecs.umich.edu case 3: 18377639Sgblack@eecs.umich.edu return new NVtbx3(machInst, vd, vn, vm); 18387639Sgblack@eecs.umich.edu case 4: 18397639Sgblack@eecs.umich.edu return new NVtbx4(machInst, vd, vn, vm); 18407639Sgblack@eecs.umich.edu } 18417435Sgblack@eecs.umich.edu } 184213977Sciro.santilli@arm.com } else if (q == 0xc && (c & 0x9) == 0) { 18437639Sgblack@eecs.umich.edu unsigned imm4 = bits(machInst, 19, 16); 18447639Sgblack@eecs.umich.edu if (bits(imm4, 2, 0) == 0) 18457639Sgblack@eecs.umich.edu return new Unknown(machInst); 18467639Sgblack@eecs.umich.edu unsigned size = 0; 18477639Sgblack@eecs.umich.edu while ((imm4 & 0x1) == 0) { 18487639Sgblack@eecs.umich.edu size++; 18497639Sgblack@eecs.umich.edu imm4 >>= 1; 18507639Sgblack@eecs.umich.edu } 18517639Sgblack@eecs.umich.edu unsigned index = imm4 >> 1; 18527639Sgblack@eecs.umich.edu const bool q = bits(machInst, 6); 18537639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftSReg<NVdupD, NVdupQ>( 18547639Sgblack@eecs.umich.edu q, size, machInst, vd, vm, index); 18557435Sgblack@eecs.umich.edu } 18567435Sgblack@eecs.umich.edu } 18577435Sgblack@eecs.umich.edu return new Unknown(machInst); 18587435Sgblack@eecs.umich.edu } 18597435Sgblack@eecs.umich.edu ''' 18607435Sgblack@eecs.umich.edu}}; 18617435Sgblack@eecs.umich.edu 18627435Sgblack@eecs.umich.edudef format ThumbNeonMem() {{ 18637435Sgblack@eecs.umich.edu decode_block = ''' 18647435Sgblack@eecs.umich.edu return decodeNeonMem(machInst); 18657435Sgblack@eecs.umich.edu ''' 18667435Sgblack@eecs.umich.edu}}; 18677435Sgblack@eecs.umich.edu 18687435Sgblack@eecs.umich.edudef format ThumbNeonData() {{ 18697435Sgblack@eecs.umich.edu decode_block = ''' 18707639Sgblack@eecs.umich.edu return decodeNeonData(machInst); 18717435Sgblack@eecs.umich.edu ''' 18727435Sgblack@eecs.umich.edu}}; 18737435Sgblack@eecs.umich.edu 18747435Sgblack@eecs.umich.edulet {{ 18757435Sgblack@eecs.umich.edu header_output = ''' 18767435Sgblack@eecs.umich.edu StaticInstPtr 18777356Sgblack@eecs.umich.edu decodeExtensionRegLoadStore(ExtMachInst machInst); 18787356Sgblack@eecs.umich.edu ''' 18797356Sgblack@eecs.umich.edu decoder_output = ''' 18807356Sgblack@eecs.umich.edu StaticInstPtr 18817356Sgblack@eecs.umich.edu decodeExtensionRegLoadStore(ExtMachInst machInst) 18827178Sgblack@eecs.umich.edu { 18837178Sgblack@eecs.umich.edu const uint32_t opcode = bits(machInst, 24, 20); 18847178Sgblack@eecs.umich.edu const uint32_t offset = bits(machInst, 7, 0); 18857337Sgblack@eecs.umich.edu const bool single = (bits(machInst, 8) == 0); 18867178Sgblack@eecs.umich.edu const IntRegIndex rn = (IntRegIndex)(uint32_t)bits(machInst, 19, 16); 18877178Sgblack@eecs.umich.edu RegIndex vd; 18887178Sgblack@eecs.umich.edu if (single) { 18897178Sgblack@eecs.umich.edu vd = (RegIndex)(uint32_t)((bits(machInst, 15, 12) << 1) | 18907178Sgblack@eecs.umich.edu bits(machInst, 22)); 18917178Sgblack@eecs.umich.edu } else { 18927178Sgblack@eecs.umich.edu vd = (RegIndex)(uint32_t)((bits(machInst, 15, 12) << 1) | 18937178Sgblack@eecs.umich.edu (bits(machInst, 22) << 5)); 18947178Sgblack@eecs.umich.edu } 18957178Sgblack@eecs.umich.edu switch (bits(opcode, 4, 3)) { 18967178Sgblack@eecs.umich.edu case 0x0: 18977335Sgblack@eecs.umich.edu if (bits(opcode, 4, 1) == 0x2 && 18987335Sgblack@eecs.umich.edu !(machInst.thumb == 1 && bits(machInst, 28) == 1) && 18997335Sgblack@eecs.umich.edu !(machInst.thumb == 0 && machInst.condCode == 0xf)) { 19007335Sgblack@eecs.umich.edu if ((bits(machInst, 7, 4) & 0xd) != 1) { 19017335Sgblack@eecs.umich.edu break; 19027335Sgblack@eecs.umich.edu } 19037335Sgblack@eecs.umich.edu const IntRegIndex rt = 19047335Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 15, 12); 19057335Sgblack@eecs.umich.edu const IntRegIndex rt2 = 19067335Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 19, 16); 19077335Sgblack@eecs.umich.edu const bool op = bits(machInst, 20); 19087335Sgblack@eecs.umich.edu uint32_t vm; 19097337Sgblack@eecs.umich.edu if (single) { 19107335Sgblack@eecs.umich.edu vm = (bits(machInst, 3, 0) << 1) | bits(machInst, 5); 19117335Sgblack@eecs.umich.edu } else { 19127335Sgblack@eecs.umich.edu vm = (bits(machInst, 3, 0) << 1) | 19137335Sgblack@eecs.umich.edu (bits(machInst, 5) << 5); 19147335Sgblack@eecs.umich.edu } 19157335Sgblack@eecs.umich.edu if (op) { 19167335Sgblack@eecs.umich.edu return new Vmov2Core2Reg(machInst, rt, rt2, 19177335Sgblack@eecs.umich.edu (IntRegIndex)vm); 19187335Sgblack@eecs.umich.edu } else { 19197335Sgblack@eecs.umich.edu return new Vmov2Reg2Core(machInst, (IntRegIndex)vm, 19207335Sgblack@eecs.umich.edu rt, rt2); 19217335Sgblack@eecs.umich.edu } 19227178Sgblack@eecs.umich.edu } 19237178Sgblack@eecs.umich.edu break; 19247178Sgblack@eecs.umich.edu case 0x1: 19257413Sgblack@eecs.umich.edu { 192610037SARM gem5 Developers if (offset == 0 || vd + offset/2 > NumFloatV7ArchRegs) { 19277413Sgblack@eecs.umich.edu break; 19287413Sgblack@eecs.umich.edu } 19297413Sgblack@eecs.umich.edu switch (bits(opcode, 1, 0)) { 19307413Sgblack@eecs.umich.edu case 0x0: 19317413Sgblack@eecs.umich.edu return new VLdmStm(machInst, rn, vd, single, 19327413Sgblack@eecs.umich.edu true, false, false, offset); 19337413Sgblack@eecs.umich.edu case 0x1: 19347413Sgblack@eecs.umich.edu return new VLdmStm(machInst, rn, vd, single, 19357413Sgblack@eecs.umich.edu true, false, true, offset); 19367413Sgblack@eecs.umich.edu case 0x2: 19377413Sgblack@eecs.umich.edu return new VLdmStm(machInst, rn, vd, single, 19387413Sgblack@eecs.umich.edu true, true, false, offset); 19397413Sgblack@eecs.umich.edu case 0x3: 19407413Sgblack@eecs.umich.edu // If rn == sp, then this is called vpop. 19417413Sgblack@eecs.umich.edu return new VLdmStm(machInst, rn, vd, single, 19427413Sgblack@eecs.umich.edu true, true, true, offset); 194312595Ssiddhesh.poyarekar@gmail.com default: 194412595Ssiddhesh.poyarekar@gmail.com M5_UNREACHABLE; 19457413Sgblack@eecs.umich.edu } 19467178Sgblack@eecs.umich.edu } 19477178Sgblack@eecs.umich.edu case 0x2: 19487178Sgblack@eecs.umich.edu if (bits(opcode, 1, 0) == 0x2) { 19497178Sgblack@eecs.umich.edu // If rn == sp, then this is called vpush. 19507178Sgblack@eecs.umich.edu return new VLdmStm(machInst, rn, vd, single, 19517178Sgblack@eecs.umich.edu false, true, false, offset); 19527178Sgblack@eecs.umich.edu } else if (bits(opcode, 1, 0) == 0x3) { 19537178Sgblack@eecs.umich.edu return new VLdmStm(machInst, rn, vd, single, 19547178Sgblack@eecs.umich.edu false, true, true, offset); 19557178Sgblack@eecs.umich.edu } 195612595Ssiddhesh.poyarekar@gmail.com M5_FALLTHROUGH; 19577178Sgblack@eecs.umich.edu case 0x3: 19587346Sgblack@eecs.umich.edu const bool up = (bits(machInst, 23) == 1); 19597346Sgblack@eecs.umich.edu const uint32_t imm = bits(machInst, 7, 0) << 2; 19607346Sgblack@eecs.umich.edu if (single) { 19617346Sgblack@eecs.umich.edu vd = (RegIndex)(uint32_t)((bits(machInst, 15, 12) << 1) | 19627346Sgblack@eecs.umich.edu (bits(machInst, 22))); 19637346Sgblack@eecs.umich.edu } else { 19647346Sgblack@eecs.umich.edu vd = (RegIndex)(uint32_t)((bits(machInst, 15, 12) << 1) | 19657346Sgblack@eecs.umich.edu (bits(machInst, 22) << 5)); 19667346Sgblack@eecs.umich.edu } 19677178Sgblack@eecs.umich.edu if (bits(opcode, 1, 0) == 0x0) { 19687346Sgblack@eecs.umich.edu if (single) { 19697346Sgblack@eecs.umich.edu if (up) { 19707346Sgblack@eecs.umich.edu return new %(vstr_us)s(machInst, vd, rn, up, imm); 19717346Sgblack@eecs.umich.edu } else { 19727346Sgblack@eecs.umich.edu return new %(vstr_s)s(machInst, vd, rn, up, imm); 19737346Sgblack@eecs.umich.edu } 19747346Sgblack@eecs.umich.edu } else { 19757346Sgblack@eecs.umich.edu if (up) { 19767346Sgblack@eecs.umich.edu return new %(vstr_ud)s(machInst, vd, vd + 1, 19777346Sgblack@eecs.umich.edu rn, up, imm); 19787346Sgblack@eecs.umich.edu } else { 19797346Sgblack@eecs.umich.edu return new %(vstr_d)s(machInst, vd, vd + 1, 19807346Sgblack@eecs.umich.edu rn, up, imm); 19817346Sgblack@eecs.umich.edu } 19827346Sgblack@eecs.umich.edu } 19837178Sgblack@eecs.umich.edu } else if (bits(opcode, 1, 0) == 0x1) { 19847337Sgblack@eecs.umich.edu if (single) { 19857337Sgblack@eecs.umich.edu if (up) { 19867337Sgblack@eecs.umich.edu return new %(vldr_us)s(machInst, vd, rn, up, imm); 19877337Sgblack@eecs.umich.edu } else { 19887337Sgblack@eecs.umich.edu return new %(vldr_s)s(machInst, vd, rn, up, imm); 19897337Sgblack@eecs.umich.edu } 19907337Sgblack@eecs.umich.edu } else { 19917337Sgblack@eecs.umich.edu if (up) { 19927337Sgblack@eecs.umich.edu return new %(vldr_ud)s(machInst, vd, vd + 1, 19937337Sgblack@eecs.umich.edu rn, up, imm); 19947337Sgblack@eecs.umich.edu } else { 19957337Sgblack@eecs.umich.edu return new %(vldr_d)s(machInst, vd, vd + 1, 19967337Sgblack@eecs.umich.edu rn, up, imm); 19977337Sgblack@eecs.umich.edu } 19987337Sgblack@eecs.umich.edu } 19997178Sgblack@eecs.umich.edu } 20007178Sgblack@eecs.umich.edu } 20017178Sgblack@eecs.umich.edu return new Unknown(machInst); 20027178Sgblack@eecs.umich.edu } 20037337Sgblack@eecs.umich.edu ''' % { 20047337Sgblack@eecs.umich.edu "vldr_us" : "VLDR_" + loadImmClassName(False, True, False), 20057337Sgblack@eecs.umich.edu "vldr_s" : "VLDR_" + loadImmClassName(False, False, False), 20067337Sgblack@eecs.umich.edu "vldr_ud" : "VLDR_" + loadDoubleImmClassName(False, True, False), 20077346Sgblack@eecs.umich.edu "vldr_d" : "VLDR_" + loadDoubleImmClassName(False, False, False), 20087346Sgblack@eecs.umich.edu "vstr_us" : "VSTR_" + storeImmClassName(False, True, False), 20097346Sgblack@eecs.umich.edu "vstr_s" : "VSTR_" + storeImmClassName(False, False, False), 20107346Sgblack@eecs.umich.edu "vstr_ud" : "VSTR_" + storeDoubleImmClassName(False, True, False), 20117346Sgblack@eecs.umich.edu "vstr_d" : "VSTR_" + storeDoubleImmClassName(False, False, False) 20127337Sgblack@eecs.umich.edu } 20137178Sgblack@eecs.umich.edu}}; 20147321Sgblack@eecs.umich.edu 20157356Sgblack@eecs.umich.edudef format ExtensionRegLoadStore() {{ 20167321Sgblack@eecs.umich.edu decode_block = ''' 20177356Sgblack@eecs.umich.edu return decodeExtensionRegLoadStore(machInst); 20187356Sgblack@eecs.umich.edu ''' 20197356Sgblack@eecs.umich.edu}}; 20207356Sgblack@eecs.umich.edu 20217356Sgblack@eecs.umich.edulet {{ 20227356Sgblack@eecs.umich.edu header_output = ''' 20237356Sgblack@eecs.umich.edu StaticInstPtr 20247356Sgblack@eecs.umich.edu decodeShortFpTransfer(ExtMachInst machInst); 20257356Sgblack@eecs.umich.edu ''' 20267356Sgblack@eecs.umich.edu decoder_output = ''' 202713738Sciro.santilli@arm.com IntRegIndex decodeFpVd(ExtMachInst machInst, uint32_t size, bool isInt) 202813738Sciro.santilli@arm.com { 202913738Sciro.santilli@arm.com if (!isInt and size == 3) { 203013738Sciro.santilli@arm.com return (IntRegIndex)((bits(machInst, 22) << 5) | 203113738Sciro.santilli@arm.com (bits(machInst, 15, 12) << 1)); 203213738Sciro.santilli@arm.com } else { 203313738Sciro.santilli@arm.com return (IntRegIndex)(bits(machInst, 22) | 203413738Sciro.santilli@arm.com (bits(machInst, 15, 12) << 1)); 203513738Sciro.santilli@arm.com } 203613738Sciro.santilli@arm.com } 203713979Sciro.santilli@arm.com 203813738Sciro.santilli@arm.com IntRegIndex decodeFpVm(ExtMachInst machInst, uint32_t size, bool isInt) 203913738Sciro.santilli@arm.com { 204013738Sciro.santilli@arm.com if (!isInt and size == 3) { 204113738Sciro.santilli@arm.com return (IntRegIndex)((bits(machInst, 5) << 5) | 204213738Sciro.santilli@arm.com (bits(machInst, 3, 0) << 1)); 204313738Sciro.santilli@arm.com } else { 204413738Sciro.santilli@arm.com return (IntRegIndex)(bits(machInst, 5) | 204513738Sciro.santilli@arm.com (bits(machInst, 3, 0) << 1)); 204613738Sciro.santilli@arm.com } 204713738Sciro.santilli@arm.com } 204813979Sciro.santilli@arm.com 204913979Sciro.santilli@arm.com IntRegIndex decodeFpVn(ExtMachInst machInst, uint32_t size) 205013979Sciro.santilli@arm.com { 205113979Sciro.santilli@arm.com if (size == 3) { 205213979Sciro.santilli@arm.com return (IntRegIndex)((bits(machInst, 7) << 5) | 205313979Sciro.santilli@arm.com (bits(machInst, 19, 16) << 1)); 205413979Sciro.santilli@arm.com } else { 205513979Sciro.santilli@arm.com return (IntRegIndex)(bits(machInst, 7) | 205613979Sciro.santilli@arm.com (bits(machInst, 19, 16) << 1)); 205713979Sciro.santilli@arm.com } 205813979Sciro.santilli@arm.com } 205913979Sciro.santilli@arm.com 20607356Sgblack@eecs.umich.edu StaticInstPtr 206113979Sciro.santilli@arm.com decodeFloatingPointDataProcessing(ExtMachInst machInst) { 206213979Sciro.santilli@arm.com const uint32_t op0 = bits(machInst, 23, 20); 206313979Sciro.santilli@arm.com const uint32_t op1 = bits(machInst, 19, 16); 206413979Sciro.santilli@arm.com const uint32_t op2 = bits(machInst, 9, 8); 206513979Sciro.santilli@arm.com const uint32_t op3 = bits(machInst, 6); 206613979Sciro.santilli@arm.com const uint32_t rm = bits(machInst, 17, 16); 206713979Sciro.santilli@arm.com const uint32_t size = bits(machInst, 9, 8); 206813979Sciro.santilli@arm.com IntRegIndex vd = decodeFpVd(machInst, size, false); 206913979Sciro.santilli@arm.com IntRegIndex vm = decodeFpVm(machInst, size, false); 207013979Sciro.santilli@arm.com IntRegIndex vdInt = decodeFpVd(machInst, size, true); 207113979Sciro.santilli@arm.com IntRegIndex vn = decodeFpVn(machInst, size); 207213979Sciro.santilli@arm.com if (bits(machInst, 31, 24) == 0xFE && !bits(machInst, 4)) { 207313979Sciro.santilli@arm.com if (bits(op0, 3) == 0 && op2 != 0 && !op3){ 207413979Sciro.santilli@arm.com ConditionCode cond; 207513979Sciro.santilli@arm.com switch(bits(machInst, 21, 20)) { 207613979Sciro.santilli@arm.com case 0x0: cond = COND_EQ; break; 207713979Sciro.santilli@arm.com case 0x1: cond = COND_VS; break; 207813979Sciro.santilli@arm.com case 0x2: cond = COND_GE; break; 207913979Sciro.santilli@arm.com case 0x3: cond = COND_GT; break; 208014176Sciro.santilli@arm.com default: panic("unreachable"); 208113979Sciro.santilli@arm.com } 208213979Sciro.santilli@arm.com if (size == 3) { 208313979Sciro.santilli@arm.com return new VselD(machInst, vd, vn, vm, cond); 208413979Sciro.santilli@arm.com } else { 208513979Sciro.santilli@arm.com return new VselS(machInst, vd, vn, vm, cond); 208613979Sciro.santilli@arm.com } 208713979Sciro.santilli@arm.com } else if (bits(op0, 3) == 1 && bits(op0, 1, 0) == 0 && op2 != 0) { 208813979Sciro.santilli@arm.com const bool op = bits(machInst, 6); 208913979Sciro.santilli@arm.com if (op) { 209013979Sciro.santilli@arm.com if (size == 1) { 209113979Sciro.santilli@arm.com return new FailUnimplemented("vminnm.f16", machInst); 209213979Sciro.santilli@arm.com } 209313979Sciro.santilli@arm.com return decodeNeonSizeSingleDouble<VminnmS, VminnmD>( 209413979Sciro.santilli@arm.com size, machInst, vd, vn, vm); 209513979Sciro.santilli@arm.com } else { 209613979Sciro.santilli@arm.com if (size == 1) { 209713979Sciro.santilli@arm.com return new FailUnimplemented("vmaxnm.f16", machInst); 209813979Sciro.santilli@arm.com } 209913979Sciro.santilli@arm.com return decodeNeonSizeSingleDouble<VmaxnmS, VmaxnmD>( 210013979Sciro.santilli@arm.com size, machInst, vd, vn, vm); 210113979Sciro.santilli@arm.com } 210213979Sciro.santilli@arm.com } else if (bits(op0, 3) && bits(op0, 1, 0) == 3 && 210313979Sciro.santilli@arm.com bits(op1, 3) && op2 != 0 && op3) 210413979Sciro.santilli@arm.com { 210513979Sciro.santilli@arm.com const uint32_t o1 = bits(machInst, 18); 210613738Sciro.santilli@arm.com if (o1 == 0) { 210713738Sciro.santilli@arm.com if (size == 3) { 210813738Sciro.santilli@arm.com switch(rm) { 210913738Sciro.santilli@arm.com case 0x0: 211013738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntAD>(machInst, vd, vm, 211113738Sciro.santilli@arm.com true); 211213738Sciro.santilli@arm.com case 0x1: 211313738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntND>(machInst, vd, vm, 211413738Sciro.santilli@arm.com true); 211513738Sciro.santilli@arm.com case 0x2: 211613738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntPD>(machInst, vd, vm, 211713738Sciro.santilli@arm.com true); 211813738Sciro.santilli@arm.com case 0x3: 211913738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntMD>(machInst, vd, vm, 212013738Sciro.santilli@arm.com true); 212113738Sciro.santilli@arm.com default: return new Unknown(machInst); 212213738Sciro.santilli@arm.com } 212313738Sciro.santilli@arm.com } else { 212413738Sciro.santilli@arm.com switch(rm) { 212513738Sciro.santilli@arm.com case 0x0: 212613738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntAS>(machInst, vd, vm, 212713738Sciro.santilli@arm.com false); 212813738Sciro.santilli@arm.com case 0x1: 212913738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntNS>(machInst, vd, vm, 213013738Sciro.santilli@arm.com false); 213113738Sciro.santilli@arm.com case 0x2: 213213738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntPS>(machInst, vd, vm, 213313738Sciro.santilli@arm.com false); 213413738Sciro.santilli@arm.com case 0x3: 213513738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntMS>(machInst, vd, vm, 213613738Sciro.santilli@arm.com false); 213713738Sciro.santilli@arm.com default: return new Unknown(machInst); 213813738Sciro.santilli@arm.com } 213913738Sciro.santilli@arm.com } 214013738Sciro.santilli@arm.com } else { 214113738Sciro.santilli@arm.com const bool op = bits(machInst, 7); 214213738Sciro.santilli@arm.com switch(rm) { 214313979Sciro.santilli@arm.com case 0x0: 214413738Sciro.santilli@arm.com switch(size) { 214513979Sciro.santilli@arm.com case 0x0: 214613738Sciro.santilli@arm.com return new Unknown(machInst); 214713979Sciro.santilli@arm.com case 0x1: 214813738Sciro.santilli@arm.com return new FailUnimplemented( 214913738Sciro.santilli@arm.com "vcvta.u32.f16", machInst); 215013979Sciro.santilli@arm.com case 0x2: 215113738Sciro.santilli@arm.com if (op) { 215213738Sciro.santilli@arm.com return new VcvtaFpSIntS(machInst, vdInt, vm); 215313738Sciro.santilli@arm.com } else { 215413738Sciro.santilli@arm.com return new VcvtaFpUIntS(machInst, vdInt, vm); 215513738Sciro.santilli@arm.com } 215613979Sciro.santilli@arm.com case 0x3: 215713738Sciro.santilli@arm.com if (op) { 215813738Sciro.santilli@arm.com return new VcvtaFpSIntD(machInst, vdInt, vm); 215913738Sciro.santilli@arm.com } else { 216013738Sciro.santilli@arm.com return new VcvtaFpUIntD(machInst, vdInt, vm); 216113738Sciro.santilli@arm.com } 216213979Sciro.santilli@arm.com default: return new Unknown(machInst); 216313738Sciro.santilli@arm.com } 216413979Sciro.santilli@arm.com case 0x1: 216513738Sciro.santilli@arm.com switch(size) { 216613979Sciro.santilli@arm.com case 0x0: 216713738Sciro.santilli@arm.com return new Unknown(machInst); 216813979Sciro.santilli@arm.com case 0x1: 216913738Sciro.santilli@arm.com return new FailUnimplemented( 217013738Sciro.santilli@arm.com "vcvtn.u32.f16", machInst); 217113979Sciro.santilli@arm.com case 0x2: 217213738Sciro.santilli@arm.com if (op) { 217313738Sciro.santilli@arm.com return new VcvtnFpSIntS(machInst, vdInt, vm); 217413738Sciro.santilli@arm.com } else { 217513738Sciro.santilli@arm.com return new VcvtnFpUIntS(machInst, vdInt, vm); 217613738Sciro.santilli@arm.com } 217713979Sciro.santilli@arm.com case 0x3: 217813738Sciro.santilli@arm.com if (op) { 217913738Sciro.santilli@arm.com return new VcvtnFpSIntD(machInst, vdInt, vm); 218013738Sciro.santilli@arm.com } else { 218113738Sciro.santilli@arm.com return new VcvtnFpUIntD(machInst, vdInt, vm); 218213738Sciro.santilli@arm.com } 218313979Sciro.santilli@arm.com default: return new Unknown(machInst); 218413738Sciro.santilli@arm.com } 218513979Sciro.santilli@arm.com case 0x2: 218613738Sciro.santilli@arm.com switch(size) { 218713979Sciro.santilli@arm.com case 0x0: 218813738Sciro.santilli@arm.com return new Unknown(machInst); 218913979Sciro.santilli@arm.com case 0x1: 219013738Sciro.santilli@arm.com return new FailUnimplemented( 219113738Sciro.santilli@arm.com "vcvtp.u32.f16", machInst); 219213979Sciro.santilli@arm.com case 0x2: 219313738Sciro.santilli@arm.com if (op) { 219413738Sciro.santilli@arm.com return new VcvtpFpSIntS(machInst, vdInt, vm); 219513738Sciro.santilli@arm.com } else { 219613738Sciro.santilli@arm.com return new VcvtpFpUIntS(machInst, vdInt, vm); 219713738Sciro.santilli@arm.com } 219813979Sciro.santilli@arm.com case 0x3: 219913738Sciro.santilli@arm.com if (op) { 220013738Sciro.santilli@arm.com return new VcvtpFpSIntD(machInst, vdInt, vm); 220113738Sciro.santilli@arm.com } else { 220213738Sciro.santilli@arm.com return new VcvtpFpUIntD(machInst, vdInt, vm); 220313738Sciro.santilli@arm.com } 220413979Sciro.santilli@arm.com default: return new Unknown(machInst); 220513738Sciro.santilli@arm.com } 220613979Sciro.santilli@arm.com case 0x3: 220713738Sciro.santilli@arm.com switch(size) { 220813979Sciro.santilli@arm.com case 0x0: 220913738Sciro.santilli@arm.com return new Unknown(machInst); 221013979Sciro.santilli@arm.com case 0x1: 221113738Sciro.santilli@arm.com return new FailUnimplemented( 221213738Sciro.santilli@arm.com "vcvtm.u32.f16", machInst); 221313979Sciro.santilli@arm.com case 0x2: 221413738Sciro.santilli@arm.com if (op) { 221513738Sciro.santilli@arm.com return new VcvtmFpSIntS(machInst, vdInt, vm); 221613738Sciro.santilli@arm.com } else { 221713738Sciro.santilli@arm.com return new VcvtmFpUIntS(machInst, vdInt, vm); 221813738Sciro.santilli@arm.com } 221913979Sciro.santilli@arm.com case 0x3: 222013738Sciro.santilli@arm.com if (op) { 222113738Sciro.santilli@arm.com return new VcvtmFpSIntD(machInst, vdInt, vm); 222213738Sciro.santilli@arm.com } else { 222313738Sciro.santilli@arm.com return new VcvtmFpUIntD(machInst, vdInt, vm); 222413738Sciro.santilli@arm.com } 222513979Sciro.santilli@arm.com default: return new Unknown(machInst); 222613738Sciro.santilli@arm.com } 222713979Sciro.santilli@arm.com default: return new Unknown(machInst); 222813738Sciro.santilli@arm.com } 222913738Sciro.santilli@arm.com } 223011671Smitch.hayenga@arm.com } else { 223111671Smitch.hayenga@arm.com return new Unknown(machInst); 223211671Smitch.hayenga@arm.com } 223313979Sciro.santilli@arm.com } else { 223413979Sciro.santilli@arm.com return new Unknown(machInst); 22357321Sgblack@eecs.umich.edu } 223613979Sciro.santilli@arm.com } 223713979Sciro.santilli@arm.com 223813979Sciro.santilli@arm.com StaticInstPtr 223913979Sciro.santilli@arm.com decodeShortFpTransfer(ExtMachInst machInst) 224013979Sciro.santilli@arm.com { 224113979Sciro.santilli@arm.com if ((machInst.thumb == 1 && bits(machInst, 28) == 1) || 224213979Sciro.santilli@arm.com (machInst.thumb == 0 && machInst.condCode == 0xf)) { 224313979Sciro.santilli@arm.com return decodeFloatingPointDataProcessing(machInst); 224413979Sciro.santilli@arm.com } 224513979Sciro.santilli@arm.com const uint32_t l = bits(machInst, 20); 224613979Sciro.santilli@arm.com const uint32_t c = bits(machInst, 8); 224713979Sciro.santilli@arm.com const uint32_t a = bits(machInst, 23, 21); 224813979Sciro.santilli@arm.com const uint32_t q = bits(machInst, 6, 5); 22497321Sgblack@eecs.umich.edu if (l == 0 && c == 0) { 22507321Sgblack@eecs.umich.edu if (a == 0) { 22517335Sgblack@eecs.umich.edu const uint32_t vn = (bits(machInst, 19, 16) << 1) | 22527335Sgblack@eecs.umich.edu bits(machInst, 7); 22537335Sgblack@eecs.umich.edu const IntRegIndex rt = 22547335Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 15, 12); 22557335Sgblack@eecs.umich.edu if (bits(machInst, 20) == 1) { 22567335Sgblack@eecs.umich.edu return new VmovRegCoreW(machInst, rt, (IntRegIndex)vn); 22577335Sgblack@eecs.umich.edu } else { 22587335Sgblack@eecs.umich.edu return new VmovCoreRegW(machInst, (IntRegIndex)vn, rt); 22597335Sgblack@eecs.umich.edu } 22607321Sgblack@eecs.umich.edu } else if (a == 0x7) { 22617323Sgblack@eecs.umich.edu const IntRegIndex rt = 22627323Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 15, 12); 226310037SARM gem5 Developers uint32_t reg = bits(machInst, 19, 16); 226410037SARM gem5 Developers uint32_t specReg; 226510037SARM gem5 Developers switch (reg) { 22667323Sgblack@eecs.umich.edu case 0: 22677323Sgblack@eecs.umich.edu specReg = MISCREG_FPSID; 22687323Sgblack@eecs.umich.edu break; 22697323Sgblack@eecs.umich.edu case 1: 22707323Sgblack@eecs.umich.edu specReg = MISCREG_FPSCR; 22717323Sgblack@eecs.umich.edu break; 22727394Sgblack@eecs.umich.edu case 6: 22737394Sgblack@eecs.umich.edu specReg = MISCREG_MVFR1; 22747394Sgblack@eecs.umich.edu break; 22757394Sgblack@eecs.umich.edu case 7: 22767394Sgblack@eecs.umich.edu specReg = MISCREG_MVFR0; 22777394Sgblack@eecs.umich.edu break; 22787323Sgblack@eecs.umich.edu case 8: 22797323Sgblack@eecs.umich.edu specReg = MISCREG_FPEXC; 22807323Sgblack@eecs.umich.edu break; 22817323Sgblack@eecs.umich.edu default: 22827323Sgblack@eecs.umich.edu return new Unknown(machInst); 22837323Sgblack@eecs.umich.edu } 22847643Sgblack@eecs.umich.edu if (specReg == MISCREG_FPSCR) { 22857643Sgblack@eecs.umich.edu return new VmsrFpscr(machInst, (IntRegIndex)specReg, rt); 22867643Sgblack@eecs.umich.edu } else { 228710037SARM gem5 Developers uint32_t iss = mcrMrcIssBuild(0, bits(machInst, 3, 0), rt, 228810037SARM gem5 Developers reg, a, bits(machInst, 7, 5)); 228910037SARM gem5 Developers return new Vmsr(machInst, (IntRegIndex)specReg, rt, iss); 22907643Sgblack@eecs.umich.edu } 22917321Sgblack@eecs.umich.edu } 22927321Sgblack@eecs.umich.edu } else if (l == 0 && c == 1) { 22937321Sgblack@eecs.umich.edu if (bits(a, 2) == 0) { 22947335Sgblack@eecs.umich.edu uint32_t vd = (bits(machInst, 7) << 5) | 22957335Sgblack@eecs.umich.edu (bits(machInst, 19, 16) << 1); 22967639Sgblack@eecs.umich.edu // Handle accessing each single precision half of the vector. 22977639Sgblack@eecs.umich.edu vd += bits(machInst, 21); 22987335Sgblack@eecs.umich.edu const IntRegIndex rt = 22997335Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 15, 12); 23007335Sgblack@eecs.umich.edu if (bits(machInst, 22) == 1) { 23017639Sgblack@eecs.umich.edu return new VmovCoreRegB(machInst, (IntRegIndex)vd, 23027639Sgblack@eecs.umich.edu rt, bits(machInst, 6, 5)); 23037335Sgblack@eecs.umich.edu } else if (bits(machInst, 5) == 1) { 23047639Sgblack@eecs.umich.edu return new VmovCoreRegH(machInst, (IntRegIndex)vd, 23057639Sgblack@eecs.umich.edu rt, bits(machInst, 6)); 23067335Sgblack@eecs.umich.edu } else if (bits(machInst, 6) == 0) { 23077639Sgblack@eecs.umich.edu return new VmovCoreRegW(machInst, (IntRegIndex)vd, rt); 23087335Sgblack@eecs.umich.edu } else { 23097335Sgblack@eecs.umich.edu return new Unknown(machInst); 23107335Sgblack@eecs.umich.edu } 231113977Sciro.santilli@arm.com } else if (bits(q, 1) == 0) { 23127639Sgblack@eecs.umich.edu bool q = bits(machInst, 21); 23137639Sgblack@eecs.umich.edu unsigned be = (bits(machInst, 22) << 1) | (bits(machInst, 5)); 23147639Sgblack@eecs.umich.edu IntRegIndex vd = (IntRegIndex)(2 * (uint32_t) 23157639Sgblack@eecs.umich.edu (bits(machInst, 19, 16) | (bits(machInst, 7) << 4))); 23167639Sgblack@eecs.umich.edu IntRegIndex rt = (IntRegIndex)(uint32_t) 23177639Sgblack@eecs.umich.edu bits(machInst, 15, 12); 23187639Sgblack@eecs.umich.edu if (q) { 23197639Sgblack@eecs.umich.edu switch (be) { 23207639Sgblack@eecs.umich.edu case 0: 23217639Sgblack@eecs.umich.edu return new NVdupQGpr<uint32_t>(machInst, vd, rt); 23227639Sgblack@eecs.umich.edu case 1: 23237639Sgblack@eecs.umich.edu return new NVdupQGpr<uint16_t>(machInst, vd, rt); 23247639Sgblack@eecs.umich.edu case 2: 23257639Sgblack@eecs.umich.edu return new NVdupQGpr<uint8_t>(machInst, vd, rt); 23267639Sgblack@eecs.umich.edu case 3: 23277639Sgblack@eecs.umich.edu return new Unknown(machInst); 23287639Sgblack@eecs.umich.edu } 23297639Sgblack@eecs.umich.edu } else { 23307639Sgblack@eecs.umich.edu switch (be) { 23317639Sgblack@eecs.umich.edu case 0: 23327639Sgblack@eecs.umich.edu return new NVdupDGpr<uint32_t>(machInst, vd, rt); 23337639Sgblack@eecs.umich.edu case 1: 23347639Sgblack@eecs.umich.edu return new NVdupDGpr<uint16_t>(machInst, vd, rt); 23357639Sgblack@eecs.umich.edu case 2: 23367639Sgblack@eecs.umich.edu return new NVdupDGpr<uint8_t>(machInst, vd, rt); 23377639Sgblack@eecs.umich.edu case 3: 23387639Sgblack@eecs.umich.edu return new Unknown(machInst); 23397639Sgblack@eecs.umich.edu } 23407335Sgblack@eecs.umich.edu } 23417321Sgblack@eecs.umich.edu } 23427321Sgblack@eecs.umich.edu } else if (l == 1 && c == 0) { 23437321Sgblack@eecs.umich.edu if (a == 0) { 23447335Sgblack@eecs.umich.edu const uint32_t vn = (bits(machInst, 19, 16) << 1) | 23457335Sgblack@eecs.umich.edu bits(machInst, 7); 23467335Sgblack@eecs.umich.edu const IntRegIndex rt = 23477335Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 15, 12); 23487335Sgblack@eecs.umich.edu if (bits(machInst, 20) == 1) { 23497335Sgblack@eecs.umich.edu return new VmovRegCoreW(machInst, rt, (IntRegIndex)vn); 23507335Sgblack@eecs.umich.edu } else { 23517335Sgblack@eecs.umich.edu return new VmovCoreRegW(machInst, (IntRegIndex)vn, rt); 23527335Sgblack@eecs.umich.edu } 23537321Sgblack@eecs.umich.edu } else if (a == 7) { 23547326Sgblack@eecs.umich.edu const IntRegIndex rt = 23557326Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 15, 12); 235610037SARM gem5 Developers uint32_t reg = bits(machInst, 19, 16); 235710037SARM gem5 Developers uint32_t specReg; 235810037SARM gem5 Developers switch (reg) { 23597326Sgblack@eecs.umich.edu case 0: 23607326Sgblack@eecs.umich.edu specReg = MISCREG_FPSID; 23617326Sgblack@eecs.umich.edu break; 23627326Sgblack@eecs.umich.edu case 1: 23637326Sgblack@eecs.umich.edu specReg = MISCREG_FPSCR; 23647326Sgblack@eecs.umich.edu break; 23657326Sgblack@eecs.umich.edu case 6: 23667326Sgblack@eecs.umich.edu specReg = MISCREG_MVFR1; 23677326Sgblack@eecs.umich.edu break; 23687326Sgblack@eecs.umich.edu case 7: 23697326Sgblack@eecs.umich.edu specReg = MISCREG_MVFR0; 23707326Sgblack@eecs.umich.edu break; 23717326Sgblack@eecs.umich.edu case 8: 23727326Sgblack@eecs.umich.edu specReg = MISCREG_FPEXC; 23737326Sgblack@eecs.umich.edu break; 23747326Sgblack@eecs.umich.edu default: 23757326Sgblack@eecs.umich.edu return new Unknown(machInst); 23767326Sgblack@eecs.umich.edu } 23777392Sgblack@eecs.umich.edu if (rt == 0xf) { 23787643Sgblack@eecs.umich.edu if (specReg == MISCREG_FPSCR) { 23798303SAli.Saidi@ARM.com return new VmrsApsrFpscr(machInst); 23807643Sgblack@eecs.umich.edu } else { 23818301SAli.Saidi@ARM.com return new Unknown(machInst); 23827643Sgblack@eecs.umich.edu } 23837643Sgblack@eecs.umich.edu } else if (specReg == MISCREG_FPSCR) { 23847643Sgblack@eecs.umich.edu return new VmrsFpscr(machInst, rt, (IntRegIndex)specReg); 23857392Sgblack@eecs.umich.edu } else { 238610037SARM gem5 Developers uint32_t iss = mcrMrcIssBuild(l, bits(machInst, 3, 0), rt, 238710037SARM gem5 Developers reg, a, bits(machInst, 7, 5)); 238810037SARM gem5 Developers return new Vmrs(machInst, rt, (IntRegIndex)specReg, iss); 23897392Sgblack@eecs.umich.edu } 23907321Sgblack@eecs.umich.edu } 23917321Sgblack@eecs.umich.edu } else { 23927335Sgblack@eecs.umich.edu uint32_t vd = (bits(machInst, 7) << 5) | 23937335Sgblack@eecs.umich.edu (bits(machInst, 19, 16) << 1); 23947639Sgblack@eecs.umich.edu // Handle indexing into each single precision half of the vector. 23957639Sgblack@eecs.umich.edu vd += bits(machInst, 21); 23967639Sgblack@eecs.umich.edu uint32_t index; 23977335Sgblack@eecs.umich.edu const IntRegIndex rt = 23987335Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 15, 12); 23997335Sgblack@eecs.umich.edu const bool u = (bits(machInst, 23) == 1); 24007335Sgblack@eecs.umich.edu if (bits(machInst, 22) == 1) { 24017639Sgblack@eecs.umich.edu index = bits(machInst, 6, 5); 24027335Sgblack@eecs.umich.edu if (u) { 24037335Sgblack@eecs.umich.edu return new VmovRegCoreUB(machInst, rt, 24047335Sgblack@eecs.umich.edu (IntRegIndex)vd, index); 24057335Sgblack@eecs.umich.edu } else { 24067335Sgblack@eecs.umich.edu return new VmovRegCoreSB(machInst, rt, 24077335Sgblack@eecs.umich.edu (IntRegIndex)vd, index); 24087335Sgblack@eecs.umich.edu } 24097639Sgblack@eecs.umich.edu } else if (bits(machInst, 5) == 1) { 24107639Sgblack@eecs.umich.edu index = bits(machInst, 6); 24117335Sgblack@eecs.umich.edu if (u) { 24127335Sgblack@eecs.umich.edu return new VmovRegCoreUH(machInst, rt, 24137335Sgblack@eecs.umich.edu (IntRegIndex)vd, index); 24147335Sgblack@eecs.umich.edu } else { 24157335Sgblack@eecs.umich.edu return new VmovRegCoreSH(machInst, rt, 24167335Sgblack@eecs.umich.edu (IntRegIndex)vd, index); 24177335Sgblack@eecs.umich.edu } 24187639Sgblack@eecs.umich.edu } else if (bits(machInst, 6) == 0 && !u) { 24197335Sgblack@eecs.umich.edu return new VmovRegCoreW(machInst, rt, (IntRegIndex)vd); 24207639Sgblack@eecs.umich.edu } else { 24217639Sgblack@eecs.umich.edu return new Unknown(machInst); 24227335Sgblack@eecs.umich.edu } 24237321Sgblack@eecs.umich.edu } 24247321Sgblack@eecs.umich.edu return new Unknown(machInst); 24257321Sgblack@eecs.umich.edu } 24267321Sgblack@eecs.umich.edu ''' 24277321Sgblack@eecs.umich.edu}}; 24287356Sgblack@eecs.umich.edu 24297356Sgblack@eecs.umich.edudef format ShortFpTransfer() {{ 24307356Sgblack@eecs.umich.edu decode_block = ''' 24317356Sgblack@eecs.umich.edu return decodeShortFpTransfer(machInst); 24327356Sgblack@eecs.umich.edu ''' 24337356Sgblack@eecs.umich.edu}}; 24347363Sgblack@eecs.umich.edu 24357363Sgblack@eecs.umich.edulet {{ 24367363Sgblack@eecs.umich.edu header_output = ''' 24377363Sgblack@eecs.umich.edu StaticInstPtr 24387363Sgblack@eecs.umich.edu decodeVfpData(ExtMachInst machInst); 24397363Sgblack@eecs.umich.edu ''' 24407363Sgblack@eecs.umich.edu decoder_output = ''' 24417363Sgblack@eecs.umich.edu StaticInstPtr 24427363Sgblack@eecs.umich.edu decodeVfpData(ExtMachInst machInst) 24437363Sgblack@eecs.umich.edu { 24447363Sgblack@eecs.umich.edu const uint32_t opc1 = bits(machInst, 23, 20); 24457363Sgblack@eecs.umich.edu const uint32_t opc2 = bits(machInst, 19, 16); 24467363Sgblack@eecs.umich.edu const uint32_t opc3 = bits(machInst, 7, 6); 24477363Sgblack@eecs.umich.edu //const uint32_t opc4 = bits(machInst, 3, 0); 24487372Sgblack@eecs.umich.edu const bool single = (bits(machInst, 8) == 0); 24497389Sgblack@eecs.umich.edu // Used to select between vcmp and vcmpe. 24507389Sgblack@eecs.umich.edu const bool e = (bits(machInst, 7) == 1); 24517372Sgblack@eecs.umich.edu IntRegIndex vd; 24527372Sgblack@eecs.umich.edu IntRegIndex vm; 24537372Sgblack@eecs.umich.edu IntRegIndex vn; 24547372Sgblack@eecs.umich.edu if (single) { 24557372Sgblack@eecs.umich.edu vd = (IntRegIndex)(bits(machInst, 22) | 24567372Sgblack@eecs.umich.edu (bits(machInst, 15, 12) << 1)); 24577372Sgblack@eecs.umich.edu vm = (IntRegIndex)(bits(machInst, 5) | 24587372Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1)); 24597372Sgblack@eecs.umich.edu vn = (IntRegIndex)(bits(machInst, 7) | 24607372Sgblack@eecs.umich.edu (bits(machInst, 19, 16) << 1)); 24617372Sgblack@eecs.umich.edu } else { 24627372Sgblack@eecs.umich.edu vd = (IntRegIndex)((bits(machInst, 22) << 5) | 24637372Sgblack@eecs.umich.edu (bits(machInst, 15, 12) << 1)); 24647372Sgblack@eecs.umich.edu vm = (IntRegIndex)((bits(machInst, 5) << 5) | 24657372Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1)); 24667372Sgblack@eecs.umich.edu vn = (IntRegIndex)((bits(machInst, 7) << 5) | 24677372Sgblack@eecs.umich.edu (bits(machInst, 19, 16) << 1)); 24687372Sgblack@eecs.umich.edu } 24697363Sgblack@eecs.umich.edu switch (opc1 & 0xb /* 1011 */) { 24707363Sgblack@eecs.umich.edu case 0x0: 24717370Sgblack@eecs.umich.edu if (bits(machInst, 6) == 0) { 24727372Sgblack@eecs.umich.edu if (single) { 24737376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VmlaS>( 24747376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 24757370Sgblack@eecs.umich.edu } else { 24767376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VmlaD>( 24777376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 24787370Sgblack@eecs.umich.edu } 24797370Sgblack@eecs.umich.edu } else { 24807372Sgblack@eecs.umich.edu if (single) { 24817376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VmlsS>( 24827376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 24837370Sgblack@eecs.umich.edu } else { 24847376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VmlsD>( 24857376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 24867370Sgblack@eecs.umich.edu } 24877370Sgblack@eecs.umich.edu } 24887371Sgblack@eecs.umich.edu case 0x1: 24897371Sgblack@eecs.umich.edu if (bits(machInst, 6) == 1) { 24907372Sgblack@eecs.umich.edu if (single) { 24917376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VnmlaS>( 24927376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 24937371Sgblack@eecs.umich.edu } else { 24947376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VnmlaD>( 24957376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 24967371Sgblack@eecs.umich.edu } 24977371Sgblack@eecs.umich.edu } else { 24987372Sgblack@eecs.umich.edu if (single) { 24997376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VnmlsS>( 25007376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 25017371Sgblack@eecs.umich.edu } else { 25027376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VnmlsD>( 25037376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 25047371Sgblack@eecs.umich.edu } 25057371Sgblack@eecs.umich.edu } 25067363Sgblack@eecs.umich.edu case 0x2: 25077363Sgblack@eecs.umich.edu if ((opc3 & 0x1) == 0) { 25087372Sgblack@eecs.umich.edu if (single) { 25097376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VmulS>( 25107376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 25117364Sgblack@eecs.umich.edu } else { 25127376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VmulD>( 25137376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 25147364Sgblack@eecs.umich.edu } 25157371Sgblack@eecs.umich.edu } else { 25167372Sgblack@eecs.umich.edu if (single) { 25177376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VnmulS>( 25187376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 25197371Sgblack@eecs.umich.edu } else { 25207376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VnmulD>( 25217376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 25227371Sgblack@eecs.umich.edu } 25237363Sgblack@eecs.umich.edu } 25247363Sgblack@eecs.umich.edu case 0x3: 25257363Sgblack@eecs.umich.edu if ((opc3 & 0x1) == 0) { 25267372Sgblack@eecs.umich.edu if (single) { 25277376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VaddS>( 25287376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 25297367Sgblack@eecs.umich.edu } else { 25307376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VaddD>( 25317376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 25327367Sgblack@eecs.umich.edu } 25337363Sgblack@eecs.umich.edu } else { 25347372Sgblack@eecs.umich.edu if (single) { 25357376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VsubS>( 25367376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 25377368Sgblack@eecs.umich.edu } else { 25387376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VsubD>( 25397376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 25407368Sgblack@eecs.umich.edu } 25417363Sgblack@eecs.umich.edu } 25427363Sgblack@eecs.umich.edu case 0x8: 254314043Sciro.santilli@arm.com if (machInst.condCode == 0xF) { 254414043Sciro.santilli@arm.com const bool op = bits(machInst, 6); 254514043Sciro.santilli@arm.com const uint32_t size = bits(machInst, 9, 8); 254614043Sciro.santilli@arm.com if (op) { 254714043Sciro.santilli@arm.com if (size == 1) { 254814043Sciro.santilli@arm.com return new FailUnimplemented("vminnm.f16", machInst); 254914043Sciro.santilli@arm.com } 255014043Sciro.santilli@arm.com return decodeNeonSizeSingleDouble<VminnmS, VminnmD>( 255114043Sciro.santilli@arm.com size, machInst, vd, vn, vm); 255214043Sciro.santilli@arm.com } else { 255314043Sciro.santilli@arm.com if (size == 1) { 255414043Sciro.santilli@arm.com return new FailUnimplemented("vmaxnm.f16", machInst); 255514043Sciro.santilli@arm.com } 255614043Sciro.santilli@arm.com return decodeNeonSizeSingleDouble<VmaxnmS, VmaxnmD>( 255714043Sciro.santilli@arm.com size, machInst, vd, vn, vm); 255814043Sciro.santilli@arm.com } 255914043Sciro.santilli@arm.com } 25607363Sgblack@eecs.umich.edu if ((opc3 & 0x1) == 0) { 25617372Sgblack@eecs.umich.edu if (single) { 25627376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VdivS>( 25637376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 25647369Sgblack@eecs.umich.edu } else { 25657376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VdivD>( 25667376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 25677369Sgblack@eecs.umich.edu } 25687363Sgblack@eecs.umich.edu } 25697363Sgblack@eecs.umich.edu break; 257010037SARM gem5 Developers case 0x9: 257110037SARM gem5 Developers if ((opc3 & 0x1) == 0) { 257210037SARM gem5 Developers if (single) { 257310037SARM gem5 Developers return decodeVfpRegRegRegOp<VfnmaS>( 257410037SARM gem5 Developers machInst, vd, vn, vm, false); 257510037SARM gem5 Developers } else { 257610037SARM gem5 Developers return decodeVfpRegRegRegOp<VfnmaD>( 257710037SARM gem5 Developers machInst, vd, vn, vm, true); 257810037SARM gem5 Developers } 257910037SARM gem5 Developers } else { 258010037SARM gem5 Developers if (single) { 258110037SARM gem5 Developers return decodeVfpRegRegRegOp<VfnmsS>( 258210037SARM gem5 Developers machInst, vd, vn, vm, false); 258310037SARM gem5 Developers } else { 258410037SARM gem5 Developers return decodeVfpRegRegRegOp<VfnmsD>( 258510037SARM gem5 Developers machInst, vd, vn, vm, true); 258610037SARM gem5 Developers } 258710037SARM gem5 Developers } 258810037SARM gem5 Developers break; 258910037SARM gem5 Developers case 0xa: 259010037SARM gem5 Developers if ((opc3 & 0x1) == 0) { 259110037SARM gem5 Developers if (single) { 259210037SARM gem5 Developers return decodeVfpRegRegRegOp<VfmaS>( 259310037SARM gem5 Developers machInst, vd, vn, vm, false); 259410037SARM gem5 Developers } else { 259510037SARM gem5 Developers return decodeVfpRegRegRegOp<VfmaD>( 259610037SARM gem5 Developers machInst, vd, vn, vm, true); 259710037SARM gem5 Developers } 259810037SARM gem5 Developers } else { 259910037SARM gem5 Developers if (single) { 260010037SARM gem5 Developers return decodeVfpRegRegRegOp<VfmsS>( 260110037SARM gem5 Developers machInst, vd, vn, vm, false); 260210037SARM gem5 Developers } else { 260310037SARM gem5 Developers return decodeVfpRegRegRegOp<VfmsD>( 260410037SARM gem5 Developers machInst, vd, vn, vm, true); 260510037SARM gem5 Developers } 260610037SARM gem5 Developers } 260710037SARM gem5 Developers break; 26087363Sgblack@eecs.umich.edu case 0xb: 26097363Sgblack@eecs.umich.edu if ((opc3 & 0x1) == 0) { 26107363Sgblack@eecs.umich.edu const uint32_t baseImm = 26117363Sgblack@eecs.umich.edu bits(machInst, 3, 0) | (bits(machInst, 19, 16) << 4); 26127372Sgblack@eecs.umich.edu if (single) { 261313120SEdmund.Grimley-Evans@arm.com uint32_t imm = vfp_modified_imm(baseImm, FpDataType::Fp32); 26147376Sgblack@eecs.umich.edu return decodeVfpRegImmOp<VmovImmS>( 26157376Sgblack@eecs.umich.edu machInst, vd, imm, false); 26167363Sgblack@eecs.umich.edu } else { 261713120SEdmund.Grimley-Evans@arm.com uint64_t imm = vfp_modified_imm(baseImm, FpDataType::Fp64); 26187376Sgblack@eecs.umich.edu return decodeVfpRegImmOp<VmovImmD>( 26197376Sgblack@eecs.umich.edu machInst, vd, imm, true); 26207363Sgblack@eecs.umich.edu } 26217363Sgblack@eecs.umich.edu } 26227363Sgblack@eecs.umich.edu switch (opc2) { 26237363Sgblack@eecs.umich.edu case 0x0: 26247363Sgblack@eecs.umich.edu if (opc3 == 1) { 26257372Sgblack@eecs.umich.edu if (single) { 26267376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VmovRegS>( 26277376Sgblack@eecs.umich.edu machInst, vd, vm, false); 26287363Sgblack@eecs.umich.edu } else { 26297376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VmovRegD>( 26307376Sgblack@eecs.umich.edu machInst, vd, vm, true); 26317363Sgblack@eecs.umich.edu } 26327363Sgblack@eecs.umich.edu } else { 26337372Sgblack@eecs.umich.edu if (single) { 26347376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VabsS>( 26357376Sgblack@eecs.umich.edu machInst, vd, vm, false); 26367366Sgblack@eecs.umich.edu } else { 26377376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VabsD>( 26387376Sgblack@eecs.umich.edu machInst, vd, vm, true); 26397366Sgblack@eecs.umich.edu } 26407363Sgblack@eecs.umich.edu } 26417363Sgblack@eecs.umich.edu case 0x1: 26427363Sgblack@eecs.umich.edu if (opc3 == 1) { 26437372Sgblack@eecs.umich.edu if (single) { 26447376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VnegS>( 26457376Sgblack@eecs.umich.edu machInst, vd, vm, false); 26467365Sgblack@eecs.umich.edu } else { 26477376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VnegD>( 26487376Sgblack@eecs.umich.edu machInst, vd, vm, true); 26497365Sgblack@eecs.umich.edu } 26507363Sgblack@eecs.umich.edu } else { 26517372Sgblack@eecs.umich.edu if (single) { 26527376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VsqrtS>( 26537376Sgblack@eecs.umich.edu machInst, vd, vm, false); 26547369Sgblack@eecs.umich.edu } else { 26557376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VsqrtD>( 26567376Sgblack@eecs.umich.edu machInst, vd, vm, true); 26577369Sgblack@eecs.umich.edu } 26587363Sgblack@eecs.umich.edu } 26597363Sgblack@eecs.umich.edu case 0x2: 26607363Sgblack@eecs.umich.edu case 0x3: 26617398Sgblack@eecs.umich.edu { 26627398Sgblack@eecs.umich.edu const bool toHalf = bits(machInst, 16); 26637398Sgblack@eecs.umich.edu const bool top = bits(machInst, 7); 26647398Sgblack@eecs.umich.edu if (top) { 26657398Sgblack@eecs.umich.edu if (toHalf) { 26667398Sgblack@eecs.umich.edu return new VcvtFpSFpHT(machInst, vd, vm); 26677398Sgblack@eecs.umich.edu } else { 26687398Sgblack@eecs.umich.edu return new VcvtFpHTFpS(machInst, vd, vm); 26697398Sgblack@eecs.umich.edu } 26707398Sgblack@eecs.umich.edu } else { 26717398Sgblack@eecs.umich.edu if (toHalf) { 26727398Sgblack@eecs.umich.edu return new VcvtFpSFpHB(machInst, vd, vm); 26737398Sgblack@eecs.umich.edu } else { 26747398Sgblack@eecs.umich.edu return new VcvtFpHBFpS(machInst, vd, vm); 26757398Sgblack@eecs.umich.edu } 26767398Sgblack@eecs.umich.edu } 26777398Sgblack@eecs.umich.edu } 26787363Sgblack@eecs.umich.edu case 0x4: 26797377Sgblack@eecs.umich.edu if (single) { 26807389Sgblack@eecs.umich.edu if (e) { 26817389Sgblack@eecs.umich.edu return new VcmpeS(machInst, vd, vm); 26827389Sgblack@eecs.umich.edu } else { 26837389Sgblack@eecs.umich.edu return new VcmpS(machInst, vd, vm); 26847389Sgblack@eecs.umich.edu } 26857377Sgblack@eecs.umich.edu } else { 26867389Sgblack@eecs.umich.edu if (e) { 26877389Sgblack@eecs.umich.edu return new VcmpeD(machInst, vd, vm); 26887389Sgblack@eecs.umich.edu } else { 26897389Sgblack@eecs.umich.edu return new VcmpD(machInst, vd, vm); 26907389Sgblack@eecs.umich.edu } 26917377Sgblack@eecs.umich.edu } 26927363Sgblack@eecs.umich.edu case 0x5: 26937377Sgblack@eecs.umich.edu if (single) { 26947389Sgblack@eecs.umich.edu if (e) { 26957389Sgblack@eecs.umich.edu return new VcmpeZeroS(machInst, vd, 0); 26967389Sgblack@eecs.umich.edu } else { 26977389Sgblack@eecs.umich.edu return new VcmpZeroS(machInst, vd, 0); 26987389Sgblack@eecs.umich.edu } 26997377Sgblack@eecs.umich.edu } else { 27007389Sgblack@eecs.umich.edu if (e) { 27017389Sgblack@eecs.umich.edu return new VcmpeZeroD(machInst, vd, 0); 27027389Sgblack@eecs.umich.edu } else { 27037389Sgblack@eecs.umich.edu return new VcmpZeroD(machInst, vd, 0); 27047389Sgblack@eecs.umich.edu } 27057377Sgblack@eecs.umich.edu } 27067363Sgblack@eecs.umich.edu case 0x7: 27077363Sgblack@eecs.umich.edu if (opc3 == 0x3) { 27087374Sgblack@eecs.umich.edu if (single) { 27098270SAli.Saidi@ARM.com vd = (IntRegIndex)((bits(machInst, 22) << 5) | 27108270SAli.Saidi@ARM.com (bits(machInst, 15, 12) << 1)); 27117374Sgblack@eecs.umich.edu return new VcvtFpSFpD(machInst, vd, vm); 27127374Sgblack@eecs.umich.edu } else { 27137374Sgblack@eecs.umich.edu vd = (IntRegIndex)(bits(machInst, 22) | 27147374Sgblack@eecs.umich.edu (bits(machInst, 15, 12) << 1)); 27157374Sgblack@eecs.umich.edu return new VcvtFpDFpS(machInst, vd, vm); 27167374Sgblack@eecs.umich.edu } 27177363Sgblack@eecs.umich.edu } 27187363Sgblack@eecs.umich.edu break; 27197363Sgblack@eecs.umich.edu case 0x8: 27207373Sgblack@eecs.umich.edu if (bits(machInst, 7) == 0) { 27217373Sgblack@eecs.umich.edu if (single) { 27227373Sgblack@eecs.umich.edu return new VcvtUIntFpS(machInst, vd, vm); 27237373Sgblack@eecs.umich.edu } else { 27247373Sgblack@eecs.umich.edu vm = (IntRegIndex)(bits(machInst, 5) | 27257373Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1)); 27267373Sgblack@eecs.umich.edu return new VcvtUIntFpD(machInst, vd, vm); 27277373Sgblack@eecs.umich.edu } 27287373Sgblack@eecs.umich.edu } else { 27297373Sgblack@eecs.umich.edu if (single) { 27307373Sgblack@eecs.umich.edu return new VcvtSIntFpS(machInst, vd, vm); 27317373Sgblack@eecs.umich.edu } else { 27327373Sgblack@eecs.umich.edu vm = (IntRegIndex)(bits(machInst, 5) | 27337373Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1)); 27347373Sgblack@eecs.umich.edu return new VcvtSIntFpD(machInst, vd, vm); 27357373Sgblack@eecs.umich.edu } 27367373Sgblack@eecs.umich.edu } 27377363Sgblack@eecs.umich.edu case 0xa: 27387379Sgblack@eecs.umich.edu { 27397379Sgblack@eecs.umich.edu const bool half = (bits(machInst, 7) == 0); 27407379Sgblack@eecs.umich.edu const uint32_t imm = bits(machInst, 5) | 27417379Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1); 27427379Sgblack@eecs.umich.edu const uint32_t size = 27437379Sgblack@eecs.umich.edu (bits(machInst, 7) == 0 ? 16 : 32) - imm; 27447379Sgblack@eecs.umich.edu if (single) { 27457379Sgblack@eecs.umich.edu if (half) { 27467379Sgblack@eecs.umich.edu return new VcvtSHFixedFpS(machInst, vd, vd, size); 27477379Sgblack@eecs.umich.edu } else { 27487379Sgblack@eecs.umich.edu return new VcvtSFixedFpS(machInst, vd, vd, size); 27497379Sgblack@eecs.umich.edu } 27507379Sgblack@eecs.umich.edu } else { 27517379Sgblack@eecs.umich.edu if (half) { 27527379Sgblack@eecs.umich.edu return new VcvtSHFixedFpD(machInst, vd, vd, size); 27537379Sgblack@eecs.umich.edu } else { 27547379Sgblack@eecs.umich.edu return new VcvtSFixedFpD(machInst, vd, vd, size); 27557379Sgblack@eecs.umich.edu } 27567379Sgblack@eecs.umich.edu } 27577379Sgblack@eecs.umich.edu } 27587363Sgblack@eecs.umich.edu case 0xb: 27597379Sgblack@eecs.umich.edu { 27607379Sgblack@eecs.umich.edu const bool half = (bits(machInst, 7) == 0); 27617379Sgblack@eecs.umich.edu const uint32_t imm = bits(machInst, 5) | 27627379Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1); 27637379Sgblack@eecs.umich.edu const uint32_t size = 27647379Sgblack@eecs.umich.edu (bits(machInst, 7) == 0 ? 16 : 32) - imm; 27657379Sgblack@eecs.umich.edu if (single) { 27667379Sgblack@eecs.umich.edu if (half) { 27677379Sgblack@eecs.umich.edu return new VcvtUHFixedFpS(machInst, vd, vd, size); 27687379Sgblack@eecs.umich.edu } else { 27697379Sgblack@eecs.umich.edu return new VcvtUFixedFpS(machInst, vd, vd, size); 27707379Sgblack@eecs.umich.edu } 27717379Sgblack@eecs.umich.edu } else { 27727379Sgblack@eecs.umich.edu if (half) { 27737379Sgblack@eecs.umich.edu return new VcvtUHFixedFpD(machInst, vd, vd, size); 27747379Sgblack@eecs.umich.edu } else { 27757379Sgblack@eecs.umich.edu return new VcvtUFixedFpD(machInst, vd, vd, size); 27767379Sgblack@eecs.umich.edu } 27777379Sgblack@eecs.umich.edu } 27787379Sgblack@eecs.umich.edu } 27797363Sgblack@eecs.umich.edu case 0xc: 27807380Sgblack@eecs.umich.edu if (bits(machInst, 7) == 0) { 27817380Sgblack@eecs.umich.edu if (single) { 27827380Sgblack@eecs.umich.edu return new VcvtFpUIntSR(machInst, vd, vm); 27837380Sgblack@eecs.umich.edu } else { 27847380Sgblack@eecs.umich.edu vd = (IntRegIndex)(bits(machInst, 22) | 27857380Sgblack@eecs.umich.edu (bits(machInst, 15, 12) << 1)); 27867380Sgblack@eecs.umich.edu return new VcvtFpUIntDR(machInst, vd, vm); 27877380Sgblack@eecs.umich.edu } 27887373Sgblack@eecs.umich.edu } else { 27897380Sgblack@eecs.umich.edu if (single) { 27907380Sgblack@eecs.umich.edu return new VcvtFpUIntS(machInst, vd, vm); 27917380Sgblack@eecs.umich.edu } else { 27927380Sgblack@eecs.umich.edu vd = (IntRegIndex)(bits(machInst, 22) | 27937380Sgblack@eecs.umich.edu (bits(machInst, 15, 12) << 1)); 27947380Sgblack@eecs.umich.edu return new VcvtFpUIntD(machInst, vd, vm); 27957380Sgblack@eecs.umich.edu } 27967373Sgblack@eecs.umich.edu } 27977363Sgblack@eecs.umich.edu case 0xd: 27987380Sgblack@eecs.umich.edu if (bits(machInst, 7) == 0) { 27997380Sgblack@eecs.umich.edu if (single) { 28007380Sgblack@eecs.umich.edu return new VcvtFpSIntSR(machInst, vd, vm); 28017380Sgblack@eecs.umich.edu } else { 28027380Sgblack@eecs.umich.edu vd = (IntRegIndex)(bits(machInst, 22) | 28037380Sgblack@eecs.umich.edu (bits(machInst, 15, 12) << 1)); 28047380Sgblack@eecs.umich.edu return new VcvtFpSIntDR(machInst, vd, vm); 28057380Sgblack@eecs.umich.edu } 28067373Sgblack@eecs.umich.edu } else { 28077380Sgblack@eecs.umich.edu if (single) { 28087380Sgblack@eecs.umich.edu return new VcvtFpSIntS(machInst, vd, vm); 28097380Sgblack@eecs.umich.edu } else { 28107380Sgblack@eecs.umich.edu vd = (IntRegIndex)(bits(machInst, 22) | 28117380Sgblack@eecs.umich.edu (bits(machInst, 15, 12) << 1)); 28127380Sgblack@eecs.umich.edu return new VcvtFpSIntD(machInst, vd, vm); 28137380Sgblack@eecs.umich.edu } 28147373Sgblack@eecs.umich.edu } 28157363Sgblack@eecs.umich.edu case 0xe: 28167379Sgblack@eecs.umich.edu { 28177379Sgblack@eecs.umich.edu const bool half = (bits(machInst, 7) == 0); 28187379Sgblack@eecs.umich.edu const uint32_t imm = bits(machInst, 5) | 28197379Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1); 28207379Sgblack@eecs.umich.edu const uint32_t size = 28217379Sgblack@eecs.umich.edu (bits(machInst, 7) == 0 ? 16 : 32) - imm; 28227379Sgblack@eecs.umich.edu if (single) { 28237379Sgblack@eecs.umich.edu if (half) { 28247379Sgblack@eecs.umich.edu return new VcvtFpSHFixedS(machInst, vd, vd, size); 28257379Sgblack@eecs.umich.edu } else { 28267379Sgblack@eecs.umich.edu return new VcvtFpSFixedS(machInst, vd, vd, size); 28277379Sgblack@eecs.umich.edu } 28287379Sgblack@eecs.umich.edu } else { 28297379Sgblack@eecs.umich.edu if (half) { 28307379Sgblack@eecs.umich.edu return new VcvtFpSHFixedD(machInst, vd, vd, size); 28317379Sgblack@eecs.umich.edu } else { 28327379Sgblack@eecs.umich.edu return new VcvtFpSFixedD(machInst, vd, vd, size); 28337379Sgblack@eecs.umich.edu } 28347379Sgblack@eecs.umich.edu } 28357379Sgblack@eecs.umich.edu } 28367363Sgblack@eecs.umich.edu case 0xf: 28377379Sgblack@eecs.umich.edu { 28387379Sgblack@eecs.umich.edu const bool half = (bits(machInst, 7) == 0); 28397379Sgblack@eecs.umich.edu const uint32_t imm = bits(machInst, 5) | 28407379Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1); 28417379Sgblack@eecs.umich.edu const uint32_t size = 28427379Sgblack@eecs.umich.edu (bits(machInst, 7) == 0 ? 16 : 32) - imm; 28437379Sgblack@eecs.umich.edu if (single) { 28447379Sgblack@eecs.umich.edu if (half) { 28457379Sgblack@eecs.umich.edu return new VcvtFpUHFixedS(machInst, vd, vd, size); 28467379Sgblack@eecs.umich.edu } else { 28477379Sgblack@eecs.umich.edu return new VcvtFpUFixedS(machInst, vd, vd, size); 28487379Sgblack@eecs.umich.edu } 28497379Sgblack@eecs.umich.edu } else { 28507379Sgblack@eecs.umich.edu if (half) { 28517379Sgblack@eecs.umich.edu return new VcvtFpUHFixedD(machInst, vd, vd, size); 28527379Sgblack@eecs.umich.edu } else { 28537379Sgblack@eecs.umich.edu return new VcvtFpUFixedD(machInst, vd, vd, size); 28547379Sgblack@eecs.umich.edu } 28557379Sgblack@eecs.umich.edu } 28567379Sgblack@eecs.umich.edu } 28577363Sgblack@eecs.umich.edu } 28587363Sgblack@eecs.umich.edu break; 28597363Sgblack@eecs.umich.edu } 28607363Sgblack@eecs.umich.edu return new Unknown(machInst); 28617363Sgblack@eecs.umich.edu } 28627363Sgblack@eecs.umich.edu ''' 28637363Sgblack@eecs.umich.edu}}; 28647363Sgblack@eecs.umich.edu 28657363Sgblack@eecs.umich.edudef format VfpData() {{ 28667363Sgblack@eecs.umich.edu decode_block = ''' 28677363Sgblack@eecs.umich.edu return decodeVfpData(machInst); 28687363Sgblack@eecs.umich.edu ''' 28697363Sgblack@eecs.umich.edu}}; 2870