fp.isa revision 13977
16019Shines@cs.fsu.edu// -*- mode:c++ -*- 26019Shines@cs.fsu.edu 313738Sciro.santilli@arm.com// Copyright (c) 2010-2011, 2016-2019 ARM Limited 47178Sgblack@eecs.umich.edu// All rights reserved 57178Sgblack@eecs.umich.edu// 67178Sgblack@eecs.umich.edu// The license below extends only to copyright in the software and shall 77178Sgblack@eecs.umich.edu// not be construed as granting a license to any other intellectual 87178Sgblack@eecs.umich.edu// property including but not limited to intellectual property relating 97178Sgblack@eecs.umich.edu// to a hardware implementation of the functionality of the software 107178Sgblack@eecs.umich.edu// licensed hereunder. You may use the software subject to the license 117178Sgblack@eecs.umich.edu// terms below provided that you ensure that this notice is replicated 127178Sgblack@eecs.umich.edu// unmodified and in its entirety in all distributions of the software, 137178Sgblack@eecs.umich.edu// modified or unmodified, in source code or in binary form. 147178Sgblack@eecs.umich.edu// 156019Shines@cs.fsu.edu// Copyright (c) 2007-2008 The Florida State University 166019Shines@cs.fsu.edu// All rights reserved. 176019Shines@cs.fsu.edu// 186019Shines@cs.fsu.edu// Redistribution and use in source and binary forms, with or without 196019Shines@cs.fsu.edu// modification, are permitted provided that the following conditions are 206019Shines@cs.fsu.edu// met: redistributions of source code must retain the above copyright 216019Shines@cs.fsu.edu// notice, this list of conditions and the following disclaimer; 226019Shines@cs.fsu.edu// redistributions in binary form must reproduce the above copyright 236019Shines@cs.fsu.edu// notice, this list of conditions and the following disclaimer in the 246019Shines@cs.fsu.edu// documentation and/or other materials provided with the distribution; 256019Shines@cs.fsu.edu// neither the name of the copyright holders nor the names of its 266019Shines@cs.fsu.edu// contributors may be used to endorse or promote products derived from 276019Shines@cs.fsu.edu// this software without specific prior written permission. 286019Shines@cs.fsu.edu// 296019Shines@cs.fsu.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 306019Shines@cs.fsu.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 316019Shines@cs.fsu.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 326019Shines@cs.fsu.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 336019Shines@cs.fsu.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 346019Shines@cs.fsu.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 356019Shines@cs.fsu.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 366019Shines@cs.fsu.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 376019Shines@cs.fsu.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 386019Shines@cs.fsu.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 396019Shines@cs.fsu.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 406019Shines@cs.fsu.edu// 416019Shines@cs.fsu.edu// Authors: Stephen Hines 426019Shines@cs.fsu.edu 436019Shines@cs.fsu.edu//////////////////////////////////////////////////////////////////// 446019Shines@cs.fsu.edu// 456019Shines@cs.fsu.edu// Floating Point operate instructions 466019Shines@cs.fsu.edu// 476019Shines@cs.fsu.edu 487639Sgblack@eecs.umich.eduoutput header {{ 497639Sgblack@eecs.umich.edu 507639Sgblack@eecs.umich.edu template<template <typename T> class Base> 517639Sgblack@eecs.umich.edu StaticInstPtr 527639Sgblack@eecs.umich.edu newNeonMemInst(const unsigned size, 537639Sgblack@eecs.umich.edu const ExtMachInst &machInst, 547639Sgblack@eecs.umich.edu const RegIndex dest, const RegIndex ra, 557639Sgblack@eecs.umich.edu const uint32_t imm, const unsigned extraMemFlags) 567639Sgblack@eecs.umich.edu { 577639Sgblack@eecs.umich.edu switch (size) { 587639Sgblack@eecs.umich.edu case 0: 597639Sgblack@eecs.umich.edu return new Base<uint8_t>(machInst, dest, ra, imm, extraMemFlags); 607639Sgblack@eecs.umich.edu case 1: 617639Sgblack@eecs.umich.edu return new Base<uint16_t>(machInst, dest, ra, imm, extraMemFlags); 627639Sgblack@eecs.umich.edu case 2: 637639Sgblack@eecs.umich.edu return new Base<uint32_t>(machInst, dest, ra, imm, extraMemFlags); 647639Sgblack@eecs.umich.edu case 3: 657639Sgblack@eecs.umich.edu return new Base<uint64_t>(machInst, dest, ra, imm, extraMemFlags); 667639Sgblack@eecs.umich.edu default: 677639Sgblack@eecs.umich.edu panic("Unrecognized width %d for Neon mem inst.\n", (1 << size)); 687639Sgblack@eecs.umich.edu } 697639Sgblack@eecs.umich.edu } 707639Sgblack@eecs.umich.edu 717639Sgblack@eecs.umich.edu template<template <typename T> class Base> 727639Sgblack@eecs.umich.edu StaticInstPtr 737639Sgblack@eecs.umich.edu newNeonMixInst(const unsigned size, 747639Sgblack@eecs.umich.edu const ExtMachInst &machInst, 757639Sgblack@eecs.umich.edu const RegIndex dest, const RegIndex op1, 767639Sgblack@eecs.umich.edu const uint32_t step) 777639Sgblack@eecs.umich.edu { 787639Sgblack@eecs.umich.edu switch (size) { 797639Sgblack@eecs.umich.edu case 0: 807639Sgblack@eecs.umich.edu return new Base<uint8_t>(machInst, dest, op1, step); 817639Sgblack@eecs.umich.edu case 1: 827639Sgblack@eecs.umich.edu return new Base<uint16_t>(machInst, dest, op1, step); 837639Sgblack@eecs.umich.edu case 2: 847639Sgblack@eecs.umich.edu return new Base<uint32_t>(machInst, dest, op1, step); 857639Sgblack@eecs.umich.edu case 3: 867639Sgblack@eecs.umich.edu return new Base<uint64_t>(machInst, dest, op1, step); 877639Sgblack@eecs.umich.edu default: 887639Sgblack@eecs.umich.edu panic("Unrecognized width %d for Neon mem inst.\n", (1 << size)); 897639Sgblack@eecs.umich.edu } 907639Sgblack@eecs.umich.edu } 917639Sgblack@eecs.umich.edu 927639Sgblack@eecs.umich.edu}}; 937639Sgblack@eecs.umich.edu 947356Sgblack@eecs.umich.edulet {{ 957356Sgblack@eecs.umich.edu header_output = ''' 967356Sgblack@eecs.umich.edu StaticInstPtr 977435Sgblack@eecs.umich.edu decodeNeonMem(ExtMachInst machInst); 987435Sgblack@eecs.umich.edu 997435Sgblack@eecs.umich.edu StaticInstPtr 1007435Sgblack@eecs.umich.edu decodeNeonData(ExtMachInst machInst); 1017435Sgblack@eecs.umich.edu ''' 1027435Sgblack@eecs.umich.edu 1037435Sgblack@eecs.umich.edu decoder_output = ''' 1047435Sgblack@eecs.umich.edu StaticInstPtr 1057435Sgblack@eecs.umich.edu decodeNeonMem(ExtMachInst machInst) 1067435Sgblack@eecs.umich.edu { 1077435Sgblack@eecs.umich.edu const uint32_t b = bits(machInst, 11, 8); 1087639Sgblack@eecs.umich.edu const bool single = bits(machInst, 23); 1097639Sgblack@eecs.umich.edu const bool singleAll = single && (bits(b, 3, 2) == 3); 1107639Sgblack@eecs.umich.edu const bool load = bits(machInst, 21); 1117435Sgblack@eecs.umich.edu 1127639Sgblack@eecs.umich.edu unsigned width = 0; 1137639Sgblack@eecs.umich.edu 1147639Sgblack@eecs.umich.edu if (single) { 1157639Sgblack@eecs.umich.edu width = bits(b, 1, 0) + 1; 1167639Sgblack@eecs.umich.edu } else { 1177639Sgblack@eecs.umich.edu switch (bits(b, 3, 1)) { 1187639Sgblack@eecs.umich.edu case 0x0: width = 4; 1197639Sgblack@eecs.umich.edu break; 1207639Sgblack@eecs.umich.edu case 0x1: width = (b & 0x1) ? 2 : 1; 1217639Sgblack@eecs.umich.edu break; 1227639Sgblack@eecs.umich.edu case 0x2: width = 3; 1237639Sgblack@eecs.umich.edu break; 1247639Sgblack@eecs.umich.edu case 0x3: width = 1; 1257639Sgblack@eecs.umich.edu break; 1267639Sgblack@eecs.umich.edu case 0x4: width = 2; 1277639Sgblack@eecs.umich.edu break; 1287639Sgblack@eecs.umich.edu case 0x5: 1297639Sgblack@eecs.umich.edu if ((b & 0x1) == 0) { 1307639Sgblack@eecs.umich.edu width = 1; 1317639Sgblack@eecs.umich.edu break; 1327639Sgblack@eecs.umich.edu } 13312595Ssiddhesh.poyarekar@gmail.com M5_FALLTHROUGH; 1347639Sgblack@eecs.umich.edu default: 1357639Sgblack@eecs.umich.edu return new Unknown(machInst); 1367639Sgblack@eecs.umich.edu } 1377639Sgblack@eecs.umich.edu } 1387639Sgblack@eecs.umich.edu assert(width > 0 && width <= 4); 1397639Sgblack@eecs.umich.edu 1407639Sgblack@eecs.umich.edu const RegIndex rm = (RegIndex)(uint32_t)bits(machInst, 3, 0); 1417639Sgblack@eecs.umich.edu const RegIndex rn = (RegIndex)(uint32_t)bits(machInst, 19, 16); 1427639Sgblack@eecs.umich.edu const RegIndex vd = (RegIndex)(uint32_t)(bits(machInst, 15, 12) | 1437639Sgblack@eecs.umich.edu bits(machInst, 22) << 4); 1447639Sgblack@eecs.umich.edu const uint32_t type = bits(machInst, 11, 8); 1457639Sgblack@eecs.umich.edu uint32_t size = 0; 1468144SAli.Saidi@ARM.com uint32_t align = TLB::MustBeOne; 1477639Sgblack@eecs.umich.edu unsigned inc = 1; 1487639Sgblack@eecs.umich.edu unsigned regs = 1; 1497639Sgblack@eecs.umich.edu unsigned lane = 0; 1507639Sgblack@eecs.umich.edu if (single) { 1517639Sgblack@eecs.umich.edu if (singleAll) { 1527639Sgblack@eecs.umich.edu size = bits(machInst, 7, 6); 1537639Sgblack@eecs.umich.edu bool t = bits(machInst, 5); 15410037SARM gem5 Developers align = size | TLB::AllowUnaligned; 1557639Sgblack@eecs.umich.edu if (width == 1) { 1567639Sgblack@eecs.umich.edu regs = t ? 2 : 1; 1577639Sgblack@eecs.umich.edu inc = 1; 1587639Sgblack@eecs.umich.edu } else { 1597639Sgblack@eecs.umich.edu regs = width; 1607639Sgblack@eecs.umich.edu inc = t ? 2 : 1; 1617639Sgblack@eecs.umich.edu } 1627639Sgblack@eecs.umich.edu switch (width) { 1637639Sgblack@eecs.umich.edu case 1: 1647639Sgblack@eecs.umich.edu case 2: 1657639Sgblack@eecs.umich.edu if (bits(machInst, 4)) 16610037SARM gem5 Developers align = size + width - 1; 1677639Sgblack@eecs.umich.edu break; 1687639Sgblack@eecs.umich.edu case 3: 1697639Sgblack@eecs.umich.edu break; 1707639Sgblack@eecs.umich.edu case 4: 1717639Sgblack@eecs.umich.edu if (size == 3) { 1727639Sgblack@eecs.umich.edu if (bits(machInst, 4) == 0) 1737639Sgblack@eecs.umich.edu return new Unknown(machInst); 1747639Sgblack@eecs.umich.edu size = 2; 17510037SARM gem5 Developers align = 0x4; 1767639Sgblack@eecs.umich.edu } else if (size == 2) { 1777639Sgblack@eecs.umich.edu if (bits(machInst, 4)) 17810037SARM gem5 Developers align = 0x3; 1797639Sgblack@eecs.umich.edu } else { 1807639Sgblack@eecs.umich.edu if (bits(machInst, 4)) 18110037SARM gem5 Developers align = size + 2; 1827591SAli.Saidi@ARM.com } 1837639Sgblack@eecs.umich.edu break; 1847435Sgblack@eecs.umich.edu } 1857435Sgblack@eecs.umich.edu } else { 1867639Sgblack@eecs.umich.edu size = bits(machInst, 11, 10); 18710037SARM gem5 Developers align = size | TLB::AllowUnaligned; 1887639Sgblack@eecs.umich.edu regs = width; 1897639Sgblack@eecs.umich.edu unsigned indexAlign = bits(machInst, 7, 4); 1907639Sgblack@eecs.umich.edu // If width is 1, inc is always 1. That's overridden later. 1917639Sgblack@eecs.umich.edu switch (size) { 1927639Sgblack@eecs.umich.edu case 0: 1937639Sgblack@eecs.umich.edu inc = 1; 1947639Sgblack@eecs.umich.edu lane = bits(indexAlign, 3, 1); 1957639Sgblack@eecs.umich.edu break; 1967639Sgblack@eecs.umich.edu case 1: 1977639Sgblack@eecs.umich.edu inc = bits(indexAlign, 1) ? 2 : 1; 1987639Sgblack@eecs.umich.edu lane = bits(indexAlign, 3, 2); 1997639Sgblack@eecs.umich.edu break; 2007639Sgblack@eecs.umich.edu case 2: 2017639Sgblack@eecs.umich.edu inc = bits(indexAlign, 2) ? 2 : 1; 2027639Sgblack@eecs.umich.edu lane = bits(indexAlign, 3); 2037639Sgblack@eecs.umich.edu break; 2047639Sgblack@eecs.umich.edu } 2057639Sgblack@eecs.umich.edu // Override inc for width of 1. 2067639Sgblack@eecs.umich.edu if (width == 1) { 2077639Sgblack@eecs.umich.edu inc = 1; 2087639Sgblack@eecs.umich.edu } 2097639Sgblack@eecs.umich.edu switch (width) { 2107639Sgblack@eecs.umich.edu case 1: 2117639Sgblack@eecs.umich.edu switch (size) { 2127639Sgblack@eecs.umich.edu case 0: 2137639Sgblack@eecs.umich.edu break; 2147639Sgblack@eecs.umich.edu case 1: 2157639Sgblack@eecs.umich.edu if (bits(indexAlign, 0)) 2167639Sgblack@eecs.umich.edu align = 1; 2177639Sgblack@eecs.umich.edu break; 2187639Sgblack@eecs.umich.edu case 2: 2197639Sgblack@eecs.umich.edu if (bits(indexAlign, 1, 0)) 22010037SARM gem5 Developers align = 2; 2217591SAli.Saidi@ARM.com break; 2227591SAli.Saidi@ARM.com } 2237639Sgblack@eecs.umich.edu break; 2247639Sgblack@eecs.umich.edu case 2: 2257639Sgblack@eecs.umich.edu if (bits(indexAlign, 0)) 22610037SARM gem5 Developers align = size + 1; 2277639Sgblack@eecs.umich.edu break; 2287639Sgblack@eecs.umich.edu case 3: 2297639Sgblack@eecs.umich.edu break; 2307639Sgblack@eecs.umich.edu case 4: 2317639Sgblack@eecs.umich.edu switch (size) { 2327639Sgblack@eecs.umich.edu case 0: 2337639Sgblack@eecs.umich.edu case 1: 2347639Sgblack@eecs.umich.edu if (bits(indexAlign, 0)) 23510037SARM gem5 Developers align = size + 2; 2367639Sgblack@eecs.umich.edu break; 2377639Sgblack@eecs.umich.edu case 2: 2387639Sgblack@eecs.umich.edu if (bits(indexAlign, 0)) 23910037SARM gem5 Developers align = bits(indexAlign, 1, 0) + 2; 2407639Sgblack@eecs.umich.edu break; 2417639Sgblack@eecs.umich.edu } 2427639Sgblack@eecs.umich.edu break; 2437435Sgblack@eecs.umich.edu } 2447435Sgblack@eecs.umich.edu } 2457639Sgblack@eecs.umich.edu if (size == 0x3) { 2467639Sgblack@eecs.umich.edu return new Unknown(machInst); 2477639Sgblack@eecs.umich.edu } 2487639Sgblack@eecs.umich.edu } else { 2497639Sgblack@eecs.umich.edu size = bits(machInst, 7, 6); 2507639Sgblack@eecs.umich.edu align = bits(machInst, 5, 4); 2517639Sgblack@eecs.umich.edu if (align == 0) { 2527639Sgblack@eecs.umich.edu // @align wasn't specified, so alignment can be turned off. 25310037SARM gem5 Developers align = size | TLB::AllowUnaligned; 2547639Sgblack@eecs.umich.edu } else { 25510037SARM gem5 Developers align = align + 2; 2567639Sgblack@eecs.umich.edu } 2577639Sgblack@eecs.umich.edu switch (width) { 2587639Sgblack@eecs.umich.edu case 1: 2597639Sgblack@eecs.umich.edu switch (type) { 2607639Sgblack@eecs.umich.edu case 0x7: regs = 1; 2617639Sgblack@eecs.umich.edu break; 2627639Sgblack@eecs.umich.edu case 0xa: regs = 2; 2637639Sgblack@eecs.umich.edu break; 2647639Sgblack@eecs.umich.edu case 0x6: regs = 3; 2657639Sgblack@eecs.umich.edu break; 2667639Sgblack@eecs.umich.edu case 0x2: regs = 4; 2677639Sgblack@eecs.umich.edu break; 2687639Sgblack@eecs.umich.edu default: 2697639Sgblack@eecs.umich.edu return new Unknown(machInst); 2707639Sgblack@eecs.umich.edu } 2717639Sgblack@eecs.umich.edu break; 2727639Sgblack@eecs.umich.edu case 2: 2737639Sgblack@eecs.umich.edu // Regs doesn't behave exactly as it does in the manual 2747639Sgblack@eecs.umich.edu // because they loop over regs registers twice and we break 2757639Sgblack@eecs.umich.edu // it down in the macroop. 2767639Sgblack@eecs.umich.edu switch (type) { 2777639Sgblack@eecs.umich.edu case 0x8: regs = 2; inc = 1; 2787639Sgblack@eecs.umich.edu break; 2797639Sgblack@eecs.umich.edu case 0x9: regs = 2; inc = 2; 2807639Sgblack@eecs.umich.edu break; 2817639Sgblack@eecs.umich.edu case 0x3: regs = 4; inc = 2; 2827639Sgblack@eecs.umich.edu break; 2837639Sgblack@eecs.umich.edu default: 2847639Sgblack@eecs.umich.edu return new Unknown(machInst); 2857639Sgblack@eecs.umich.edu } 2867639Sgblack@eecs.umich.edu break; 2877639Sgblack@eecs.umich.edu case 3: 2887639Sgblack@eecs.umich.edu regs = 3; 2897639Sgblack@eecs.umich.edu switch (type) { 2907639Sgblack@eecs.umich.edu case 0x4: inc = 1; 2917639Sgblack@eecs.umich.edu break; 2927639Sgblack@eecs.umich.edu case 0x5: inc = 2;; 2937639Sgblack@eecs.umich.edu break; 2947639Sgblack@eecs.umich.edu default: 2957639Sgblack@eecs.umich.edu return new Unknown(machInst); 2967639Sgblack@eecs.umich.edu } 2977639Sgblack@eecs.umich.edu break; 2987639Sgblack@eecs.umich.edu case 4: 2997639Sgblack@eecs.umich.edu regs = 4; 3007639Sgblack@eecs.umich.edu switch (type) { 3017639Sgblack@eecs.umich.edu case 0: inc = 1; 3027639Sgblack@eecs.umich.edu break; 3037639Sgblack@eecs.umich.edu case 1: inc = 2; 3047639Sgblack@eecs.umich.edu break; 3057639Sgblack@eecs.umich.edu default: 3067639Sgblack@eecs.umich.edu return new Unknown(machInst); 3077639Sgblack@eecs.umich.edu } 3087639Sgblack@eecs.umich.edu break; 3097639Sgblack@eecs.umich.edu } 3107639Sgblack@eecs.umich.edu } 3117639Sgblack@eecs.umich.edu 3127639Sgblack@eecs.umich.edu if (load) { 3137639Sgblack@eecs.umich.edu // Load instructions. 3147639Sgblack@eecs.umich.edu if (single) { 3157639Sgblack@eecs.umich.edu return new VldSingle(machInst, singleAll, width, rn, vd, 3167639Sgblack@eecs.umich.edu regs, inc, size, align, rm, lane); 3177639Sgblack@eecs.umich.edu } else { 3187639Sgblack@eecs.umich.edu return new VldMult(machInst, width, rn, vd, 3197639Sgblack@eecs.umich.edu regs, inc, size, align, rm); 3207639Sgblack@eecs.umich.edu } 3217435Sgblack@eecs.umich.edu } else { 3227435Sgblack@eecs.umich.edu // Store instructions. 3237639Sgblack@eecs.umich.edu if (single) { 3247639Sgblack@eecs.umich.edu if (singleAll) { 3257639Sgblack@eecs.umich.edu return new Unknown(machInst); 3267591SAli.Saidi@ARM.com } else { 3277639Sgblack@eecs.umich.edu return new VstSingle(machInst, false, width, rn, vd, 3287639Sgblack@eecs.umich.edu regs, inc, size, align, rm, lane); 3297435Sgblack@eecs.umich.edu } 3307435Sgblack@eecs.umich.edu } else { 3317639Sgblack@eecs.umich.edu return new VstMult(machInst, width, rn, vd, 3327639Sgblack@eecs.umich.edu regs, inc, size, align, rm); 3337435Sgblack@eecs.umich.edu } 3347435Sgblack@eecs.umich.edu } 3357591SAli.Saidi@ARM.com return new Unknown(machInst); 3367435Sgblack@eecs.umich.edu } 3377435Sgblack@eecs.umich.edu ''' 3387435Sgblack@eecs.umich.edu 3397435Sgblack@eecs.umich.edu decoder_output += ''' 3407435Sgblack@eecs.umich.edu static StaticInstPtr 3417435Sgblack@eecs.umich.edu decodeNeonThreeRegistersSameLength(ExtMachInst machInst) 3427435Sgblack@eecs.umich.edu { 3437435Sgblack@eecs.umich.edu const bool u = THUMB ? bits(machInst, 28) : bits(machInst, 24); 34413977Sciro.santilli@arm.com const uint32_t opc = bits(machInst, 11, 8); 34513977Sciro.santilli@arm.com const bool o1 = bits(machInst, 4); 34613977Sciro.santilli@arm.com const uint32_t size = bits(machInst, 21, 20); 3477639Sgblack@eecs.umich.edu const IntRegIndex vd = 3487639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 15, 12) | 3497639Sgblack@eecs.umich.edu (bits(machInst, 22) << 4))); 3507639Sgblack@eecs.umich.edu const IntRegIndex vn = 3517639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 19, 16) | 3527639Sgblack@eecs.umich.edu (bits(machInst, 7) << 4))); 3537639Sgblack@eecs.umich.edu const IntRegIndex vm = 3547639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 3, 0) | 3557639Sgblack@eecs.umich.edu (bits(machInst, 5) << 4))); 3567639Sgblack@eecs.umich.edu const bool q = bits(machInst, 6); 3577639Sgblack@eecs.umich.edu if (q && ((vd & 0x1) || (vn & 0x1) || (vm & 0x1))) 3587639Sgblack@eecs.umich.edu return new Unknown(machInst); 35913977Sciro.santilli@arm.com switch (opc) { 3607435Sgblack@eecs.umich.edu case 0x0: 36113977Sciro.santilli@arm.com if (o1) { 3627639Sgblack@eecs.umich.edu if (u) { 3637639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<VqaddUD, VqaddUQ>( 3647639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 3657435Sgblack@eecs.umich.edu } else { 3667639Sgblack@eecs.umich.edu return decodeNeonSThreeReg<VqaddSD, VqaddSQ>( 3677639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 3687435Sgblack@eecs.umich.edu } 3697435Sgblack@eecs.umich.edu } else { 3707639Sgblack@eecs.umich.edu if (size == 3) 3717639Sgblack@eecs.umich.edu return new Unknown(machInst); 3727639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VhaddD, VhaddQ>( 3737639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 3747435Sgblack@eecs.umich.edu } 3757435Sgblack@eecs.umich.edu case 0x1: 37613977Sciro.santilli@arm.com if (!o1) { 3777639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VrhaddD, VrhaddQ>( 3787639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 3797435Sgblack@eecs.umich.edu } else { 3807435Sgblack@eecs.umich.edu if (u) { 38113977Sciro.santilli@arm.com switch (size) { 3827435Sgblack@eecs.umich.edu case 0: 3837639Sgblack@eecs.umich.edu if (q) { 3847639Sgblack@eecs.umich.edu return new VeorQ<uint64_t>(machInst, vd, vn, vm); 3857639Sgblack@eecs.umich.edu } else { 3867639Sgblack@eecs.umich.edu return new VeorD<uint64_t>(machInst, vd, vn, vm); 3877639Sgblack@eecs.umich.edu } 3887435Sgblack@eecs.umich.edu case 1: 3897639Sgblack@eecs.umich.edu if (q) { 3907639Sgblack@eecs.umich.edu return new VbslQ<uint64_t>(machInst, vd, vn, vm); 3917639Sgblack@eecs.umich.edu } else { 3927639Sgblack@eecs.umich.edu return new VbslD<uint64_t>(machInst, vd, vn, vm); 3937639Sgblack@eecs.umich.edu } 3947435Sgblack@eecs.umich.edu case 2: 3957639Sgblack@eecs.umich.edu if (q) { 3967639Sgblack@eecs.umich.edu return new VbitQ<uint64_t>(machInst, vd, vn, vm); 3977639Sgblack@eecs.umich.edu } else { 3987639Sgblack@eecs.umich.edu return new VbitD<uint64_t>(machInst, vd, vn, vm); 3997639Sgblack@eecs.umich.edu } 4007435Sgblack@eecs.umich.edu case 3: 4017639Sgblack@eecs.umich.edu if (q) { 4027639Sgblack@eecs.umich.edu return new VbifQ<uint64_t>(machInst, vd, vn, vm); 4037639Sgblack@eecs.umich.edu } else { 4047639Sgblack@eecs.umich.edu return new VbifD<uint64_t>(machInst, vd, vn, vm); 4057639Sgblack@eecs.umich.edu } 40612595Ssiddhesh.poyarekar@gmail.com default: 40712595Ssiddhesh.poyarekar@gmail.com M5_UNREACHABLE; 4087435Sgblack@eecs.umich.edu } 4097435Sgblack@eecs.umich.edu } else { 41013977Sciro.santilli@arm.com switch (size) { 4117435Sgblack@eecs.umich.edu case 0: 4127639Sgblack@eecs.umich.edu if (q) { 4137639Sgblack@eecs.umich.edu return new VandQ<uint64_t>(machInst, vd, vn, vm); 4147639Sgblack@eecs.umich.edu } else { 4157639Sgblack@eecs.umich.edu return new VandD<uint64_t>(machInst, vd, vn, vm); 4167639Sgblack@eecs.umich.edu } 4177435Sgblack@eecs.umich.edu case 1: 4187639Sgblack@eecs.umich.edu if (q) { 4197639Sgblack@eecs.umich.edu return new VbicQ<uint64_t>(machInst, vd, vn, vm); 4207639Sgblack@eecs.umich.edu } else { 4217639Sgblack@eecs.umich.edu return new VbicD<uint64_t>(machInst, vd, vn, vm); 4227639Sgblack@eecs.umich.edu } 4237435Sgblack@eecs.umich.edu case 2: 4247639Sgblack@eecs.umich.edu if (vn == vm) { 4257639Sgblack@eecs.umich.edu if (q) { 4267639Sgblack@eecs.umich.edu return new VmovQ<uint64_t>( 4277639Sgblack@eecs.umich.edu machInst, vd, vn, vm); 4287435Sgblack@eecs.umich.edu } else { 4297639Sgblack@eecs.umich.edu return new VmovD<uint64_t>( 4307639Sgblack@eecs.umich.edu machInst, vd, vn, vm); 4317639Sgblack@eecs.umich.edu } 4327639Sgblack@eecs.umich.edu } else { 4337639Sgblack@eecs.umich.edu if (q) { 4347639Sgblack@eecs.umich.edu return new VorrQ<uint64_t>( 4357639Sgblack@eecs.umich.edu machInst, vd, vn, vm); 4367639Sgblack@eecs.umich.edu } else { 4377639Sgblack@eecs.umich.edu return new VorrD<uint64_t>( 4387639Sgblack@eecs.umich.edu machInst, vd, vn, vm); 4397435Sgblack@eecs.umich.edu } 4407435Sgblack@eecs.umich.edu } 4417435Sgblack@eecs.umich.edu case 3: 4427639Sgblack@eecs.umich.edu if (q) { 4437639Sgblack@eecs.umich.edu return new VornQ<uint64_t>( 4447639Sgblack@eecs.umich.edu machInst, vd, vn, vm); 4457639Sgblack@eecs.umich.edu } else { 4467639Sgblack@eecs.umich.edu return new VornD<uint64_t>( 4477639Sgblack@eecs.umich.edu machInst, vd, vn, vm); 4487639Sgblack@eecs.umich.edu } 44912595Ssiddhesh.poyarekar@gmail.com default: 45012595Ssiddhesh.poyarekar@gmail.com M5_UNREACHABLE; 4517435Sgblack@eecs.umich.edu } 4527435Sgblack@eecs.umich.edu } 4537435Sgblack@eecs.umich.edu } 4547435Sgblack@eecs.umich.edu case 0x2: 45513977Sciro.santilli@arm.com if (o1) { 4567639Sgblack@eecs.umich.edu if (u) { 4577639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<VqsubUD, VqsubUQ>( 4587639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 4597639Sgblack@eecs.umich.edu } else { 4607639Sgblack@eecs.umich.edu return decodeNeonSThreeReg<VqsubSD, VqsubSQ>( 4617639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 4627639Sgblack@eecs.umich.edu } 4637435Sgblack@eecs.umich.edu } else { 4647639Sgblack@eecs.umich.edu if (size == 3) 4657639Sgblack@eecs.umich.edu return new Unknown(machInst); 4667639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VhsubD, VhsubQ>( 4677639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 4687435Sgblack@eecs.umich.edu } 4697435Sgblack@eecs.umich.edu case 0x3: 47013977Sciro.santilli@arm.com if (o1) { 4717639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VcgeD, VcgeQ>( 4727639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 4737435Sgblack@eecs.umich.edu } else { 4747639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VcgtD, VcgtQ>( 4757639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 4767435Sgblack@eecs.umich.edu } 4777435Sgblack@eecs.umich.edu case 0x4: 47813977Sciro.santilli@arm.com if (o1) { 4797639Sgblack@eecs.umich.edu if (u) { 4807639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<VqshlUD, VqshlUQ>( 4817639Sgblack@eecs.umich.edu q, size, machInst, vd, vm, vn); 4827639Sgblack@eecs.umich.edu } else { 4837639Sgblack@eecs.umich.edu return decodeNeonSThreeReg<VqshlSD, VqshlSQ>( 4847639Sgblack@eecs.umich.edu q, size, machInst, vd, vm, vn); 4857639Sgblack@eecs.umich.edu } 4867435Sgblack@eecs.umich.edu } else { 4877639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VshlD, VshlQ>( 4887639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vm, vn); 4897435Sgblack@eecs.umich.edu } 4907435Sgblack@eecs.umich.edu case 0x5: 49113977Sciro.santilli@arm.com if (o1) { 4927639Sgblack@eecs.umich.edu if (u) { 4937639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<VqrshlUD, VqrshlUQ>( 4947639Sgblack@eecs.umich.edu q, size, machInst, vd, vm, vn); 4957639Sgblack@eecs.umich.edu } else { 4967639Sgblack@eecs.umich.edu return decodeNeonSThreeReg<VqrshlSD, VqrshlSQ>( 4977639Sgblack@eecs.umich.edu q, size, machInst, vd, vm, vn); 4987639Sgblack@eecs.umich.edu } 4997435Sgblack@eecs.umich.edu } else { 5007639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VrshlD, VrshlQ>( 5017639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vm, vn); 5027435Sgblack@eecs.umich.edu } 5037435Sgblack@eecs.umich.edu case 0x6: 50413977Sciro.santilli@arm.com if (o1) { 5057639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VminD, VminQ>( 5067639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 5077435Sgblack@eecs.umich.edu } else { 5087639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VmaxD, VmaxQ>( 5097639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 5107435Sgblack@eecs.umich.edu } 5117435Sgblack@eecs.umich.edu case 0x7: 51213977Sciro.santilli@arm.com if (o1) { 5137639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VabaD, VabaQ>( 5147639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 5157435Sgblack@eecs.umich.edu } else { 5167435Sgblack@eecs.umich.edu if (bits(machInst, 23) == 1) { 5177639Sgblack@eecs.umich.edu if (q) { 5187435Sgblack@eecs.umich.edu return new Unknown(machInst); 5197435Sgblack@eecs.umich.edu } else { 5207639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vabdl>( 5217639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 5227435Sgblack@eecs.umich.edu } 5237435Sgblack@eecs.umich.edu } else { 5247639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VabdD, VabdQ>( 5257639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 5267435Sgblack@eecs.umich.edu } 5277435Sgblack@eecs.umich.edu } 5287435Sgblack@eecs.umich.edu case 0x8: 52913977Sciro.santilli@arm.com if (o1) { 5307435Sgblack@eecs.umich.edu if (u) { 5317639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<VceqD, VceqQ>( 5327639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5337435Sgblack@eecs.umich.edu } else { 5347639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<VtstD, VtstQ>( 5357639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5367435Sgblack@eecs.umich.edu } 5377435Sgblack@eecs.umich.edu } else { 5387435Sgblack@eecs.umich.edu if (u) { 5397639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<NVsubD, NVsubQ>( 5407639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5417435Sgblack@eecs.umich.edu } else { 5427639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<NVaddD, NVaddQ>( 5437639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5447435Sgblack@eecs.umich.edu } 5457435Sgblack@eecs.umich.edu } 5467435Sgblack@eecs.umich.edu case 0x9: 54713977Sciro.santilli@arm.com if (o1) { 5487435Sgblack@eecs.umich.edu if (u) { 5497639Sgblack@eecs.umich.edu return decodeNeonUThreeReg<NVmulpD, NVmulpQ>( 5507639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5517435Sgblack@eecs.umich.edu } else { 5527639Sgblack@eecs.umich.edu return decodeNeonSThreeReg<NVmulD, NVmulQ>( 5537639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5547435Sgblack@eecs.umich.edu } 5557435Sgblack@eecs.umich.edu } else { 5567435Sgblack@eecs.umich.edu if (u) { 5577639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<NVmlsD, NVmlsQ>( 5587639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 5597435Sgblack@eecs.umich.edu } else { 5607639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<NVmlaD, NVmlaQ>( 5617639Sgblack@eecs.umich.edu q, u, size, machInst, vd, vn, vm); 5627435Sgblack@eecs.umich.edu } 5637435Sgblack@eecs.umich.edu } 5647435Sgblack@eecs.umich.edu case 0xa: 5658607Sgblack@eecs.umich.edu if (q) 5668607Sgblack@eecs.umich.edu return new Unknown(machInst); 56713977Sciro.santilli@arm.com if (o1) { 5688607Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<VpminD>( 5698607Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 5707435Sgblack@eecs.umich.edu } else { 5718607Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<VpmaxD>( 5728607Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 5737435Sgblack@eecs.umich.edu } 5747435Sgblack@eecs.umich.edu case 0xb: 57513977Sciro.santilli@arm.com if (o1) { 5768607Sgblack@eecs.umich.edu if (u || q) { 5777435Sgblack@eecs.umich.edu return new Unknown(machInst); 5787435Sgblack@eecs.umich.edu } else { 5798607Sgblack@eecs.umich.edu return decodeNeonUThreeUSReg<NVpaddD>( 5808607Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 5817435Sgblack@eecs.umich.edu } 5827435Sgblack@eecs.umich.edu } else { 5837435Sgblack@eecs.umich.edu if (u) { 5847639Sgblack@eecs.umich.edu return decodeNeonSThreeSReg<VqrdmulhD, VqrdmulhQ>( 5857639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5867435Sgblack@eecs.umich.edu } else { 5877639Sgblack@eecs.umich.edu return decodeNeonSThreeSReg<VqdmulhD, VqdmulhQ>( 5887639Sgblack@eecs.umich.edu q, size, machInst, vd, vn, vm); 5897435Sgblack@eecs.umich.edu } 5907435Sgblack@eecs.umich.edu } 5917435Sgblack@eecs.umich.edu case 0xc: 59213977Sciro.santilli@arm.com if (o1) { 59310037SARM gem5 Developers if (!u) { 59413977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 59510037SARM gem5 Developers if (q) { 59610037SARM gem5 Developers return new NVfmaQFp<float>(machInst, vd, vn, vm); 59710037SARM gem5 Developers } else { 59810037SARM gem5 Developers return new NVfmaDFp<float>(machInst, vd, vn, vm); 59910037SARM gem5 Developers } 60010037SARM gem5 Developers } else { 60110037SARM gem5 Developers if (q) { 60210037SARM gem5 Developers return new NVfmsQFp<float>(machInst, vd, vn, vm); 60310037SARM gem5 Developers } else { 60410037SARM gem5 Developers return new NVfmsDFp<float>(machInst, vd, vn, vm); 60510037SARM gem5 Developers } 60610037SARM gem5 Developers } 60710037SARM gem5 Developers } 60813168Smatt.horsnell@arm.com } else { 60913168Smatt.horsnell@arm.com if (u) { 61013977Sciro.santilli@arm.com switch (size) { 61113168Smatt.horsnell@arm.com case 0x0: 61213168Smatt.horsnell@arm.com return new SHA256H(machInst, vd, vn, vm); 61313168Smatt.horsnell@arm.com case 0x1: 61413168Smatt.horsnell@arm.com return new SHA256H2(machInst, vd, vn, vm); 61513168Smatt.horsnell@arm.com case 0x2: 61613168Smatt.horsnell@arm.com return new SHA256SU1(machInst, vd, vn, vm); 61713168Smatt.horsnell@arm.com case 0x3: 61813168Smatt.horsnell@arm.com return new Unknown(machInst); 61913168Smatt.horsnell@arm.com default: 62013168Smatt.horsnell@arm.com M5_UNREACHABLE; 62113168Smatt.horsnell@arm.com } 62213168Smatt.horsnell@arm.com } else { 62313977Sciro.santilli@arm.com switch (size) { 62413168Smatt.horsnell@arm.com case 0x0: 62513168Smatt.horsnell@arm.com return new SHA1C(machInst, vd, vn, vm); 62613168Smatt.horsnell@arm.com case 0x1: 62713168Smatt.horsnell@arm.com return new SHA1P(machInst, vd, vn, vm); 62813168Smatt.horsnell@arm.com case 0x2: 62913168Smatt.horsnell@arm.com return new SHA1M(machInst, vd, vn, vm); 63013168Smatt.horsnell@arm.com case 0x3: 63113168Smatt.horsnell@arm.com return new SHA1SU0(machInst, vd, vn, vm); 63213168Smatt.horsnell@arm.com default: 63313168Smatt.horsnell@arm.com M5_UNREACHABLE; 63413168Smatt.horsnell@arm.com } 63513168Smatt.horsnell@arm.com } 63610037SARM gem5 Developers } 6377435Sgblack@eecs.umich.edu return new Unknown(machInst); 6387435Sgblack@eecs.umich.edu case 0xd: 63913977Sciro.santilli@arm.com if (o1) { 6407435Sgblack@eecs.umich.edu if (u) { 64113977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 6427639Sgblack@eecs.umich.edu if (q) { 6437639Sgblack@eecs.umich.edu return new NVmulQFp<float>(machInst, vd, vn, vm); 6447639Sgblack@eecs.umich.edu } else { 6457639Sgblack@eecs.umich.edu return new NVmulDFp<float>(machInst, vd, vn, vm); 6467639Sgblack@eecs.umich.edu } 6477435Sgblack@eecs.umich.edu } else { 6487435Sgblack@eecs.umich.edu return new Unknown(machInst); 6497435Sgblack@eecs.umich.edu } 6507435Sgblack@eecs.umich.edu } else { 65113977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 6527639Sgblack@eecs.umich.edu if (q) { 6537639Sgblack@eecs.umich.edu return new NVmlaQFp<float>(machInst, vd, vn, vm); 6547639Sgblack@eecs.umich.edu } else { 6557639Sgblack@eecs.umich.edu return new NVmlaDFp<float>(machInst, vd, vn, vm); 6567639Sgblack@eecs.umich.edu } 6577435Sgblack@eecs.umich.edu } else { 6587639Sgblack@eecs.umich.edu if (q) { 6597639Sgblack@eecs.umich.edu return new NVmlsQFp<float>(machInst, vd, vn, vm); 6607639Sgblack@eecs.umich.edu } else { 6617639Sgblack@eecs.umich.edu return new NVmlsDFp<float>(machInst, vd, vn, vm); 6627639Sgblack@eecs.umich.edu } 6637435Sgblack@eecs.umich.edu } 6647435Sgblack@eecs.umich.edu } 6657435Sgblack@eecs.umich.edu } else { 6667435Sgblack@eecs.umich.edu if (u) { 66713977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 6687639Sgblack@eecs.umich.edu if (q) { 6697639Sgblack@eecs.umich.edu return new VpaddQFp<float>(machInst, vd, vn, vm); 6707639Sgblack@eecs.umich.edu } else { 6717639Sgblack@eecs.umich.edu return new VpaddDFp<float>(machInst, vd, vn, vm); 6727639Sgblack@eecs.umich.edu } 6737435Sgblack@eecs.umich.edu } else { 6747639Sgblack@eecs.umich.edu if (q) { 6757639Sgblack@eecs.umich.edu return new VabdQFp<float>(machInst, vd, vn, vm); 6767639Sgblack@eecs.umich.edu } else { 6777639Sgblack@eecs.umich.edu return new VabdDFp<float>(machInst, vd, vn, vm); 6787639Sgblack@eecs.umich.edu } 6797435Sgblack@eecs.umich.edu } 6807435Sgblack@eecs.umich.edu } else { 68113977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 6827639Sgblack@eecs.umich.edu if (q) { 6837639Sgblack@eecs.umich.edu return new VaddQFp<float>(machInst, vd, vn, vm); 6847639Sgblack@eecs.umich.edu } else { 6857639Sgblack@eecs.umich.edu return new VaddDFp<float>(machInst, vd, vn, vm); 6867639Sgblack@eecs.umich.edu } 6877435Sgblack@eecs.umich.edu } else { 6887639Sgblack@eecs.umich.edu if (q) { 6897639Sgblack@eecs.umich.edu return new VsubQFp<float>(machInst, vd, vn, vm); 6907639Sgblack@eecs.umich.edu } else { 6917639Sgblack@eecs.umich.edu return new VsubDFp<float>(machInst, vd, vn, vm); 6927639Sgblack@eecs.umich.edu } 6937435Sgblack@eecs.umich.edu } 6947435Sgblack@eecs.umich.edu } 6957435Sgblack@eecs.umich.edu } 6967435Sgblack@eecs.umich.edu case 0xe: 69713977Sciro.santilli@arm.com if (o1) { 6987435Sgblack@eecs.umich.edu if (u) { 69913977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 7007639Sgblack@eecs.umich.edu if (q) { 7017639Sgblack@eecs.umich.edu return new VacgeQFp<float>(machInst, vd, vn, vm); 7027639Sgblack@eecs.umich.edu } else { 7037639Sgblack@eecs.umich.edu return new VacgeDFp<float>(machInst, vd, vn, vm); 7047639Sgblack@eecs.umich.edu } 7057435Sgblack@eecs.umich.edu } else { 7067639Sgblack@eecs.umich.edu if (q) { 7077639Sgblack@eecs.umich.edu return new VacgtQFp<float>(machInst, vd, vn, vm); 7087639Sgblack@eecs.umich.edu } else { 7097639Sgblack@eecs.umich.edu return new VacgtDFp<float>(machInst, vd, vn, vm); 7107639Sgblack@eecs.umich.edu } 7117435Sgblack@eecs.umich.edu } 7127435Sgblack@eecs.umich.edu } else { 7137435Sgblack@eecs.umich.edu return new Unknown(machInst); 7147435Sgblack@eecs.umich.edu } 7157435Sgblack@eecs.umich.edu } else { 7167435Sgblack@eecs.umich.edu if (u) { 71713977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 7187639Sgblack@eecs.umich.edu if (q) { 7197639Sgblack@eecs.umich.edu return new VcgeQFp<float>(machInst, vd, vn, vm); 7207639Sgblack@eecs.umich.edu } else { 7217639Sgblack@eecs.umich.edu return new VcgeDFp<float>(machInst, vd, vn, vm); 7227639Sgblack@eecs.umich.edu } 7237435Sgblack@eecs.umich.edu } else { 7247639Sgblack@eecs.umich.edu if (q) { 7257639Sgblack@eecs.umich.edu return new VcgtQFp<float>(machInst, vd, vn, vm); 7267639Sgblack@eecs.umich.edu } else { 7277639Sgblack@eecs.umich.edu return new VcgtDFp<float>(machInst, vd, vn, vm); 7287639Sgblack@eecs.umich.edu } 7297435Sgblack@eecs.umich.edu } 7307435Sgblack@eecs.umich.edu } else { 73113977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 7327639Sgblack@eecs.umich.edu if (q) { 7337639Sgblack@eecs.umich.edu return new VceqQFp<float>(machInst, vd, vn, vm); 7347639Sgblack@eecs.umich.edu } else { 7357639Sgblack@eecs.umich.edu return new VceqDFp<float>(machInst, vd, vn, vm); 7367639Sgblack@eecs.umich.edu } 7377435Sgblack@eecs.umich.edu } else { 7387435Sgblack@eecs.umich.edu return new Unknown(machInst); 7397435Sgblack@eecs.umich.edu } 7407435Sgblack@eecs.umich.edu } 7417435Sgblack@eecs.umich.edu } 7427435Sgblack@eecs.umich.edu case 0xf: 74313977Sciro.santilli@arm.com if (o1) { 7447435Sgblack@eecs.umich.edu if (u) { 7457435Sgblack@eecs.umich.edu return new Unknown(machInst); 7467435Sgblack@eecs.umich.edu } else { 74713977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 7487639Sgblack@eecs.umich.edu if (q) { 7497639Sgblack@eecs.umich.edu return new VrecpsQFp<float>(machInst, vd, vn, vm); 7507639Sgblack@eecs.umich.edu } else { 7517639Sgblack@eecs.umich.edu return new VrecpsDFp<float>(machInst, vd, vn, vm); 7527639Sgblack@eecs.umich.edu } 7537435Sgblack@eecs.umich.edu } else { 7547639Sgblack@eecs.umich.edu if (q) { 7557639Sgblack@eecs.umich.edu return new VrsqrtsQFp<float>(machInst, vd, vn, vm); 7567639Sgblack@eecs.umich.edu } else { 7577639Sgblack@eecs.umich.edu return new VrsqrtsDFp<float>(machInst, vd, vn, vm); 7587639Sgblack@eecs.umich.edu } 7597435Sgblack@eecs.umich.edu } 7607435Sgblack@eecs.umich.edu } 7617435Sgblack@eecs.umich.edu } else { 7627435Sgblack@eecs.umich.edu if (u) { 76313977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 7647639Sgblack@eecs.umich.edu if (q) { 7657639Sgblack@eecs.umich.edu return new VpmaxQFp<float>(machInst, vd, vn, vm); 7667639Sgblack@eecs.umich.edu } else { 7677639Sgblack@eecs.umich.edu return new VpmaxDFp<float>(machInst, vd, vn, vm); 7687639Sgblack@eecs.umich.edu } 7697435Sgblack@eecs.umich.edu } else { 7707639Sgblack@eecs.umich.edu if (q) { 7717639Sgblack@eecs.umich.edu return new VpminQFp<float>(machInst, vd, vn, vm); 7727639Sgblack@eecs.umich.edu } else { 7737639Sgblack@eecs.umich.edu return new VpminDFp<float>(machInst, vd, vn, vm); 7747639Sgblack@eecs.umich.edu } 7757435Sgblack@eecs.umich.edu } 7767435Sgblack@eecs.umich.edu } else { 77713977Sciro.santilli@arm.com if (bits(size, 1) == 0) { 7787639Sgblack@eecs.umich.edu if (q) { 7797639Sgblack@eecs.umich.edu return new VmaxQFp<float>(machInst, vd, vn, vm); 7807639Sgblack@eecs.umich.edu } else { 7817639Sgblack@eecs.umich.edu return new VmaxDFp<float>(machInst, vd, vn, vm); 7827639Sgblack@eecs.umich.edu } 7837435Sgblack@eecs.umich.edu } else { 7847639Sgblack@eecs.umich.edu if (q) { 7857639Sgblack@eecs.umich.edu return new VminQFp<float>(machInst, vd, vn, vm); 7867639Sgblack@eecs.umich.edu } else { 7877639Sgblack@eecs.umich.edu return new VminDFp<float>(machInst, vd, vn, vm); 7887639Sgblack@eecs.umich.edu } 7897435Sgblack@eecs.umich.edu } 7907435Sgblack@eecs.umich.edu } 7917435Sgblack@eecs.umich.edu } 7927435Sgblack@eecs.umich.edu } 7937435Sgblack@eecs.umich.edu return new Unknown(machInst); 7947435Sgblack@eecs.umich.edu } 7957435Sgblack@eecs.umich.edu 7967435Sgblack@eecs.umich.edu static StaticInstPtr 7977435Sgblack@eecs.umich.edu decodeNeonOneRegModImm(ExtMachInst machInst) 7987435Sgblack@eecs.umich.edu { 7997639Sgblack@eecs.umich.edu const IntRegIndex vd = 8007639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 15, 12) | 8017639Sgblack@eecs.umich.edu (bits(machInst, 22) << 4))); 8027639Sgblack@eecs.umich.edu const bool q = bits(machInst, 6); 8037435Sgblack@eecs.umich.edu const bool op = bits(machInst, 5); 8047639Sgblack@eecs.umich.edu const uint8_t cmode = bits(machInst, 11, 8); 8057639Sgblack@eecs.umich.edu const uint8_t imm = ((THUMB ? bits(machInst, 28) : 8067639Sgblack@eecs.umich.edu bits(machInst, 24)) << 7) | 8077639Sgblack@eecs.umich.edu (bits(machInst, 18, 16) << 4) | 8087639Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 0); 8097853SMatt.Horsnell@ARM.com 8107853SMatt.Horsnell@ARM.com // Check for invalid immediate encodings and return an unknown op 8117853SMatt.Horsnell@ARM.com // if it happens 8127853SMatt.Horsnell@ARM.com bool immValid = true; 8137853SMatt.Horsnell@ARM.com const uint64_t bigImm = simd_modified_imm(op, cmode, imm, immValid); 8147853SMatt.Horsnell@ARM.com if (!immValid) { 8157853SMatt.Horsnell@ARM.com return new Unknown(machInst); 8167853SMatt.Horsnell@ARM.com } 8177853SMatt.Horsnell@ARM.com 8187435Sgblack@eecs.umich.edu if (op) { 8197435Sgblack@eecs.umich.edu if (bits(cmode, 3) == 0) { 8207435Sgblack@eecs.umich.edu if (bits(cmode, 0) == 0) { 8217639Sgblack@eecs.umich.edu if (q) 8227639Sgblack@eecs.umich.edu return new NVmvniQ<uint64_t>(machInst, vd, bigImm); 8237639Sgblack@eecs.umich.edu else 8247639Sgblack@eecs.umich.edu return new NVmvniD<uint64_t>(machInst, vd, bigImm); 8257435Sgblack@eecs.umich.edu } else { 8267639Sgblack@eecs.umich.edu if (q) 8277639Sgblack@eecs.umich.edu return new NVbiciQ<uint64_t>(machInst, vd, bigImm); 8287639Sgblack@eecs.umich.edu else 8297639Sgblack@eecs.umich.edu return new NVbiciD<uint64_t>(machInst, vd, bigImm); 8307435Sgblack@eecs.umich.edu } 8317435Sgblack@eecs.umich.edu } else { 8327435Sgblack@eecs.umich.edu if (bits(cmode, 2) == 1) { 8337639Sgblack@eecs.umich.edu switch (bits(cmode, 1, 0)) { 8347639Sgblack@eecs.umich.edu case 0: 8357639Sgblack@eecs.umich.edu case 1: 8367639Sgblack@eecs.umich.edu if (q) 8377639Sgblack@eecs.umich.edu return new NVmvniQ<uint64_t>(machInst, vd, bigImm); 8387639Sgblack@eecs.umich.edu else 8397639Sgblack@eecs.umich.edu return new NVmvniD<uint64_t>(machInst, vd, bigImm); 8407639Sgblack@eecs.umich.edu case 2: 8417639Sgblack@eecs.umich.edu if (q) 8427639Sgblack@eecs.umich.edu return new NVmoviQ<uint64_t>(machInst, vd, bigImm); 8437639Sgblack@eecs.umich.edu else 8447639Sgblack@eecs.umich.edu return new NVmoviD<uint64_t>(machInst, vd, bigImm); 8457639Sgblack@eecs.umich.edu case 3: 8467639Sgblack@eecs.umich.edu if (q) 8477639Sgblack@eecs.umich.edu return new Unknown(machInst); 8487639Sgblack@eecs.umich.edu else 8497639Sgblack@eecs.umich.edu return new Unknown(machInst); 8507639Sgblack@eecs.umich.edu } 8517435Sgblack@eecs.umich.edu } else { 8527435Sgblack@eecs.umich.edu if (bits(cmode, 0) == 0) { 8537639Sgblack@eecs.umich.edu if (q) 8547639Sgblack@eecs.umich.edu return new NVmvniQ<uint64_t>(machInst, vd, bigImm); 8557639Sgblack@eecs.umich.edu else 8567639Sgblack@eecs.umich.edu return new NVmvniD<uint64_t>(machInst, vd, bigImm); 8577435Sgblack@eecs.umich.edu } else { 8587639Sgblack@eecs.umich.edu if (q) 8597639Sgblack@eecs.umich.edu return new NVbiciQ<uint64_t>(machInst, vd, bigImm); 8607639Sgblack@eecs.umich.edu else 8617639Sgblack@eecs.umich.edu return new NVbiciD<uint64_t>(machInst, vd, bigImm); 8627435Sgblack@eecs.umich.edu } 8637435Sgblack@eecs.umich.edu } 8647435Sgblack@eecs.umich.edu } 8657435Sgblack@eecs.umich.edu } else { 8667435Sgblack@eecs.umich.edu if (bits(cmode, 3) == 0) { 8677435Sgblack@eecs.umich.edu if (bits(cmode, 0) == 0) { 8687639Sgblack@eecs.umich.edu if (q) 8697639Sgblack@eecs.umich.edu return new NVmoviQ<uint64_t>(machInst, vd, bigImm); 8707639Sgblack@eecs.umich.edu else 8717639Sgblack@eecs.umich.edu return new NVmoviD<uint64_t>(machInst, vd, bigImm); 8727435Sgblack@eecs.umich.edu } else { 8737639Sgblack@eecs.umich.edu if (q) 8747639Sgblack@eecs.umich.edu return new NVorriQ<uint64_t>(machInst, vd, bigImm); 8757639Sgblack@eecs.umich.edu else 8767639Sgblack@eecs.umich.edu return new NVorriD<uint64_t>(machInst, vd, bigImm); 8777435Sgblack@eecs.umich.edu } 8787435Sgblack@eecs.umich.edu } else { 8797435Sgblack@eecs.umich.edu if (bits(cmode, 2) == 1) { 8807639Sgblack@eecs.umich.edu if (q) 8817639Sgblack@eecs.umich.edu return new NVmoviQ<uint64_t>(machInst, vd, bigImm); 8827639Sgblack@eecs.umich.edu else 8837639Sgblack@eecs.umich.edu return new NVmoviD<uint64_t>(machInst, vd, bigImm); 8847435Sgblack@eecs.umich.edu } else { 8857435Sgblack@eecs.umich.edu if (bits(cmode, 0) == 0) { 8867639Sgblack@eecs.umich.edu if (q) 8877639Sgblack@eecs.umich.edu return new NVmoviQ<uint64_t>(machInst, vd, bigImm); 8887639Sgblack@eecs.umich.edu else 8897639Sgblack@eecs.umich.edu return new NVmoviD<uint64_t>(machInst, vd, bigImm); 8907435Sgblack@eecs.umich.edu } else { 8917639Sgblack@eecs.umich.edu if (q) 8927639Sgblack@eecs.umich.edu return new NVorriQ<uint64_t>(machInst, vd, bigImm); 8937639Sgblack@eecs.umich.edu else 8947639Sgblack@eecs.umich.edu return new NVorriD<uint64_t>(machInst, vd, bigImm); 8957435Sgblack@eecs.umich.edu } 8967435Sgblack@eecs.umich.edu } 8977435Sgblack@eecs.umich.edu } 8987435Sgblack@eecs.umich.edu } 8997435Sgblack@eecs.umich.edu return new Unknown(machInst); 9007435Sgblack@eecs.umich.edu } 9017435Sgblack@eecs.umich.edu 9027435Sgblack@eecs.umich.edu static StaticInstPtr 9037435Sgblack@eecs.umich.edu decodeNeonTwoRegAndShift(ExtMachInst machInst) 9047435Sgblack@eecs.umich.edu { 90513977Sciro.santilli@arm.com const uint32_t opc = bits(machInst, 11, 8); 9067435Sgblack@eecs.umich.edu const bool u = THUMB ? bits(machInst, 28) : bits(machInst, 24); 90713977Sciro.santilli@arm.com const bool q = bits(machInst, 6); 9087435Sgblack@eecs.umich.edu const bool l = bits(machInst, 7); 9097639Sgblack@eecs.umich.edu const IntRegIndex vd = 9107639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 15, 12) | 9117639Sgblack@eecs.umich.edu (bits(machInst, 22) << 4))); 9127639Sgblack@eecs.umich.edu const IntRegIndex vm = 9137639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 3, 0) | 9147639Sgblack@eecs.umich.edu (bits(machInst, 5) << 4))); 9157639Sgblack@eecs.umich.edu unsigned imm6 = bits(machInst, 21, 16); 9167639Sgblack@eecs.umich.edu unsigned imm = ((l ? 1 : 0) << 6) | imm6; 9177639Sgblack@eecs.umich.edu unsigned size = 3; 9187639Sgblack@eecs.umich.edu unsigned lShiftAmt = 0; 9197639Sgblack@eecs.umich.edu unsigned bitSel; 9207639Sgblack@eecs.umich.edu for (bitSel = 1 << 6; true; bitSel >>= 1) { 9217639Sgblack@eecs.umich.edu if (bitSel & imm) 9227639Sgblack@eecs.umich.edu break; 9237639Sgblack@eecs.umich.edu else if (!size) 9247639Sgblack@eecs.umich.edu return new Unknown(machInst); 9257639Sgblack@eecs.umich.edu size--; 9267639Sgblack@eecs.umich.edu } 9277639Sgblack@eecs.umich.edu lShiftAmt = imm6 & ~bitSel; 9287639Sgblack@eecs.umich.edu unsigned rShiftAmt = 0; 92913977Sciro.santilli@arm.com if (opc != 0xe && opc != 0xf) { 9307639Sgblack@eecs.umich.edu if (size > 2) 9317639Sgblack@eecs.umich.edu rShiftAmt = 64 - imm6; 9327639Sgblack@eecs.umich.edu else 9337639Sgblack@eecs.umich.edu rShiftAmt = 2 * (8 << size) - imm6; 9347639Sgblack@eecs.umich.edu } 9357435Sgblack@eecs.umich.edu 93613977Sciro.santilli@arm.com switch (opc) { 9377435Sgblack@eecs.umich.edu case 0x0: 9387639Sgblack@eecs.umich.edu return decodeNeonUSTwoShiftReg<NVshrD, NVshrQ>( 93913977Sciro.santilli@arm.com q, u, size, machInst, vd, vm, rShiftAmt); 9407435Sgblack@eecs.umich.edu case 0x1: 9417639Sgblack@eecs.umich.edu return decodeNeonUSTwoShiftReg<NVsraD, NVsraQ>( 94213977Sciro.santilli@arm.com q, u, size, machInst, vd, vm, rShiftAmt); 9437435Sgblack@eecs.umich.edu case 0x2: 9447639Sgblack@eecs.umich.edu return decodeNeonUSTwoShiftReg<NVrshrD, NVrshrQ>( 94513977Sciro.santilli@arm.com q, u, size, machInst, vd, vm, rShiftAmt); 9467435Sgblack@eecs.umich.edu case 0x3: 9477639Sgblack@eecs.umich.edu return decodeNeonUSTwoShiftReg<NVrsraD, NVrsraQ>( 94813977Sciro.santilli@arm.com q, u, size, machInst, vd, vm, rShiftAmt); 9497435Sgblack@eecs.umich.edu case 0x4: 9507435Sgblack@eecs.umich.edu if (u) { 9517639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftReg<NVsriD, NVsriQ>( 95213977Sciro.santilli@arm.com q, size, machInst, vd, vm, rShiftAmt); 9537435Sgblack@eecs.umich.edu } else { 9547435Sgblack@eecs.umich.edu return new Unknown(machInst); 9557435Sgblack@eecs.umich.edu } 9567435Sgblack@eecs.umich.edu case 0x5: 9577435Sgblack@eecs.umich.edu if (u) { 9587639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftReg<NVsliD, NVsliQ>( 95913977Sciro.santilli@arm.com q, size, machInst, vd, vm, lShiftAmt); 9607435Sgblack@eecs.umich.edu } else { 9617639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftReg<NVshlD, NVshlQ>( 96213977Sciro.santilli@arm.com q, size, machInst, vd, vm, lShiftAmt); 9637435Sgblack@eecs.umich.edu } 9647435Sgblack@eecs.umich.edu case 0x6: 9657435Sgblack@eecs.umich.edu case 0x7: 9667639Sgblack@eecs.umich.edu if (u) { 96713977Sciro.santilli@arm.com if (opc == 0x6) { 9687639Sgblack@eecs.umich.edu return decodeNeonSTwoShiftReg<NVqshlusD, NVqshlusQ>( 96913977Sciro.santilli@arm.com q, size, machInst, vd, vm, lShiftAmt); 9707639Sgblack@eecs.umich.edu } else { 9717639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftReg<NVqshluD, NVqshluQ>( 97213977Sciro.santilli@arm.com q, size, machInst, vd, vm, lShiftAmt); 9737639Sgblack@eecs.umich.edu } 9747639Sgblack@eecs.umich.edu } else { 9757639Sgblack@eecs.umich.edu return decodeNeonSTwoShiftReg<NVqshlD, NVqshlQ>( 97613977Sciro.santilli@arm.com q, size, machInst, vd, vm, lShiftAmt); 9777639Sgblack@eecs.umich.edu } 9787435Sgblack@eecs.umich.edu case 0x8: 9797435Sgblack@eecs.umich.edu if (l) { 9807435Sgblack@eecs.umich.edu return new Unknown(machInst); 9817435Sgblack@eecs.umich.edu } else if (u) { 9827639Sgblack@eecs.umich.edu return decodeNeonSTwoShiftSReg<NVqshruns, NVqrshruns>( 98313977Sciro.santilli@arm.com q, size, machInst, vd, vm, rShiftAmt); 9847435Sgblack@eecs.umich.edu } else { 9857639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftSReg<NVshrn, NVrshrn>( 98613977Sciro.santilli@arm.com q, size, machInst, vd, vm, rShiftAmt); 9877435Sgblack@eecs.umich.edu } 9887435Sgblack@eecs.umich.edu case 0x9: 9897435Sgblack@eecs.umich.edu if (l) { 9907435Sgblack@eecs.umich.edu return new Unknown(machInst); 9917639Sgblack@eecs.umich.edu } else if (u) { 9927639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftSReg<NVqshrun, NVqrshrun>( 99313977Sciro.santilli@arm.com q, size, machInst, vd, vm, rShiftAmt); 9947435Sgblack@eecs.umich.edu } else { 9957639Sgblack@eecs.umich.edu return decodeNeonSTwoShiftSReg<NVqshrn, NVqrshrn>( 99613977Sciro.santilli@arm.com q, size, machInst, vd, vm, rShiftAmt); 9977435Sgblack@eecs.umich.edu } 9987435Sgblack@eecs.umich.edu case 0xa: 99913977Sciro.santilli@arm.com if (l || q) { 10007435Sgblack@eecs.umich.edu return new Unknown(machInst); 10017435Sgblack@eecs.umich.edu } else { 10027639Sgblack@eecs.umich.edu return decodeNeonUSTwoShiftSReg<NVmovl, NVshll>( 10037639Sgblack@eecs.umich.edu lShiftAmt, u, size, machInst, vd, vm, lShiftAmt); 10047435Sgblack@eecs.umich.edu } 10057435Sgblack@eecs.umich.edu case 0xe: 10067639Sgblack@eecs.umich.edu if (l) { 10077639Sgblack@eecs.umich.edu return new Unknown(machInst); 10087639Sgblack@eecs.umich.edu } else { 10097639Sgblack@eecs.umich.edu if (bits(imm6, 5) == 0) 10107639Sgblack@eecs.umich.edu return new Unknown(machInst); 10117639Sgblack@eecs.umich.edu if (u) { 101213977Sciro.santilli@arm.com if (q) { 10137639Sgblack@eecs.umich.edu return new NVcvtu2fpQ<float>( 10147639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10157639Sgblack@eecs.umich.edu } else { 10167639Sgblack@eecs.umich.edu return new NVcvtu2fpD<float>( 10177639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10187639Sgblack@eecs.umich.edu } 10197639Sgblack@eecs.umich.edu } else { 102013977Sciro.santilli@arm.com if (q) { 10217639Sgblack@eecs.umich.edu return new NVcvts2fpQ<float>( 10227639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10237639Sgblack@eecs.umich.edu } else { 10247639Sgblack@eecs.umich.edu return new NVcvts2fpD<float>( 10257639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10267639Sgblack@eecs.umich.edu } 10277639Sgblack@eecs.umich.edu } 10287639Sgblack@eecs.umich.edu } 10297435Sgblack@eecs.umich.edu case 0xf: 10307435Sgblack@eecs.umich.edu if (l) { 10317435Sgblack@eecs.umich.edu return new Unknown(machInst); 10327639Sgblack@eecs.umich.edu } else { 10337639Sgblack@eecs.umich.edu if (bits(imm6, 5) == 0) 10347639Sgblack@eecs.umich.edu return new Unknown(machInst); 10357639Sgblack@eecs.umich.edu if (u) { 103613977Sciro.santilli@arm.com if (q) { 10377639Sgblack@eecs.umich.edu return new NVcvt2ufxQ<float>( 10387639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10397639Sgblack@eecs.umich.edu } else { 10407639Sgblack@eecs.umich.edu return new NVcvt2ufxD<float>( 10417639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10427639Sgblack@eecs.umich.edu } 10437639Sgblack@eecs.umich.edu } else { 104413977Sciro.santilli@arm.com if (q) { 10457639Sgblack@eecs.umich.edu return new NVcvt2sfxQ<float>( 10467639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10477639Sgblack@eecs.umich.edu } else { 10487639Sgblack@eecs.umich.edu return new NVcvt2sfxD<float>( 10497639Sgblack@eecs.umich.edu machInst, vd, vm, 64 - imm6); 10507639Sgblack@eecs.umich.edu } 10517639Sgblack@eecs.umich.edu } 10527435Sgblack@eecs.umich.edu } 10537435Sgblack@eecs.umich.edu } 10547435Sgblack@eecs.umich.edu return new Unknown(machInst); 10557435Sgblack@eecs.umich.edu } 10567435Sgblack@eecs.umich.edu 10577435Sgblack@eecs.umich.edu static StaticInstPtr 10587435Sgblack@eecs.umich.edu decodeNeonThreeRegDiffLengths(ExtMachInst machInst) 10597435Sgblack@eecs.umich.edu { 10607435Sgblack@eecs.umich.edu const bool u = THUMB ? bits(machInst, 28) : bits(machInst, 24); 106113977Sciro.santilli@arm.com const uint32_t opc = bits(machInst, 11, 8); 10627639Sgblack@eecs.umich.edu const IntRegIndex vd = 10637639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 15, 12) | 10647639Sgblack@eecs.umich.edu (bits(machInst, 22) << 4))); 10657639Sgblack@eecs.umich.edu const IntRegIndex vn = 10667639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 19, 16) | 10677639Sgblack@eecs.umich.edu (bits(machInst, 7) << 4))); 10687639Sgblack@eecs.umich.edu const IntRegIndex vm = 10697639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 3, 0) | 10707639Sgblack@eecs.umich.edu (bits(machInst, 5) << 4))); 10717639Sgblack@eecs.umich.edu const unsigned size = bits(machInst, 21, 20); 107213977Sciro.santilli@arm.com switch (opc) { 10737435Sgblack@eecs.umich.edu case 0x0: 10747639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vaddl>( 10757639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 10767435Sgblack@eecs.umich.edu case 0x1: 10777639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vaddw>( 10787639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 10797435Sgblack@eecs.umich.edu case 0x2: 10807639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vsubl>( 10817639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 10827435Sgblack@eecs.umich.edu case 0x3: 10837639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vsubw>( 10847639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 10857435Sgblack@eecs.umich.edu case 0x4: 10867435Sgblack@eecs.umich.edu if (u) { 10877639Sgblack@eecs.umich.edu return decodeNeonUThreeUSReg<Vraddhn>( 10887639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 10897435Sgblack@eecs.umich.edu } else { 10907639Sgblack@eecs.umich.edu return decodeNeonUThreeUSReg<Vaddhn>( 10917639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 10927435Sgblack@eecs.umich.edu } 10937435Sgblack@eecs.umich.edu case 0x5: 10947639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vabal>( 10957639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 10967435Sgblack@eecs.umich.edu case 0x6: 10977435Sgblack@eecs.umich.edu if (u) { 10987639Sgblack@eecs.umich.edu return decodeNeonUThreeUSReg<Vrsubhn>( 10997639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 11007435Sgblack@eecs.umich.edu } else { 11017639Sgblack@eecs.umich.edu return decodeNeonUThreeUSReg<Vsubhn>( 11027639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 11037435Sgblack@eecs.umich.edu } 11047435Sgblack@eecs.umich.edu case 0x7: 11057435Sgblack@eecs.umich.edu if (bits(machInst, 23)) { 11067639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vabdl>( 11077639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 11087435Sgblack@eecs.umich.edu } else { 11097639Sgblack@eecs.umich.edu return decodeNeonUSThreeReg<VabdD, VabdQ>( 11107639Sgblack@eecs.umich.edu bits(machInst, 6), u, size, machInst, vd, vn, vm); 11117435Sgblack@eecs.umich.edu } 11127435Sgblack@eecs.umich.edu case 0x8: 11137639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vmlal>( 11147639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 11157435Sgblack@eecs.umich.edu case 0xa: 11167639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vmlsl>( 11177639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 11187435Sgblack@eecs.umich.edu case 0x9: 11197639Sgblack@eecs.umich.edu if (u) { 11207639Sgblack@eecs.umich.edu return new Unknown(machInst); 11217435Sgblack@eecs.umich.edu } else { 11227639Sgblack@eecs.umich.edu return decodeNeonSThreeUSReg<Vqdmlal>( 11237639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 11247435Sgblack@eecs.umich.edu } 11257435Sgblack@eecs.umich.edu case 0xb: 11267639Sgblack@eecs.umich.edu if (u) { 11277435Sgblack@eecs.umich.edu return new Unknown(machInst); 11287435Sgblack@eecs.umich.edu } else { 11297639Sgblack@eecs.umich.edu return decodeNeonSThreeUSReg<Vqdmlsl>( 11307639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 11317435Sgblack@eecs.umich.edu } 11327435Sgblack@eecs.umich.edu case 0xc: 11337639Sgblack@eecs.umich.edu return decodeNeonUSThreeUSReg<Vmull>( 11347639Sgblack@eecs.umich.edu u, size, machInst, vd, vn, vm); 11357435Sgblack@eecs.umich.edu case 0xd: 11367639Sgblack@eecs.umich.edu if (u) { 11377435Sgblack@eecs.umich.edu return new Unknown(machInst); 11387435Sgblack@eecs.umich.edu } else { 11397639Sgblack@eecs.umich.edu return decodeNeonSThreeUSReg<Vqdmull>( 11407639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 11417435Sgblack@eecs.umich.edu } 11427435Sgblack@eecs.umich.edu case 0xe: 11437639Sgblack@eecs.umich.edu return decodeNeonUThreeUSReg<Vmullp>( 11447639Sgblack@eecs.umich.edu size, machInst, vd, vn, vm); 11457435Sgblack@eecs.umich.edu } 11467435Sgblack@eecs.umich.edu return new Unknown(machInst); 11477435Sgblack@eecs.umich.edu } 11487435Sgblack@eecs.umich.edu 11497435Sgblack@eecs.umich.edu static StaticInstPtr 11507435Sgblack@eecs.umich.edu decodeNeonTwoRegScalar(ExtMachInst machInst) 11517435Sgblack@eecs.umich.edu { 11527435Sgblack@eecs.umich.edu const bool u = THUMB ? bits(machInst, 28) : bits(machInst, 24); 115313977Sciro.santilli@arm.com const uint32_t opc = bits(machInst, 11, 8); 11547639Sgblack@eecs.umich.edu const unsigned size = bits(machInst, 21, 20); 11557639Sgblack@eecs.umich.edu const IntRegIndex vd = 11567639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 15, 12) | 11577639Sgblack@eecs.umich.edu (bits(machInst, 22) << 4))); 11587639Sgblack@eecs.umich.edu const IntRegIndex vn = 11597639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 19, 16) | 11607639Sgblack@eecs.umich.edu (bits(machInst, 7) << 4))); 11617639Sgblack@eecs.umich.edu const IntRegIndex vm = (size == 2) ? 11627639Sgblack@eecs.umich.edu (IntRegIndex)(2 * bits(machInst, 3, 0)) : 11637639Sgblack@eecs.umich.edu (IntRegIndex)(2 * bits(machInst, 2, 0)); 11647639Sgblack@eecs.umich.edu const unsigned index = (size == 2) ? (unsigned)bits(machInst, 5) : 11657639Sgblack@eecs.umich.edu (bits(machInst, 3) | (bits(machInst, 5) << 1)); 116613977Sciro.santilli@arm.com switch (opc) { 11677435Sgblack@eecs.umich.edu case 0x0: 11687639Sgblack@eecs.umich.edu if (u) { 11697639Sgblack@eecs.umich.edu switch (size) { 11707639Sgblack@eecs.umich.edu case 1: 11717639Sgblack@eecs.umich.edu return new VmlasQ<uint16_t>(machInst, vd, vn, vm, index); 11727639Sgblack@eecs.umich.edu case 2: 11737639Sgblack@eecs.umich.edu return new VmlasQ<uint32_t>(machInst, vd, vn, vm, index); 11747639Sgblack@eecs.umich.edu default: 11757639Sgblack@eecs.umich.edu return new Unknown(machInst); 11767639Sgblack@eecs.umich.edu } 11777639Sgblack@eecs.umich.edu } else { 11787639Sgblack@eecs.umich.edu switch (size) { 11797639Sgblack@eecs.umich.edu case 1: 11807639Sgblack@eecs.umich.edu return new VmlasD<uint16_t>(machInst, vd, vn, vm, index); 11817639Sgblack@eecs.umich.edu case 2: 11827639Sgblack@eecs.umich.edu return new VmlasD<uint32_t>(machInst, vd, vn, vm, index); 11837639Sgblack@eecs.umich.edu default: 11847639Sgblack@eecs.umich.edu return new Unknown(machInst); 11857639Sgblack@eecs.umich.edu } 11867639Sgblack@eecs.umich.edu } 11877435Sgblack@eecs.umich.edu case 0x1: 11887639Sgblack@eecs.umich.edu if (u) 11897639Sgblack@eecs.umich.edu return new VmlasQFp<float>(machInst, vd, vn, vm, index); 11907639Sgblack@eecs.umich.edu else 11917639Sgblack@eecs.umich.edu return new VmlasDFp<float>(machInst, vd, vn, vm, index); 11927435Sgblack@eecs.umich.edu case 0x4: 11937639Sgblack@eecs.umich.edu if (u) { 11947639Sgblack@eecs.umich.edu switch (size) { 11957639Sgblack@eecs.umich.edu case 1: 11967639Sgblack@eecs.umich.edu return new VmlssQ<uint16_t>(machInst, vd, vn, vm, index); 11977639Sgblack@eecs.umich.edu case 2: 11987639Sgblack@eecs.umich.edu return new VmlssQ<uint32_t>(machInst, vd, vn, vm, index); 11997639Sgblack@eecs.umich.edu default: 12007639Sgblack@eecs.umich.edu return new Unknown(machInst); 12017639Sgblack@eecs.umich.edu } 12027639Sgblack@eecs.umich.edu } else { 12037639Sgblack@eecs.umich.edu switch (size) { 12047639Sgblack@eecs.umich.edu case 1: 12057639Sgblack@eecs.umich.edu return new VmlssD<uint16_t>(machInst, vd, vn, vm, index); 12067639Sgblack@eecs.umich.edu case 2: 12077639Sgblack@eecs.umich.edu return new VmlssD<uint32_t>(machInst, vd, vn, vm, index); 12087639Sgblack@eecs.umich.edu default: 12097639Sgblack@eecs.umich.edu return new Unknown(machInst); 12107639Sgblack@eecs.umich.edu } 12117639Sgblack@eecs.umich.edu } 12127435Sgblack@eecs.umich.edu case 0x5: 12137639Sgblack@eecs.umich.edu if (u) 12147639Sgblack@eecs.umich.edu return new VmlssQFp<float>(machInst, vd, vn, vm, index); 12157639Sgblack@eecs.umich.edu else 12167639Sgblack@eecs.umich.edu return new VmlssDFp<float>(machInst, vd, vn, vm, index); 12177435Sgblack@eecs.umich.edu case 0x2: 12187639Sgblack@eecs.umich.edu if (u) { 12197639Sgblack@eecs.umich.edu switch (size) { 12207639Sgblack@eecs.umich.edu case 1: 12217639Sgblack@eecs.umich.edu return new Vmlals<uint16_t>(machInst, vd, vn, vm, index); 12227639Sgblack@eecs.umich.edu case 2: 12237639Sgblack@eecs.umich.edu return new Vmlals<uint32_t>(machInst, vd, vn, vm, index); 12247639Sgblack@eecs.umich.edu default: 12257639Sgblack@eecs.umich.edu return new Unknown(machInst); 12267639Sgblack@eecs.umich.edu } 12277639Sgblack@eecs.umich.edu } else { 12287639Sgblack@eecs.umich.edu switch (size) { 12297639Sgblack@eecs.umich.edu case 1: 12307639Sgblack@eecs.umich.edu return new Vmlals<int16_t>(machInst, vd, vn, vm, index); 12317639Sgblack@eecs.umich.edu case 2: 12327639Sgblack@eecs.umich.edu return new Vmlals<int32_t>(machInst, vd, vn, vm, index); 12337639Sgblack@eecs.umich.edu default: 12347639Sgblack@eecs.umich.edu return new Unknown(machInst); 12357639Sgblack@eecs.umich.edu } 12367639Sgblack@eecs.umich.edu } 12377435Sgblack@eecs.umich.edu case 0x6: 12387639Sgblack@eecs.umich.edu if (u) { 12397639Sgblack@eecs.umich.edu switch (size) { 12407639Sgblack@eecs.umich.edu case 1: 12417639Sgblack@eecs.umich.edu return new Vmlsls<uint16_t>(machInst, vd, vn, vm, index); 12427639Sgblack@eecs.umich.edu case 2: 12437639Sgblack@eecs.umich.edu return new Vmlsls<uint32_t>(machInst, vd, vn, vm, index); 12447639Sgblack@eecs.umich.edu default: 12457639Sgblack@eecs.umich.edu return new Unknown(machInst); 12467639Sgblack@eecs.umich.edu } 12477639Sgblack@eecs.umich.edu } else { 12487639Sgblack@eecs.umich.edu switch (size) { 12497639Sgblack@eecs.umich.edu case 1: 12507639Sgblack@eecs.umich.edu return new Vmlsls<int16_t>(machInst, vd, vn, vm, index); 12517639Sgblack@eecs.umich.edu case 2: 12527639Sgblack@eecs.umich.edu return new Vmlsls<int32_t>(machInst, vd, vn, vm, index); 12537639Sgblack@eecs.umich.edu default: 12547639Sgblack@eecs.umich.edu return new Unknown(machInst); 12557639Sgblack@eecs.umich.edu } 12567639Sgblack@eecs.umich.edu } 12577435Sgblack@eecs.umich.edu case 0x3: 12587435Sgblack@eecs.umich.edu if (u) { 12597435Sgblack@eecs.umich.edu return new Unknown(machInst); 12607435Sgblack@eecs.umich.edu } else { 12617639Sgblack@eecs.umich.edu switch (size) { 12627639Sgblack@eecs.umich.edu case 1: 12637639Sgblack@eecs.umich.edu return new Vqdmlals<int16_t>(machInst, vd, vn, vm, index); 12647639Sgblack@eecs.umich.edu case 2: 12657639Sgblack@eecs.umich.edu return new Vqdmlals<int32_t>(machInst, vd, vn, vm, index); 12667639Sgblack@eecs.umich.edu default: 12677639Sgblack@eecs.umich.edu return new Unknown(machInst); 12687639Sgblack@eecs.umich.edu } 12697435Sgblack@eecs.umich.edu } 12707435Sgblack@eecs.umich.edu case 0x7: 12717435Sgblack@eecs.umich.edu if (u) { 12727435Sgblack@eecs.umich.edu return new Unknown(machInst); 12737435Sgblack@eecs.umich.edu } else { 12747639Sgblack@eecs.umich.edu switch (size) { 12757639Sgblack@eecs.umich.edu case 1: 12767639Sgblack@eecs.umich.edu return new Vqdmlsls<int16_t>(machInst, vd, vn, vm, index); 12777639Sgblack@eecs.umich.edu case 2: 12787639Sgblack@eecs.umich.edu return new Vqdmlsls<int32_t>(machInst, vd, vn, vm, index); 12797639Sgblack@eecs.umich.edu default: 12807639Sgblack@eecs.umich.edu return new Unknown(machInst); 12817639Sgblack@eecs.umich.edu } 12827435Sgblack@eecs.umich.edu } 12837435Sgblack@eecs.umich.edu case 0x8: 12847639Sgblack@eecs.umich.edu if (u) { 12857639Sgblack@eecs.umich.edu switch (size) { 12867639Sgblack@eecs.umich.edu case 1: 12877639Sgblack@eecs.umich.edu return new VmulsQ<uint16_t>(machInst, vd, vn, vm, index); 12887639Sgblack@eecs.umich.edu case 2: 12897639Sgblack@eecs.umich.edu return new VmulsQ<uint32_t>(machInst, vd, vn, vm, index); 12907639Sgblack@eecs.umich.edu default: 12917639Sgblack@eecs.umich.edu return new Unknown(machInst); 12927639Sgblack@eecs.umich.edu } 12937639Sgblack@eecs.umich.edu } else { 12947639Sgblack@eecs.umich.edu switch (size) { 12957639Sgblack@eecs.umich.edu case 1: 12967639Sgblack@eecs.umich.edu return new VmulsD<uint16_t>(machInst, vd, vn, vm, index); 12977639Sgblack@eecs.umich.edu case 2: 12987639Sgblack@eecs.umich.edu return new VmulsD<uint32_t>(machInst, vd, vn, vm, index); 12997639Sgblack@eecs.umich.edu default: 13007639Sgblack@eecs.umich.edu return new Unknown(machInst); 13017639Sgblack@eecs.umich.edu } 13027639Sgblack@eecs.umich.edu } 13037435Sgblack@eecs.umich.edu case 0x9: 13047639Sgblack@eecs.umich.edu if (u) 13057639Sgblack@eecs.umich.edu return new VmulsQFp<float>(machInst, vd, vn, vm, index); 13067639Sgblack@eecs.umich.edu else 13077639Sgblack@eecs.umich.edu return new VmulsDFp<float>(machInst, vd, vn, vm, index); 13087435Sgblack@eecs.umich.edu case 0xa: 13097639Sgblack@eecs.umich.edu if (u) { 13107639Sgblack@eecs.umich.edu switch (size) { 13117639Sgblack@eecs.umich.edu case 1: 13127639Sgblack@eecs.umich.edu return new Vmulls<uint16_t>(machInst, vd, vn, vm, index); 13137639Sgblack@eecs.umich.edu case 2: 13147639Sgblack@eecs.umich.edu return new Vmulls<uint32_t>(machInst, vd, vn, vm, index); 13157639Sgblack@eecs.umich.edu default: 13167639Sgblack@eecs.umich.edu return new Unknown(machInst); 13177639Sgblack@eecs.umich.edu } 13187639Sgblack@eecs.umich.edu } else { 13197639Sgblack@eecs.umich.edu switch (size) { 13207639Sgblack@eecs.umich.edu case 1: 13217639Sgblack@eecs.umich.edu return new Vmulls<int16_t>(machInst, vd, vn, vm, index); 13227639Sgblack@eecs.umich.edu case 2: 13237639Sgblack@eecs.umich.edu return new Vmulls<int32_t>(machInst, vd, vn, vm, index); 13247639Sgblack@eecs.umich.edu default: 13257639Sgblack@eecs.umich.edu return new Unknown(machInst); 13267639Sgblack@eecs.umich.edu } 13277639Sgblack@eecs.umich.edu } 13287435Sgblack@eecs.umich.edu case 0xb: 13297435Sgblack@eecs.umich.edu if (u) { 13307435Sgblack@eecs.umich.edu return new Unknown(machInst); 13317435Sgblack@eecs.umich.edu } else { 13327639Sgblack@eecs.umich.edu if (u) { 13337639Sgblack@eecs.umich.edu switch (size) { 13347639Sgblack@eecs.umich.edu case 1: 13357639Sgblack@eecs.umich.edu return new Vqdmulls<uint16_t>( 13367639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13377639Sgblack@eecs.umich.edu case 2: 13387639Sgblack@eecs.umich.edu return new Vqdmulls<uint32_t>( 13397639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13407639Sgblack@eecs.umich.edu default: 13417639Sgblack@eecs.umich.edu return new Unknown(machInst); 13427639Sgblack@eecs.umich.edu } 13437639Sgblack@eecs.umich.edu } else { 13447639Sgblack@eecs.umich.edu switch (size) { 13457639Sgblack@eecs.umich.edu case 1: 13467639Sgblack@eecs.umich.edu return new Vqdmulls<int16_t>( 13477639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13487639Sgblack@eecs.umich.edu case 2: 13497639Sgblack@eecs.umich.edu return new Vqdmulls<int32_t>( 13507639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13517639Sgblack@eecs.umich.edu default: 13527639Sgblack@eecs.umich.edu return new Unknown(machInst); 13537639Sgblack@eecs.umich.edu } 13547639Sgblack@eecs.umich.edu } 13557435Sgblack@eecs.umich.edu } 13567435Sgblack@eecs.umich.edu case 0xc: 13577639Sgblack@eecs.umich.edu if (u) { 13587639Sgblack@eecs.umich.edu switch (size) { 13597639Sgblack@eecs.umich.edu case 1: 13607639Sgblack@eecs.umich.edu return new VqdmulhsQ<int16_t>( 13617639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13627639Sgblack@eecs.umich.edu case 2: 13637639Sgblack@eecs.umich.edu return new VqdmulhsQ<int32_t>( 13647639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13657639Sgblack@eecs.umich.edu default: 13667639Sgblack@eecs.umich.edu return new Unknown(machInst); 13677639Sgblack@eecs.umich.edu } 13687639Sgblack@eecs.umich.edu } else { 13697639Sgblack@eecs.umich.edu switch (size) { 13707639Sgblack@eecs.umich.edu case 1: 13717639Sgblack@eecs.umich.edu return new VqdmulhsD<int16_t>( 13727639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13737639Sgblack@eecs.umich.edu case 2: 13747639Sgblack@eecs.umich.edu return new VqdmulhsD<int32_t>( 13757639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13767639Sgblack@eecs.umich.edu default: 13777639Sgblack@eecs.umich.edu return new Unknown(machInst); 13787639Sgblack@eecs.umich.edu } 13797639Sgblack@eecs.umich.edu } 13807435Sgblack@eecs.umich.edu case 0xd: 13817639Sgblack@eecs.umich.edu if (u) { 13827639Sgblack@eecs.umich.edu switch (size) { 13837639Sgblack@eecs.umich.edu case 1: 13847639Sgblack@eecs.umich.edu return new VqrdmulhsQ<int16_t>( 13857639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13867639Sgblack@eecs.umich.edu case 2: 13877639Sgblack@eecs.umich.edu return new VqrdmulhsQ<int32_t>( 13887639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13897639Sgblack@eecs.umich.edu default: 13907639Sgblack@eecs.umich.edu return new Unknown(machInst); 13917639Sgblack@eecs.umich.edu } 13927639Sgblack@eecs.umich.edu } else { 13937639Sgblack@eecs.umich.edu switch (size) { 13947639Sgblack@eecs.umich.edu case 1: 13957639Sgblack@eecs.umich.edu return new VqrdmulhsD<int16_t>( 13967639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 13977639Sgblack@eecs.umich.edu case 2: 13987639Sgblack@eecs.umich.edu return new VqrdmulhsD<int32_t>( 13997639Sgblack@eecs.umich.edu machInst, vd, vn, vm, index); 14007639Sgblack@eecs.umich.edu default: 14017639Sgblack@eecs.umich.edu return new Unknown(machInst); 14027639Sgblack@eecs.umich.edu } 14037639Sgblack@eecs.umich.edu } 14047435Sgblack@eecs.umich.edu } 14057435Sgblack@eecs.umich.edu return new Unknown(machInst); 14067435Sgblack@eecs.umich.edu } 14077435Sgblack@eecs.umich.edu 14087435Sgblack@eecs.umich.edu static StaticInstPtr 14097435Sgblack@eecs.umich.edu decodeNeonTwoRegMisc(ExtMachInst machInst) 14107435Sgblack@eecs.umich.edu { 141113977Sciro.santilli@arm.com const uint32_t opc1 = bits(machInst, 17, 16); 14127435Sgblack@eecs.umich.edu const uint32_t b = bits(machInst, 10, 6); 14137639Sgblack@eecs.umich.edu const bool q = bits(machInst, 6); 14147639Sgblack@eecs.umich.edu const IntRegIndex vd = 14157639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 15, 12) | 14167639Sgblack@eecs.umich.edu (bits(machInst, 22) << 4))); 14177639Sgblack@eecs.umich.edu const IntRegIndex vm = 14187639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 3, 0) | 14197639Sgblack@eecs.umich.edu (bits(machInst, 5) << 4))); 14207639Sgblack@eecs.umich.edu const unsigned size = bits(machInst, 19, 18); 142113977Sciro.santilli@arm.com switch (opc1) { 14227435Sgblack@eecs.umich.edu case 0x0: 14237435Sgblack@eecs.umich.edu switch (bits(b, 4, 1)) { 14247435Sgblack@eecs.umich.edu case 0x0: 14257639Sgblack@eecs.umich.edu switch (size) { 14267639Sgblack@eecs.umich.edu case 0: 14277639Sgblack@eecs.umich.edu if (q) { 14287639Sgblack@eecs.umich.edu return new NVrev64Q<uint8_t>(machInst, vd, vm); 14297639Sgblack@eecs.umich.edu } else { 14307639Sgblack@eecs.umich.edu return new NVrev64D<uint8_t>(machInst, vd, vm); 14317639Sgblack@eecs.umich.edu } 14327639Sgblack@eecs.umich.edu case 1: 14337639Sgblack@eecs.umich.edu if (q) { 14347639Sgblack@eecs.umich.edu return new NVrev64Q<uint16_t>(machInst, vd, vm); 14357639Sgblack@eecs.umich.edu } else { 14367639Sgblack@eecs.umich.edu return new NVrev64D<uint16_t>(machInst, vd, vm); 14377639Sgblack@eecs.umich.edu } 14387639Sgblack@eecs.umich.edu case 2: 14397639Sgblack@eecs.umich.edu if (q) { 14407639Sgblack@eecs.umich.edu return new NVrev64Q<uint32_t>(machInst, vd, vm); 14417639Sgblack@eecs.umich.edu } else { 14427639Sgblack@eecs.umich.edu return new NVrev64D<uint32_t>(machInst, vd, vm); 14437639Sgblack@eecs.umich.edu } 14447639Sgblack@eecs.umich.edu default: 14457639Sgblack@eecs.umich.edu return new Unknown(machInst); 14467639Sgblack@eecs.umich.edu } 14477435Sgblack@eecs.umich.edu case 0x1: 14487639Sgblack@eecs.umich.edu switch (size) { 14497639Sgblack@eecs.umich.edu case 0: 14507639Sgblack@eecs.umich.edu if (q) { 14517639Sgblack@eecs.umich.edu return new NVrev32Q<uint8_t>(machInst, vd, vm); 14527639Sgblack@eecs.umich.edu } else { 14537639Sgblack@eecs.umich.edu return new NVrev32D<uint8_t>(machInst, vd, vm); 14547639Sgblack@eecs.umich.edu } 14557639Sgblack@eecs.umich.edu case 1: 14567639Sgblack@eecs.umich.edu if (q) { 14577639Sgblack@eecs.umich.edu return new NVrev32Q<uint16_t>(machInst, vd, vm); 14587639Sgblack@eecs.umich.edu } else { 14597639Sgblack@eecs.umich.edu return new NVrev32D<uint16_t>(machInst, vd, vm); 14607639Sgblack@eecs.umich.edu } 14617639Sgblack@eecs.umich.edu default: 14627639Sgblack@eecs.umich.edu return new Unknown(machInst); 14637639Sgblack@eecs.umich.edu } 14647435Sgblack@eecs.umich.edu case 0x2: 14657639Sgblack@eecs.umich.edu if (size != 0) { 14667639Sgblack@eecs.umich.edu return new Unknown(machInst); 14677639Sgblack@eecs.umich.edu } else if (q) { 14687639Sgblack@eecs.umich.edu return new NVrev16Q<uint8_t>(machInst, vd, vm); 14697639Sgblack@eecs.umich.edu } else { 14707639Sgblack@eecs.umich.edu return new NVrev16D<uint8_t>(machInst, vd, vm); 14717639Sgblack@eecs.umich.edu } 14727435Sgblack@eecs.umich.edu case 0x4: 14737639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscSReg<NVpaddlD, NVpaddlQ>( 14747639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 14757435Sgblack@eecs.umich.edu case 0x5: 14767639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscSReg<NVpaddlD, NVpaddlQ>( 14777639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 147813169Smatt.horsnell@arm.com case 0x6: 147913169Smatt.horsnell@arm.com if (q == 0) { 148013169Smatt.horsnell@arm.com return new AESE(machInst, vd, vd, vm); 148113169Smatt.horsnell@arm.com } else { 148213169Smatt.horsnell@arm.com return new AESD(machInst, vd, vd, vm); 148313169Smatt.horsnell@arm.com } 148413169Smatt.horsnell@arm.com case 0x7: 148513169Smatt.horsnell@arm.com if (q == 0) { 148613169Smatt.horsnell@arm.com return new AESMC(machInst, vd, vm); 148713169Smatt.horsnell@arm.com } else { 148813169Smatt.horsnell@arm.com return new AESIMC(machInst, vd, vm); 148913169Smatt.horsnell@arm.com } 14907435Sgblack@eecs.umich.edu case 0x8: 14917639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVclsD, NVclsQ>( 14927639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 14937435Sgblack@eecs.umich.edu case 0x9: 14947639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVclzD, NVclzQ>( 14957639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 14967435Sgblack@eecs.umich.edu case 0xa: 14977639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscReg<NVcntD, NVcntQ>( 14987639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 14997435Sgblack@eecs.umich.edu case 0xb: 15007639Sgblack@eecs.umich.edu if (q) 15017639Sgblack@eecs.umich.edu return new NVmvnQ<uint64_t>(machInst, vd, vm); 15027639Sgblack@eecs.umich.edu else 15037639Sgblack@eecs.umich.edu return new NVmvnD<uint64_t>(machInst, vd, vm); 15047435Sgblack@eecs.umich.edu case 0xc: 15057639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscSReg<NVpadalD, NVpadalQ>( 15067639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15077435Sgblack@eecs.umich.edu case 0xd: 15087639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscSReg<NVpadalD, NVpadalQ>( 15097639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15107435Sgblack@eecs.umich.edu case 0xe: 15117639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVqabsD, NVqabsQ>( 15127639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15137435Sgblack@eecs.umich.edu case 0xf: 15147639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVqnegD, NVqnegQ>( 15157639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15167435Sgblack@eecs.umich.edu default: 15177435Sgblack@eecs.umich.edu return new Unknown(machInst); 15187435Sgblack@eecs.umich.edu } 15197435Sgblack@eecs.umich.edu case 0x1: 15207435Sgblack@eecs.umich.edu switch (bits(b, 3, 1)) { 15217435Sgblack@eecs.umich.edu case 0x0: 15227639Sgblack@eecs.umich.edu if (bits(b, 4)) { 15237639Sgblack@eecs.umich.edu if (q) { 15247639Sgblack@eecs.umich.edu return new NVcgtQFp<float>(machInst, vd, vm); 15257639Sgblack@eecs.umich.edu } else { 15267639Sgblack@eecs.umich.edu return new NVcgtDFp<float>(machInst, vd, vm); 15277639Sgblack@eecs.umich.edu } 15287639Sgblack@eecs.umich.edu } else { 15297639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVcgtD, NVcgtQ>( 15307639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15317639Sgblack@eecs.umich.edu } 15327435Sgblack@eecs.umich.edu case 0x1: 15337639Sgblack@eecs.umich.edu if (bits(b, 4)) { 15347639Sgblack@eecs.umich.edu if (q) { 15357639Sgblack@eecs.umich.edu return new NVcgeQFp<float>(machInst, vd, vm); 15367639Sgblack@eecs.umich.edu } else { 15377639Sgblack@eecs.umich.edu return new NVcgeDFp<float>(machInst, vd, vm); 15387639Sgblack@eecs.umich.edu } 15397639Sgblack@eecs.umich.edu } else { 15407639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVcgeD, NVcgeQ>( 15417639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15427639Sgblack@eecs.umich.edu } 15437435Sgblack@eecs.umich.edu case 0x2: 15447639Sgblack@eecs.umich.edu if (bits(b, 4)) { 15457639Sgblack@eecs.umich.edu if (q) { 15467639Sgblack@eecs.umich.edu return new NVceqQFp<float>(machInst, vd, vm); 15477639Sgblack@eecs.umich.edu } else { 15487639Sgblack@eecs.umich.edu return new NVceqDFp<float>(machInst, vd, vm); 15497639Sgblack@eecs.umich.edu } 15507639Sgblack@eecs.umich.edu } else { 15517639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVceqD, NVceqQ>( 15527639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15537639Sgblack@eecs.umich.edu } 15547435Sgblack@eecs.umich.edu case 0x3: 15557639Sgblack@eecs.umich.edu if (bits(b, 4)) { 15567639Sgblack@eecs.umich.edu if (q) { 15577639Sgblack@eecs.umich.edu return new NVcleQFp<float>(machInst, vd, vm); 15587639Sgblack@eecs.umich.edu } else { 15597639Sgblack@eecs.umich.edu return new NVcleDFp<float>(machInst, vd, vm); 15607639Sgblack@eecs.umich.edu } 15617639Sgblack@eecs.umich.edu } else { 15627639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVcleD, NVcleQ>( 15637639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15647639Sgblack@eecs.umich.edu } 15657435Sgblack@eecs.umich.edu case 0x4: 15667639Sgblack@eecs.umich.edu if (bits(b, 4)) { 15677639Sgblack@eecs.umich.edu if (q) { 15687639Sgblack@eecs.umich.edu return new NVcltQFp<float>(machInst, vd, vm); 15697639Sgblack@eecs.umich.edu } else { 15707639Sgblack@eecs.umich.edu return new NVcltDFp<float>(machInst, vd, vm); 15717639Sgblack@eecs.umich.edu } 15727639Sgblack@eecs.umich.edu } else { 15737639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVcltD, NVcltQ>( 15747639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15757639Sgblack@eecs.umich.edu } 157613168Smatt.horsnell@arm.com case 0x5: 157713168Smatt.horsnell@arm.com if (q) { 157813168Smatt.horsnell@arm.com return new SHA1H(machInst, vd, vm); 157913168Smatt.horsnell@arm.com } else { 158013168Smatt.horsnell@arm.com return new Unknown(machInst); 158113168Smatt.horsnell@arm.com } 15827435Sgblack@eecs.umich.edu case 0x6: 15837639Sgblack@eecs.umich.edu if (bits(machInst, 10)) { 15847639Sgblack@eecs.umich.edu if (q) 15857639Sgblack@eecs.umich.edu return new NVabsQFp<float>(machInst, vd, vm); 15867639Sgblack@eecs.umich.edu else 15877639Sgblack@eecs.umich.edu return new NVabsDFp<float>(machInst, vd, vm); 15887639Sgblack@eecs.umich.edu } else { 15897639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVabsD, NVabsQ>( 15907639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 15917639Sgblack@eecs.umich.edu } 15927435Sgblack@eecs.umich.edu case 0x7: 15937639Sgblack@eecs.umich.edu if (bits(machInst, 10)) { 15947639Sgblack@eecs.umich.edu if (q) 15957639Sgblack@eecs.umich.edu return new NVnegQFp<float>(machInst, vd, vm); 15967639Sgblack@eecs.umich.edu else 15977639Sgblack@eecs.umich.edu return new NVnegDFp<float>(machInst, vd, vm); 15987639Sgblack@eecs.umich.edu } else { 15997639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscReg<NVnegD, NVnegQ>( 16007639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 16017639Sgblack@eecs.umich.edu } 160212595Ssiddhesh.poyarekar@gmail.com default: 160312595Ssiddhesh.poyarekar@gmail.com return new Unknown64(machInst); 16047435Sgblack@eecs.umich.edu } 16057435Sgblack@eecs.umich.edu case 0x2: 16067435Sgblack@eecs.umich.edu switch (bits(b, 4, 1)) { 16077435Sgblack@eecs.umich.edu case 0x0: 16087639Sgblack@eecs.umich.edu if (q) 16097639Sgblack@eecs.umich.edu return new NVswpQ<uint64_t>(machInst, vd, vm); 16107639Sgblack@eecs.umich.edu else 16117639Sgblack@eecs.umich.edu return new NVswpD<uint64_t>(machInst, vd, vm); 16127435Sgblack@eecs.umich.edu case 0x1: 16138607Sgblack@eecs.umich.edu return decodeNeonUTwoMiscSReg<NVtrnD, NVtrnQ>( 16147639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 16157435Sgblack@eecs.umich.edu case 0x2: 16167639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscReg<NVuzpD, NVuzpQ>( 16177639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 16187435Sgblack@eecs.umich.edu case 0x3: 16197639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscReg<NVzipD, NVzipQ>( 16207639Sgblack@eecs.umich.edu q, size, machInst, vd, vm); 16217435Sgblack@eecs.umich.edu case 0x4: 16227435Sgblack@eecs.umich.edu if (b == 0x8) { 16237639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscUSReg<NVmovn>( 16247639Sgblack@eecs.umich.edu size, machInst, vd, vm); 16257435Sgblack@eecs.umich.edu } else { 16267639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscUSReg<NVqmovuns>( 16277639Sgblack@eecs.umich.edu size, machInst, vd, vm); 16287435Sgblack@eecs.umich.edu } 16297435Sgblack@eecs.umich.edu case 0x5: 16307639Sgblack@eecs.umich.edu if (q) { 16317639Sgblack@eecs.umich.edu return decodeNeonUTwoMiscUSReg<NVqmovun>( 16327639Sgblack@eecs.umich.edu size, machInst, vd, vm); 16337639Sgblack@eecs.umich.edu } else { 16347639Sgblack@eecs.umich.edu return decodeNeonSTwoMiscUSReg<NVqmovn>( 16357639Sgblack@eecs.umich.edu size, machInst, vd, vm); 16367639Sgblack@eecs.umich.edu } 16377435Sgblack@eecs.umich.edu case 0x6: 16387435Sgblack@eecs.umich.edu if (b == 0xc) { 16397639Sgblack@eecs.umich.edu return decodeNeonSTwoShiftUSReg<NVshll>( 16407639Sgblack@eecs.umich.edu size, machInst, vd, vm, 8 << size); 16417435Sgblack@eecs.umich.edu } else { 16427435Sgblack@eecs.umich.edu return new Unknown(machInst); 16437435Sgblack@eecs.umich.edu } 164413168Smatt.horsnell@arm.com case 0x7: 164513168Smatt.horsnell@arm.com if (q) { 164613168Smatt.horsnell@arm.com return new SHA256SU0(machInst, vd, vm); 164713168Smatt.horsnell@arm.com } else { 164813168Smatt.horsnell@arm.com return new SHA1SU1(machInst, vd, vm); 164913168Smatt.horsnell@arm.com } 16507435Sgblack@eecs.umich.edu case 0xc: 16517435Sgblack@eecs.umich.edu case 0xe: 16527435Sgblack@eecs.umich.edu if (b == 0x18) { 16537639Sgblack@eecs.umich.edu if (size != 1 || (vm % 2)) 16547639Sgblack@eecs.umich.edu return new Unknown(machInst); 16557639Sgblack@eecs.umich.edu return new NVcvts2h<uint16_t>(machInst, vd, vm); 16567435Sgblack@eecs.umich.edu } else if (b == 0x1c) { 16577639Sgblack@eecs.umich.edu if (size != 1 || (vd % 2)) 16587639Sgblack@eecs.umich.edu return new Unknown(machInst); 16597639Sgblack@eecs.umich.edu return new NVcvth2s<uint16_t>(machInst, vd, vm); 16607435Sgblack@eecs.umich.edu } else { 16617435Sgblack@eecs.umich.edu return new Unknown(machInst); 16627435Sgblack@eecs.umich.edu } 16637435Sgblack@eecs.umich.edu default: 16647435Sgblack@eecs.umich.edu return new Unknown(machInst); 16657435Sgblack@eecs.umich.edu } 16667435Sgblack@eecs.umich.edu case 0x3: 16677435Sgblack@eecs.umich.edu if (bits(b, 4, 3) == 0x3) { 16687639Sgblack@eecs.umich.edu if ((q && (vd % 2 || vm % 2)) || size != 2) { 16697639Sgblack@eecs.umich.edu return new Unknown(machInst); 16707639Sgblack@eecs.umich.edu } else { 16717639Sgblack@eecs.umich.edu if (bits(b, 2)) { 16727639Sgblack@eecs.umich.edu if (bits(b, 1)) { 16737639Sgblack@eecs.umich.edu if (q) { 16747639Sgblack@eecs.umich.edu return new NVcvt2ufxQ<float>( 16757639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 16767639Sgblack@eecs.umich.edu } else { 16777639Sgblack@eecs.umich.edu return new NVcvt2ufxD<float>( 16787639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 16797639Sgblack@eecs.umich.edu } 16807639Sgblack@eecs.umich.edu } else { 16817639Sgblack@eecs.umich.edu if (q) { 16827639Sgblack@eecs.umich.edu return new NVcvt2sfxQ<float>( 16837639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 16847639Sgblack@eecs.umich.edu } else { 16857639Sgblack@eecs.umich.edu return new NVcvt2sfxD<float>( 16867639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 16877639Sgblack@eecs.umich.edu } 16887639Sgblack@eecs.umich.edu } 16897639Sgblack@eecs.umich.edu } else { 16907639Sgblack@eecs.umich.edu if (bits(b, 1)) { 16917639Sgblack@eecs.umich.edu if (q) { 16927639Sgblack@eecs.umich.edu return new NVcvtu2fpQ<float>( 16937639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 16947639Sgblack@eecs.umich.edu } else { 16957639Sgblack@eecs.umich.edu return new NVcvtu2fpD<float>( 16967639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 16977639Sgblack@eecs.umich.edu } 16987639Sgblack@eecs.umich.edu } else { 16997639Sgblack@eecs.umich.edu if (q) { 17007639Sgblack@eecs.umich.edu return new NVcvts2fpQ<float>( 17017639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 17027639Sgblack@eecs.umich.edu } else { 17037639Sgblack@eecs.umich.edu return new NVcvts2fpD<float>( 17047639Sgblack@eecs.umich.edu machInst, vd, vm, 0); 17057639Sgblack@eecs.umich.edu } 17067639Sgblack@eecs.umich.edu } 17077639Sgblack@eecs.umich.edu } 17087639Sgblack@eecs.umich.edu } 17097435Sgblack@eecs.umich.edu } else if ((b & 0x1a) == 0x10) { 17107639Sgblack@eecs.umich.edu if (bits(b, 2)) { 17117639Sgblack@eecs.umich.edu if (q) { 17127639Sgblack@eecs.umich.edu return new NVrecpeQFp<float>(machInst, vd, vm); 17137639Sgblack@eecs.umich.edu } else { 17147639Sgblack@eecs.umich.edu return new NVrecpeDFp<float>(machInst, vd, vm); 17157639Sgblack@eecs.umich.edu } 17167639Sgblack@eecs.umich.edu } else { 17177639Sgblack@eecs.umich.edu if (q) { 17187639Sgblack@eecs.umich.edu return new NVrecpeQ<uint32_t>(machInst, vd, vm); 17197639Sgblack@eecs.umich.edu } else { 17207639Sgblack@eecs.umich.edu return new NVrecpeD<uint32_t>(machInst, vd, vm); 17217639Sgblack@eecs.umich.edu } 17227639Sgblack@eecs.umich.edu } 17237435Sgblack@eecs.umich.edu } else if ((b & 0x1a) == 0x12) { 17247639Sgblack@eecs.umich.edu if (bits(b, 2)) { 17257639Sgblack@eecs.umich.edu if (q) { 17267639Sgblack@eecs.umich.edu return new NVrsqrteQFp<float>(machInst, vd, vm); 17277639Sgblack@eecs.umich.edu } else { 17287639Sgblack@eecs.umich.edu return new NVrsqrteDFp<float>(machInst, vd, vm); 17297639Sgblack@eecs.umich.edu } 17307639Sgblack@eecs.umich.edu } else { 17317639Sgblack@eecs.umich.edu if (q) { 17327639Sgblack@eecs.umich.edu return new NVrsqrteQ<uint32_t>(machInst, vd, vm); 17337639Sgblack@eecs.umich.edu } else { 17347639Sgblack@eecs.umich.edu return new NVrsqrteD<uint32_t>(machInst, vd, vm); 17357639Sgblack@eecs.umich.edu } 17367639Sgblack@eecs.umich.edu } 17377435Sgblack@eecs.umich.edu } else { 17387435Sgblack@eecs.umich.edu return new Unknown(machInst); 17397435Sgblack@eecs.umich.edu } 17407435Sgblack@eecs.umich.edu } 17417435Sgblack@eecs.umich.edu return new Unknown(machInst); 17427435Sgblack@eecs.umich.edu } 17437435Sgblack@eecs.umich.edu 17447435Sgblack@eecs.umich.edu StaticInstPtr 17457435Sgblack@eecs.umich.edu decodeNeonData(ExtMachInst machInst) 17467435Sgblack@eecs.umich.edu { 17477435Sgblack@eecs.umich.edu const bool u = THUMB ? bits(machInst, 28) : bits(machInst, 24); 17487435Sgblack@eecs.umich.edu const uint32_t a = bits(machInst, 23, 19); 174913977Sciro.santilli@arm.com const uint32_t q = bits(machInst, 11, 8); 17507435Sgblack@eecs.umich.edu const uint32_t c = bits(machInst, 7, 4); 17517435Sgblack@eecs.umich.edu if (bits(a, 4) == 0) { 17527435Sgblack@eecs.umich.edu return decodeNeonThreeRegistersSameLength(machInst); 17537435Sgblack@eecs.umich.edu } else if ((c & 0x9) == 1) { 17547435Sgblack@eecs.umich.edu if ((a & 0x7) == 0) { 17557435Sgblack@eecs.umich.edu return decodeNeonOneRegModImm(machInst); 17567435Sgblack@eecs.umich.edu } else { 17577435Sgblack@eecs.umich.edu return decodeNeonTwoRegAndShift(machInst); 17587435Sgblack@eecs.umich.edu } 17597435Sgblack@eecs.umich.edu } else if ((c & 0x9) == 9) { 17607435Sgblack@eecs.umich.edu return decodeNeonTwoRegAndShift(machInst); 17617639Sgblack@eecs.umich.edu } else if (bits(a, 2, 1) != 0x3) { 17627639Sgblack@eecs.umich.edu if ((c & 0x5) == 0) { 17637435Sgblack@eecs.umich.edu return decodeNeonThreeRegDiffLengths(machInst); 17647639Sgblack@eecs.umich.edu } else if ((c & 0x5) == 4) { 17657435Sgblack@eecs.umich.edu return decodeNeonTwoRegScalar(machInst); 17667435Sgblack@eecs.umich.edu } 17677435Sgblack@eecs.umich.edu } else if ((a & 0x16) == 0x16) { 17687639Sgblack@eecs.umich.edu const IntRegIndex vd = 17697639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 15, 12) | 17707639Sgblack@eecs.umich.edu (bits(machInst, 22) << 4))); 17717639Sgblack@eecs.umich.edu const IntRegIndex vn = 17727639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 19, 16) | 17737639Sgblack@eecs.umich.edu (bits(machInst, 7) << 4))); 17747639Sgblack@eecs.umich.edu const IntRegIndex vm = 17757639Sgblack@eecs.umich.edu (IntRegIndex)(2 * (bits(machInst, 3, 0) | 17767639Sgblack@eecs.umich.edu (bits(machInst, 5) << 4))); 17777435Sgblack@eecs.umich.edu if (!u) { 17787435Sgblack@eecs.umich.edu if (bits(c, 0) == 0) { 17797639Sgblack@eecs.umich.edu unsigned imm4 = bits(machInst, 11, 8); 17807639Sgblack@eecs.umich.edu bool q = bits(machInst, 6); 17817639Sgblack@eecs.umich.edu if (imm4 >= 16 && !q) 17827639Sgblack@eecs.umich.edu return new Unknown(machInst); 17837639Sgblack@eecs.umich.edu if (q) { 17847639Sgblack@eecs.umich.edu return new NVextQ<uint8_t>(machInst, vd, vn, vm, imm4); 17857639Sgblack@eecs.umich.edu } else { 17867639Sgblack@eecs.umich.edu return new NVextD<uint8_t>(machInst, vd, vn, vm, imm4); 17877639Sgblack@eecs.umich.edu } 17887435Sgblack@eecs.umich.edu } 178913977Sciro.santilli@arm.com } else if (bits(q, 3) == 0 && bits(c, 0) == 0) { 17907435Sgblack@eecs.umich.edu return decodeNeonTwoRegMisc(machInst); 179113977Sciro.santilli@arm.com } else if (bits(q, 3, 2) == 0x2 && bits(c, 0) == 0) { 17927639Sgblack@eecs.umich.edu unsigned length = bits(machInst, 9, 8) + 1; 17937639Sgblack@eecs.umich.edu if ((uint32_t)vn / 2 + length > 32) 17947639Sgblack@eecs.umich.edu return new Unknown(machInst); 17957435Sgblack@eecs.umich.edu if (bits(machInst, 6) == 0) { 17967639Sgblack@eecs.umich.edu switch (length) { 17977639Sgblack@eecs.umich.edu case 1: 17987639Sgblack@eecs.umich.edu return new NVtbl1(machInst, vd, vn, vm); 17997639Sgblack@eecs.umich.edu case 2: 18007639Sgblack@eecs.umich.edu return new NVtbl2(machInst, vd, vn, vm); 18017639Sgblack@eecs.umich.edu case 3: 18027639Sgblack@eecs.umich.edu return new NVtbl3(machInst, vd, vn, vm); 18037639Sgblack@eecs.umich.edu case 4: 18047639Sgblack@eecs.umich.edu return new NVtbl4(machInst, vd, vn, vm); 18057639Sgblack@eecs.umich.edu } 18067435Sgblack@eecs.umich.edu } else { 18077639Sgblack@eecs.umich.edu switch (length) { 18087639Sgblack@eecs.umich.edu case 1: 18097639Sgblack@eecs.umich.edu return new NVtbx1(machInst, vd, vn, vm); 18107639Sgblack@eecs.umich.edu case 2: 18117639Sgblack@eecs.umich.edu return new NVtbx2(machInst, vd, vn, vm); 18127639Sgblack@eecs.umich.edu case 3: 18137639Sgblack@eecs.umich.edu return new NVtbx3(machInst, vd, vn, vm); 18147639Sgblack@eecs.umich.edu case 4: 18157639Sgblack@eecs.umich.edu return new NVtbx4(machInst, vd, vn, vm); 18167639Sgblack@eecs.umich.edu } 18177435Sgblack@eecs.umich.edu } 181813977Sciro.santilli@arm.com } else if (q == 0xc && (c & 0x9) == 0) { 18197639Sgblack@eecs.umich.edu unsigned imm4 = bits(machInst, 19, 16); 18207639Sgblack@eecs.umich.edu if (bits(imm4, 2, 0) == 0) 18217639Sgblack@eecs.umich.edu return new Unknown(machInst); 18227639Sgblack@eecs.umich.edu unsigned size = 0; 18237639Sgblack@eecs.umich.edu while ((imm4 & 0x1) == 0) { 18247639Sgblack@eecs.umich.edu size++; 18257639Sgblack@eecs.umich.edu imm4 >>= 1; 18267639Sgblack@eecs.umich.edu } 18277639Sgblack@eecs.umich.edu unsigned index = imm4 >> 1; 18287639Sgblack@eecs.umich.edu const bool q = bits(machInst, 6); 18297639Sgblack@eecs.umich.edu return decodeNeonUTwoShiftSReg<NVdupD, NVdupQ>( 18307639Sgblack@eecs.umich.edu q, size, machInst, vd, vm, index); 18317435Sgblack@eecs.umich.edu } 18327435Sgblack@eecs.umich.edu } 18337435Sgblack@eecs.umich.edu return new Unknown(machInst); 18347435Sgblack@eecs.umich.edu } 18357435Sgblack@eecs.umich.edu ''' 18367435Sgblack@eecs.umich.edu}}; 18377435Sgblack@eecs.umich.edu 18387435Sgblack@eecs.umich.edudef format ThumbNeonMem() {{ 18397435Sgblack@eecs.umich.edu decode_block = ''' 18407435Sgblack@eecs.umich.edu return decodeNeonMem(machInst); 18417435Sgblack@eecs.umich.edu ''' 18427435Sgblack@eecs.umich.edu}}; 18437435Sgblack@eecs.umich.edu 18447435Sgblack@eecs.umich.edudef format ThumbNeonData() {{ 18457435Sgblack@eecs.umich.edu decode_block = ''' 18467639Sgblack@eecs.umich.edu return decodeNeonData(machInst); 18477435Sgblack@eecs.umich.edu ''' 18487435Sgblack@eecs.umich.edu}}; 18497435Sgblack@eecs.umich.edu 18507435Sgblack@eecs.umich.edulet {{ 18517435Sgblack@eecs.umich.edu header_output = ''' 18527435Sgblack@eecs.umich.edu StaticInstPtr 18537356Sgblack@eecs.umich.edu decodeExtensionRegLoadStore(ExtMachInst machInst); 18547356Sgblack@eecs.umich.edu ''' 18557356Sgblack@eecs.umich.edu decoder_output = ''' 18567356Sgblack@eecs.umich.edu StaticInstPtr 18577356Sgblack@eecs.umich.edu decodeExtensionRegLoadStore(ExtMachInst machInst) 18587178Sgblack@eecs.umich.edu { 18597178Sgblack@eecs.umich.edu const uint32_t opcode = bits(machInst, 24, 20); 18607178Sgblack@eecs.umich.edu const uint32_t offset = bits(machInst, 7, 0); 18617337Sgblack@eecs.umich.edu const bool single = (bits(machInst, 8) == 0); 18627178Sgblack@eecs.umich.edu const IntRegIndex rn = (IntRegIndex)(uint32_t)bits(machInst, 19, 16); 18637178Sgblack@eecs.umich.edu RegIndex vd; 18647178Sgblack@eecs.umich.edu if (single) { 18657178Sgblack@eecs.umich.edu vd = (RegIndex)(uint32_t)((bits(machInst, 15, 12) << 1) | 18667178Sgblack@eecs.umich.edu bits(machInst, 22)); 18677178Sgblack@eecs.umich.edu } else { 18687178Sgblack@eecs.umich.edu vd = (RegIndex)(uint32_t)((bits(machInst, 15, 12) << 1) | 18697178Sgblack@eecs.umich.edu (bits(machInst, 22) << 5)); 18707178Sgblack@eecs.umich.edu } 18717178Sgblack@eecs.umich.edu switch (bits(opcode, 4, 3)) { 18727178Sgblack@eecs.umich.edu case 0x0: 18737335Sgblack@eecs.umich.edu if (bits(opcode, 4, 1) == 0x2 && 18747335Sgblack@eecs.umich.edu !(machInst.thumb == 1 && bits(machInst, 28) == 1) && 18757335Sgblack@eecs.umich.edu !(machInst.thumb == 0 && machInst.condCode == 0xf)) { 18767335Sgblack@eecs.umich.edu if ((bits(machInst, 7, 4) & 0xd) != 1) { 18777335Sgblack@eecs.umich.edu break; 18787335Sgblack@eecs.umich.edu } 18797335Sgblack@eecs.umich.edu const IntRegIndex rt = 18807335Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 15, 12); 18817335Sgblack@eecs.umich.edu const IntRegIndex rt2 = 18827335Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 19, 16); 18837335Sgblack@eecs.umich.edu const bool op = bits(machInst, 20); 18847335Sgblack@eecs.umich.edu uint32_t vm; 18857337Sgblack@eecs.umich.edu if (single) { 18867335Sgblack@eecs.umich.edu vm = (bits(machInst, 3, 0) << 1) | bits(machInst, 5); 18877335Sgblack@eecs.umich.edu } else { 18887335Sgblack@eecs.umich.edu vm = (bits(machInst, 3, 0) << 1) | 18897335Sgblack@eecs.umich.edu (bits(machInst, 5) << 5); 18907335Sgblack@eecs.umich.edu } 18917335Sgblack@eecs.umich.edu if (op) { 18927335Sgblack@eecs.umich.edu return new Vmov2Core2Reg(machInst, rt, rt2, 18937335Sgblack@eecs.umich.edu (IntRegIndex)vm); 18947335Sgblack@eecs.umich.edu } else { 18957335Sgblack@eecs.umich.edu return new Vmov2Reg2Core(machInst, (IntRegIndex)vm, 18967335Sgblack@eecs.umich.edu rt, rt2); 18977335Sgblack@eecs.umich.edu } 18987178Sgblack@eecs.umich.edu } 18997178Sgblack@eecs.umich.edu break; 19007178Sgblack@eecs.umich.edu case 0x1: 19017413Sgblack@eecs.umich.edu { 190210037SARM gem5 Developers if (offset == 0 || vd + offset/2 > NumFloatV7ArchRegs) { 19037413Sgblack@eecs.umich.edu break; 19047413Sgblack@eecs.umich.edu } 19057413Sgblack@eecs.umich.edu switch (bits(opcode, 1, 0)) { 19067413Sgblack@eecs.umich.edu case 0x0: 19077413Sgblack@eecs.umich.edu return new VLdmStm(machInst, rn, vd, single, 19087413Sgblack@eecs.umich.edu true, false, false, offset); 19097413Sgblack@eecs.umich.edu case 0x1: 19107413Sgblack@eecs.umich.edu return new VLdmStm(machInst, rn, vd, single, 19117413Sgblack@eecs.umich.edu true, false, true, offset); 19127413Sgblack@eecs.umich.edu case 0x2: 19137413Sgblack@eecs.umich.edu return new VLdmStm(machInst, rn, vd, single, 19147413Sgblack@eecs.umich.edu true, true, false, offset); 19157413Sgblack@eecs.umich.edu case 0x3: 19167413Sgblack@eecs.umich.edu // If rn == sp, then this is called vpop. 19177413Sgblack@eecs.umich.edu return new VLdmStm(machInst, rn, vd, single, 19187413Sgblack@eecs.umich.edu true, true, true, offset); 191912595Ssiddhesh.poyarekar@gmail.com default: 192012595Ssiddhesh.poyarekar@gmail.com M5_UNREACHABLE; 19217413Sgblack@eecs.umich.edu } 19227178Sgblack@eecs.umich.edu } 19237178Sgblack@eecs.umich.edu case 0x2: 19247178Sgblack@eecs.umich.edu if (bits(opcode, 1, 0) == 0x2) { 19257178Sgblack@eecs.umich.edu // If rn == sp, then this is called vpush. 19267178Sgblack@eecs.umich.edu return new VLdmStm(machInst, rn, vd, single, 19277178Sgblack@eecs.umich.edu false, true, false, offset); 19287178Sgblack@eecs.umich.edu } else if (bits(opcode, 1, 0) == 0x3) { 19297178Sgblack@eecs.umich.edu return new VLdmStm(machInst, rn, vd, single, 19307178Sgblack@eecs.umich.edu false, true, true, offset); 19317178Sgblack@eecs.umich.edu } 193212595Ssiddhesh.poyarekar@gmail.com M5_FALLTHROUGH; 19337178Sgblack@eecs.umich.edu case 0x3: 19347346Sgblack@eecs.umich.edu const bool up = (bits(machInst, 23) == 1); 19357346Sgblack@eecs.umich.edu const uint32_t imm = bits(machInst, 7, 0) << 2; 19367346Sgblack@eecs.umich.edu if (single) { 19377346Sgblack@eecs.umich.edu vd = (RegIndex)(uint32_t)((bits(machInst, 15, 12) << 1) | 19387346Sgblack@eecs.umich.edu (bits(machInst, 22))); 19397346Sgblack@eecs.umich.edu } else { 19407346Sgblack@eecs.umich.edu vd = (RegIndex)(uint32_t)((bits(machInst, 15, 12) << 1) | 19417346Sgblack@eecs.umich.edu (bits(machInst, 22) << 5)); 19427346Sgblack@eecs.umich.edu } 19437178Sgblack@eecs.umich.edu if (bits(opcode, 1, 0) == 0x0) { 19447346Sgblack@eecs.umich.edu if (single) { 19457346Sgblack@eecs.umich.edu if (up) { 19467346Sgblack@eecs.umich.edu return new %(vstr_us)s(machInst, vd, rn, up, imm); 19477346Sgblack@eecs.umich.edu } else { 19487346Sgblack@eecs.umich.edu return new %(vstr_s)s(machInst, vd, rn, up, imm); 19497346Sgblack@eecs.umich.edu } 19507346Sgblack@eecs.umich.edu } else { 19517346Sgblack@eecs.umich.edu if (up) { 19527346Sgblack@eecs.umich.edu return new %(vstr_ud)s(machInst, vd, vd + 1, 19537346Sgblack@eecs.umich.edu rn, up, imm); 19547346Sgblack@eecs.umich.edu } else { 19557346Sgblack@eecs.umich.edu return new %(vstr_d)s(machInst, vd, vd + 1, 19567346Sgblack@eecs.umich.edu rn, up, imm); 19577346Sgblack@eecs.umich.edu } 19587346Sgblack@eecs.umich.edu } 19597178Sgblack@eecs.umich.edu } else if (bits(opcode, 1, 0) == 0x1) { 19607337Sgblack@eecs.umich.edu if (single) { 19617337Sgblack@eecs.umich.edu if (up) { 19627337Sgblack@eecs.umich.edu return new %(vldr_us)s(machInst, vd, rn, up, imm); 19637337Sgblack@eecs.umich.edu } else { 19647337Sgblack@eecs.umich.edu return new %(vldr_s)s(machInst, vd, rn, up, imm); 19657337Sgblack@eecs.umich.edu } 19667337Sgblack@eecs.umich.edu } else { 19677337Sgblack@eecs.umich.edu if (up) { 19687337Sgblack@eecs.umich.edu return new %(vldr_ud)s(machInst, vd, vd + 1, 19697337Sgblack@eecs.umich.edu rn, up, imm); 19707337Sgblack@eecs.umich.edu } else { 19717337Sgblack@eecs.umich.edu return new %(vldr_d)s(machInst, vd, vd + 1, 19727337Sgblack@eecs.umich.edu rn, up, imm); 19737337Sgblack@eecs.umich.edu } 19747337Sgblack@eecs.umich.edu } 19757178Sgblack@eecs.umich.edu } 19767178Sgblack@eecs.umich.edu } 19777178Sgblack@eecs.umich.edu return new Unknown(machInst); 19787178Sgblack@eecs.umich.edu } 19797337Sgblack@eecs.umich.edu ''' % { 19807337Sgblack@eecs.umich.edu "vldr_us" : "VLDR_" + loadImmClassName(False, True, False), 19817337Sgblack@eecs.umich.edu "vldr_s" : "VLDR_" + loadImmClassName(False, False, False), 19827337Sgblack@eecs.umich.edu "vldr_ud" : "VLDR_" + loadDoubleImmClassName(False, True, False), 19837346Sgblack@eecs.umich.edu "vldr_d" : "VLDR_" + loadDoubleImmClassName(False, False, False), 19847346Sgblack@eecs.umich.edu "vstr_us" : "VSTR_" + storeImmClassName(False, True, False), 19857346Sgblack@eecs.umich.edu "vstr_s" : "VSTR_" + storeImmClassName(False, False, False), 19867346Sgblack@eecs.umich.edu "vstr_ud" : "VSTR_" + storeDoubleImmClassName(False, True, False), 19877346Sgblack@eecs.umich.edu "vstr_d" : "VSTR_" + storeDoubleImmClassName(False, False, False) 19887337Sgblack@eecs.umich.edu } 19897178Sgblack@eecs.umich.edu}}; 19907321Sgblack@eecs.umich.edu 19917356Sgblack@eecs.umich.edudef format ExtensionRegLoadStore() {{ 19927321Sgblack@eecs.umich.edu decode_block = ''' 19937356Sgblack@eecs.umich.edu return decodeExtensionRegLoadStore(machInst); 19947356Sgblack@eecs.umich.edu ''' 19957356Sgblack@eecs.umich.edu}}; 19967356Sgblack@eecs.umich.edu 19977356Sgblack@eecs.umich.edulet {{ 19987356Sgblack@eecs.umich.edu header_output = ''' 19997356Sgblack@eecs.umich.edu StaticInstPtr 20007356Sgblack@eecs.umich.edu decodeShortFpTransfer(ExtMachInst machInst); 20017356Sgblack@eecs.umich.edu ''' 20027356Sgblack@eecs.umich.edu decoder_output = ''' 200313738Sciro.santilli@arm.com IntRegIndex decodeFpVd(ExtMachInst machInst, uint32_t size, bool isInt) 200413738Sciro.santilli@arm.com { 200513738Sciro.santilli@arm.com if (!isInt and size == 3) { 200613738Sciro.santilli@arm.com return (IntRegIndex)((bits(machInst, 22) << 5) | 200713738Sciro.santilli@arm.com (bits(machInst, 15, 12) << 1)); 200813738Sciro.santilli@arm.com } else { 200913738Sciro.santilli@arm.com return (IntRegIndex)(bits(machInst, 22) | 201013738Sciro.santilli@arm.com (bits(machInst, 15, 12) << 1)); 201113738Sciro.santilli@arm.com } 201213738Sciro.santilli@arm.com } 201313738Sciro.santilli@arm.com IntRegIndex decodeFpVm(ExtMachInst machInst, uint32_t size, bool isInt) 201413738Sciro.santilli@arm.com { 201513738Sciro.santilli@arm.com if (!isInt and size == 3) { 201613738Sciro.santilli@arm.com return (IntRegIndex)((bits(machInst, 5) << 5) | 201713738Sciro.santilli@arm.com (bits(machInst, 3, 0) << 1)); 201813738Sciro.santilli@arm.com } else { 201913738Sciro.santilli@arm.com return (IntRegIndex)(bits(machInst, 5) | 202013738Sciro.santilli@arm.com (bits(machInst, 3, 0) << 1)); 202113738Sciro.santilli@arm.com } 202213738Sciro.santilli@arm.com } 20237356Sgblack@eecs.umich.edu StaticInstPtr 20247356Sgblack@eecs.umich.edu decodeShortFpTransfer(ExtMachInst machInst) 20257321Sgblack@eecs.umich.edu { 20267321Sgblack@eecs.umich.edu const uint32_t l = bits(machInst, 20); 20277321Sgblack@eecs.umich.edu const uint32_t c = bits(machInst, 8); 20287321Sgblack@eecs.umich.edu const uint32_t a = bits(machInst, 23, 21); 202913977Sciro.santilli@arm.com const uint32_t q = bits(machInst, 6, 5); 203013738Sciro.santilli@arm.com const uint32_t o1 = bits(machInst, 18); 20317321Sgblack@eecs.umich.edu if ((machInst.thumb == 1 && bits(machInst, 28) == 1) || 20327321Sgblack@eecs.umich.edu (machInst.thumb == 0 && machInst.condCode == 0xf)) { 203311671Smitch.hayenga@arm.com // Determine if this is backported aarch64 FP instruction 203411671Smitch.hayenga@arm.com const bool b31_b24 = bits(machInst, 31, 24) == 0xFE; 203511671Smitch.hayenga@arm.com const bool b23 = bits(machInst, 23); 203613738Sciro.santilli@arm.com const bool b21_b19 = bits(machInst, 21, 19) == 0x7; 203711671Smitch.hayenga@arm.com const bool b11_b9 = bits(machInst, 11, 9) == 0x5; 203813738Sciro.santilli@arm.com const uint32_t size = bits(machInst, 9, 8); 203913738Sciro.santilli@arm.com const bool op3 = bits(machInst, 6); 204011671Smitch.hayenga@arm.com const bool b4 = bits(machInst, 4) == 0x0; 204113738Sciro.santilli@arm.com const uint32_t rm = bits(machInst, 17, 16); 204213738Sciro.santilli@arm.com IntRegIndex vd = decodeFpVd(machInst, size, false); 204313738Sciro.santilli@arm.com IntRegIndex vm = decodeFpVm(machInst, size, false); 204413738Sciro.santilli@arm.com IntRegIndex vdInt = decodeFpVd(machInst, size, true); 204513738Sciro.santilli@arm.com if (b31_b24 && b23 && b21_b19 && b11_b9 && op3 && b4) { 204613738Sciro.santilli@arm.com if (o1 == 0) { 204713738Sciro.santilli@arm.com // VINT* Integer Rounding Instruction 204813738Sciro.santilli@arm.com if (size == 3) { 204913738Sciro.santilli@arm.com switch(rm) { 205013738Sciro.santilli@arm.com case 0x0: 205113738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntAD>(machInst, vd, vm, 205213738Sciro.santilli@arm.com true); 205313738Sciro.santilli@arm.com case 0x1: 205413738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntND>(machInst, vd, vm, 205513738Sciro.santilli@arm.com true); 205613738Sciro.santilli@arm.com case 0x2: 205713738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntPD>(machInst, vd, vm, 205813738Sciro.santilli@arm.com true); 205913738Sciro.santilli@arm.com case 0x3: 206013738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntMD>(machInst, vd, vm, 206113738Sciro.santilli@arm.com true); 206213738Sciro.santilli@arm.com default: return new Unknown(machInst); 206313738Sciro.santilli@arm.com } 206413738Sciro.santilli@arm.com } else { 206513738Sciro.santilli@arm.com switch(rm) { 206613738Sciro.santilli@arm.com case 0x0: 206713738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntAS>(machInst, vd, vm, 206813738Sciro.santilli@arm.com false); 206913738Sciro.santilli@arm.com case 0x1: 207013738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntNS>(machInst, vd, vm, 207113738Sciro.santilli@arm.com false); 207213738Sciro.santilli@arm.com case 0x2: 207313738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntPS>(machInst, vd, vm, 207413738Sciro.santilli@arm.com false); 207513738Sciro.santilli@arm.com case 0x3: 207613738Sciro.santilli@arm.com return decodeVfpRegRegOp<VRIntMS>(machInst, vd, vm, 207713738Sciro.santilli@arm.com false); 207813738Sciro.santilli@arm.com default: return new Unknown(machInst); 207913738Sciro.santilli@arm.com } 208013738Sciro.santilli@arm.com } 208113738Sciro.santilli@arm.com } else { 208213738Sciro.santilli@arm.com const bool op = bits(machInst, 7); 208313738Sciro.santilli@arm.com switch(rm) { 208413738Sciro.santilli@arm.com case 0x0: 208513738Sciro.santilli@arm.com switch(size) { 208613738Sciro.santilli@arm.com case 0x0: 208713738Sciro.santilli@arm.com return new Unknown(machInst); 208813738Sciro.santilli@arm.com case 0x1: 208913738Sciro.santilli@arm.com return new FailUnimplemented( 209013738Sciro.santilli@arm.com "vcvta.u32.f16", machInst); 209113738Sciro.santilli@arm.com case 0x2: 209213738Sciro.santilli@arm.com if (op) { 209313738Sciro.santilli@arm.com return new VcvtaFpSIntS(machInst, vdInt, vm); 209413738Sciro.santilli@arm.com } else { 209513738Sciro.santilli@arm.com return new VcvtaFpUIntS(machInst, vdInt, vm); 209613738Sciro.santilli@arm.com } 209713738Sciro.santilli@arm.com case 0x3: 209813738Sciro.santilli@arm.com if (op) { 209913738Sciro.santilli@arm.com return new VcvtaFpSIntD(machInst, vdInt, vm); 210013738Sciro.santilli@arm.com } else { 210113738Sciro.santilli@arm.com return new VcvtaFpUIntD(machInst, vdInt, vm); 210213738Sciro.santilli@arm.com } 210313753Sgambordr@oregonstate.edu default: return new Unknown(machInst); 210413738Sciro.santilli@arm.com } 210513738Sciro.santilli@arm.com case 0x1: 210613738Sciro.santilli@arm.com switch(size) { 210713738Sciro.santilli@arm.com case 0x0: 210813738Sciro.santilli@arm.com return new Unknown(machInst); 210913738Sciro.santilli@arm.com case 0x1: 211013738Sciro.santilli@arm.com return new FailUnimplemented( 211113738Sciro.santilli@arm.com "vcvtn.u32.f16", machInst); 211213738Sciro.santilli@arm.com case 0x2: 211313738Sciro.santilli@arm.com if (op) { 211413738Sciro.santilli@arm.com return new VcvtnFpSIntS(machInst, vdInt, vm); 211513738Sciro.santilli@arm.com } else { 211613738Sciro.santilli@arm.com return new VcvtnFpUIntS(machInst, vdInt, vm); 211713738Sciro.santilli@arm.com } 211813738Sciro.santilli@arm.com case 0x3: 211913738Sciro.santilli@arm.com if (op) { 212013738Sciro.santilli@arm.com return new VcvtnFpSIntD(machInst, vdInt, vm); 212113738Sciro.santilli@arm.com } else { 212213738Sciro.santilli@arm.com return new VcvtnFpUIntD(machInst, vdInt, vm); 212313738Sciro.santilli@arm.com } 212413753Sgambordr@oregonstate.edu default: return new Unknown(machInst); 212513738Sciro.santilli@arm.com } 212613738Sciro.santilli@arm.com case 0x2: 212713738Sciro.santilli@arm.com switch(size) { 212813738Sciro.santilli@arm.com case 0x0: 212913738Sciro.santilli@arm.com return new Unknown(machInst); 213013738Sciro.santilli@arm.com case 0x1: 213113738Sciro.santilli@arm.com return new FailUnimplemented( 213213738Sciro.santilli@arm.com "vcvtp.u32.f16", machInst); 213313738Sciro.santilli@arm.com case 0x2: 213413738Sciro.santilli@arm.com if (op) { 213513738Sciro.santilli@arm.com return new VcvtpFpSIntS(machInst, vdInt, vm); 213613738Sciro.santilli@arm.com } else { 213713738Sciro.santilli@arm.com return new VcvtpFpUIntS(machInst, vdInt, vm); 213813738Sciro.santilli@arm.com } 213913738Sciro.santilli@arm.com case 0x3: 214013738Sciro.santilli@arm.com if (op) { 214113738Sciro.santilli@arm.com return new VcvtpFpSIntD(machInst, vdInt, vm); 214213738Sciro.santilli@arm.com } else { 214313738Sciro.santilli@arm.com return new VcvtpFpUIntD(machInst, vdInt, vm); 214413738Sciro.santilli@arm.com } 214513753Sgambordr@oregonstate.edu default: return new Unknown(machInst); 214613738Sciro.santilli@arm.com } 214713738Sciro.santilli@arm.com case 0x3: 214813738Sciro.santilli@arm.com switch(size) { 214913738Sciro.santilli@arm.com case 0x0: 215013738Sciro.santilli@arm.com return new Unknown(machInst); 215113738Sciro.santilli@arm.com case 0x1: 215213738Sciro.santilli@arm.com return new FailUnimplemented( 215313738Sciro.santilli@arm.com "vcvtm.u32.f16", machInst); 215413738Sciro.santilli@arm.com case 0x2: 215513738Sciro.santilli@arm.com if (op) { 215613738Sciro.santilli@arm.com return new VcvtmFpSIntS(machInst, vdInt, vm); 215713738Sciro.santilli@arm.com } else { 215813738Sciro.santilli@arm.com return new VcvtmFpUIntS(machInst, vdInt, vm); 215913738Sciro.santilli@arm.com } 216013738Sciro.santilli@arm.com case 0x3: 216113738Sciro.santilli@arm.com if (op) { 216213738Sciro.santilli@arm.com return new VcvtmFpSIntD(machInst, vdInt, vm); 216313738Sciro.santilli@arm.com } else { 216413738Sciro.santilli@arm.com return new VcvtmFpUIntD(machInst, vdInt, vm); 216513738Sciro.santilli@arm.com } 216613753Sgambordr@oregonstate.edu default: return new Unknown(machInst); 216713738Sciro.santilli@arm.com } 216813753Sgambordr@oregonstate.edu default: return new Unknown(machInst); 216913738Sciro.santilli@arm.com } 217013738Sciro.santilli@arm.com } 217113738Sciro.santilli@arm.com } else if (b31_b24 && !b23 && b11_b9 && !op3 && b4){ 217211671Smitch.hayenga@arm.com // VSEL* floating point conditional select 217311671Smitch.hayenga@arm.com 217411671Smitch.hayenga@arm.com ConditionCode cond; 217511671Smitch.hayenga@arm.com switch(bits(machInst, 21, 20)) { 217611671Smitch.hayenga@arm.com case 0x0: cond = COND_EQ; break; 217711671Smitch.hayenga@arm.com case 0x1: cond = COND_VS; break; 217811671Smitch.hayenga@arm.com case 0x2: cond = COND_GE; break; 217911671Smitch.hayenga@arm.com case 0x3: cond = COND_GT; break; 218011671Smitch.hayenga@arm.com } 218111671Smitch.hayenga@arm.com 218213738Sciro.santilli@arm.com if (size == 3) { 218311671Smitch.hayenga@arm.com const IntRegIndex vn = 218411671Smitch.hayenga@arm.com (IntRegIndex)((bits(machInst, 7) << 5) | 218511671Smitch.hayenga@arm.com (bits(machInst, 19, 16) << 1)); 218611671Smitch.hayenga@arm.com return new VselD(machInst, vd, vn, vm, cond); 218711671Smitch.hayenga@arm.com } else { 218811671Smitch.hayenga@arm.com const IntRegIndex vn = 218911671Smitch.hayenga@arm.com (IntRegIndex)((bits(machInst, 19, 16) << 1) | 219011671Smitch.hayenga@arm.com bits(machInst, 7)); 219111671Smitch.hayenga@arm.com return new VselS(machInst, vd, vn, vm, cond); 219211671Smitch.hayenga@arm.com } 219311671Smitch.hayenga@arm.com } else { 219411671Smitch.hayenga@arm.com return new Unknown(machInst); 219511671Smitch.hayenga@arm.com } 21967321Sgblack@eecs.umich.edu } 21977321Sgblack@eecs.umich.edu if (l == 0 && c == 0) { 21987321Sgblack@eecs.umich.edu if (a == 0) { 21997335Sgblack@eecs.umich.edu const uint32_t vn = (bits(machInst, 19, 16) << 1) | 22007335Sgblack@eecs.umich.edu bits(machInst, 7); 22017335Sgblack@eecs.umich.edu const IntRegIndex rt = 22027335Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 15, 12); 22037335Sgblack@eecs.umich.edu if (bits(machInst, 20) == 1) { 22047335Sgblack@eecs.umich.edu return new VmovRegCoreW(machInst, rt, (IntRegIndex)vn); 22057335Sgblack@eecs.umich.edu } else { 22067335Sgblack@eecs.umich.edu return new VmovCoreRegW(machInst, (IntRegIndex)vn, rt); 22077335Sgblack@eecs.umich.edu } 22087321Sgblack@eecs.umich.edu } else if (a == 0x7) { 22097323Sgblack@eecs.umich.edu const IntRegIndex rt = 22107323Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 15, 12); 221110037SARM gem5 Developers uint32_t reg = bits(machInst, 19, 16); 221210037SARM gem5 Developers uint32_t specReg; 221310037SARM gem5 Developers switch (reg) { 22147323Sgblack@eecs.umich.edu case 0: 22157323Sgblack@eecs.umich.edu specReg = MISCREG_FPSID; 22167323Sgblack@eecs.umich.edu break; 22177323Sgblack@eecs.umich.edu case 1: 22187323Sgblack@eecs.umich.edu specReg = MISCREG_FPSCR; 22197323Sgblack@eecs.umich.edu break; 22207394Sgblack@eecs.umich.edu case 6: 22217394Sgblack@eecs.umich.edu specReg = MISCREG_MVFR1; 22227394Sgblack@eecs.umich.edu break; 22237394Sgblack@eecs.umich.edu case 7: 22247394Sgblack@eecs.umich.edu specReg = MISCREG_MVFR0; 22257394Sgblack@eecs.umich.edu break; 22267323Sgblack@eecs.umich.edu case 8: 22277323Sgblack@eecs.umich.edu specReg = MISCREG_FPEXC; 22287323Sgblack@eecs.umich.edu break; 22297323Sgblack@eecs.umich.edu default: 22307323Sgblack@eecs.umich.edu return new Unknown(machInst); 22317323Sgblack@eecs.umich.edu } 22327643Sgblack@eecs.umich.edu if (specReg == MISCREG_FPSCR) { 22337643Sgblack@eecs.umich.edu return new VmsrFpscr(machInst, (IntRegIndex)specReg, rt); 22347643Sgblack@eecs.umich.edu } else { 223510037SARM gem5 Developers uint32_t iss = mcrMrcIssBuild(0, bits(machInst, 3, 0), rt, 223610037SARM gem5 Developers reg, a, bits(machInst, 7, 5)); 223710037SARM gem5 Developers return new Vmsr(machInst, (IntRegIndex)specReg, rt, iss); 22387643Sgblack@eecs.umich.edu } 22397321Sgblack@eecs.umich.edu } 22407321Sgblack@eecs.umich.edu } else if (l == 0 && c == 1) { 22417321Sgblack@eecs.umich.edu if (bits(a, 2) == 0) { 22427335Sgblack@eecs.umich.edu uint32_t vd = (bits(machInst, 7) << 5) | 22437335Sgblack@eecs.umich.edu (bits(machInst, 19, 16) << 1); 22447639Sgblack@eecs.umich.edu // Handle accessing each single precision half of the vector. 22457639Sgblack@eecs.umich.edu vd += bits(machInst, 21); 22467335Sgblack@eecs.umich.edu const IntRegIndex rt = 22477335Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 15, 12); 22487335Sgblack@eecs.umich.edu if (bits(machInst, 22) == 1) { 22497639Sgblack@eecs.umich.edu return new VmovCoreRegB(machInst, (IntRegIndex)vd, 22507639Sgblack@eecs.umich.edu rt, bits(machInst, 6, 5)); 22517335Sgblack@eecs.umich.edu } else if (bits(machInst, 5) == 1) { 22527639Sgblack@eecs.umich.edu return new VmovCoreRegH(machInst, (IntRegIndex)vd, 22537639Sgblack@eecs.umich.edu rt, bits(machInst, 6)); 22547335Sgblack@eecs.umich.edu } else if (bits(machInst, 6) == 0) { 22557639Sgblack@eecs.umich.edu return new VmovCoreRegW(machInst, (IntRegIndex)vd, rt); 22567335Sgblack@eecs.umich.edu } else { 22577335Sgblack@eecs.umich.edu return new Unknown(machInst); 22587335Sgblack@eecs.umich.edu } 225913977Sciro.santilli@arm.com } else if (bits(q, 1) == 0) { 22607639Sgblack@eecs.umich.edu bool q = bits(machInst, 21); 22617639Sgblack@eecs.umich.edu unsigned be = (bits(machInst, 22) << 1) | (bits(machInst, 5)); 22627639Sgblack@eecs.umich.edu IntRegIndex vd = (IntRegIndex)(2 * (uint32_t) 22637639Sgblack@eecs.umich.edu (bits(machInst, 19, 16) | (bits(machInst, 7) << 4))); 22647639Sgblack@eecs.umich.edu IntRegIndex rt = (IntRegIndex)(uint32_t) 22657639Sgblack@eecs.umich.edu bits(machInst, 15, 12); 22667639Sgblack@eecs.umich.edu if (q) { 22677639Sgblack@eecs.umich.edu switch (be) { 22687639Sgblack@eecs.umich.edu case 0: 22697639Sgblack@eecs.umich.edu return new NVdupQGpr<uint32_t>(machInst, vd, rt); 22707639Sgblack@eecs.umich.edu case 1: 22717639Sgblack@eecs.umich.edu return new NVdupQGpr<uint16_t>(machInst, vd, rt); 22727639Sgblack@eecs.umich.edu case 2: 22737639Sgblack@eecs.umich.edu return new NVdupQGpr<uint8_t>(machInst, vd, rt); 22747639Sgblack@eecs.umich.edu case 3: 22757639Sgblack@eecs.umich.edu return new Unknown(machInst); 22767639Sgblack@eecs.umich.edu } 22777639Sgblack@eecs.umich.edu } else { 22787639Sgblack@eecs.umich.edu switch (be) { 22797639Sgblack@eecs.umich.edu case 0: 22807639Sgblack@eecs.umich.edu return new NVdupDGpr<uint32_t>(machInst, vd, rt); 22817639Sgblack@eecs.umich.edu case 1: 22827639Sgblack@eecs.umich.edu return new NVdupDGpr<uint16_t>(machInst, vd, rt); 22837639Sgblack@eecs.umich.edu case 2: 22847639Sgblack@eecs.umich.edu return new NVdupDGpr<uint8_t>(machInst, vd, rt); 22857639Sgblack@eecs.umich.edu case 3: 22867639Sgblack@eecs.umich.edu return new Unknown(machInst); 22877639Sgblack@eecs.umich.edu } 22887335Sgblack@eecs.umich.edu } 22897321Sgblack@eecs.umich.edu } 22907321Sgblack@eecs.umich.edu } else if (l == 1 && c == 0) { 22917321Sgblack@eecs.umich.edu if (a == 0) { 22927335Sgblack@eecs.umich.edu const uint32_t vn = (bits(machInst, 19, 16) << 1) | 22937335Sgblack@eecs.umich.edu bits(machInst, 7); 22947335Sgblack@eecs.umich.edu const IntRegIndex rt = 22957335Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 15, 12); 22967335Sgblack@eecs.umich.edu if (bits(machInst, 20) == 1) { 22977335Sgblack@eecs.umich.edu return new VmovRegCoreW(machInst, rt, (IntRegIndex)vn); 22987335Sgblack@eecs.umich.edu } else { 22997335Sgblack@eecs.umich.edu return new VmovCoreRegW(machInst, (IntRegIndex)vn, rt); 23007335Sgblack@eecs.umich.edu } 23017321Sgblack@eecs.umich.edu } else if (a == 7) { 23027326Sgblack@eecs.umich.edu const IntRegIndex rt = 23037326Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 15, 12); 230410037SARM gem5 Developers uint32_t reg = bits(machInst, 19, 16); 230510037SARM gem5 Developers uint32_t specReg; 230610037SARM gem5 Developers switch (reg) { 23077326Sgblack@eecs.umich.edu case 0: 23087326Sgblack@eecs.umich.edu specReg = MISCREG_FPSID; 23097326Sgblack@eecs.umich.edu break; 23107326Sgblack@eecs.umich.edu case 1: 23117326Sgblack@eecs.umich.edu specReg = MISCREG_FPSCR; 23127326Sgblack@eecs.umich.edu break; 23137326Sgblack@eecs.umich.edu case 6: 23147326Sgblack@eecs.umich.edu specReg = MISCREG_MVFR1; 23157326Sgblack@eecs.umich.edu break; 23167326Sgblack@eecs.umich.edu case 7: 23177326Sgblack@eecs.umich.edu specReg = MISCREG_MVFR0; 23187326Sgblack@eecs.umich.edu break; 23197326Sgblack@eecs.umich.edu case 8: 23207326Sgblack@eecs.umich.edu specReg = MISCREG_FPEXC; 23217326Sgblack@eecs.umich.edu break; 23227326Sgblack@eecs.umich.edu default: 23237326Sgblack@eecs.umich.edu return new Unknown(machInst); 23247326Sgblack@eecs.umich.edu } 23257392Sgblack@eecs.umich.edu if (rt == 0xf) { 23267643Sgblack@eecs.umich.edu if (specReg == MISCREG_FPSCR) { 23278303SAli.Saidi@ARM.com return new VmrsApsrFpscr(machInst); 23287643Sgblack@eecs.umich.edu } else { 23298301SAli.Saidi@ARM.com return new Unknown(machInst); 23307643Sgblack@eecs.umich.edu } 23317643Sgblack@eecs.umich.edu } else if (specReg == MISCREG_FPSCR) { 23327643Sgblack@eecs.umich.edu return new VmrsFpscr(machInst, rt, (IntRegIndex)specReg); 23337392Sgblack@eecs.umich.edu } else { 233410037SARM gem5 Developers uint32_t iss = mcrMrcIssBuild(l, bits(machInst, 3, 0), rt, 233510037SARM gem5 Developers reg, a, bits(machInst, 7, 5)); 233610037SARM gem5 Developers return new Vmrs(machInst, rt, (IntRegIndex)specReg, iss); 23377392Sgblack@eecs.umich.edu } 23387321Sgblack@eecs.umich.edu } 23397321Sgblack@eecs.umich.edu } else { 23407335Sgblack@eecs.umich.edu uint32_t vd = (bits(machInst, 7) << 5) | 23417335Sgblack@eecs.umich.edu (bits(machInst, 19, 16) << 1); 23427639Sgblack@eecs.umich.edu // Handle indexing into each single precision half of the vector. 23437639Sgblack@eecs.umich.edu vd += bits(machInst, 21); 23447639Sgblack@eecs.umich.edu uint32_t index; 23457335Sgblack@eecs.umich.edu const IntRegIndex rt = 23467335Sgblack@eecs.umich.edu (IntRegIndex)(uint32_t)bits(machInst, 15, 12); 23477335Sgblack@eecs.umich.edu const bool u = (bits(machInst, 23) == 1); 23487335Sgblack@eecs.umich.edu if (bits(machInst, 22) == 1) { 23497639Sgblack@eecs.umich.edu index = bits(machInst, 6, 5); 23507335Sgblack@eecs.umich.edu if (u) { 23517335Sgblack@eecs.umich.edu return new VmovRegCoreUB(machInst, rt, 23527335Sgblack@eecs.umich.edu (IntRegIndex)vd, index); 23537335Sgblack@eecs.umich.edu } else { 23547335Sgblack@eecs.umich.edu return new VmovRegCoreSB(machInst, rt, 23557335Sgblack@eecs.umich.edu (IntRegIndex)vd, index); 23567335Sgblack@eecs.umich.edu } 23577639Sgblack@eecs.umich.edu } else if (bits(machInst, 5) == 1) { 23587639Sgblack@eecs.umich.edu index = bits(machInst, 6); 23597335Sgblack@eecs.umich.edu if (u) { 23607335Sgblack@eecs.umich.edu return new VmovRegCoreUH(machInst, rt, 23617335Sgblack@eecs.umich.edu (IntRegIndex)vd, index); 23627335Sgblack@eecs.umich.edu } else { 23637335Sgblack@eecs.umich.edu return new VmovRegCoreSH(machInst, rt, 23647335Sgblack@eecs.umich.edu (IntRegIndex)vd, index); 23657335Sgblack@eecs.umich.edu } 23667639Sgblack@eecs.umich.edu } else if (bits(machInst, 6) == 0 && !u) { 23677335Sgblack@eecs.umich.edu return new VmovRegCoreW(machInst, rt, (IntRegIndex)vd); 23687639Sgblack@eecs.umich.edu } else { 23697639Sgblack@eecs.umich.edu return new Unknown(machInst); 23707335Sgblack@eecs.umich.edu } 23717321Sgblack@eecs.umich.edu } 23727321Sgblack@eecs.umich.edu return new Unknown(machInst); 23737321Sgblack@eecs.umich.edu } 23747321Sgblack@eecs.umich.edu ''' 23757321Sgblack@eecs.umich.edu}}; 23767356Sgblack@eecs.umich.edu 23777356Sgblack@eecs.umich.edudef format ShortFpTransfer() {{ 23787356Sgblack@eecs.umich.edu decode_block = ''' 23797356Sgblack@eecs.umich.edu return decodeShortFpTransfer(machInst); 23807356Sgblack@eecs.umich.edu ''' 23817356Sgblack@eecs.umich.edu}}; 23827363Sgblack@eecs.umich.edu 23837363Sgblack@eecs.umich.edulet {{ 23847363Sgblack@eecs.umich.edu header_output = ''' 23857363Sgblack@eecs.umich.edu StaticInstPtr 23867363Sgblack@eecs.umich.edu decodeVfpData(ExtMachInst machInst); 23877363Sgblack@eecs.umich.edu ''' 23887363Sgblack@eecs.umich.edu decoder_output = ''' 23897363Sgblack@eecs.umich.edu StaticInstPtr 23907363Sgblack@eecs.umich.edu decodeVfpData(ExtMachInst machInst) 23917363Sgblack@eecs.umich.edu { 23927363Sgblack@eecs.umich.edu const uint32_t opc1 = bits(machInst, 23, 20); 23937363Sgblack@eecs.umich.edu const uint32_t opc2 = bits(machInst, 19, 16); 23947363Sgblack@eecs.umich.edu const uint32_t opc3 = bits(machInst, 7, 6); 23957363Sgblack@eecs.umich.edu //const uint32_t opc4 = bits(machInst, 3, 0); 23967372Sgblack@eecs.umich.edu const bool single = (bits(machInst, 8) == 0); 23977389Sgblack@eecs.umich.edu // Used to select between vcmp and vcmpe. 23987389Sgblack@eecs.umich.edu const bool e = (bits(machInst, 7) == 1); 23997372Sgblack@eecs.umich.edu IntRegIndex vd; 24007372Sgblack@eecs.umich.edu IntRegIndex vm; 24017372Sgblack@eecs.umich.edu IntRegIndex vn; 24027372Sgblack@eecs.umich.edu if (single) { 24037372Sgblack@eecs.umich.edu vd = (IntRegIndex)(bits(machInst, 22) | 24047372Sgblack@eecs.umich.edu (bits(machInst, 15, 12) << 1)); 24057372Sgblack@eecs.umich.edu vm = (IntRegIndex)(bits(machInst, 5) | 24067372Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1)); 24077372Sgblack@eecs.umich.edu vn = (IntRegIndex)(bits(machInst, 7) | 24087372Sgblack@eecs.umich.edu (bits(machInst, 19, 16) << 1)); 24097372Sgblack@eecs.umich.edu } else { 24107372Sgblack@eecs.umich.edu vd = (IntRegIndex)((bits(machInst, 22) << 5) | 24117372Sgblack@eecs.umich.edu (bits(machInst, 15, 12) << 1)); 24127372Sgblack@eecs.umich.edu vm = (IntRegIndex)((bits(machInst, 5) << 5) | 24137372Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1)); 24147372Sgblack@eecs.umich.edu vn = (IntRegIndex)((bits(machInst, 7) << 5) | 24157372Sgblack@eecs.umich.edu (bits(machInst, 19, 16) << 1)); 24167372Sgblack@eecs.umich.edu } 24177363Sgblack@eecs.umich.edu switch (opc1 & 0xb /* 1011 */) { 24187363Sgblack@eecs.umich.edu case 0x0: 24197370Sgblack@eecs.umich.edu if (bits(machInst, 6) == 0) { 24207372Sgblack@eecs.umich.edu if (single) { 24217376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VmlaS>( 24227376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 24237370Sgblack@eecs.umich.edu } else { 24247376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VmlaD>( 24257376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 24267370Sgblack@eecs.umich.edu } 24277370Sgblack@eecs.umich.edu } else { 24287372Sgblack@eecs.umich.edu if (single) { 24297376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VmlsS>( 24307376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 24317370Sgblack@eecs.umich.edu } else { 24327376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VmlsD>( 24337376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 24347370Sgblack@eecs.umich.edu } 24357370Sgblack@eecs.umich.edu } 24367371Sgblack@eecs.umich.edu case 0x1: 24377371Sgblack@eecs.umich.edu if (bits(machInst, 6) == 1) { 24387372Sgblack@eecs.umich.edu if (single) { 24397376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VnmlaS>( 24407376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 24417371Sgblack@eecs.umich.edu } else { 24427376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VnmlaD>( 24437376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 24447371Sgblack@eecs.umich.edu } 24457371Sgblack@eecs.umich.edu } else { 24467372Sgblack@eecs.umich.edu if (single) { 24477376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VnmlsS>( 24487376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 24497371Sgblack@eecs.umich.edu } else { 24507376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VnmlsD>( 24517376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 24527371Sgblack@eecs.umich.edu } 24537371Sgblack@eecs.umich.edu } 24547363Sgblack@eecs.umich.edu case 0x2: 24557363Sgblack@eecs.umich.edu if ((opc3 & 0x1) == 0) { 24567372Sgblack@eecs.umich.edu if (single) { 24577376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VmulS>( 24587376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 24597364Sgblack@eecs.umich.edu } else { 24607376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VmulD>( 24617376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 24627364Sgblack@eecs.umich.edu } 24637371Sgblack@eecs.umich.edu } else { 24647372Sgblack@eecs.umich.edu if (single) { 24657376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VnmulS>( 24667376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 24677371Sgblack@eecs.umich.edu } else { 24687376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VnmulD>( 24697376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 24707371Sgblack@eecs.umich.edu } 24717363Sgblack@eecs.umich.edu } 24727363Sgblack@eecs.umich.edu case 0x3: 24737363Sgblack@eecs.umich.edu if ((opc3 & 0x1) == 0) { 24747372Sgblack@eecs.umich.edu if (single) { 24757376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VaddS>( 24767376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 24777367Sgblack@eecs.umich.edu } else { 24787376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VaddD>( 24797376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 24807367Sgblack@eecs.umich.edu } 24817363Sgblack@eecs.umich.edu } else { 24827372Sgblack@eecs.umich.edu if (single) { 24837376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VsubS>( 24847376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 24857368Sgblack@eecs.umich.edu } else { 24867376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VsubD>( 24877376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 24887368Sgblack@eecs.umich.edu } 24897363Sgblack@eecs.umich.edu } 24907363Sgblack@eecs.umich.edu case 0x8: 24917363Sgblack@eecs.umich.edu if ((opc3 & 0x1) == 0) { 24927372Sgblack@eecs.umich.edu if (single) { 24937376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VdivS>( 24947376Sgblack@eecs.umich.edu machInst, vd, vn, vm, false); 24957369Sgblack@eecs.umich.edu } else { 24967376Sgblack@eecs.umich.edu return decodeVfpRegRegRegOp<VdivD>( 24977376Sgblack@eecs.umich.edu machInst, vd, vn, vm, true); 24987369Sgblack@eecs.umich.edu } 24997363Sgblack@eecs.umich.edu } 25007363Sgblack@eecs.umich.edu break; 250110037SARM gem5 Developers case 0x9: 250210037SARM gem5 Developers if ((opc3 & 0x1) == 0) { 250310037SARM gem5 Developers if (single) { 250410037SARM gem5 Developers return decodeVfpRegRegRegOp<VfnmaS>( 250510037SARM gem5 Developers machInst, vd, vn, vm, false); 250610037SARM gem5 Developers } else { 250710037SARM gem5 Developers return decodeVfpRegRegRegOp<VfnmaD>( 250810037SARM gem5 Developers machInst, vd, vn, vm, true); 250910037SARM gem5 Developers } 251010037SARM gem5 Developers } else { 251110037SARM gem5 Developers if (single) { 251210037SARM gem5 Developers return decodeVfpRegRegRegOp<VfnmsS>( 251310037SARM gem5 Developers machInst, vd, vn, vm, false); 251410037SARM gem5 Developers } else { 251510037SARM gem5 Developers return decodeVfpRegRegRegOp<VfnmsD>( 251610037SARM gem5 Developers machInst, vd, vn, vm, true); 251710037SARM gem5 Developers } 251810037SARM gem5 Developers } 251910037SARM gem5 Developers break; 252010037SARM gem5 Developers case 0xa: 252110037SARM gem5 Developers if ((opc3 & 0x1) == 0) { 252210037SARM gem5 Developers if (single) { 252310037SARM gem5 Developers return decodeVfpRegRegRegOp<VfmaS>( 252410037SARM gem5 Developers machInst, vd, vn, vm, false); 252510037SARM gem5 Developers } else { 252610037SARM gem5 Developers return decodeVfpRegRegRegOp<VfmaD>( 252710037SARM gem5 Developers machInst, vd, vn, vm, true); 252810037SARM gem5 Developers } 252910037SARM gem5 Developers } else { 253010037SARM gem5 Developers if (single) { 253110037SARM gem5 Developers return decodeVfpRegRegRegOp<VfmsS>( 253210037SARM gem5 Developers machInst, vd, vn, vm, false); 253310037SARM gem5 Developers } else { 253410037SARM gem5 Developers return decodeVfpRegRegRegOp<VfmsD>( 253510037SARM gem5 Developers machInst, vd, vn, vm, true); 253610037SARM gem5 Developers } 253710037SARM gem5 Developers } 253810037SARM gem5 Developers break; 25397363Sgblack@eecs.umich.edu case 0xb: 25407363Sgblack@eecs.umich.edu if ((opc3 & 0x1) == 0) { 25417363Sgblack@eecs.umich.edu const uint32_t baseImm = 25427363Sgblack@eecs.umich.edu bits(machInst, 3, 0) | (bits(machInst, 19, 16) << 4); 25437372Sgblack@eecs.umich.edu if (single) { 254413120SEdmund.Grimley-Evans@arm.com uint32_t imm = vfp_modified_imm(baseImm, FpDataType::Fp32); 25457376Sgblack@eecs.umich.edu return decodeVfpRegImmOp<VmovImmS>( 25467376Sgblack@eecs.umich.edu machInst, vd, imm, false); 25477363Sgblack@eecs.umich.edu } else { 254813120SEdmund.Grimley-Evans@arm.com uint64_t imm = vfp_modified_imm(baseImm, FpDataType::Fp64); 25497376Sgblack@eecs.umich.edu return decodeVfpRegImmOp<VmovImmD>( 25507376Sgblack@eecs.umich.edu machInst, vd, imm, true); 25517363Sgblack@eecs.umich.edu } 25527363Sgblack@eecs.umich.edu } 25537363Sgblack@eecs.umich.edu switch (opc2) { 25547363Sgblack@eecs.umich.edu case 0x0: 25557363Sgblack@eecs.umich.edu if (opc3 == 1) { 25567372Sgblack@eecs.umich.edu if (single) { 25577376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VmovRegS>( 25587376Sgblack@eecs.umich.edu machInst, vd, vm, false); 25597363Sgblack@eecs.umich.edu } else { 25607376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VmovRegD>( 25617376Sgblack@eecs.umich.edu machInst, vd, vm, true); 25627363Sgblack@eecs.umich.edu } 25637363Sgblack@eecs.umich.edu } else { 25647372Sgblack@eecs.umich.edu if (single) { 25657376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VabsS>( 25667376Sgblack@eecs.umich.edu machInst, vd, vm, false); 25677366Sgblack@eecs.umich.edu } else { 25687376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VabsD>( 25697376Sgblack@eecs.umich.edu machInst, vd, vm, true); 25707366Sgblack@eecs.umich.edu } 25717363Sgblack@eecs.umich.edu } 25727363Sgblack@eecs.umich.edu case 0x1: 25737363Sgblack@eecs.umich.edu if (opc3 == 1) { 25747372Sgblack@eecs.umich.edu if (single) { 25757376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VnegS>( 25767376Sgblack@eecs.umich.edu machInst, vd, vm, false); 25777365Sgblack@eecs.umich.edu } else { 25787376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VnegD>( 25797376Sgblack@eecs.umich.edu machInst, vd, vm, true); 25807365Sgblack@eecs.umich.edu } 25817363Sgblack@eecs.umich.edu } else { 25827372Sgblack@eecs.umich.edu if (single) { 25837376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VsqrtS>( 25847376Sgblack@eecs.umich.edu machInst, vd, vm, false); 25857369Sgblack@eecs.umich.edu } else { 25867376Sgblack@eecs.umich.edu return decodeVfpRegRegOp<VsqrtD>( 25877376Sgblack@eecs.umich.edu machInst, vd, vm, true); 25887369Sgblack@eecs.umich.edu } 25897363Sgblack@eecs.umich.edu } 25907363Sgblack@eecs.umich.edu case 0x2: 25917363Sgblack@eecs.umich.edu case 0x3: 25927398Sgblack@eecs.umich.edu { 25937398Sgblack@eecs.umich.edu const bool toHalf = bits(machInst, 16); 25947398Sgblack@eecs.umich.edu const bool top = bits(machInst, 7); 25957398Sgblack@eecs.umich.edu if (top) { 25967398Sgblack@eecs.umich.edu if (toHalf) { 25977398Sgblack@eecs.umich.edu return new VcvtFpSFpHT(machInst, vd, vm); 25987398Sgblack@eecs.umich.edu } else { 25997398Sgblack@eecs.umich.edu return new VcvtFpHTFpS(machInst, vd, vm); 26007398Sgblack@eecs.umich.edu } 26017398Sgblack@eecs.umich.edu } else { 26027398Sgblack@eecs.umich.edu if (toHalf) { 26037398Sgblack@eecs.umich.edu return new VcvtFpSFpHB(machInst, vd, vm); 26047398Sgblack@eecs.umich.edu } else { 26057398Sgblack@eecs.umich.edu return new VcvtFpHBFpS(machInst, vd, vm); 26067398Sgblack@eecs.umich.edu } 26077398Sgblack@eecs.umich.edu } 26087398Sgblack@eecs.umich.edu } 26097363Sgblack@eecs.umich.edu case 0x4: 26107377Sgblack@eecs.umich.edu if (single) { 26117389Sgblack@eecs.umich.edu if (e) { 26127389Sgblack@eecs.umich.edu return new VcmpeS(machInst, vd, vm); 26137389Sgblack@eecs.umich.edu } else { 26147389Sgblack@eecs.umich.edu return new VcmpS(machInst, vd, vm); 26157389Sgblack@eecs.umich.edu } 26167377Sgblack@eecs.umich.edu } else { 26177389Sgblack@eecs.umich.edu if (e) { 26187389Sgblack@eecs.umich.edu return new VcmpeD(machInst, vd, vm); 26197389Sgblack@eecs.umich.edu } else { 26207389Sgblack@eecs.umich.edu return new VcmpD(machInst, vd, vm); 26217389Sgblack@eecs.umich.edu } 26227377Sgblack@eecs.umich.edu } 26237363Sgblack@eecs.umich.edu case 0x5: 26247377Sgblack@eecs.umich.edu if (single) { 26257389Sgblack@eecs.umich.edu if (e) { 26267389Sgblack@eecs.umich.edu return new VcmpeZeroS(machInst, vd, 0); 26277389Sgblack@eecs.umich.edu } else { 26287389Sgblack@eecs.umich.edu return new VcmpZeroS(machInst, vd, 0); 26297389Sgblack@eecs.umich.edu } 26307377Sgblack@eecs.umich.edu } else { 26317389Sgblack@eecs.umich.edu if (e) { 26327389Sgblack@eecs.umich.edu return new VcmpeZeroD(machInst, vd, 0); 26337389Sgblack@eecs.umich.edu } else { 26347389Sgblack@eecs.umich.edu return new VcmpZeroD(machInst, vd, 0); 26357389Sgblack@eecs.umich.edu } 26367377Sgblack@eecs.umich.edu } 26377363Sgblack@eecs.umich.edu case 0x7: 26387363Sgblack@eecs.umich.edu if (opc3 == 0x3) { 26397374Sgblack@eecs.umich.edu if (single) { 26408270SAli.Saidi@ARM.com vd = (IntRegIndex)((bits(machInst, 22) << 5) | 26418270SAli.Saidi@ARM.com (bits(machInst, 15, 12) << 1)); 26427374Sgblack@eecs.umich.edu return new VcvtFpSFpD(machInst, vd, vm); 26437374Sgblack@eecs.umich.edu } else { 26447374Sgblack@eecs.umich.edu vd = (IntRegIndex)(bits(machInst, 22) | 26457374Sgblack@eecs.umich.edu (bits(machInst, 15, 12) << 1)); 26467374Sgblack@eecs.umich.edu return new VcvtFpDFpS(machInst, vd, vm); 26477374Sgblack@eecs.umich.edu } 26487363Sgblack@eecs.umich.edu } 26497363Sgblack@eecs.umich.edu break; 26507363Sgblack@eecs.umich.edu case 0x8: 26517373Sgblack@eecs.umich.edu if (bits(machInst, 7) == 0) { 26527373Sgblack@eecs.umich.edu if (single) { 26537373Sgblack@eecs.umich.edu return new VcvtUIntFpS(machInst, vd, vm); 26547373Sgblack@eecs.umich.edu } else { 26557373Sgblack@eecs.umich.edu vm = (IntRegIndex)(bits(machInst, 5) | 26567373Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1)); 26577373Sgblack@eecs.umich.edu return new VcvtUIntFpD(machInst, vd, vm); 26587373Sgblack@eecs.umich.edu } 26597373Sgblack@eecs.umich.edu } else { 26607373Sgblack@eecs.umich.edu if (single) { 26617373Sgblack@eecs.umich.edu return new VcvtSIntFpS(machInst, vd, vm); 26627373Sgblack@eecs.umich.edu } else { 26637373Sgblack@eecs.umich.edu vm = (IntRegIndex)(bits(machInst, 5) | 26647373Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1)); 26657373Sgblack@eecs.umich.edu return new VcvtSIntFpD(machInst, vd, vm); 26667373Sgblack@eecs.umich.edu } 26677373Sgblack@eecs.umich.edu } 26687363Sgblack@eecs.umich.edu case 0xa: 26697379Sgblack@eecs.umich.edu { 26707379Sgblack@eecs.umich.edu const bool half = (bits(machInst, 7) == 0); 26717379Sgblack@eecs.umich.edu const uint32_t imm = bits(machInst, 5) | 26727379Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1); 26737379Sgblack@eecs.umich.edu const uint32_t size = 26747379Sgblack@eecs.umich.edu (bits(machInst, 7) == 0 ? 16 : 32) - imm; 26757379Sgblack@eecs.umich.edu if (single) { 26767379Sgblack@eecs.umich.edu if (half) { 26777379Sgblack@eecs.umich.edu return new VcvtSHFixedFpS(machInst, vd, vd, size); 26787379Sgblack@eecs.umich.edu } else { 26797379Sgblack@eecs.umich.edu return new VcvtSFixedFpS(machInst, vd, vd, size); 26807379Sgblack@eecs.umich.edu } 26817379Sgblack@eecs.umich.edu } else { 26827379Sgblack@eecs.umich.edu if (half) { 26837379Sgblack@eecs.umich.edu return new VcvtSHFixedFpD(machInst, vd, vd, size); 26847379Sgblack@eecs.umich.edu } else { 26857379Sgblack@eecs.umich.edu return new VcvtSFixedFpD(machInst, vd, vd, size); 26867379Sgblack@eecs.umich.edu } 26877379Sgblack@eecs.umich.edu } 26887379Sgblack@eecs.umich.edu } 26897363Sgblack@eecs.umich.edu case 0xb: 26907379Sgblack@eecs.umich.edu { 26917379Sgblack@eecs.umich.edu const bool half = (bits(machInst, 7) == 0); 26927379Sgblack@eecs.umich.edu const uint32_t imm = bits(machInst, 5) | 26937379Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1); 26947379Sgblack@eecs.umich.edu const uint32_t size = 26957379Sgblack@eecs.umich.edu (bits(machInst, 7) == 0 ? 16 : 32) - imm; 26967379Sgblack@eecs.umich.edu if (single) { 26977379Sgblack@eecs.umich.edu if (half) { 26987379Sgblack@eecs.umich.edu return new VcvtUHFixedFpS(machInst, vd, vd, size); 26997379Sgblack@eecs.umich.edu } else { 27007379Sgblack@eecs.umich.edu return new VcvtUFixedFpS(machInst, vd, vd, size); 27017379Sgblack@eecs.umich.edu } 27027379Sgblack@eecs.umich.edu } else { 27037379Sgblack@eecs.umich.edu if (half) { 27047379Sgblack@eecs.umich.edu return new VcvtUHFixedFpD(machInst, vd, vd, size); 27057379Sgblack@eecs.umich.edu } else { 27067379Sgblack@eecs.umich.edu return new VcvtUFixedFpD(machInst, vd, vd, size); 27077379Sgblack@eecs.umich.edu } 27087379Sgblack@eecs.umich.edu } 27097379Sgblack@eecs.umich.edu } 27107363Sgblack@eecs.umich.edu case 0xc: 27117380Sgblack@eecs.umich.edu if (bits(machInst, 7) == 0) { 27127380Sgblack@eecs.umich.edu if (single) { 27137380Sgblack@eecs.umich.edu return new VcvtFpUIntSR(machInst, vd, vm); 27147380Sgblack@eecs.umich.edu } else { 27157380Sgblack@eecs.umich.edu vd = (IntRegIndex)(bits(machInst, 22) | 27167380Sgblack@eecs.umich.edu (bits(machInst, 15, 12) << 1)); 27177380Sgblack@eecs.umich.edu return new VcvtFpUIntDR(machInst, vd, vm); 27187380Sgblack@eecs.umich.edu } 27197373Sgblack@eecs.umich.edu } else { 27207380Sgblack@eecs.umich.edu if (single) { 27217380Sgblack@eecs.umich.edu return new VcvtFpUIntS(machInst, vd, vm); 27227380Sgblack@eecs.umich.edu } else { 27237380Sgblack@eecs.umich.edu vd = (IntRegIndex)(bits(machInst, 22) | 27247380Sgblack@eecs.umich.edu (bits(machInst, 15, 12) << 1)); 27257380Sgblack@eecs.umich.edu return new VcvtFpUIntD(machInst, vd, vm); 27267380Sgblack@eecs.umich.edu } 27277373Sgblack@eecs.umich.edu } 27287363Sgblack@eecs.umich.edu case 0xd: 27297380Sgblack@eecs.umich.edu if (bits(machInst, 7) == 0) { 27307380Sgblack@eecs.umich.edu if (single) { 27317380Sgblack@eecs.umich.edu return new VcvtFpSIntSR(machInst, vd, vm); 27327380Sgblack@eecs.umich.edu } else { 27337380Sgblack@eecs.umich.edu vd = (IntRegIndex)(bits(machInst, 22) | 27347380Sgblack@eecs.umich.edu (bits(machInst, 15, 12) << 1)); 27357380Sgblack@eecs.umich.edu return new VcvtFpSIntDR(machInst, vd, vm); 27367380Sgblack@eecs.umich.edu } 27377373Sgblack@eecs.umich.edu } else { 27387380Sgblack@eecs.umich.edu if (single) { 27397380Sgblack@eecs.umich.edu return new VcvtFpSIntS(machInst, vd, vm); 27407380Sgblack@eecs.umich.edu } else { 27417380Sgblack@eecs.umich.edu vd = (IntRegIndex)(bits(machInst, 22) | 27427380Sgblack@eecs.umich.edu (bits(machInst, 15, 12) << 1)); 27437380Sgblack@eecs.umich.edu return new VcvtFpSIntD(machInst, vd, vm); 27447380Sgblack@eecs.umich.edu } 27457373Sgblack@eecs.umich.edu } 27467363Sgblack@eecs.umich.edu case 0xe: 27477379Sgblack@eecs.umich.edu { 27487379Sgblack@eecs.umich.edu const bool half = (bits(machInst, 7) == 0); 27497379Sgblack@eecs.umich.edu const uint32_t imm = bits(machInst, 5) | 27507379Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1); 27517379Sgblack@eecs.umich.edu const uint32_t size = 27527379Sgblack@eecs.umich.edu (bits(machInst, 7) == 0 ? 16 : 32) - imm; 27537379Sgblack@eecs.umich.edu if (single) { 27547379Sgblack@eecs.umich.edu if (half) { 27557379Sgblack@eecs.umich.edu return new VcvtFpSHFixedS(machInst, vd, vd, size); 27567379Sgblack@eecs.umich.edu } else { 27577379Sgblack@eecs.umich.edu return new VcvtFpSFixedS(machInst, vd, vd, size); 27587379Sgblack@eecs.umich.edu } 27597379Sgblack@eecs.umich.edu } else { 27607379Sgblack@eecs.umich.edu if (half) { 27617379Sgblack@eecs.umich.edu return new VcvtFpSHFixedD(machInst, vd, vd, size); 27627379Sgblack@eecs.umich.edu } else { 27637379Sgblack@eecs.umich.edu return new VcvtFpSFixedD(machInst, vd, vd, size); 27647379Sgblack@eecs.umich.edu } 27657379Sgblack@eecs.umich.edu } 27667379Sgblack@eecs.umich.edu } 27677363Sgblack@eecs.umich.edu case 0xf: 27687379Sgblack@eecs.umich.edu { 27697379Sgblack@eecs.umich.edu const bool half = (bits(machInst, 7) == 0); 27707379Sgblack@eecs.umich.edu const uint32_t imm = bits(machInst, 5) | 27717379Sgblack@eecs.umich.edu (bits(machInst, 3, 0) << 1); 27727379Sgblack@eecs.umich.edu const uint32_t size = 27737379Sgblack@eecs.umich.edu (bits(machInst, 7) == 0 ? 16 : 32) - imm; 27747379Sgblack@eecs.umich.edu if (single) { 27757379Sgblack@eecs.umich.edu if (half) { 27767379Sgblack@eecs.umich.edu return new VcvtFpUHFixedS(machInst, vd, vd, size); 27777379Sgblack@eecs.umich.edu } else { 27787379Sgblack@eecs.umich.edu return new VcvtFpUFixedS(machInst, vd, vd, size); 27797379Sgblack@eecs.umich.edu } 27807379Sgblack@eecs.umich.edu } else { 27817379Sgblack@eecs.umich.edu if (half) { 27827379Sgblack@eecs.umich.edu return new VcvtFpUHFixedD(machInst, vd, vd, size); 27837379Sgblack@eecs.umich.edu } else { 27847379Sgblack@eecs.umich.edu return new VcvtFpUFixedD(machInst, vd, vd, size); 27857379Sgblack@eecs.umich.edu } 27867379Sgblack@eecs.umich.edu } 27877379Sgblack@eecs.umich.edu } 27887363Sgblack@eecs.umich.edu } 27897363Sgblack@eecs.umich.edu break; 27907363Sgblack@eecs.umich.edu } 27917363Sgblack@eecs.umich.edu return new Unknown(machInst); 27927363Sgblack@eecs.umich.edu } 27937363Sgblack@eecs.umich.edu ''' 27947363Sgblack@eecs.umich.edu}}; 27957363Sgblack@eecs.umich.edu 27967363Sgblack@eecs.umich.edudef format VfpData() {{ 27977363Sgblack@eecs.umich.edu decode_block = ''' 27987363Sgblack@eecs.umich.edu return decodeVfpData(machInst); 27997363Sgblack@eecs.umich.edu ''' 28007363Sgblack@eecs.umich.edu}}; 2801