breakpoint.isa revision 12616:4b463b4dc098
1955SN/A// -*- mode:c++ -*- 2955SN/A 310841Sandreas.sandberg@arm.com// Copyright (c) 2010,2018 ARM Limited 49812Sandreas.hansson@arm.com// All rights reserved 59812Sandreas.hansson@arm.com// 69812Sandreas.hansson@arm.com// The license below extends only to copyright in the software and shall 79812Sandreas.hansson@arm.com// not be construed as granting a license to any other intellectual 89812Sandreas.hansson@arm.com// property including but not limited to intellectual property relating 99812Sandreas.hansson@arm.com// to a hardware implementation of the functionality of the software 109812Sandreas.hansson@arm.com// licensed hereunder. You may use the software subject to the license 119812Sandreas.hansson@arm.com// terms below provided that you ensure that this notice is replicated 129812Sandreas.hansson@arm.com// unmodified and in its entirety in all distributions of the software, 139812Sandreas.hansson@arm.com// modified or unmodified, in source code or in binary form. 149812Sandreas.hansson@arm.com// 157816Ssteve.reinhardt@amd.com// Copyright (c) 2007-2008 The Florida State University 165871Snate@binkert.org// All rights reserved. 171762SN/A// 18955SN/A// Redistribution and use in source and binary forms, with or without 19955SN/A// modification, are permitted provided that the following conditions are 20955SN/A// met: redistributions of source code must retain the above copyright 21955SN/A// notice, this list of conditions and the following disclaimer; 22955SN/A// redistributions in binary form must reproduce the above copyright 23955SN/A// notice, this list of conditions and the following disclaimer in the 24955SN/A// documentation and/or other materials provided with the distribution; 25955SN/A// neither the name of the copyright holders nor the names of its 26955SN/A// contributors may be used to endorse or promote products derived from 27955SN/A// this software without specific prior written permission. 28955SN/A// 29955SN/A// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30955SN/A// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31955SN/A// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32955SN/A// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33955SN/A// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34955SN/A// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35955SN/A// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36955SN/A// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37955SN/A// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38955SN/A// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39955SN/A// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40955SN/A// 41955SN/A// Authors: Stephen Hines 422665Ssaidi@eecs.umich.edu 432665Ssaidi@eecs.umich.edu//////////////////////////////////////////////////////////////////// 445863Snate@binkert.org// 45955SN/A// Breakpoint instructions 46955SN/A// 47955SN/A 48955SN/Aoutput header {{ 49955SN/A /** 508878Ssteve.reinhardt@amd.com * Static instruction class for Breakpoint (illegal) instructions. 512632Sstever@eecs.umich.edu * These cause simulator termination if they are executed in a 528878Ssteve.reinhardt@amd.com * non-speculative mode. This is a leaf class. 532632Sstever@eecs.umich.edu */ 54955SN/A class Breakpoint : public ArmStaticInst 558878Ssteve.reinhardt@amd.com { 562632Sstever@eecs.umich.edu public: 572761Sstever@eecs.umich.edu /// Constructor 582632Sstever@eecs.umich.edu Breakpoint(ExtMachInst _machInst) 592632Sstever@eecs.umich.edu : ArmStaticInst("Breakpoint", _machInst, No_OpClass) 602632Sstever@eecs.umich.edu { 612761Sstever@eecs.umich.edu // don't call execute() (which panics) if we're on a 622761Sstever@eecs.umich.edu // speculative path 632761Sstever@eecs.umich.edu flags[IsNonSpeculative] = true; 648878Ssteve.reinhardt@amd.com } 658878Ssteve.reinhardt@amd.com 662761Sstever@eecs.umich.edu Fault execute(ExecContext *, Trace::InstRecord *) const override; 672761Sstever@eecs.umich.edu 682761Sstever@eecs.umich.edu std::string 692761Sstever@eecs.umich.edu generateDisassembly(Addr pc, const SymbolTable *symtab) const override; 702761Sstever@eecs.umich.edu }; 718878Ssteve.reinhardt@amd.com}}; 728878Ssteve.reinhardt@amd.com 732632Sstever@eecs.umich.eduoutput decoder {{ 742632Sstever@eecs.umich.edu std::string 758878Ssteve.reinhardt@amd.com Breakpoint::generateDisassembly(Addr pc, const SymbolTable *symtab) const 768878Ssteve.reinhardt@amd.com { 772632Sstever@eecs.umich.edu return csprintf("%-10s (inst 0x%x)", "Breakpoint", machInst); 78955SN/A } 79955SN/A}}; 80955SN/A 815863Snate@binkert.orgoutput exec {{ 825863Snate@binkert.org Fault 835863Snate@binkert.org Breakpoint::execute(ExecContext *xc, Trace::InstRecord *traceData) const 845863Snate@binkert.org { 855863Snate@binkert.org return std::make_shared<PrefetchAbort>(xc->pcState().pc(), 865863Snate@binkert.org ArmFault::DebugEvent); 875863Snate@binkert.org } 885863Snate@binkert.org}}; 895863Snate@binkert.org 905863Snate@binkert.orgdef format ArmBkptHlt() {{ 915863Snate@binkert.org decode_block = ''' 928878Ssteve.reinhardt@amd.com { 935863Snate@binkert.org if (bits(machInst, 21)) { 945863Snate@binkert.org return new Breakpoint(machInst); 955863Snate@binkert.org } else { 969812Sandreas.hansson@arm.com uint32_t imm16 = (bits(machInst, 19, 8) << 4) | 979812Sandreas.hansson@arm.com (bits(machInst, 3, 0) << 0); 985863Snate@binkert.org return new Hlt(machInst, imm16); 999812Sandreas.hansson@arm.com } 1005863Snate@binkert.org } 1015863Snate@binkert.org ''' 1025863Snate@binkert.org}}; 1039812Sandreas.hansson@arm.com 1049812Sandreas.hansson@arm.com