xref: /gem5/src/arch/arm/isa/formats/breakpoint.isa

// -*- mode:c++ -*-

// Copyright (c) 2010 ARM Limited
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//
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// terms below provided that you ensure that this notice is replicated
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// Copyright (c) 2007-2008 The Florida State University
// All rights reserved.
//
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// modification, are permitted provided that the following conditions are
// met: redistributions of source code must retain the above copyright
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// Authors: Stephen Hines

////////////////////////////////////////////////////////////////////
//
// Unknown instructions
//

output header {{
    /**
     * Static instruction class for unknown (illegal) instructions.
     * These cause simulator termination if they are executed in a
     * non-speculative mode.  This is a leaf class.
     */
    class Unknown : public ArmStaticInst
    {
      public:
        /// Constructor
        Unknown(ExtMachInst _machInst)
            : ArmStaticInst("unknown", _machInst, No_OpClass)
        {
            // don't call execute() (which panics) if we're on a
            // speculative path
            flags[IsNonSpeculative] = true;
        }

        %(BasicExecDeclare)s

        std::string
        generateDisassembly(Addr pc, const SymbolTable *symtab) const;
    };
}};

output decoder {{
    std::string
    Unknown::generateDisassembly(Addr pc, const SymbolTable *symtab) const
    {
        return csprintf("%-10s (inst 0x%x, opcode 0x%x, binary:%s)",
                        "unknown", machInst, OPCODE, inst2string(machInst));
    }
}};

output exec {{
    Fault
    Unknown::execute(%(CPU_exec_context)s *xc,
                     Trace::InstRecord *traceData) const
    {
#if FULL_SYSTEM
        return new UndefinedInstruction;
#else
        return new UndefinedInstruction(machInst, true);
#endif
    }
}};

def format Unknown() {{
    decode_block = 'return new Unknown(machInst);\n'
}};