interrupts.hh revision 6757
13537SN/A/* 23537SN/A * Copyright (c) 2006 The Regents of The University of Michigan 36757SAli.Saidi@ARM.com * Copyright (c) 2009 ARM Limited 43537SN/A * All rights reserved. 53537SN/A * 63537SN/A * Redistribution and use in source and binary forms, with or without 73537SN/A * modification, are permitted provided that the following conditions are 83537SN/A * met: redistributions of source code must retain the above copyright 93537SN/A * notice, this list of conditions and the following disclaimer; 103537SN/A * redistributions in binary form must reproduce the above copyright 113537SN/A * notice, this list of conditions and the following disclaimer in the 123537SN/A * documentation and/or other materials provided with the distribution; 133537SN/A * neither the name of the copyright holders nor the names of its 143537SN/A * contributors may be used to endorse or promote products derived from 153537SN/A * this software without specific prior written permission. 163537SN/A * 173537SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 183537SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 193537SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 203537SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 213537SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 223537SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 233537SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 243537SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 253537SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 263537SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 273537SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 284103SN/A * 294103SN/A * Authors: Ali Saidi 303537SN/A */ 313537SN/A 326757SAli.Saidi@ARM.com#ifndef __ARCH_ARM_INTERRUPT_HH__ 336757SAli.Saidi@ARM.com#define __ARCH_ARM_INTERRUPT_HH__ 343537SN/A 356757SAli.Saidi@ARM.com#include "arch/arm/faults.hh" 366757SAli.Saidi@ARM.com#include "arch/arm/isa_traits.hh" 376757SAli.Saidi@ARM.com#include "arch/arm/registers.hh" 383827SN/A#include "cpu/thread_context.hh" 396757SAli.Saidi@ARM.com#include "params/ArmInterrupts.hh" 405647SN/A#include "sim/sim_object.hh" 413827SN/A 426757SAli.Saidi@ARM.comnamespace ArmISA 433537SN/A{ 443894SN/A 455647SN/Aclass Interrupts : public SimObject 464009SN/A{ 475810SN/A private: 485810SN/A BaseCPU * cpu; 494009SN/A 504103SN/A uint64_t intStatus; 514009SN/A 524009SN/A public: 535810SN/A 545810SN/A void 555810SN/A setCPU(BaseCPU * _cpu) 565810SN/A { 575810SN/A cpu = _cpu; 585810SN/A } 595810SN/A 606757SAli.Saidi@ARM.com typedef ArmInterruptsParams Params; 615647SN/A 625647SN/A const Params * 635647SN/A params() const 645647SN/A { 655647SN/A return dynamic_cast<const Params *>(_params); 665647SN/A } 675647SN/A 685810SN/A Interrupts(Params * p) : SimObject(p), cpu(NULL) 694009SN/A { 705704SN/A clearAll(); 714009SN/A } 724009SN/A 734009SN/A 745704SN/A void 755704SN/A post(int int_num, int index) 763537SN/A { 774009SN/A } 783894SN/A 795704SN/A void 805704SN/A clear(int int_num, int index) 814009SN/A { 824009SN/A } 833827SN/A 845704SN/A void 855704SN/A clearAll() 864009SN/A { 874103SN/A intStatus = 0; 884009SN/A } 893537SN/A 905704SN/A bool 915704SN/A checkInterrupts(ThreadContext *tc) const 924009SN/A { 934103SN/A return intStatus; 944009SN/A } 953537SN/A 965704SN/A Fault 975704SN/A getInterrupt(ThreadContext *tc) 984009SN/A { 996757SAli.Saidi@ARM.com warn_once("ARM Interrupts not handled\n"); 1004009SN/A return NoFault; 1014009SN/A } 1023537SN/A 1035704SN/A void 1045704SN/A updateIntrInfo(ThreadContext *tc) 1054009SN/A { 1063654SN/A 1074009SN/A } 1083654SN/A 1095704SN/A void 1105704SN/A serialize(std::ostream &os) 1114009SN/A { 1124009SN/A } 1133537SN/A 1145704SN/A void 1155704SN/A unserialize(Checkpoint *cp, const std::string §ion) 1164009SN/A { 1174009SN/A } 1184009SN/A}; 1196757SAli.Saidi@ARM.com} // namespace ARM_ISA 1203537SN/A 1216757SAli.Saidi@ARM.com#endif // __ARCH_ARM_INTERRUPT_HH__ 122