vfp.hh revision 7379
17375Sgblack@eecs.umich.edu/* 27375Sgblack@eecs.umich.edu * Copyright (c) 2010 ARM Limited 37375Sgblack@eecs.umich.edu * All rights reserved 47375Sgblack@eecs.umich.edu * 57375Sgblack@eecs.umich.edu * The license below extends only to copyright in the software and shall 67375Sgblack@eecs.umich.edu * not be construed as granting a license to any other intellectual 77375Sgblack@eecs.umich.edu * property including but not limited to intellectual property relating 87375Sgblack@eecs.umich.edu * to a hardware implementation of the functionality of the software 97375Sgblack@eecs.umich.edu * licensed hereunder. You may use the software subject to the license 107375Sgblack@eecs.umich.edu * terms below provided that you ensure that this notice is replicated 117375Sgblack@eecs.umich.edu * unmodified and in its entirety in all distributions of the software, 127375Sgblack@eecs.umich.edu * modified or unmodified, in source code or in binary form. 137375Sgblack@eecs.umich.edu * 147375Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 157375Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 167375Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 177375Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 187375Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 197375Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 207375Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 217375Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 227375Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 237375Sgblack@eecs.umich.edu * this software without specific prior written permission. 247375Sgblack@eecs.umich.edu * 257375Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 267375Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 277375Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 287375Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 297375Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 307375Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 317375Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 327375Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 337375Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 347375Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 357375Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 367375Sgblack@eecs.umich.edu * 377375Sgblack@eecs.umich.edu * Authors: Gabe Black 387375Sgblack@eecs.umich.edu */ 397375Sgblack@eecs.umich.edu 407375Sgblack@eecs.umich.edu#ifndef __ARCH_ARM_INSTS_VFP_HH__ 417375Sgblack@eecs.umich.edu#define __ARCH_ARM_INSTS_VFP_HH__ 427375Sgblack@eecs.umich.edu 437375Sgblack@eecs.umich.edu#include "arch/arm/insts/misc.hh" 447378Sgblack@eecs.umich.edu#include "arch/arm/miscregs.hh" 457378Sgblack@eecs.umich.edu#include <fenv.h> 467375Sgblack@eecs.umich.edu 477375Sgblack@eecs.umich.eduenum VfpMicroMode { 487375Sgblack@eecs.umich.edu VfpNotAMicroop, 497375Sgblack@eecs.umich.edu VfpMicroop, 507375Sgblack@eecs.umich.edu VfpFirstMicroop, 517375Sgblack@eecs.umich.edu VfpLastMicroop 527375Sgblack@eecs.umich.edu}; 537375Sgblack@eecs.umich.edu 547375Sgblack@eecs.umich.edutemplate<class T> 557375Sgblack@eecs.umich.edustatic inline void 567375Sgblack@eecs.umich.edusetVfpMicroFlags(VfpMicroMode mode, T &flags) 577375Sgblack@eecs.umich.edu{ 587375Sgblack@eecs.umich.edu switch (mode) { 597375Sgblack@eecs.umich.edu case VfpMicroop: 607375Sgblack@eecs.umich.edu flags[StaticInst::IsMicroop] = true; 617375Sgblack@eecs.umich.edu break; 627375Sgblack@eecs.umich.edu case VfpFirstMicroop: 637375Sgblack@eecs.umich.edu flags[StaticInst::IsMicroop] = 647375Sgblack@eecs.umich.edu flags[StaticInst::IsFirstMicroop] = true; 657375Sgblack@eecs.umich.edu break; 667375Sgblack@eecs.umich.edu case VfpLastMicroop: 677375Sgblack@eecs.umich.edu flags[StaticInst::IsMicroop] = 687375Sgblack@eecs.umich.edu flags[StaticInst::IsLastMicroop] = true; 697375Sgblack@eecs.umich.edu break; 707375Sgblack@eecs.umich.edu case VfpNotAMicroop: 717375Sgblack@eecs.umich.edu break; 727375Sgblack@eecs.umich.edu } 737376Sgblack@eecs.umich.edu if (mode == VfpMicroop || mode == VfpFirstMicroop) { 747376Sgblack@eecs.umich.edu flags[StaticInst::IsDelayedCommit] = true; 757376Sgblack@eecs.umich.edu } 767375Sgblack@eecs.umich.edu} 777375Sgblack@eecs.umich.edu 787378Sgblack@eecs.umich.eduenum FeExceptionBit 797378Sgblack@eecs.umich.edu{ 807378Sgblack@eecs.umich.edu FeDivByZero = FE_DIVBYZERO, 817378Sgblack@eecs.umich.edu FeInexact = FE_INEXACT, 827378Sgblack@eecs.umich.edu FeInvalid = FE_INVALID, 837378Sgblack@eecs.umich.edu FeOverflow = FE_OVERFLOW, 847378Sgblack@eecs.umich.edu FeUnderflow = FE_UNDERFLOW, 857378Sgblack@eecs.umich.edu FeAllExceptions = FE_ALL_EXCEPT 867378Sgblack@eecs.umich.edu}; 877378Sgblack@eecs.umich.edu 887378Sgblack@eecs.umich.eduenum FeRoundingMode 897378Sgblack@eecs.umich.edu{ 907378Sgblack@eecs.umich.edu FeRoundDown = FE_DOWNWARD, 917378Sgblack@eecs.umich.edu FeRoundNearest = FE_TONEAREST, 927378Sgblack@eecs.umich.edu FeRoundZero = FE_TOWARDZERO, 937378Sgblack@eecs.umich.edu FeRoundUpward = FE_UPWARD 947378Sgblack@eecs.umich.edu}; 957378Sgblack@eecs.umich.edu 967378Sgblack@eecs.umich.eduenum VfpRoundingMode 977378Sgblack@eecs.umich.edu{ 987378Sgblack@eecs.umich.edu VfpRoundNearest = 0, 997378Sgblack@eecs.umich.edu VfpRoundUpward = 1, 1007378Sgblack@eecs.umich.edu VfpRoundDown = 2, 1017378Sgblack@eecs.umich.edu VfpRoundZero = 3 1027378Sgblack@eecs.umich.edu}; 1037378Sgblack@eecs.umich.edu 1047379Sgblack@eecs.umich.edustatic inline uint64_t 1057379Sgblack@eecs.umich.eduvfpFpSToFixed(float val, bool isSigned, bool half, uint8_t imm) 1067379Sgblack@eecs.umich.edu{ 1077379Sgblack@eecs.umich.edu fesetround(FeRoundZero); 1087379Sgblack@eecs.umich.edu val = val * powf(2.0, imm); 1097379Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (val) : "m" (val)); 1107379Sgblack@eecs.umich.edu feclearexcept(FeAllExceptions); 1117379Sgblack@eecs.umich.edu if (isSigned) { 1127379Sgblack@eecs.umich.edu if (half) { 1137379Sgblack@eecs.umich.edu if (val < (int16_t)(1 << 15)) { 1147379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 1157379Sgblack@eecs.umich.edu return (int16_t)(1 << 15); 1167379Sgblack@eecs.umich.edu } 1177379Sgblack@eecs.umich.edu if (val > (int16_t)mask(15)) { 1187379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 1197379Sgblack@eecs.umich.edu return (int16_t)mask(15); 1207379Sgblack@eecs.umich.edu } 1217379Sgblack@eecs.umich.edu return (int16_t)val; 1227379Sgblack@eecs.umich.edu } else { 1237379Sgblack@eecs.umich.edu if (val < (int32_t)(1 << 31)) { 1247379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 1257379Sgblack@eecs.umich.edu return (int32_t)(1 << 31); 1267379Sgblack@eecs.umich.edu } 1277379Sgblack@eecs.umich.edu if (val > (int32_t)mask(31)) { 1287379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 1297379Sgblack@eecs.umich.edu return (int32_t)mask(31); 1307379Sgblack@eecs.umich.edu } 1317379Sgblack@eecs.umich.edu return (int32_t)val; 1327379Sgblack@eecs.umich.edu } 1337379Sgblack@eecs.umich.edu } else { 1347379Sgblack@eecs.umich.edu if (half) { 1357379Sgblack@eecs.umich.edu if (val < 0) { 1367379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 1377379Sgblack@eecs.umich.edu return 0; 1387379Sgblack@eecs.umich.edu } 1397379Sgblack@eecs.umich.edu if (val > (mask(16))) { 1407379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 1417379Sgblack@eecs.umich.edu return mask(16); 1427379Sgblack@eecs.umich.edu } 1437379Sgblack@eecs.umich.edu return (uint16_t)val; 1447379Sgblack@eecs.umich.edu } else { 1457379Sgblack@eecs.umich.edu if (val < 0) { 1467379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 1477379Sgblack@eecs.umich.edu return 0; 1487379Sgblack@eecs.umich.edu } 1497379Sgblack@eecs.umich.edu if (val > (mask(32))) { 1507379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 1517379Sgblack@eecs.umich.edu return mask(32); 1527379Sgblack@eecs.umich.edu } 1537379Sgblack@eecs.umich.edu return (uint32_t)val; 1547379Sgblack@eecs.umich.edu } 1557379Sgblack@eecs.umich.edu } 1567379Sgblack@eecs.umich.edu} 1577379Sgblack@eecs.umich.edu 1587379Sgblack@eecs.umich.edustatic inline float 1597379Sgblack@eecs.umich.eduvfpUFixedToFpS(uint32_t val, bool half, uint8_t imm) 1607379Sgblack@eecs.umich.edu{ 1617379Sgblack@eecs.umich.edu fesetround(FeRoundNearest); 1627379Sgblack@eecs.umich.edu if (half) 1637379Sgblack@eecs.umich.edu val = (uint16_t)val; 1647379Sgblack@eecs.umich.edu return val / powf(2.0, imm); 1657379Sgblack@eecs.umich.edu} 1667379Sgblack@eecs.umich.edu 1677379Sgblack@eecs.umich.edustatic inline float 1687379Sgblack@eecs.umich.eduvfpSFixedToFpS(int32_t val, bool half, uint8_t imm) 1697379Sgblack@eecs.umich.edu{ 1707379Sgblack@eecs.umich.edu fesetround(FeRoundNearest); 1717379Sgblack@eecs.umich.edu if (half) 1727379Sgblack@eecs.umich.edu val = sext<16>(val & mask(16)); 1737379Sgblack@eecs.umich.edu return val / powf(2.0, imm); 1747379Sgblack@eecs.umich.edu} 1757379Sgblack@eecs.umich.edu 1767379Sgblack@eecs.umich.edustatic inline uint64_t 1777379Sgblack@eecs.umich.eduvfpFpDToFixed(double val, bool isSigned, bool half, uint8_t imm) 1787379Sgblack@eecs.umich.edu{ 1797379Sgblack@eecs.umich.edu fesetround(FeRoundZero); 1807379Sgblack@eecs.umich.edu val = val * pow(2.0, imm); 1817379Sgblack@eecs.umich.edu __asm__ __volatile__("" : "=m" (val) : "m" (val)); 1827379Sgblack@eecs.umich.edu feclearexcept(FeAllExceptions); 1837379Sgblack@eecs.umich.edu if (isSigned) { 1847379Sgblack@eecs.umich.edu if (half) { 1857379Sgblack@eecs.umich.edu if (val < (int16_t)(1 << 15)) { 1867379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 1877379Sgblack@eecs.umich.edu return (int16_t)(1 << 15); 1887379Sgblack@eecs.umich.edu } 1897379Sgblack@eecs.umich.edu if (val > (int16_t)mask(15)) { 1907379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 1917379Sgblack@eecs.umich.edu return (int16_t)mask(15); 1927379Sgblack@eecs.umich.edu } 1937379Sgblack@eecs.umich.edu return (int16_t)val; 1947379Sgblack@eecs.umich.edu } else { 1957379Sgblack@eecs.umich.edu if (val < (int32_t)(1 << 31)) { 1967379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 1977379Sgblack@eecs.umich.edu return (int32_t)(1 << 31); 1987379Sgblack@eecs.umich.edu } 1997379Sgblack@eecs.umich.edu if (val > (int32_t)mask(31)) { 2007379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 2017379Sgblack@eecs.umich.edu return (int32_t)mask(31); 2027379Sgblack@eecs.umich.edu } 2037379Sgblack@eecs.umich.edu return (int32_t)val; 2047379Sgblack@eecs.umich.edu } 2057379Sgblack@eecs.umich.edu } else { 2067379Sgblack@eecs.umich.edu if (half) { 2077379Sgblack@eecs.umich.edu if (val < 0) { 2087379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 2097379Sgblack@eecs.umich.edu return 0; 2107379Sgblack@eecs.umich.edu } 2117379Sgblack@eecs.umich.edu if (val > mask(16)) { 2127379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 2137379Sgblack@eecs.umich.edu return mask(16); 2147379Sgblack@eecs.umich.edu } 2157379Sgblack@eecs.umich.edu return (uint16_t)val; 2167379Sgblack@eecs.umich.edu } else { 2177379Sgblack@eecs.umich.edu if (val < 0) { 2187379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 2197379Sgblack@eecs.umich.edu return 0; 2207379Sgblack@eecs.umich.edu } 2217379Sgblack@eecs.umich.edu if (val > mask(32)) { 2227379Sgblack@eecs.umich.edu feraiseexcept(FeInvalid); 2237379Sgblack@eecs.umich.edu return mask(32); 2247379Sgblack@eecs.umich.edu } 2257379Sgblack@eecs.umich.edu return (uint32_t)val; 2267379Sgblack@eecs.umich.edu } 2277379Sgblack@eecs.umich.edu } 2287379Sgblack@eecs.umich.edu} 2297379Sgblack@eecs.umich.edu 2307379Sgblack@eecs.umich.edustatic inline double 2317379Sgblack@eecs.umich.eduvfpUFixedToFpD(uint32_t val, bool half, uint8_t imm) 2327379Sgblack@eecs.umich.edu{ 2337379Sgblack@eecs.umich.edu fesetround(FeRoundNearest); 2347379Sgblack@eecs.umich.edu if (half) 2357379Sgblack@eecs.umich.edu val = (uint16_t)val; 2367379Sgblack@eecs.umich.edu return val / pow(2.0, imm); 2377379Sgblack@eecs.umich.edu} 2387379Sgblack@eecs.umich.edu 2397379Sgblack@eecs.umich.edustatic inline double 2407379Sgblack@eecs.umich.eduvfpSFixedToFpD(int32_t val, bool half, uint8_t imm) 2417379Sgblack@eecs.umich.edu{ 2427379Sgblack@eecs.umich.edu fesetround(FeRoundNearest); 2437379Sgblack@eecs.umich.edu if (half) 2447379Sgblack@eecs.umich.edu val = sext<16>(val & mask(16)); 2457379Sgblack@eecs.umich.edu return val / pow(2.0, imm); 2467379Sgblack@eecs.umich.edu} 2477379Sgblack@eecs.umich.edu 2487378Sgblack@eecs.umich.edutypedef int VfpSavedState; 2497378Sgblack@eecs.umich.edu 2507378Sgblack@eecs.umich.edustatic inline VfpSavedState 2517378Sgblack@eecs.umich.eduprepVfpFpscr(FPSCR fpscr) 2527378Sgblack@eecs.umich.edu{ 2537378Sgblack@eecs.umich.edu int roundingMode = fegetround(); 2547378Sgblack@eecs.umich.edu feclearexcept(FeAllExceptions); 2557378Sgblack@eecs.umich.edu switch (fpscr.rMode) { 2567378Sgblack@eecs.umich.edu case VfpRoundNearest: 2577378Sgblack@eecs.umich.edu fesetround(FeRoundNearest); 2587378Sgblack@eecs.umich.edu break; 2597378Sgblack@eecs.umich.edu case VfpRoundUpward: 2607378Sgblack@eecs.umich.edu fesetround(FeRoundUpward); 2617378Sgblack@eecs.umich.edu break; 2627378Sgblack@eecs.umich.edu case VfpRoundDown: 2637378Sgblack@eecs.umich.edu fesetround(FeRoundDown); 2647378Sgblack@eecs.umich.edu break; 2657378Sgblack@eecs.umich.edu case VfpRoundZero: 2667378Sgblack@eecs.umich.edu fesetround(FeRoundZero); 2677378Sgblack@eecs.umich.edu break; 2687378Sgblack@eecs.umich.edu } 2697378Sgblack@eecs.umich.edu return roundingMode; 2707378Sgblack@eecs.umich.edu} 2717378Sgblack@eecs.umich.edu 2727378Sgblack@eecs.umich.edustatic inline FPSCR 2737378Sgblack@eecs.umich.edusetVfpFpscr(FPSCR fpscr, VfpSavedState state) 2747378Sgblack@eecs.umich.edu{ 2757378Sgblack@eecs.umich.edu int exceptions = fetestexcept(FeAllExceptions); 2767378Sgblack@eecs.umich.edu if (exceptions & FeInvalid) { 2777378Sgblack@eecs.umich.edu fpscr.ioc = 1; 2787378Sgblack@eecs.umich.edu } 2797378Sgblack@eecs.umich.edu if (exceptions & FeDivByZero) { 2807378Sgblack@eecs.umich.edu fpscr.dzc = 1; 2817378Sgblack@eecs.umich.edu } 2827378Sgblack@eecs.umich.edu if (exceptions & FeOverflow) { 2837378Sgblack@eecs.umich.edu fpscr.ofc = 1; 2847378Sgblack@eecs.umich.edu } 2857378Sgblack@eecs.umich.edu if (exceptions & FeUnderflow) { 2867378Sgblack@eecs.umich.edu fpscr.ufc = 1; 2877378Sgblack@eecs.umich.edu } 2887378Sgblack@eecs.umich.edu if (exceptions & FeInexact) { 2897378Sgblack@eecs.umich.edu fpscr.ixc = 1; 2907378Sgblack@eecs.umich.edu } 2917378Sgblack@eecs.umich.edu fesetround(state); 2927378Sgblack@eecs.umich.edu return fpscr; 2937378Sgblack@eecs.umich.edu} 2947378Sgblack@eecs.umich.edu 2957376Sgblack@eecs.umich.educlass VfpMacroOp : public PredMacroOp 2967376Sgblack@eecs.umich.edu{ 2977376Sgblack@eecs.umich.edu public: 2987376Sgblack@eecs.umich.edu static bool 2997376Sgblack@eecs.umich.edu inScalarBank(IntRegIndex idx) 3007376Sgblack@eecs.umich.edu { 3017376Sgblack@eecs.umich.edu return (idx % 32) < 8; 3027376Sgblack@eecs.umich.edu } 3037376Sgblack@eecs.umich.edu 3047376Sgblack@eecs.umich.edu protected: 3057376Sgblack@eecs.umich.edu bool wide; 3067376Sgblack@eecs.umich.edu 3077376Sgblack@eecs.umich.edu VfpMacroOp(const char *mnem, ExtMachInst _machInst, 3087376Sgblack@eecs.umich.edu OpClass __opClass, bool _wide) : 3097376Sgblack@eecs.umich.edu PredMacroOp(mnem, _machInst, __opClass), wide(_wide) 3107376Sgblack@eecs.umich.edu {} 3117376Sgblack@eecs.umich.edu 3127376Sgblack@eecs.umich.edu IntRegIndex 3137376Sgblack@eecs.umich.edu addStride(IntRegIndex idx, unsigned stride) 3147376Sgblack@eecs.umich.edu { 3157376Sgblack@eecs.umich.edu if (wide) { 3167376Sgblack@eecs.umich.edu stride *= 2; 3177376Sgblack@eecs.umich.edu } 3187376Sgblack@eecs.umich.edu unsigned offset = idx % 8; 3197376Sgblack@eecs.umich.edu idx = (IntRegIndex)(idx - offset); 3207376Sgblack@eecs.umich.edu offset += stride; 3217376Sgblack@eecs.umich.edu idx = (IntRegIndex)(idx + (offset % 8)); 3227376Sgblack@eecs.umich.edu return idx; 3237376Sgblack@eecs.umich.edu } 3247376Sgblack@eecs.umich.edu 3257376Sgblack@eecs.umich.edu void 3267376Sgblack@eecs.umich.edu nextIdxs(IntRegIndex &dest, IntRegIndex &op1, IntRegIndex &op2) 3277376Sgblack@eecs.umich.edu { 3287376Sgblack@eecs.umich.edu unsigned stride = (machInst.fpscrStride == 0) ? 1 : 2; 3297376Sgblack@eecs.umich.edu assert(!inScalarBank(dest)); 3307376Sgblack@eecs.umich.edu dest = addStride(dest, stride); 3317376Sgblack@eecs.umich.edu op1 = addStride(op1, stride); 3327376Sgblack@eecs.umich.edu if (!inScalarBank(op2)) { 3337376Sgblack@eecs.umich.edu op2 = addStride(op2, stride); 3347376Sgblack@eecs.umich.edu } 3357376Sgblack@eecs.umich.edu } 3367376Sgblack@eecs.umich.edu 3377376Sgblack@eecs.umich.edu void 3387376Sgblack@eecs.umich.edu nextIdxs(IntRegIndex &dest, IntRegIndex &op1) 3397376Sgblack@eecs.umich.edu { 3407376Sgblack@eecs.umich.edu unsigned stride = (machInst.fpscrStride == 0) ? 1 : 2; 3417376Sgblack@eecs.umich.edu assert(!inScalarBank(dest)); 3427376Sgblack@eecs.umich.edu dest = addStride(dest, stride); 3437376Sgblack@eecs.umich.edu if (!inScalarBank(op1)) { 3447376Sgblack@eecs.umich.edu op1 = addStride(op1, stride); 3457376Sgblack@eecs.umich.edu } 3467376Sgblack@eecs.umich.edu } 3477376Sgblack@eecs.umich.edu 3487376Sgblack@eecs.umich.edu void 3497376Sgblack@eecs.umich.edu nextIdxs(IntRegIndex &dest) 3507376Sgblack@eecs.umich.edu { 3517376Sgblack@eecs.umich.edu unsigned stride = (machInst.fpscrStride == 0) ? 1 : 2; 3527376Sgblack@eecs.umich.edu assert(!inScalarBank(dest)); 3537376Sgblack@eecs.umich.edu dest = addStride(dest, stride); 3547376Sgblack@eecs.umich.edu } 3557376Sgblack@eecs.umich.edu}; 3567376Sgblack@eecs.umich.edu 3577375Sgblack@eecs.umich.educlass VfpRegRegOp : public RegRegOp 3587375Sgblack@eecs.umich.edu{ 3597375Sgblack@eecs.umich.edu protected: 3607375Sgblack@eecs.umich.edu VfpRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 3617375Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, 3627375Sgblack@eecs.umich.edu VfpMicroMode mode = VfpNotAMicroop) : 3637375Sgblack@eecs.umich.edu RegRegOp(mnem, _machInst, __opClass, _dest, _op1) 3647375Sgblack@eecs.umich.edu { 3657375Sgblack@eecs.umich.edu setVfpMicroFlags(mode, flags); 3667375Sgblack@eecs.umich.edu } 3677375Sgblack@eecs.umich.edu}; 3687375Sgblack@eecs.umich.edu 3697375Sgblack@eecs.umich.educlass VfpRegImmOp : public RegImmOp 3707375Sgblack@eecs.umich.edu{ 3717375Sgblack@eecs.umich.edu protected: 3727375Sgblack@eecs.umich.edu VfpRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 3737375Sgblack@eecs.umich.edu IntRegIndex _dest, uint64_t _imm, 3747375Sgblack@eecs.umich.edu VfpMicroMode mode = VfpNotAMicroop) : 3757375Sgblack@eecs.umich.edu RegImmOp(mnem, _machInst, __opClass, _dest, _imm) 3767375Sgblack@eecs.umich.edu { 3777375Sgblack@eecs.umich.edu setVfpMicroFlags(mode, flags); 3787375Sgblack@eecs.umich.edu } 3797375Sgblack@eecs.umich.edu}; 3807375Sgblack@eecs.umich.edu 3817375Sgblack@eecs.umich.educlass VfpRegRegImmOp : public RegRegImmOp 3827375Sgblack@eecs.umich.edu{ 3837375Sgblack@eecs.umich.edu protected: 3847375Sgblack@eecs.umich.edu VfpRegRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 3857375Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, 3867375Sgblack@eecs.umich.edu uint64_t _imm, VfpMicroMode mode = VfpNotAMicroop) : 3877375Sgblack@eecs.umich.edu RegRegImmOp(mnem, _machInst, __opClass, _dest, _op1, _imm) 3887375Sgblack@eecs.umich.edu { 3897375Sgblack@eecs.umich.edu setVfpMicroFlags(mode, flags); 3907375Sgblack@eecs.umich.edu } 3917375Sgblack@eecs.umich.edu}; 3927375Sgblack@eecs.umich.edu 3937375Sgblack@eecs.umich.educlass VfpRegRegRegOp : public RegRegRegOp 3947375Sgblack@eecs.umich.edu{ 3957375Sgblack@eecs.umich.edu protected: 3967375Sgblack@eecs.umich.edu VfpRegRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 3977375Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 3987375Sgblack@eecs.umich.edu VfpMicroMode mode = VfpNotAMicroop) : 3997375Sgblack@eecs.umich.edu RegRegRegOp(mnem, _machInst, __opClass, _dest, _op1, _op2) 4007375Sgblack@eecs.umich.edu { 4017375Sgblack@eecs.umich.edu setVfpMicroFlags(mode, flags); 4027375Sgblack@eecs.umich.edu } 4037375Sgblack@eecs.umich.edu}; 4047375Sgblack@eecs.umich.edu 4057375Sgblack@eecs.umich.edu#endif //__ARCH_ARM_INSTS_VFP_HH__ 406