pred_inst.hh revision 7140
17110Sgblack@eecs.umich.edu/* 27110Sgblack@eecs.umich.edu * Copyright (c) 2010 ARM Limited 37110Sgblack@eecs.umich.edu * All rights reserved 47110Sgblack@eecs.umich.edu * 57110Sgblack@eecs.umich.edu * The license below extends only to copyright in the software and shall 67110Sgblack@eecs.umich.edu * not be construed as granting a license to any other intellectual 77110Sgblack@eecs.umich.edu * property including but not limited to intellectual property relating 87110Sgblack@eecs.umich.edu * to a hardware implementation of the functionality of the software 97110Sgblack@eecs.umich.edu * licensed hereunder. You may use the software subject to the license 107110Sgblack@eecs.umich.edu * terms below provided that you ensure that this notice is replicated 117110Sgblack@eecs.umich.edu * unmodified and in its entirety in all distributions of the software, 127110Sgblack@eecs.umich.edu * modified or unmodified, in source code or in binary form. 137110Sgblack@eecs.umich.edu * 147110Sgblack@eecs.umich.edu * Copyright (c) 2007-2008 The Florida State University 156253Sgblack@eecs.umich.edu * All rights reserved. 166253Sgblack@eecs.umich.edu * 176253Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 186253Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 196253Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 206253Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 216253Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 226253Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 236253Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 246253Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 256253Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 266253Sgblack@eecs.umich.edu * this software without specific prior written permission. 276253Sgblack@eecs.umich.edu * 286253Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 296253Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 306253Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 316253Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 326253Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 336253Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 346253Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 356253Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 366253Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 376253Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 386253Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 396253Sgblack@eecs.umich.edu * 406253Sgblack@eecs.umich.edu * Authors: Stephen Hines 416253Sgblack@eecs.umich.edu */ 426253Sgblack@eecs.umich.edu#ifndef __ARCH_ARM_INSTS_PREDINST_HH__ 436253Sgblack@eecs.umich.edu#define __ARCH_ARM_INSTS_PREDINST_HH__ 446253Sgblack@eecs.umich.edu 456253Sgblack@eecs.umich.edu#include "arch/arm/insts/static_inst.hh" 466253Sgblack@eecs.umich.edu#include "base/trace.hh" 476253Sgblack@eecs.umich.edu 486253Sgblack@eecs.umich.edunamespace ArmISA 496253Sgblack@eecs.umich.edu{ 506253Sgblack@eecs.umich.edustatic inline uint32_t 516253Sgblack@eecs.umich.edurotate_imm(uint32_t immValue, int rotateValue) 526253Sgblack@eecs.umich.edu{ 536253Sgblack@eecs.umich.edu return ((immValue >> (rotateValue & 31)) | 546253Sgblack@eecs.umich.edu (immValue << (32 - (rotateValue & 31)))); 556253Sgblack@eecs.umich.edu} 566253Sgblack@eecs.umich.edu 577140Sgblack@eecs.umich.edustatic inline uint32_t 587140Sgblack@eecs.umich.edumodified_imm(uint8_t ctrlImm, uint8_t dataImm) 597140Sgblack@eecs.umich.edu{ 607140Sgblack@eecs.umich.edu uint32_t bigData = dataImm; 617140Sgblack@eecs.umich.edu uint32_t bigCtrl = ctrlImm; 627140Sgblack@eecs.umich.edu if (bigCtrl < 4) { 637140Sgblack@eecs.umich.edu switch (bigCtrl) { 647140Sgblack@eecs.umich.edu case 0: 657140Sgblack@eecs.umich.edu return bigData; 667140Sgblack@eecs.umich.edu case 1: 677140Sgblack@eecs.umich.edu return bigData | (bigData << 16); 687140Sgblack@eecs.umich.edu case 2: 697140Sgblack@eecs.umich.edu return (bigData << 8) | (bigData << 24); 707140Sgblack@eecs.umich.edu case 3: 717140Sgblack@eecs.umich.edu return (bigData << 0) | (bigData << 8) | 727140Sgblack@eecs.umich.edu (bigData << 16) | (bigData << 24); 737140Sgblack@eecs.umich.edu } 747140Sgblack@eecs.umich.edu } 757140Sgblack@eecs.umich.edu bigCtrl = (bigCtrl << 1) | ((bigData >> 7) & 0x1); 767140Sgblack@eecs.umich.edu bigData |= (1 << 7); 777140Sgblack@eecs.umich.edu return bigData << (32 - bigCtrl); 787140Sgblack@eecs.umich.edu} 797140Sgblack@eecs.umich.edu 807140Sgblack@eecs.umich.edu 816253Sgblack@eecs.umich.edu/** 826253Sgblack@eecs.umich.edu * Base class for predicated integer operations. 836253Sgblack@eecs.umich.edu */ 846253Sgblack@eecs.umich.educlass PredOp : public ArmStaticInst 856253Sgblack@eecs.umich.edu{ 866253Sgblack@eecs.umich.edu protected: 876253Sgblack@eecs.umich.edu 886253Sgblack@eecs.umich.edu ConditionCode condCode; 896253Sgblack@eecs.umich.edu 906253Sgblack@eecs.umich.edu /// Constructor 917099Sgblack@eecs.umich.edu PredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 926253Sgblack@eecs.umich.edu ArmStaticInst(mnem, _machInst, __opClass), 936253Sgblack@eecs.umich.edu condCode((ConditionCode)(unsigned)machInst.condCode) 946253Sgblack@eecs.umich.edu { 956253Sgblack@eecs.umich.edu } 966253Sgblack@eecs.umich.edu}; 976253Sgblack@eecs.umich.edu 986253Sgblack@eecs.umich.edu/** 996253Sgblack@eecs.umich.edu * Base class for predicated immediate operations. 1006253Sgblack@eecs.umich.edu */ 1017110Sgblack@eecs.umich.educlass PredImmOpBase : public PredOp 1026253Sgblack@eecs.umich.edu{ 1036306Sgblack@eecs.umich.edu protected: 1046253Sgblack@eecs.umich.edu 1056306Sgblack@eecs.umich.edu uint32_t imm; 1066306Sgblack@eecs.umich.edu uint32_t rotated_imm; 1076306Sgblack@eecs.umich.edu uint32_t rotated_carry; 1086253Sgblack@eecs.umich.edu 1096306Sgblack@eecs.umich.edu /// Constructor 1107110Sgblack@eecs.umich.edu PredImmOpBase(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 1117110Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 1127110Sgblack@eecs.umich.edu imm(machInst.imm), rotated_imm(0), rotated_carry(0) 1137110Sgblack@eecs.umich.edu { 1147110Sgblack@eecs.umich.edu } 1157110Sgblack@eecs.umich.edu 1167110Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 1177110Sgblack@eecs.umich.edu}; 1187110Sgblack@eecs.umich.edu 1197110Sgblack@eecs.umich.edu/** 1207110Sgblack@eecs.umich.edu * Base class for regular predicated immediate operations. 1217110Sgblack@eecs.umich.edu */ 1227110Sgblack@eecs.umich.educlass PredImmOp : public PredImmOpBase 1237110Sgblack@eecs.umich.edu{ 1247110Sgblack@eecs.umich.edu protected: 1257110Sgblack@eecs.umich.edu 1267110Sgblack@eecs.umich.edu uint32_t rotate; 1277110Sgblack@eecs.umich.edu 1287110Sgblack@eecs.umich.edu /// Constructor 1297099Sgblack@eecs.umich.edu PredImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 1307110Sgblack@eecs.umich.edu PredImmOpBase(mnem, _machInst, __opClass), 1317110Sgblack@eecs.umich.edu rotate(machInst.rotate << 1) 1326306Sgblack@eecs.umich.edu { 1336306Sgblack@eecs.umich.edu rotated_imm = rotate_imm(imm, rotate); 1346306Sgblack@eecs.umich.edu if (rotate != 0) 1357110Sgblack@eecs.umich.edu rotated_carry = bits(rotated_imm, 31); 1366306Sgblack@eecs.umich.edu } 1377110Sgblack@eecs.umich.edu}; 1386306Sgblack@eecs.umich.edu 1397110Sgblack@eecs.umich.edu/** 1407110Sgblack@eecs.umich.edu * Base class for modified predicated immediate operations. 1417110Sgblack@eecs.umich.edu */ 1427110Sgblack@eecs.umich.educlass PredModImmOp : public PredImmOpBase 1437110Sgblack@eecs.umich.edu{ 1447110Sgblack@eecs.umich.edu protected: 1457110Sgblack@eecs.umich.edu 1467110Sgblack@eecs.umich.edu uint8_t ctrlImm; 1477110Sgblack@eecs.umich.edu uint8_t dataImm; 1487110Sgblack@eecs.umich.edu 1497110Sgblack@eecs.umich.edu 1507110Sgblack@eecs.umich.edu /// Constructor 1517110Sgblack@eecs.umich.edu PredModImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 1527110Sgblack@eecs.umich.edu PredImmOpBase(mnem, _machInst, __opClass), 1537110Sgblack@eecs.umich.edu ctrlImm(bits(machInst.instBits, 26) << 3 | 1547110Sgblack@eecs.umich.edu bits(machInst.instBits, 14, 12)), 1557110Sgblack@eecs.umich.edu dataImm(bits(machInst.instBits, 7, 0)) 1567110Sgblack@eecs.umich.edu { 1577110Sgblack@eecs.umich.edu rotated_imm = modified_imm(ctrlImm, dataImm); 1587110Sgblack@eecs.umich.edu rotated_carry = bits(rotated_imm, 31); 1597110Sgblack@eecs.umich.edu } 1606253Sgblack@eecs.umich.edu}; 1616253Sgblack@eecs.umich.edu 1626253Sgblack@eecs.umich.edu/** 1636253Sgblack@eecs.umich.edu * Base class for predicated integer operations. 1646253Sgblack@eecs.umich.edu */ 1656253Sgblack@eecs.umich.educlass PredIntOp : public PredOp 1666253Sgblack@eecs.umich.edu{ 1676306Sgblack@eecs.umich.edu protected: 1686253Sgblack@eecs.umich.edu 1696306Sgblack@eecs.umich.edu uint32_t shift_size; 1706306Sgblack@eecs.umich.edu uint32_t shift; 1716253Sgblack@eecs.umich.edu 1726306Sgblack@eecs.umich.edu /// Constructor 1737099Sgblack@eecs.umich.edu PredIntOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 1746306Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 1756306Sgblack@eecs.umich.edu shift_size(machInst.shiftSize), shift(machInst.shift) 1766306Sgblack@eecs.umich.edu { 1776306Sgblack@eecs.umich.edu } 1786306Sgblack@eecs.umich.edu 1796306Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 1806253Sgblack@eecs.umich.edu}; 1816253Sgblack@eecs.umich.edu 1827137Sgblack@eecs.umich.educlass DataImmOp : public PredOp 1837137Sgblack@eecs.umich.edu{ 1847137Sgblack@eecs.umich.edu protected: 1857137Sgblack@eecs.umich.edu IntRegIndex dest, op1; 1867137Sgblack@eecs.umich.edu uint32_t imm; 1877137Sgblack@eecs.umich.edu // Whether the carry flag should be modified if that's an option for 1887137Sgblack@eecs.umich.edu // this instruction. 1897137Sgblack@eecs.umich.edu bool rotC; 1907137Sgblack@eecs.umich.edu 1917137Sgblack@eecs.umich.edu DataImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 1927137Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, uint32_t _imm, bool _rotC) : 1937137Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 1947137Sgblack@eecs.umich.edu dest(_dest), op1(_op1), imm(_imm), rotC(_rotC) 1957137Sgblack@eecs.umich.edu {} 1967137Sgblack@eecs.umich.edu}; 1977137Sgblack@eecs.umich.edu 1987137Sgblack@eecs.umich.educlass DataRegOp : public PredOp 1997137Sgblack@eecs.umich.edu{ 2007137Sgblack@eecs.umich.edu protected: 2017137Sgblack@eecs.umich.edu IntRegIndex dest, op1, op2; 2027137Sgblack@eecs.umich.edu int32_t shiftAmt; 2037137Sgblack@eecs.umich.edu ArmShiftType shiftType; 2047137Sgblack@eecs.umich.edu 2057137Sgblack@eecs.umich.edu DataRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 2067137Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 2077137Sgblack@eecs.umich.edu int32_t _shiftAmt, ArmShiftType _shiftType) : 2087137Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 2097137Sgblack@eecs.umich.edu dest(_dest), op1(_op1), op2(_op2), 2107137Sgblack@eecs.umich.edu shiftAmt(_shiftAmt), shiftType(_shiftType) 2117137Sgblack@eecs.umich.edu {} 2127137Sgblack@eecs.umich.edu}; 2137137Sgblack@eecs.umich.edu 2147137Sgblack@eecs.umich.educlass DataRegRegOp : public PredOp 2157137Sgblack@eecs.umich.edu{ 2167137Sgblack@eecs.umich.edu protected: 2177137Sgblack@eecs.umich.edu IntRegIndex dest, op1, op2, shift; 2187137Sgblack@eecs.umich.edu ArmShiftType shiftType; 2197137Sgblack@eecs.umich.edu 2207137Sgblack@eecs.umich.edu DataRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 2217137Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 2227137Sgblack@eecs.umich.edu IntRegIndex _shift, ArmShiftType _shiftType) : 2237137Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 2247137Sgblack@eecs.umich.edu dest(_dest), op1(_op1), op2(_op2), shift(_shift), 2257137Sgblack@eecs.umich.edu shiftType(_shiftType) 2267137Sgblack@eecs.umich.edu {} 2277137Sgblack@eecs.umich.edu}; 2287137Sgblack@eecs.umich.edu 2296253Sgblack@eecs.umich.edu/** 2306253Sgblack@eecs.umich.edu * Base class for predicated macro-operations. 2316253Sgblack@eecs.umich.edu */ 2326253Sgblack@eecs.umich.educlass PredMacroOp : public PredOp 2336253Sgblack@eecs.umich.edu{ 2346306Sgblack@eecs.umich.edu protected: 2356253Sgblack@eecs.umich.edu 2366306Sgblack@eecs.umich.edu uint32_t numMicroops; 2376306Sgblack@eecs.umich.edu StaticInstPtr * microOps; 2386253Sgblack@eecs.umich.edu 2396306Sgblack@eecs.umich.edu /// Constructor 2407099Sgblack@eecs.umich.edu PredMacroOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 2416306Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 2426306Sgblack@eecs.umich.edu numMicroops(0) 2436306Sgblack@eecs.umich.edu { 2446306Sgblack@eecs.umich.edu // We rely on the subclasses of this object to handle the 2456306Sgblack@eecs.umich.edu // initialization of the micro-operations, since they are 2466306Sgblack@eecs.umich.edu // all of variable length 2476306Sgblack@eecs.umich.edu flags[IsMacroop] = true; 2486306Sgblack@eecs.umich.edu } 2496253Sgblack@eecs.umich.edu 2506306Sgblack@eecs.umich.edu ~PredMacroOp() 2516306Sgblack@eecs.umich.edu { 2526306Sgblack@eecs.umich.edu if (numMicroops) 2536306Sgblack@eecs.umich.edu delete [] microOps; 2546306Sgblack@eecs.umich.edu } 2556253Sgblack@eecs.umich.edu 2566306Sgblack@eecs.umich.edu StaticInstPtr 2576306Sgblack@eecs.umich.edu fetchMicroop(MicroPC microPC) 2586306Sgblack@eecs.umich.edu { 2596306Sgblack@eecs.umich.edu assert(microPC < numMicroops); 2606306Sgblack@eecs.umich.edu return microOps[microPC]; 2616306Sgblack@eecs.umich.edu } 2626253Sgblack@eecs.umich.edu 2636306Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 2646253Sgblack@eecs.umich.edu}; 2656253Sgblack@eecs.umich.edu 2666253Sgblack@eecs.umich.edu/** 2676253Sgblack@eecs.umich.edu * Base class for predicated micro-operations. 2686253Sgblack@eecs.umich.edu */ 2696253Sgblack@eecs.umich.educlass PredMicroop : public PredOp 2706253Sgblack@eecs.umich.edu{ 2716306Sgblack@eecs.umich.edu /// Constructor 2727099Sgblack@eecs.umich.edu PredMicroop(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 2736306Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass) 2746306Sgblack@eecs.umich.edu { 2756306Sgblack@eecs.umich.edu flags[IsMicroop] = true; 2766306Sgblack@eecs.umich.edu } 2776253Sgblack@eecs.umich.edu}; 2786253Sgblack@eecs.umich.edu} 2796253Sgblack@eecs.umich.edu 2806253Sgblack@eecs.umich.edu#endif //__ARCH_ARM_INSTS_PREDINST_HH__ 281