misc.hh revision 12358:386d26feb00f
17119Sgblack@eecs.umich.edu/* 27119Sgblack@eecs.umich.edu * Copyright (c) 2010, 2012-2013, 2017 ARM Limited 37119Sgblack@eecs.umich.edu * All rights reserved 47119Sgblack@eecs.umich.edu * 57119Sgblack@eecs.umich.edu * The license below extends only to copyright in the software and shall 67119Sgblack@eecs.umich.edu * not be construed as granting a license to any other intellectual 77119Sgblack@eecs.umich.edu * property including but not limited to intellectual property relating 87119Sgblack@eecs.umich.edu * to a hardware implementation of the functionality of the software 97119Sgblack@eecs.umich.edu * licensed hereunder. You may use the software subject to the license 107119Sgblack@eecs.umich.edu * terms below provided that you ensure that this notice is replicated 117119Sgblack@eecs.umich.edu * unmodified and in its entirety in all distributions of the software, 127119Sgblack@eecs.umich.edu * modified or unmodified, in source code or in binary form. 137119Sgblack@eecs.umich.edu * 147119Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 157119Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 167119Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 177119Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 187119Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 197119Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 207119Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 217119Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 227119Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 237119Sgblack@eecs.umich.edu * this software without specific prior written permission. 247119Sgblack@eecs.umich.edu * 257119Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 267119Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 277119Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 287119Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 297119Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 307119Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 317119Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 327119Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 337119Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 347119Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 357119Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 367119Sgblack@eecs.umich.edu * 377119Sgblack@eecs.umich.edu * Authors: Gabe Black 387119Sgblack@eecs.umich.edu */ 397119Sgblack@eecs.umich.edu 407119Sgblack@eecs.umich.edu#ifndef __ARCH_ARM_INSTS_MISC_HH__ 417292Sgblack@eecs.umich.edu#define __ARCH_ARM_INSTS_MISC_HH__ 427303Sgblack@eecs.umich.edu 437279Sgblack@eecs.umich.edu#include "arch/arm/insts/pred_inst.hh" 447119Sgblack@eecs.umich.edu 457119Sgblack@eecs.umich.educlass MrsOp : public PredOp 467119Sgblack@eecs.umich.edu{ 477119Sgblack@eecs.umich.edu protected: 487205Sgblack@eecs.umich.edu IntRegIndex dest; 497205Sgblack@eecs.umich.edu 507119Sgblack@eecs.umich.edu MrsOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 517119Sgblack@eecs.umich.edu IntRegIndex _dest) : 527119Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), dest(_dest) 537294Sgblack@eecs.umich.edu {} 547119Sgblack@eecs.umich.edu 557205Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 567205Sgblack@eecs.umich.edu}; 577205Sgblack@eecs.umich.edu 587119Sgblack@eecs.umich.educlass MsrBase : public PredOp 597119Sgblack@eecs.umich.edu{ 607119Sgblack@eecs.umich.edu protected: 617119Sgblack@eecs.umich.edu uint8_t byteMask; 627119Sgblack@eecs.umich.edu 637205Sgblack@eecs.umich.edu MsrBase(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 647205Sgblack@eecs.umich.edu uint8_t _byteMask) : 657205Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), byteMask(_byteMask) 667292Sgblack@eecs.umich.edu {} 677292Sgblack@eecs.umich.edu 687292Sgblack@eecs.umich.edu void printMsrBase(std::ostream &os) const; 697205Sgblack@eecs.umich.edu}; 707279Sgblack@eecs.umich.edu 717279Sgblack@eecs.umich.educlass MsrImmOp : public MsrBase 727279Sgblack@eecs.umich.edu{ 737303Sgblack@eecs.umich.edu protected: 747303Sgblack@eecs.umich.edu uint32_t imm; 757303Sgblack@eecs.umich.edu 767303Sgblack@eecs.umich.edu MsrImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 777303Sgblack@eecs.umich.edu uint32_t _imm, uint8_t _byteMask) : 787303Sgblack@eecs.umich.edu MsrBase(mnem, _machInst, __opClass, _byteMask), imm(_imm) 797279Sgblack@eecs.umich.edu {} 807279Sgblack@eecs.umich.edu 817279Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 827119Sgblack@eecs.umich.edu}; 837279Sgblack@eecs.umich.edu 847279Sgblack@eecs.umich.educlass MsrRegOp : public MsrBase 857279Sgblack@eecs.umich.edu{ 867279Sgblack@eecs.umich.edu protected: 877279Sgblack@eecs.umich.edu IntRegIndex op1; 887279Sgblack@eecs.umich.edu 897119Sgblack@eecs.umich.edu MsrRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 907119Sgblack@eecs.umich.edu IntRegIndex _op1, uint8_t _byteMask) : 917119Sgblack@eecs.umich.edu MsrBase(mnem, _machInst, __opClass, _byteMask), op1(_op1) 927119Sgblack@eecs.umich.edu {} 937119Sgblack@eecs.umich.edu 947119Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 957119Sgblack@eecs.umich.edu}; 967119Sgblack@eecs.umich.edu 977303Sgblack@eecs.umich.educlass MrrcOp : public PredOp 987303Sgblack@eecs.umich.edu{ 997279Sgblack@eecs.umich.edu protected: 1007205Sgblack@eecs.umich.edu MiscRegIndex op1; 1017205Sgblack@eecs.umich.edu IntRegIndex dest; 1027303Sgblack@eecs.umich.edu IntRegIndex dest2; 1037205Sgblack@eecs.umich.edu uint32_t imm; 1047292Sgblack@eecs.umich.edu 1057303Sgblack@eecs.umich.edu MrrcOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 1067292Sgblack@eecs.umich.edu MiscRegIndex _op1, IntRegIndex _dest, IntRegIndex _dest2, 1077292Sgblack@eecs.umich.edu uint32_t _imm) : 1087292Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), op1(_op1), dest(_dest), 1097292Sgblack@eecs.umich.edu dest2(_dest2), imm(_imm) 1107292Sgblack@eecs.umich.edu {} 1117292Sgblack@eecs.umich.edu 1127292Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 1137303Sgblack@eecs.umich.edu}; 1147303Sgblack@eecs.umich.edu 1157205Sgblack@eecs.umich.educlass McrrOp : public PredOp 1167205Sgblack@eecs.umich.edu{ 1177205Sgblack@eecs.umich.edu protected: 1187205Sgblack@eecs.umich.edu IntRegIndex op1; 1197205Sgblack@eecs.umich.edu IntRegIndex op2; 1207205Sgblack@eecs.umich.edu MiscRegIndex dest; 1217205Sgblack@eecs.umich.edu uint32_t imm; 1227292Sgblack@eecs.umich.edu 1237303Sgblack@eecs.umich.edu McrrOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 1247303Sgblack@eecs.umich.edu IntRegIndex _op1, IntRegIndex _op2, MiscRegIndex _dest, 1257205Sgblack@eecs.umich.edu uint32_t _imm) : 1267119Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), op1(_op1), op2(_op2), 1277119Sgblack@eecs.umich.edu dest(_dest), imm(_imm) 1287119Sgblack@eecs.umich.edu {} 1297119Sgblack@eecs.umich.edu 1307119Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 1317119Sgblack@eecs.umich.edu}; 1327119Sgblack@eecs.umich.edu 1337119Sgblack@eecs.umich.educlass ImmOp : public PredOp 1347119Sgblack@eecs.umich.edu{ 1357119Sgblack@eecs.umich.edu protected: 1367119Sgblack@eecs.umich.edu uint64_t imm; 1377119Sgblack@eecs.umich.edu 1387119Sgblack@eecs.umich.edu ImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 1397119Sgblack@eecs.umich.edu uint64_t _imm) : 1407119Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), imm(_imm) 1417119Sgblack@eecs.umich.edu {} 1427119Sgblack@eecs.umich.edu 1437119Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 1447119Sgblack@eecs.umich.edu}; 1457119Sgblack@eecs.umich.edu 1467119Sgblack@eecs.umich.educlass RegImmOp : public PredOp 1477119Sgblack@eecs.umich.edu{ 1487119Sgblack@eecs.umich.edu protected: 1497119Sgblack@eecs.umich.edu IntRegIndex dest; 1507119Sgblack@eecs.umich.edu uint64_t imm; 1517119Sgblack@eecs.umich.edu 1527119Sgblack@eecs.umich.edu RegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 1537119Sgblack@eecs.umich.edu IntRegIndex _dest, uint64_t _imm) : 1547119Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), dest(_dest), imm(_imm) 1557119Sgblack@eecs.umich.edu {} 1567119Sgblack@eecs.umich.edu 1577119Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 1587119Sgblack@eecs.umich.edu}; 1597119Sgblack@eecs.umich.edu 1607119Sgblack@eecs.umich.educlass RegRegOp : public PredOp 1617119Sgblack@eecs.umich.edu{ 1627119Sgblack@eecs.umich.edu protected: 1637119Sgblack@eecs.umich.edu IntRegIndex dest; 1647119Sgblack@eecs.umich.edu IntRegIndex op1; 1657119Sgblack@eecs.umich.edu 1667119Sgblack@eecs.umich.edu RegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 1677119Sgblack@eecs.umich.edu IntRegIndex _dest, IntRegIndex _op1) : 1687119Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), dest(_dest), op1(_op1) 1697119Sgblack@eecs.umich.edu {} 1707119Sgblack@eecs.umich.edu 1717119Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 1727119Sgblack@eecs.umich.edu}; 1737119Sgblack@eecs.umich.edu 1747119Sgblack@eecs.umich.educlass RegImmRegOp : public PredOp 1757119Sgblack@eecs.umich.edu{ 1767119Sgblack@eecs.umich.edu protected: 1777119Sgblack@eecs.umich.edu IntRegIndex dest; 1787119Sgblack@eecs.umich.edu uint64_t imm; 1797132Sgblack@eecs.umich.edu IntRegIndex op1; 1807119Sgblack@eecs.umich.edu 1817132Sgblack@eecs.umich.edu RegImmRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 1827119Sgblack@eecs.umich.edu IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1) : 1837132Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), 1847119Sgblack@eecs.umich.edu dest(_dest), imm(_imm), op1(_op1) 1857119Sgblack@eecs.umich.edu {} 1867119Sgblack@eecs.umich.edu 1877119Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 1887119Sgblack@eecs.umich.edu}; 189 190class RegRegRegImmOp : public PredOp 191{ 192 protected: 193 IntRegIndex dest; 194 IntRegIndex op1; 195 IntRegIndex op2; 196 uint64_t imm; 197 198 RegRegRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 199 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 200 uint64_t _imm) : 201 PredOp(mnem, _machInst, __opClass), 202 dest(_dest), op1(_op1), op2(_op2), imm(_imm) 203 {} 204 205 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 206}; 207 208class RegRegRegRegOp : public PredOp 209{ 210 protected: 211 IntRegIndex dest; 212 IntRegIndex op1; 213 IntRegIndex op2; 214 IntRegIndex op3; 215 216 RegRegRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 217 IntRegIndex _dest, IntRegIndex _op1, 218 IntRegIndex _op2, IntRegIndex _op3) : 219 PredOp(mnem, _machInst, __opClass), 220 dest(_dest), op1(_op1), op2(_op2), op3(_op3) 221 {} 222 223 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 224}; 225 226class RegRegRegOp : public PredOp 227{ 228 protected: 229 IntRegIndex dest; 230 IntRegIndex op1; 231 IntRegIndex op2; 232 233 RegRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 234 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2) : 235 PredOp(mnem, _machInst, __opClass), 236 dest(_dest), op1(_op1), op2(_op2) 237 {} 238 239 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 240}; 241 242class RegRegImmOp : public PredOp 243{ 244 protected: 245 IntRegIndex dest; 246 IntRegIndex op1; 247 uint64_t imm; 248 249 RegRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 250 IntRegIndex _dest, IntRegIndex _op1, 251 uint64_t _imm) : 252 PredOp(mnem, _machInst, __opClass), 253 dest(_dest), op1(_op1), imm(_imm) 254 {} 255 256 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 257}; 258 259class MiscRegRegImmOp : public PredOp 260{ 261 protected: 262 MiscRegIndex dest; 263 IntRegIndex op1; 264 uint64_t imm; 265 266 MiscRegRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 267 MiscRegIndex _dest, IntRegIndex _op1, 268 uint64_t _imm) : 269 PredOp(mnem, _machInst, __opClass), 270 dest(_dest), op1(_op1), imm(_imm) 271 {} 272 273 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 274}; 275 276class RegMiscRegImmOp : public PredOp 277{ 278 protected: 279 IntRegIndex dest; 280 MiscRegIndex op1; 281 uint64_t imm; 282 283 RegMiscRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 284 IntRegIndex _dest, MiscRegIndex _op1, 285 uint64_t _imm) : 286 PredOp(mnem, _machInst, __opClass), 287 dest(_dest), op1(_op1), imm(_imm) 288 {} 289 290 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 291}; 292 293class RegImmImmOp : public PredOp 294{ 295 protected: 296 IntRegIndex dest; 297 uint64_t imm1; 298 uint64_t imm2; 299 300 RegImmImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 301 IntRegIndex _dest, uint64_t _imm1, uint64_t _imm2) : 302 PredOp(mnem, _machInst, __opClass), 303 dest(_dest), imm1(_imm1), imm2(_imm2) 304 {} 305 306 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 307}; 308 309class RegRegImmImmOp : public PredOp 310{ 311 protected: 312 IntRegIndex dest; 313 IntRegIndex op1; 314 uint64_t imm1; 315 uint64_t imm2; 316 317 RegRegImmImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 318 IntRegIndex _dest, IntRegIndex _op1, 319 uint64_t _imm1, uint64_t _imm2) : 320 PredOp(mnem, _machInst, __opClass), 321 dest(_dest), op1(_op1), imm1(_imm1), imm2(_imm2) 322 {} 323 324 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 325}; 326 327class RegImmRegShiftOp : public PredOp 328{ 329 protected: 330 IntRegIndex dest; 331 uint64_t imm; 332 IntRegIndex op1; 333 int32_t shiftAmt; 334 ArmShiftType shiftType; 335 336 RegImmRegShiftOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 337 IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1, 338 int32_t _shiftAmt, ArmShiftType _shiftType) : 339 PredOp(mnem, _machInst, __opClass), 340 dest(_dest), imm(_imm), op1(_op1), 341 shiftAmt(_shiftAmt), shiftType(_shiftType) 342 {} 343 344 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 345}; 346 347class MiscRegRegImmMemOp : public PredOp 348{ 349 protected: 350 MiscRegIndex dest; 351 IntRegIndex op1; 352 uint64_t imm; 353 354 MiscRegRegImmMemOp(const char *mnem, ExtMachInst _machInst, 355 OpClass __opClass, MiscRegIndex _dest, IntRegIndex _op1, 356 uint64_t _imm) : 357 PredOp(mnem, _machInst, __opClass), 358 dest(_dest), op1(_op1), imm(_imm) 359 {} 360 361 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 362}; 363 364class UnknownOp : public PredOp 365{ 366 protected: 367 368 UnknownOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 369 PredOp(mnem, _machInst, __opClass) 370 {} 371 372 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 373}; 374 375#endif 376