branch.hh revision 7149
17149Sgblack@eecs.umich.edu/* 27149Sgblack@eecs.umich.edu * Copyright (c) 2010 ARM Limited 37149Sgblack@eecs.umich.edu * All rights reserved 47149Sgblack@eecs.umich.edu * 57149Sgblack@eecs.umich.edu * The license below extends only to copyright in the software and shall 67149Sgblack@eecs.umich.edu * not be construed as granting a license to any other intellectual 77149Sgblack@eecs.umich.edu * property including but not limited to intellectual property relating 87149Sgblack@eecs.umich.edu * to a hardware implementation of the functionality of the software 97149Sgblack@eecs.umich.edu * licensed hereunder. You may use the software subject to the license 107149Sgblack@eecs.umich.edu * terms below provided that you ensure that this notice is replicated 117149Sgblack@eecs.umich.edu * unmodified and in its entirety in all distributions of the software, 127149Sgblack@eecs.umich.edu * modified or unmodified, in source code or in binary form. 137149Sgblack@eecs.umich.edu * 147149Sgblack@eecs.umich.edu * Copyright (c) 2007-2008 The Florida State University 156253Sgblack@eecs.umich.edu * All rights reserved. 166253Sgblack@eecs.umich.edu * 176253Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 186253Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 196253Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 206253Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 216253Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 226253Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 236253Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 246253Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 256253Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 266253Sgblack@eecs.umich.edu * this software without specific prior written permission. 276253Sgblack@eecs.umich.edu * 286253Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 296253Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 306253Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 316253Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 326253Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 336253Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 346253Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 356253Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 366253Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 376253Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 386253Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 396253Sgblack@eecs.umich.edu * 406253Sgblack@eecs.umich.edu * Authors: Stephen Hines 416253Sgblack@eecs.umich.edu */ 426253Sgblack@eecs.umich.edu#ifndef __ARCH_ARM_INSTS_BRANCH_HH__ 436253Sgblack@eecs.umich.edu#define __ARCH_ARM_INSTS_BRANCH_HH__ 446253Sgblack@eecs.umich.edu 456253Sgblack@eecs.umich.edu#include "arch/arm/insts/pred_inst.hh" 466253Sgblack@eecs.umich.edu 476253Sgblack@eecs.umich.edunamespace ArmISA 486253Sgblack@eecs.umich.edu{ 496253Sgblack@eecs.umich.edu/** 506253Sgblack@eecs.umich.edu * Base class for instructions whose disassembly is not purely a 516253Sgblack@eecs.umich.edu * function of the machine instruction (i.e., it depends on the 526253Sgblack@eecs.umich.edu * PC). This class overrides the disassemble() method to check 536253Sgblack@eecs.umich.edu * the PC and symbol table values before re-using a cached 546253Sgblack@eecs.umich.edu * disassembly string. This is necessary for branches and jumps, 556253Sgblack@eecs.umich.edu * where the disassembly string includes the target address (which 566253Sgblack@eecs.umich.edu * may depend on the PC and/or symbol table). 576253Sgblack@eecs.umich.edu */ 586253Sgblack@eecs.umich.educlass PCDependentDisassembly : public PredOp 596253Sgblack@eecs.umich.edu{ 606253Sgblack@eecs.umich.edu protected: 616253Sgblack@eecs.umich.edu /// Cached program counter from last disassembly 626253Sgblack@eecs.umich.edu mutable Addr cachedPC; 636253Sgblack@eecs.umich.edu 646253Sgblack@eecs.umich.edu /// Cached symbol table pointer from last disassembly 656253Sgblack@eecs.umich.edu mutable const SymbolTable *cachedSymtab; 666253Sgblack@eecs.umich.edu 676253Sgblack@eecs.umich.edu /// Constructor 687099Sgblack@eecs.umich.edu PCDependentDisassembly(const char *mnem, ExtMachInst _machInst, 696253Sgblack@eecs.umich.edu OpClass __opClass) 706253Sgblack@eecs.umich.edu : PredOp(mnem, _machInst, __opClass), 716253Sgblack@eecs.umich.edu cachedPC(0), cachedSymtab(0) 726253Sgblack@eecs.umich.edu { 736253Sgblack@eecs.umich.edu } 746253Sgblack@eecs.umich.edu 756253Sgblack@eecs.umich.edu const std::string & 766253Sgblack@eecs.umich.edu disassemble(Addr pc, const SymbolTable *symtab) const; 776253Sgblack@eecs.umich.edu}; 786253Sgblack@eecs.umich.edu 797149Sgblack@eecs.umich.edu// Branch to a target computed with an immediate 807149Sgblack@eecs.umich.educlass BranchImm : public PredOp 817149Sgblack@eecs.umich.edu{ 827149Sgblack@eecs.umich.edu protected: 837149Sgblack@eecs.umich.edu int32_t imm; 847149Sgblack@eecs.umich.edu 857149Sgblack@eecs.umich.edu public: 867149Sgblack@eecs.umich.edu BranchImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 877149Sgblack@eecs.umich.edu int32_t _imm) : 887149Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), imm(_imm) 897149Sgblack@eecs.umich.edu {} 907149Sgblack@eecs.umich.edu}; 917149Sgblack@eecs.umich.edu 927149Sgblack@eecs.umich.edu// Conditionally Branch to a target computed with an immediate 937149Sgblack@eecs.umich.educlass BranchImmCond : public BranchImm 947149Sgblack@eecs.umich.edu{ 957149Sgblack@eecs.umich.edu protected: 967149Sgblack@eecs.umich.edu // This will mask the condition code stored for PredOp. Ideally these two 977149Sgblack@eecs.umich.edu // class would cooperate, but they're not set up to do that at the moment. 987149Sgblack@eecs.umich.edu ConditionCode condCode; 997149Sgblack@eecs.umich.edu 1007149Sgblack@eecs.umich.edu public: 1017149Sgblack@eecs.umich.edu BranchImmCond(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 1027149Sgblack@eecs.umich.edu int32_t _imm, ConditionCode _condCode) : 1037149Sgblack@eecs.umich.edu BranchImm(mnem, _machInst, __opClass, _imm), condCode(_condCode) 1047149Sgblack@eecs.umich.edu {} 1057149Sgblack@eecs.umich.edu}; 1067149Sgblack@eecs.umich.edu 1077149Sgblack@eecs.umich.edu// Branch to a target computed with a register 1087149Sgblack@eecs.umich.educlass BranchReg : public PredOp 1097149Sgblack@eecs.umich.edu{ 1107149Sgblack@eecs.umich.edu protected: 1117149Sgblack@eecs.umich.edu IntRegIndex op1; 1127149Sgblack@eecs.umich.edu 1137149Sgblack@eecs.umich.edu public: 1147149Sgblack@eecs.umich.edu BranchReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 1157149Sgblack@eecs.umich.edu IntRegIndex _op1) : 1167149Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), op1(_op1) 1177149Sgblack@eecs.umich.edu {} 1187149Sgblack@eecs.umich.edu}; 1197149Sgblack@eecs.umich.edu 1207149Sgblack@eecs.umich.edu// Conditionally Branch to a target computed with a register 1217149Sgblack@eecs.umich.educlass BranchRegCond : public BranchReg 1227149Sgblack@eecs.umich.edu{ 1237149Sgblack@eecs.umich.edu protected: 1247149Sgblack@eecs.umich.edu // This will mask the condition code stored for PredOp. Ideally these two 1257149Sgblack@eecs.umich.edu // class would cooperate, but they're not set up to do that at the moment. 1267149Sgblack@eecs.umich.edu ConditionCode condCode; 1277149Sgblack@eecs.umich.edu 1287149Sgblack@eecs.umich.edu public: 1297149Sgblack@eecs.umich.edu BranchRegCond(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 1307149Sgblack@eecs.umich.edu IntRegIndex _op1, ConditionCode _condCode) : 1317149Sgblack@eecs.umich.edu BranchReg(mnem, _machInst, __opClass, _op1), condCode(_condCode) 1327149Sgblack@eecs.umich.edu {} 1337149Sgblack@eecs.umich.edu}; 1347149Sgblack@eecs.umich.edu 1357149Sgblack@eecs.umich.edu// Branch to a target computed with two registers 1367149Sgblack@eecs.umich.educlass BranchRegReg : public PredOp 1377149Sgblack@eecs.umich.edu{ 1387149Sgblack@eecs.umich.edu protected: 1397149Sgblack@eecs.umich.edu IntRegIndex op1; 1407149Sgblack@eecs.umich.edu IntRegIndex op2; 1417149Sgblack@eecs.umich.edu 1427149Sgblack@eecs.umich.edu public: 1437149Sgblack@eecs.umich.edu BranchRegReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 1447149Sgblack@eecs.umich.edu IntRegIndex _op1, IntRegIndex _op2) : 1457149Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), op1(_op1), op2(_op2) 1467149Sgblack@eecs.umich.edu {} 1477149Sgblack@eecs.umich.edu}; 1487149Sgblack@eecs.umich.edu 1497149Sgblack@eecs.umich.edu// Branch to a target computed with an immediate and a register 1507149Sgblack@eecs.umich.educlass BranchImmReg : public PredOp 1517149Sgblack@eecs.umich.edu{ 1527149Sgblack@eecs.umich.edu protected: 1537149Sgblack@eecs.umich.edu int32_t imm; 1547149Sgblack@eecs.umich.edu IntRegIndex op1; 1557149Sgblack@eecs.umich.edu 1567149Sgblack@eecs.umich.edu public: 1577149Sgblack@eecs.umich.edu BranchImmReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 1587149Sgblack@eecs.umich.edu int32_t _imm, IntRegIndex _op1) : 1597149Sgblack@eecs.umich.edu PredOp(mnem, _machInst, __opClass), imm(_imm), op1(_op1) 1607149Sgblack@eecs.umich.edu {} 1617149Sgblack@eecs.umich.edu}; 1627149Sgblack@eecs.umich.edu 1636253Sgblack@eecs.umich.edu/** 1646253Sgblack@eecs.umich.edu * Base class for branches (PC-relative control transfers), 1656253Sgblack@eecs.umich.edu * conditional or unconditional. 1666253Sgblack@eecs.umich.edu */ 1676253Sgblack@eecs.umich.educlass Branch : public PCDependentDisassembly 1686253Sgblack@eecs.umich.edu{ 1696253Sgblack@eecs.umich.edu protected: 1706253Sgblack@eecs.umich.edu /// target address (signed) Displacement . 1716253Sgblack@eecs.umich.edu int32_t disp; 1726253Sgblack@eecs.umich.edu 1736253Sgblack@eecs.umich.edu /// Constructor. 1747099Sgblack@eecs.umich.edu Branch(const char *mnem, ExtMachInst _machInst, OpClass __opClass) 1756253Sgblack@eecs.umich.edu : PCDependentDisassembly(mnem, _machInst, __opClass), 1766253Sgblack@eecs.umich.edu disp(machInst.offset << 2) 1776253Sgblack@eecs.umich.edu { 1786253Sgblack@eecs.umich.edu //If Bit 26 is 1 then Sign Extend 1796253Sgblack@eecs.umich.edu if ( (disp & 0x02000000) > 0 ) { 1806253Sgblack@eecs.umich.edu disp |= 0xFC000000; 1816253Sgblack@eecs.umich.edu } 1826253Sgblack@eecs.umich.edu } 1836253Sgblack@eecs.umich.edu 1846253Sgblack@eecs.umich.edu Addr branchTarget(Addr branchPC) const; 1856253Sgblack@eecs.umich.edu 1866253Sgblack@eecs.umich.edu std::string 1876253Sgblack@eecs.umich.edu generateDisassembly(Addr pc, const SymbolTable *symtab) const; 1886253Sgblack@eecs.umich.edu}; 1896253Sgblack@eecs.umich.edu 1906253Sgblack@eecs.umich.edu/** 1916253Sgblack@eecs.umich.edu * Base class for branch and exchange instructions on the ARM 1926253Sgblack@eecs.umich.edu */ 1936253Sgblack@eecs.umich.educlass BranchExchange : public PredOp 1946253Sgblack@eecs.umich.edu{ 1956253Sgblack@eecs.umich.edu protected: 1966253Sgblack@eecs.umich.edu /// Constructor 1977099Sgblack@eecs.umich.edu BranchExchange(const char *mnem, ExtMachInst _machInst, 1986253Sgblack@eecs.umich.edu OpClass __opClass) 1996253Sgblack@eecs.umich.edu : PredOp(mnem, _machInst, __opClass) 2006253Sgblack@eecs.umich.edu { 2016253Sgblack@eecs.umich.edu } 2026253Sgblack@eecs.umich.edu 2036253Sgblack@eecs.umich.edu std::string 2046253Sgblack@eecs.umich.edu generateDisassembly(Addr pc, const SymbolTable *symtab) const; 2056253Sgblack@eecs.umich.edu}; 2066253Sgblack@eecs.umich.edu 2076253Sgblack@eecs.umich.edu} 2086253Sgblack@eecs.umich.edu 2096253Sgblack@eecs.umich.edu#endif //__ARCH_ARM_INSTS_BRANCH_HH__ 210