faults.hh revision 7197
110259SAndrew.Bardsley@arm.com/* 210259SAndrew.Bardsley@arm.com * Copyright (c) 2010 ARM Limited 310259SAndrew.Bardsley@arm.com * All rights reserved 410259SAndrew.Bardsley@arm.com * 510259SAndrew.Bardsley@arm.com * The license below extends only to copyright in the software and shall 610259SAndrew.Bardsley@arm.com * not be construed as granting a license to any other intellectual 710259SAndrew.Bardsley@arm.com * property including but not limited to intellectual property relating 810259SAndrew.Bardsley@arm.com * to a hardware implementation of the functionality of the software 910259SAndrew.Bardsley@arm.com * licensed hereunder. You may use the software subject to the license 1010259SAndrew.Bardsley@arm.com * terms below provided that you ensure that this notice is replicated 1110259SAndrew.Bardsley@arm.com * unmodified and in its entirety in all distributions of the software, 1210259SAndrew.Bardsley@arm.com * modified or unmodified, in source code or in binary form. 1310259SAndrew.Bardsley@arm.com * 1410259SAndrew.Bardsley@arm.com * Copyright (c) 2003-2005 The Regents of The University of Michigan 1510259SAndrew.Bardsley@arm.com * Copyright (c) 2007-2008 The Florida State University 1610259SAndrew.Bardsley@arm.com * All rights reserved. 1710259SAndrew.Bardsley@arm.com * 1810259SAndrew.Bardsley@arm.com * Redistribution and use in source and binary forms, with or without 1910259SAndrew.Bardsley@arm.com * modification, are permitted provided that the following conditions are 2010259SAndrew.Bardsley@arm.com * met: redistributions of source code must retain the above copyright 2110259SAndrew.Bardsley@arm.com * notice, this list of conditions and the following disclaimer; 2210259SAndrew.Bardsley@arm.com * redistributions in binary form must reproduce the above copyright 2310259SAndrew.Bardsley@arm.com * notice, this list of conditions and the following disclaimer in the 2410259SAndrew.Bardsley@arm.com * documentation and/or other materials provided with the distribution; 2510259SAndrew.Bardsley@arm.com * neither the name of the copyright holders nor the names of its 2610259SAndrew.Bardsley@arm.com * contributors may be used to endorse or promote products derived from 2710259SAndrew.Bardsley@arm.com * this software without specific prior written permission. 2810259SAndrew.Bardsley@arm.com * 2910259SAndrew.Bardsley@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 3010259SAndrew.Bardsley@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 3110259SAndrew.Bardsley@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 3210259SAndrew.Bardsley@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 3310259SAndrew.Bardsley@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3410259SAndrew.Bardsley@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3510259SAndrew.Bardsley@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3610259SAndrew.Bardsley@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3710259SAndrew.Bardsley@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3810259SAndrew.Bardsley@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3910259SAndrew.Bardsley@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 4010259SAndrew.Bardsley@arm.com * 4110259SAndrew.Bardsley@arm.com * Authors: Ali Saidi 4210259SAndrew.Bardsley@arm.com * Gabe Black 4310259SAndrew.Bardsley@arm.com */ 4410259SAndrew.Bardsley@arm.com 4510259SAndrew.Bardsley@arm.com#ifndef __ARM_FAULTS_HH__ 4610259SAndrew.Bardsley@arm.com#define __ARM_FAULTS_HH__ 4710259SAndrew.Bardsley@arm.com 4810259SAndrew.Bardsley@arm.com#include "arch/arm/types.hh" 4910259SAndrew.Bardsley@arm.com#include "config/full_system.hh" 5010259SAndrew.Bardsley@arm.com#include "sim/faults.hh" 5110259SAndrew.Bardsley@arm.com 5210259SAndrew.Bardsley@arm.com// The design of the "name" and "vect" functions is in sim/faults.hh 5310259SAndrew.Bardsley@arm.com 5410259SAndrew.Bardsley@arm.comnamespace ArmISA 5510259SAndrew.Bardsley@arm.com{ 5610259SAndrew.Bardsley@arm.comtypedef const Addr FaultOffset; 5710259SAndrew.Bardsley@arm.com 5810259SAndrew.Bardsley@arm.comclass ArmFaultBase : public FaultBase 5910259SAndrew.Bardsley@arm.com{ 6010259SAndrew.Bardsley@arm.com protected: 6110259SAndrew.Bardsley@arm.com Addr getVector(ThreadContext *tc); 6210259SAndrew.Bardsley@arm.com 6310259SAndrew.Bardsley@arm.com public: 6410259SAndrew.Bardsley@arm.com struct FaultVals 6510259SAndrew.Bardsley@arm.com { 6610259SAndrew.Bardsley@arm.com const FaultName name; 6710259SAndrew.Bardsley@arm.com const FaultOffset offset; 6810259SAndrew.Bardsley@arm.com const OperatingMode nextMode; 6910259SAndrew.Bardsley@arm.com const uint8_t armPcOffset; 7010259SAndrew.Bardsley@arm.com const uint8_t thumbPcOffset; 7110259SAndrew.Bardsley@arm.com const bool abortDisable; 7210259SAndrew.Bardsley@arm.com const bool fiqDisable; 7310259SAndrew.Bardsley@arm.com FaultStat count; 7410259SAndrew.Bardsley@arm.com }; 7510259SAndrew.Bardsley@arm.com 7610259SAndrew.Bardsley@arm.com#if FULL_SYSTEM 7710259SAndrew.Bardsley@arm.com void invoke(ThreadContext *tc); 7810259SAndrew.Bardsley@arm.com#endif 7910259SAndrew.Bardsley@arm.com virtual FaultStat& countStat() = 0; 8010259SAndrew.Bardsley@arm.com virtual FaultOffset offset() = 0; 8110259SAndrew.Bardsley@arm.com virtual OperatingMode nextMode() = 0; 8210259SAndrew.Bardsley@arm.com virtual uint8_t armPcOffset() = 0; 8310259SAndrew.Bardsley@arm.com virtual uint8_t thumbPcOffset() = 0; 8410259SAndrew.Bardsley@arm.com virtual bool abortDisable() = 0; 8510259SAndrew.Bardsley@arm.com virtual bool fiqDisable() = 0; 8610259SAndrew.Bardsley@arm.com}; 8710259SAndrew.Bardsley@arm.com 8810259SAndrew.Bardsley@arm.comtemplate<typename T> 8910259SAndrew.Bardsley@arm.comclass ArmFault : public ArmFaultBase 9010259SAndrew.Bardsley@arm.com{ 9110259SAndrew.Bardsley@arm.com protected: 9210259SAndrew.Bardsley@arm.com static FaultVals vals; 9310259SAndrew.Bardsley@arm.com 9410259SAndrew.Bardsley@arm.com public: 9510259SAndrew.Bardsley@arm.com FaultName name() const { return vals.name; } 9610259SAndrew.Bardsley@arm.com FaultStat & countStat() {return vals.count;} 9710259SAndrew.Bardsley@arm.com FaultOffset offset() { return vals.offset; } 9810259SAndrew.Bardsley@arm.com OperatingMode nextMode() { return vals.nextMode; } 9910259SAndrew.Bardsley@arm.com uint8_t armPcOffset() { return vals.armPcOffset; } 10010259SAndrew.Bardsley@arm.com uint8_t thumbPcOffset() { return vals.thumbPcOffset; } 10110259SAndrew.Bardsley@arm.com bool abortDisable() { return vals.abortDisable; } 10210259SAndrew.Bardsley@arm.com bool fiqDisable() { return vals.fiqDisable; } 10310259SAndrew.Bardsley@arm.com}; 10410259SAndrew.Bardsley@arm.com 10510259SAndrew.Bardsley@arm.com 10610259SAndrew.Bardsley@arm.comclass Reset : public ArmFault<Reset> {}; 10710259SAndrew.Bardsley@arm.com 10810259SAndrew.Bardsley@arm.comclass UndefinedInstruction : public ArmFault<UndefinedInstruction> 10910259SAndrew.Bardsley@arm.com{ 11010259SAndrew.Bardsley@arm.com#if !FULL_SYSTEM 11110259SAndrew.Bardsley@arm.com protected: 11210259SAndrew.Bardsley@arm.com ExtMachInst machInst; 11310259SAndrew.Bardsley@arm.com bool unknown; 11410259SAndrew.Bardsley@arm.com const char *mnemonic; 11510259SAndrew.Bardsley@arm.com 11610259SAndrew.Bardsley@arm.com public: 11710259SAndrew.Bardsley@arm.com UndefinedInstruction(ExtMachInst _machInst, 11810259SAndrew.Bardsley@arm.com bool _unknown, 11910259SAndrew.Bardsley@arm.com const char *_mnemonic = NULL) : 12010259SAndrew.Bardsley@arm.com machInst(_machInst), unknown(_unknown), mnemonic(_mnemonic) 12110259SAndrew.Bardsley@arm.com { 12210259SAndrew.Bardsley@arm.com } 12310259SAndrew.Bardsley@arm.com 12410259SAndrew.Bardsley@arm.com void invoke(ThreadContext *tc); 12510259SAndrew.Bardsley@arm.com#endif 12610259SAndrew.Bardsley@arm.com}; 12710259SAndrew.Bardsley@arm.com 12810259SAndrew.Bardsley@arm.comclass SupervisorCall : public ArmFault<SupervisorCall> 12910259SAndrew.Bardsley@arm.com{ 13010259SAndrew.Bardsley@arm.com#if !FULL_SYSTEM 13110259SAndrew.Bardsley@arm.com protected: 13210259SAndrew.Bardsley@arm.com ExtMachInst machInst; 13310259SAndrew.Bardsley@arm.com 13410259SAndrew.Bardsley@arm.com public: 13510259SAndrew.Bardsley@arm.com SupervisorCall(ExtMachInst _machInst) : machInst(_machInst) 13610259SAndrew.Bardsley@arm.com {} 13710259SAndrew.Bardsley@arm.com 13810259SAndrew.Bardsley@arm.com void invoke(ThreadContext *tc); 13910259SAndrew.Bardsley@arm.com#endif 14010259SAndrew.Bardsley@arm.com}; 14110259SAndrew.Bardsley@arm.comclass PrefetchAbort : public ArmFault<PrefetchAbort> {}; 14210259SAndrew.Bardsley@arm.comclass DataAbort : public ArmFault<DataAbort> {}; 14310259SAndrew.Bardsley@arm.comclass Interrupt : public ArmFault<Interrupt> {}; 14410259SAndrew.Bardsley@arm.comclass FastInterrupt : public ArmFault<FastInterrupt> {}; 14510259SAndrew.Bardsley@arm.com 14610259SAndrew.Bardsley@arm.com 14710259SAndrew.Bardsley@arm.com} // ArmISA namespace 14810259SAndrew.Bardsley@arm.com 14910259SAndrew.Bardsley@arm.com#endif // __ARM_FAULTS_HH__ 15010259SAndrew.Bardsley@arm.com