SConscript revision 7202 
110448Snilay@cs.wisc.edu# -*- mode:python -*-
210448Snilay@cs.wisc.edu
310448Snilay@cs.wisc.edu# Copyright (c) 2009 ARM Limited
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510448Snilay@cs.wisc.edu#
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910448Snilay@cs.wisc.edu# to a hardware implementation of the functionality of the software
1010448Snilay@cs.wisc.edu# licensed hereunder.  You may use the software subject to the license
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1210448Snilay@cs.wisc.edu# unmodified and in its entirety in all distributions of the software,
1310448Snilay@cs.wisc.edu# modified or unmodified, in source code or in binary form.
1410448Snilay@cs.wisc.edu#
1510448Snilay@cs.wisc.edu# Copyright (c) 2007-2008 The Florida State University
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1710448Snilay@cs.wisc.edu#
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1910448Snilay@cs.wisc.edu# modification, are permitted provided that the following conditions are
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2110448Snilay@cs.wisc.edu# notice, this list of conditions and the following disclaimer;
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2710447Snilay@cs.wisc.edu# this software without specific prior written permission.
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3010447Snilay@cs.wisc.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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3810447Snilay@cs.wisc.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
3910447Snilay@cs.wisc.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4010447Snilay@cs.wisc.edu#
4110447Snilay@cs.wisc.edu# Authors: Stephen Hines
4210447Snilay@cs.wisc.edu#          Ali Saidi
43
44Import('*')
45
46if env['TARGET_ISA'] == 'arm':
47# Workaround for bug in SCons version > 0.97d20071212
48# Scons bug id: 2006 M5 Bug id: 308 
49    Dir('isa/formats')
50    Source('faults.cc')
51    Source('insts/branch.cc')
52    Source('insts/macromem.cc')
53    Source('insts/mem.cc')
54    Source('insts/misc.cc')
55    Source('insts/pred_inst.cc')
56    Source('insts/static_inst.cc')
57    Source('nativetrace.cc')
58    Source('pagetable.cc')
59    Source('tlb.cc')
60    Source('vtophys.cc')
61    Source('utility.cc')
62
63    SimObject('ArmNativeTrace.py')
64    SimObject('ArmTLB.py')
65
66    TraceFlag('Arm')
67    TraceFlag('Faults', "Trace Exceptions, interrupts, svc/swi")
68    TraceFlag('Predecoder', "Instructions returned by the predecoder")
69    if env['FULL_SYSTEM']:
70        Source('interrupts.cc')
71        Source('stacktrace.cc')
72        Source('system.cc')
73        
74        SimObject('ArmInterrupts.py')
75        SimObject('ArmSystem.py')
76    else:
77        Source('process.cc')
78        Source('linux/linux.cc')
79        Source('linux/process.cc')
80
81    # Add in files generated by the ISA description.
82    isa_desc_files = env.ISADesc('isa/main.isa')
83    # Only non-header files need to be compiled.
84    for f in isa_desc_files:
85        if not f.path.endswith('.hh'):
86            Source(f)
87
88