ArmSystem.py revision 13665:9c7fe3811b88 
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36# Authors: Ali Saidi
37#          Glenn Bergmans
38
39from m5.params import *
40from m5.options import *
41from m5.SimObject import *
42from m5.util.fdthelper import *
43
44from m5.objects.System import System
45from m5.objects.ArmSemihosting import ArmSemihosting
46
47class ArmMachineType(Enum):
48    map = {
49        'RealViewPBX' : 1901,
50        'VExpress_EMM' : 2272,
51        'VExpress_EMM64' : 2272,
52        'DTOnly' : -1,
53    }
54
55class ArmSystem(System):
56    type = 'ArmSystem'
57    cxx_header = "arch/arm/system.hh"
58    multi_proc = Param.Bool(True, "Multiprocessor system?")
59    boot_loader = VectorParam.String([],
60        "File that contains the boot loader code. Zero or more files may be "
61        "specified. The first boot loader that matches the kernel's "
62        "architecture will be used.")
63    gic_cpu_addr = Param.Addr(0, "Addres of the GIC CPU interface")
64    flags_addr = Param.Addr(0, "Address of the flags register for MP booting")
65    have_security = Param.Bool(False,
66        "True if Security Extensions are implemented")
67    have_virtualization = Param.Bool(False,
68        "True if Virtualization Extensions are implemented")
69    have_crypto = Param.Bool(False,
70        "True if Crypto Extensions is implemented")
71    have_lpae = Param.Bool(True, "True if LPAE is implemented")
72    reset_addr = Param.Addr(0x0,
73        "Reset address (ARMv8)")
74    auto_reset_addr = Param.Bool(False,
75        "Determine reset address from kernel entry point if no boot loader")
76    highest_el_is_64 = Param.Bool(False,
77        "True if the register width of the highest implemented exception level "
78        "is 64 bits (ARMv8)")
79    phys_addr_range_64 = Param.UInt8(40,
80        "Supported physical address range in bits when using AArch64 (ARMv8)")
81    have_large_asid_64 = Param.Bool(False,
82        "True if ASID is 16 bits in AArch64 (ARMv8)")
83
84    semihosting = Param.ArmSemihosting(NULL,
85        "Enable support for the Arm semihosting by settings this parameter")
86
87    m5ops_base = Param.Addr(0,
88        "Base of the 64KiB PA range used for memory-mapped m5ops. Set to 0 "
89        "to disable.")
90
91    def generateDeviceTree(self, state):
92        # Generate a device tree root node for the system by creating the root
93        # node and adding the generated subnodes of all children.
94        # When a child needs to add multiple nodes, this is done by also
95        # creating a node called '/' which will then be merged with the
96        # root instead of appended.
97
98        def generateMemNode(mem_range):
99            node = FdtNode("memory@%x" % long(mem_range.start))
100            node.append(FdtPropertyStrings("device_type", ["memory"]))
101            node.append(FdtPropertyWords("reg",
102                state.addrCells(mem_range.start) +
103                state.sizeCells(mem_range.size()) ))
104            return node
105
106        root = FdtNode('/')
107        root.append(state.addrCellsProperty())
108        root.append(state.sizeCellsProperty())
109
110        # Add memory nodes
111        for mem_range in self.mem_ranges:
112            root.append(generateMemNode(mem_range))
113
114        for node in self.recurseDeviceTree(state):
115            # Merge root nodes instead of adding them (for children
116            # that need to add multiple root level nodes)
117            if node.get_name() == root.get_name():
118                root.merge(node)
119            else:
120                root.append(node)
121
122        return root
123
124class GenericArmSystem(ArmSystem):
125    type = 'GenericArmSystem'
126    cxx_header = "arch/arm/system.hh"
127    machine_type = Param.ArmMachineType('DTOnly',
128        "Machine id from http://www.arm.linux.org.uk/developer/machines/")
129    atags_addr = Param.Addr("Address where default atags structure should " \
130                                "be written")
131    dtb_filename = Param.String("",
132        "File that contains the Device Tree Blob. Don't use DTB if empty.")
133    early_kernel_symbols = Param.Bool(False,
134        "enable early kernel symbol tables before MMU")
135    enable_context_switch_stats_dump = Param.Bool(False, "enable stats/task info dumping at context switch boundaries")
136
137    panic_on_panic = Param.Bool(False, "Trigger a gem5 panic if the " \
138                                    "guest kernel panics")
139    panic_on_oops = Param.Bool(False, "Trigger a gem5 panic if the " \
140                                   "guest kernel oopses")
141
142    def generateDtb(self, outdir, filename):
143        """
144        Autogenerate DTB. Arguments are the folder where the DTB
145        will be stored, and the name of the DTB file.
146        """
147        state = FdtState(addr_cells=2, size_cells=2, cpu_cells=1)
148        rootNode = self.generateDeviceTree(state)
149
150        fdt = Fdt()
151        fdt.add_rootnode(rootNode)
152        dtb_filename = os.path.join(outdir, filename)
153        self.dtb_filename = fdt.writeDtbFile(dtb_filename)
154
155class LinuxArmSystem(GenericArmSystem):
156    type = 'LinuxArmSystem'
157    cxx_header = "arch/arm/linux/system.hh"
158
159    @cxxMethod
160    def dumpDmesg(self):
161        """Dump dmesg from the simulated kernel to standard out"""
162        pass
163
164    # Have Linux systems for ARM auto-calc their load_addr_mask for proper
165    # kernel relocation.
166    load_addr_mask = 0x0
167
168class FreebsdArmSystem(GenericArmSystem):
169    type = 'FreebsdArmSystem'
170    cxx_header = "arch/arm/freebsd/system.hh"
171