ArmSystem.py revision 12005:f4b9607db0af
12155SN/A# Copyright (c) 2009, 2012-2013, 2015 ARM Limited 22155SN/A# All rights reserved. 32155SN/A# 42155SN/A# The license below extends only to copyright in the software and shall 52155SN/A# not be construed as granting a license to any other intellectual 62155SN/A# property including but not limited to intellectual property relating 72155SN/A# to a hardware implementation of the functionality of the software 82155SN/A# licensed hereunder. You may use the software subject to the license 92155SN/A# terms below provided that you ensure that this notice is replicated 102155SN/A# unmodified and in its entirety in all distributions of the software, 112155SN/A# modified or unmodified, in source code or in binary form. 122155SN/A# 132155SN/A# Redistribution and use in source and binary forms, with or without 142155SN/A# modification, are permitted provided that the following conditions are 152155SN/A# met: redistributions of source code must retain the above copyright 162155SN/A# notice, this list of conditions and the following disclaimer; 172155SN/A# redistributions in binary form must reproduce the above copyright 182155SN/A# notice, this list of conditions and the following disclaimer in the 192155SN/A# documentation and/or other materials provided with the distribution; 202155SN/A# neither the name of the copyright holders nor the names of its 212155SN/A# contributors may be used to endorse or promote products derived from 222155SN/A# this software without specific prior written permission. 232155SN/A# 242155SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 252155SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 262155SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 272155SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 282665Ssaidi@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 292665Ssaidi@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 302155SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 314202Sbinkertn@umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 322155SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 332178SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 342178SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 352178SN/A# 362178SN/A# Authors: Ali Saidi 372178SN/A 382178SN/Afrom m5.params import * 392178SN/Afrom m5.SimObject import * 402178SN/A 412178SN/Afrom System import System 422178SN/A 432178SN/Aclass ArmMachineType(Enum): 442178SN/A map = { 452155SN/A 'RealViewEB' : 827, 462178SN/A 'RealViewPBX' : 1901, 472155SN/A 'VExpress_EMM' : 2272, 482155SN/A 'VExpress_EMM64' : 2272, 492178SN/A 'DTOnly' : -1, 502155SN/A } 512155SN/A 522623SN/Aclass ArmSystem(System): 533918Ssaidi@eecs.umich.edu type = 'ArmSystem' 542623SN/A cxx_header = "arch/arm/system.hh" 552623SN/A load_addr_mask = 0xffffffff 563918Ssaidi@eecs.umich.edu multi_proc = Param.Bool(True, "Multiprocessor system?") 572155SN/A boot_loader = VectorParam.String([], 582155SN/A "File that contains the boot loader code. Zero or more files may be " 592292SN/A "specified. The first boot loader that matches the kernel's " 603918Ssaidi@eecs.umich.edu "architecture will be used.") 612292SN/A gic_cpu_addr = Param.Addr(0, "Addres of the GIC CPU interface") 622292SN/A flags_addr = Param.Addr(0, "Address of the flags register for MP booting") 632292SN/A have_security = Param.Bool(False, 643918Ssaidi@eecs.umich.edu "True if Security Extensions are implemented") 652292SN/A have_virtualization = Param.Bool(False, 662292SN/A "True if Virtualization Extensions are implemented") 672766Sktlim@umich.edu have_lpae = Param.Bool(True, "True if LPAE is implemented") 682766Sktlim@umich.edu highest_el_is_64 = Param.Bool(False, 692766Sktlim@umich.edu "True if the register width of the highest implemented exception level " 702921Sktlim@umich.edu "is 64 bits (ARMv8)") 712921Sktlim@umich.edu reset_addr_64 = Param.Addr(0x0, 722766Sktlim@umich.edu "Reset address if the highest implemented exception level is 64 bits " 732766Sktlim@umich.edu "(ARMv8)") 742766Sktlim@umich.edu phys_addr_range_64 = Param.UInt8(40, 752178SN/A "Supported physical address range in bits when using AArch64 (ARMv8)") 762155SN/A have_large_asid_64 = Param.Bool(False, 772155SN/A "True if ASID is 16 bits in AArch64 (ARMv8)") 782155SN/A 792155SN/A m5ops_base = Param.Addr(0, 802155SN/A "Base of the 64KiB PA range used for memory-mapped m5ops. Set to 0 " 812155SN/A "to disable.") 822766Sktlim@umich.edu 832155SN/Aclass GenericArmSystem(ArmSystem): 842623SN/A type = 'GenericArmSystem' 852155SN/A cxx_header = "arch/arm/system.hh" 862155SN/A load_addr_mask = 0x0fffffff 872155SN/A machine_type = Param.ArmMachineType('VExpress_EMM', 882155SN/A "Machine id from http://www.arm.linux.org.uk/developer/machines/") 892178SN/A atags_addr = Param.Addr("Address where default atags structure should " \ 902178SN/A "be written") 912178SN/A dtb_filename = Param.String("", 922766Sktlim@umich.edu "File that contains the Device Tree Blob. Don't use DTB if empty.") 932178SN/A early_kernel_symbols = Param.Bool(False, 942178SN/A "enable early kernel symbol tables before MMU") 952178SN/A enable_context_switch_stats_dump = Param.Bool(False, "enable stats/task info dumping at context switch boundaries") 962178SN/A 972766Sktlim@umich.edu panic_on_panic = Param.Bool(False, "Trigger a gem5 panic if the " \ 982766Sktlim@umich.edu "guest kernel panics") 992766Sktlim@umich.edu panic_on_oops = Param.Bool(False, "Trigger a gem5 panic if the " \ 1002788Sktlim@umich.edu "guest kernel oopses") 1012178SN/A 1022733Sktlim@umich.educlass LinuxArmSystem(GenericArmSystem): 1032733Sktlim@umich.edu type = 'LinuxArmSystem' 1042817Sksewell@umich.edu cxx_header = "arch/arm/linux/system.hh" 1052733Sktlim@umich.edu 1064486Sbinkertn@umich.edu @cxxMethod 1074486Sbinkertn@umich.edu def dumpDmesg(self): 1084486Sbinkertn@umich.edu """Dump dmesg from the simulated kernel to standard out""" 1094202Sbinkertn@umich.edu pass 1104202Sbinkertn@umich.edu 1114202Sbinkertn@umich.educlass FreebsdArmSystem(GenericArmSystem): 1124202Sbinkertn@umich.edu type = 'FreebsdArmSystem' 1134202Sbinkertn@umich.edu cxx_header = "arch/arm/freebsd/system.hh" 1144202Sbinkertn@umich.edu