ArmSystem.py revision 12005:f4b9607db0af
1# Copyright (c) 2009, 2012-2013, 2015 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Redistribution and use in source and binary forms, with or without 14# modification, are permitted provided that the following conditions are 15# met: redistributions of source code must retain the above copyright 16# notice, this list of conditions and the following disclaimer; 17# redistributions in binary form must reproduce the above copyright 18# notice, this list of conditions and the following disclaimer in the 19# documentation and/or other materials provided with the distribution; 20# neither the name of the copyright holders nor the names of its 21# contributors may be used to endorse or promote products derived from 22# this software without specific prior written permission. 23# 24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35# 36# Authors: Ali Saidi 37 38from m5.params import * 39from m5.SimObject import * 40 41from System import System 42 43class ArmMachineType(Enum): 44 map = { 45 'RealViewEB' : 827, 46 'RealViewPBX' : 1901, 47 'VExpress_EMM' : 2272, 48 'VExpress_EMM64' : 2272, 49 'DTOnly' : -1, 50 } 51 52class ArmSystem(System): 53 type = 'ArmSystem' 54 cxx_header = "arch/arm/system.hh" 55 load_addr_mask = 0xffffffff 56 multi_proc = Param.Bool(True, "Multiprocessor system?") 57 boot_loader = VectorParam.String([], 58 "File that contains the boot loader code. Zero or more files may be " 59 "specified. The first boot loader that matches the kernel's " 60 "architecture will be used.") 61 gic_cpu_addr = Param.Addr(0, "Addres of the GIC CPU interface") 62 flags_addr = Param.Addr(0, "Address of the flags register for MP booting") 63 have_security = Param.Bool(False, 64 "True if Security Extensions are implemented") 65 have_virtualization = Param.Bool(False, 66 "True if Virtualization Extensions are implemented") 67 have_lpae = Param.Bool(True, "True if LPAE is implemented") 68 highest_el_is_64 = Param.Bool(False, 69 "True if the register width of the highest implemented exception level " 70 "is 64 bits (ARMv8)") 71 reset_addr_64 = Param.Addr(0x0, 72 "Reset address if the highest implemented exception level is 64 bits " 73 "(ARMv8)") 74 phys_addr_range_64 = Param.UInt8(40, 75 "Supported physical address range in bits when using AArch64 (ARMv8)") 76 have_large_asid_64 = Param.Bool(False, 77 "True if ASID is 16 bits in AArch64 (ARMv8)") 78 79 m5ops_base = Param.Addr(0, 80 "Base of the 64KiB PA range used for memory-mapped m5ops. Set to 0 " 81 "to disable.") 82 83class GenericArmSystem(ArmSystem): 84 type = 'GenericArmSystem' 85 cxx_header = "arch/arm/system.hh" 86 load_addr_mask = 0x0fffffff 87 machine_type = Param.ArmMachineType('VExpress_EMM', 88 "Machine id from http://www.arm.linux.org.uk/developer/machines/") 89 atags_addr = Param.Addr("Address where default atags structure should " \ 90 "be written") 91 dtb_filename = Param.String("", 92 "File that contains the Device Tree Blob. Don't use DTB if empty.") 93 early_kernel_symbols = Param.Bool(False, 94 "enable early kernel symbol tables before MMU") 95 enable_context_switch_stats_dump = Param.Bool(False, "enable stats/task info dumping at context switch boundaries") 96 97 panic_on_panic = Param.Bool(False, "Trigger a gem5 panic if the " \ 98 "guest kernel panics") 99 panic_on_oops = Param.Bool(False, "Trigger a gem5 panic if the " \ 100 "guest kernel oopses") 101 102class LinuxArmSystem(GenericArmSystem): 103 type = 'LinuxArmSystem' 104 cxx_header = "arch/arm/linux/system.hh" 105 106 @cxxMethod 107 def dumpDmesg(self): 108 """Dump dmesg from the simulated kernel to standard out""" 109 pass 110 111class FreebsdArmSystem(GenericArmSystem): 112 type = 'FreebsdArmSystem' 113 cxx_header = "arch/arm/freebsd/system.hh" 114