ArmISA.py revision 10461:afeb5cdb3907 
1# Copyright (c) 2012-2013 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
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8# licensed hereunder.  You may use the software subject to the license
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15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
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24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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35#
36# Authors: Andreas Sandberg
37#          Giacomo Gabrielli
38
39from m5.params import *
40from m5.proxy import *
41from m5.SimObject import SimObject
42
43from ArmPMU import ArmPMU
44
45class ArmISA(SimObject):
46    type = 'ArmISA'
47    cxx_class = 'ArmISA::ISA'
48    cxx_header = "arch/arm/isa.hh"
49
50    system = Param.System(Parent.any, "System this ISA object belongs to")
51
52    pmu = Param.ArmPMU(NULL, "Performance Monitoring Unit")
53
54    midr = Param.UInt32(0x410fc0f0, "MIDR value")
55
56    # See section B4.1.93 - B4.1.94 of the ARM ARM
57    #
58    # !ThumbEE | !Jazelle | Thumb | ARM
59    # Note: ThumbEE is disabled for now since we don't support CP14
60    # config registers and jumping to ThumbEE vectors
61    id_pfr0 = Param.UInt32(0x00000031, "Processor Feature Register 0")
62    # !Timer | Virti | !M Profile | TrustZone | ARMv4
63    id_pfr1 = Param.UInt32(0x00001011, "Processor Feature Register 1")
64
65    # See section B4.1.89 - B4.1.92 of the ARM ARM
66    #  VMSAv7 support
67    id_mmfr0 = Param.UInt32(0x10201103, "Memory Model Feature Register 0")
68    id_mmfr1 = Param.UInt32(0x00000000, "Memory Model Feature Register 1")
69    # no HW access | WFI stalling | ISB and DSB |
70    # all TLB maintenance | no Harvard
71    id_mmfr2 = Param.UInt32(0x01230000, "Memory Model Feature Register 2")
72    # SuperSec | Coherent TLB | Bcast Maint |
73    # BP Maint | Cache Maint Set/way | Cache Maint MVA
74    id_mmfr3 = Param.UInt32(0x02102211, "Memory Model Feature Register 3")
75
76    # See section B4.1.84 of ARM ARM
77    # All values are latest for ARMv7-A profile
78    id_isar0 = Param.UInt32(0x02101111, "Instruction Set Attribute Register 0")
79    id_isar1 = Param.UInt32(0x02112111, "Instruction Set Attribute Register 1")
80    id_isar2 = Param.UInt32(0x21232141, "Instruction Set Attribute Register 2")
81    id_isar3 = Param.UInt32(0x01112131, "Instruction Set Attribute Register 3")
82    id_isar4 = Param.UInt32(0x10010142, "Instruction Set Attribute Register 4")
83    id_isar5 = Param.UInt32(0x00000000, "Instruction Set Attribute Register 5")
84
85    fpsid = Param.UInt32(0x410430a0, "Floating-point System ID Register")
86
87    # [31:0] is implementation defined
88    id_aa64afr0_el1 = Param.UInt64(0x0000000000000000,
89        "AArch64 Auxiliary Feature Register 0")
90    # Reserved for future expansion
91    id_aa64afr1_el1 = Param.UInt64(0x0000000000000000,
92        "AArch64 Auxiliary Feature Register 1")
93
94    # 1 CTX CMPs | 2 WRPs | 2 BRPs | !PMU | !Trace | Debug v8-A
95    id_aa64dfr0_el1 = Param.UInt64(0x0000000000101006,
96        "AArch64 Debug Feature Register 0")
97    # Reserved for future expansion
98    id_aa64dfr1_el1 = Param.UInt64(0x0000000000000000,
99        "AArch64 Debug Feature Register 1")
100
101    # !CRC32 | !SHA2 | !SHA1 | !AES
102    id_aa64isar0_el1 = Param.UInt64(0x0000000000000000,
103        "AArch64 Instruction Set Attribute Register 0")
104    # Reserved for future expansion
105    id_aa64isar1_el1 = Param.UInt64(0x0000000000000000,
106        "AArch64 Instruction Set Attribute Register 1")
107
108    # 4K | 64K | !16K | !BigEndEL0 | !SNSMem | !BigEnd | 8b ASID | 40b PA
109    id_aa64mmfr0_el1 = Param.UInt64(0x0000000000f00002,
110        "AArch64 Memory Model Feature Register 0")
111    # Reserved for future expansion
112    id_aa64mmfr1_el1 = Param.UInt64(0x0000000000000000,
113        "AArch64 Memory Model Feature Register 1")
114
115    # !GICv3 CP15 | AdvSIMD | FP | !EL3 | !EL2 | EL1 (AArch64) | EL0 (AArch64)
116    # (no AArch32/64 interprocessing support for now)
117    id_aa64pfr0_el1 = Param.UInt64(0x0000000000000011,
118        "AArch64 Processor Feature Register 0")
119    # Reserved for future expansion
120    id_aa64pfr1_el1 = Param.UInt64(0x0000000000000000,
121        "AArch64 Processor Feature Register 1")
122